/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationQvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-28 09:59:42,703 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-28 09:59:42,705 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-28 09:59:42,746 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-28 09:59:42,747 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-28 09:59:42,747 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-28 09:59:42,748 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-28 09:59:42,750 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-28 09:59:42,751 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-28 09:59:42,753 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-28 09:59:42,754 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-28 09:59:42,755 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-28 09:59:42,755 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-28 09:59:42,760 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-28 09:59:42,761 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-28 09:59:42,764 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-28 09:59:42,764 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-28 09:59:42,765 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-28 09:59:42,767 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-28 09:59:42,770 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-28 09:59:42,772 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-28 09:59:42,773 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-28 09:59:42,774 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-28 09:59:42,774 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-28 09:59:42,775 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-28 09:59:42,778 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-28 09:59:42,783 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-28 09:59:42,784 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-28 09:59:42,785 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-28 09:59:42,786 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationQvasr_64.epf [2022-04-28 09:59:42,793 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-28 09:59:42,794 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-28 09:59:42,795 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-28 09:59:42,799 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-28 09:59:42,799 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-28 09:59:42,800 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-28 09:59:42,800 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-28 09:59:42,800 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-28 09:59:42,800 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-28 09:59:42,800 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-28 09:59:42,800 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-28 09:59:42,800 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-28 09:59:42,801 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-28 09:59:42,801 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-28 09:59:42,801 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-28 09:59:42,801 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 09:59:42,801 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-28 09:59:42,801 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-28 09:59:42,802 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-28 09:59:42,802 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-28 09:59:42,802 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-28 09:59:42,802 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=QVASR [2022-04-28 09:59:42,802 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-28 09:59:43,010 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-28 09:59:43,044 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-28 09:59:43,046 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-28 09:59:43,047 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-28 09:59:43,047 INFO L275 PluginConnector]: CDTParser initialized [2022-04-28 09:59:43,048 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-28 09:59:43,121 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fcf6e0ac6/c9f421e7c93e4b469795ae5c3ab5358f/FLAGf33f1991f [2022-04-28 09:59:43,500 INFO L306 CDTParser]: Found 1 translation units. [2022-04-28 09:59:43,501 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-28 09:59:43,509 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fcf6e0ac6/c9f421e7c93e4b469795ae5c3ab5358f/FLAGf33f1991f [2022-04-28 09:59:43,902 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fcf6e0ac6/c9f421e7c93e4b469795ae5c3ab5358f [2022-04-28 09:59:43,904 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-28 09:59:43,905 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-28 09:59:43,906 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-28 09:59:43,907 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-28 09:59:43,909 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-28 09:59:43,910 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 09:59:43" (1/1) ... [2022-04-28 09:59:43,910 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@cfa4b3c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:43, skipping insertion in model container [2022-04-28 09:59:43,911 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 09:59:43" (1/1) ... [2022-04-28 09:59:43,916 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-28 09:59:43,946 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-28 09:59:44,125 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-28 09:59:44,221 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 09:59:44,232 INFO L203 MainTranslator]: Completed pre-run [2022-04-28 09:59:44,256 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-28 09:59:44,308 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 09:59:44,328 INFO L208 MainTranslator]: Completed translation [2022-04-28 09:59:44,328 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44 WrapperNode [2022-04-28 09:59:44,328 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-28 09:59:44,329 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-28 09:59:44,329 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-28 09:59:44,329 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-28 09:59:44,339 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,339 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,364 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,364 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,471 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,480 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,500 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,507 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-28 09:59:44,508 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-28 09:59:44,508 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-28 09:59:44,509 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-28 09:59:44,518 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (1/1) ... [2022-04-28 09:59:44,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 09:59:44,533 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 09:59:44,549 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-28 09:59:44,565 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-28 09:59:44,594 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-28 09:59:44,594 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-28 09:59:44,594 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-28 09:59:44,594 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-28 09:59:44,594 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_func_def_resp_len [2022-04-28 09:59:44,594 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_is_naa5 [2022-04-28 09:59:44,595 INFO L138 BoogieDeclarations]: Found implementation of procedure dStrHex [2022-04-28 09:59:44,595 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_num [2022-04-28 09:59:44,595 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_llnum [2022-04-28 09:59:44,595 INFO L138 BoogieDeclarations]: Found implementation of procedure do_discover_list [2022-04-28 09:59:44,595 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-28 09:59:44,595 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-28 09:59:44,595 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-28 09:59:44,595 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-28 09:59:44,595 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure fopen [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure sscanf [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure strcmp [2022-04-28 09:59:44,596 INFO L130 BoogieDeclarations]: Found specification of procedure strchr [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure strlen [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure getopt_long [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure smp_initiator_open [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure smp_send_req [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_func_def_resp_len [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure smp_is_naa5 [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure dStrHex [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_num [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_llnum [2022-04-28 09:59:44,597 INFO L130 BoogieDeclarations]: Found specification of procedure do_discover_list [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure main6 [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure sprintf [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure toupper [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-28 09:59:44,598 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-28 09:59:44,599 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-28 09:59:44,599 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-28 09:59:44,599 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-28 09:59:44,599 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-28 09:59:44,747 INFO L234 CfgBuilder]: Building ICFG [2022-04-28 09:59:44,749 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-28 09:59:45,784 INFO L275 CfgBuilder]: Performing block encoding [2022-04-28 09:59:45,792 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-28 09:59:45,792 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-28 09:59:45,794 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 09:59:45 BoogieIcfgContainer [2022-04-28 09:59:45,794 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-28 09:59:45,796 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-28 09:59:45,796 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-28 09:59:45,799 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-28 09:59:45,799 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.04 09:59:43" (1/3) ... [2022-04-28 09:59:45,800 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5dca1415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 09:59:45, skipping insertion in model container [2022-04-28 09:59:45,800 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 09:59:44" (2/3) ... [2022-04-28 09:59:45,800 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5dca1415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 09:59:45, skipping insertion in model container [2022-04-28 09:59:45,800 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 09:59:45" (3/3) ... [2022-04-28 09:59:45,801 INFO L111 eAbstractionObserver]: Analyzing ICFG discover_list.c [2022-04-28 09:59:45,813 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-28 09:59:45,813 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-28 09:59:45,852 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-28 09:59:45,858 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4410c4b, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@72aea71c [2022-04-28 09:59:45,858 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-28 09:59:45,866 INFO L276 IsEmpty]: Start isEmpty. Operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-28 09:59:45,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-28 09:59:45,874 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 09:59:45,874 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 09:59:45,875 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 09:59:45,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 09:59:45,880 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 1 times [2022-04-28 09:59:45,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:45,887 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [346071362] [2022-04-28 09:59:45,896 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 09:59:45,896 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 2 times [2022-04-28 09:59:45,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 09:59:45,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551958150] [2022-04-28 09:59:45,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 09:59:45,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 09:59:46,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:46,252 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 09:59:46,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:46,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-28 09:59:46,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-28 09:59:46,313 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-28 09:59:46,318 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 09:59:46,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:46,334 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 09:59:46,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {94#true} is VALID [2022-04-28 09:59:46,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 09:59:46,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-28 09:59:46,335 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-28 09:59:46,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:46,358 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 09:59:46,359 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {94#true} is VALID [2022-04-28 09:59:46,359 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 09:59:46,359 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-28 09:59:46,361 INFO L272 TraceCheckUtils]: 0: Hoare triple {94#true} call ULTIMATE.init(); {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 09:59:46,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-28 09:59:46,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-28 09:59:46,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-28 09:59:46,363 INFO L272 TraceCheckUtils]: 4: Hoare triple {94#true} call #t~ret187 := main(); {94#true} is VALID [2022-04-28 09:59:46,363 INFO L290 TraceCheckUtils]: 5: Hoare triple {94#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {94#true} is VALID [2022-04-28 09:59:46,363 INFO L272 TraceCheckUtils]: 6: Hoare triple {94#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {94#true} is VALID [2022-04-28 09:59:46,364 INFO L290 TraceCheckUtils]: 7: Hoare triple {94#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {94#true} is VALID [2022-04-28 09:59:46,364 INFO L290 TraceCheckUtils]: 8: Hoare triple {94#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {94#true} is VALID [2022-04-28 09:59:46,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {94#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {94#true} is VALID [2022-04-28 09:59:46,365 INFO L290 TraceCheckUtils]: 10: Hoare triple {94#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-28 09:59:46,366 INFO L290 TraceCheckUtils]: 11: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-28 09:59:46,366 INFO L290 TraceCheckUtils]: 12: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} assume 1 == #t~mem153 && ~mnum_desc~0 > 40;havoc #t~mem153;~mnum_desc~0 := 40; {95#false} is VALID [2022-04-28 09:59:46,366 INFO L290 TraceCheckUtils]: 13: Hoare triple {95#false} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {95#false} is VALID [2022-04-28 09:59:46,367 INFO L290 TraceCheckUtils]: 14: Hoare triple {95#false} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {95#false} is VALID [2022-04-28 09:59:46,367 INFO L290 TraceCheckUtils]: 15: Hoare triple {95#false} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {95#false} is VALID [2022-04-28 09:59:46,367 INFO L272 TraceCheckUtils]: 16: Hoare triple {95#false} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:46,367 INFO L290 TraceCheckUtils]: 17: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 09:59:46,368 INFO L290 TraceCheckUtils]: 18: Hoare triple {94#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {94#true} is VALID [2022-04-28 09:59:46,368 INFO L290 TraceCheckUtils]: 19: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 09:59:46,368 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-28 09:59:46,369 INFO L290 TraceCheckUtils]: 21: Hoare triple {95#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {95#false} is VALID [2022-04-28 09:59:46,369 INFO L290 TraceCheckUtils]: 22: Hoare triple {95#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {95#false} is VALID [2022-04-28 09:59:46,369 INFO L290 TraceCheckUtils]: 23: Hoare triple {95#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {95#false} is VALID [2022-04-28 09:59:46,370 INFO L290 TraceCheckUtils]: 24: Hoare triple {95#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {95#false} is VALID [2022-04-28 09:59:46,370 INFO L290 TraceCheckUtils]: 25: Hoare triple {95#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {95#false} is VALID [2022-04-28 09:59:46,370 INFO L290 TraceCheckUtils]: 26: Hoare triple {95#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {95#false} is VALID [2022-04-28 09:59:46,371 INFO L290 TraceCheckUtils]: 27: Hoare triple {95#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {95#false} is VALID [2022-04-28 09:59:46,371 INFO L290 TraceCheckUtils]: 28: Hoare triple {95#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {95#false} is VALID [2022-04-28 09:59:46,372 INFO L290 TraceCheckUtils]: 29: Hoare triple {95#false} assume #t~short172; {95#false} is VALID [2022-04-28 09:59:46,373 INFO L290 TraceCheckUtils]: 30: Hoare triple {95#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {95#false} is VALID [2022-04-28 09:59:46,373 INFO L290 TraceCheckUtils]: 31: Hoare triple {95#false} assume 0 != #t~mem173;havoc #t~mem173; {95#false} is VALID [2022-04-28 09:59:46,373 INFO L272 TraceCheckUtils]: 32: Hoare triple {95#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {95#false} is VALID [2022-04-28 09:59:46,374 INFO L290 TraceCheckUtils]: 33: Hoare triple {95#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {95#false} is VALID [2022-04-28 09:59:46,374 INFO L290 TraceCheckUtils]: 34: Hoare triple {95#false} assume !(~len <= 0); {95#false} is VALID [2022-04-28 09:59:46,374 INFO L272 TraceCheckUtils]: 35: Hoare triple {95#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:46,375 INFO L290 TraceCheckUtils]: 36: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 09:59:46,378 INFO L290 TraceCheckUtils]: 37: Hoare triple {94#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {94#true} is VALID [2022-04-28 09:59:46,378 INFO L290 TraceCheckUtils]: 38: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 09:59:46,381 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-28 09:59:46,381 INFO L290 TraceCheckUtils]: 40: Hoare triple {95#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {95#false} is VALID [2022-04-28 09:59:46,383 INFO L290 TraceCheckUtils]: 41: Hoare triple {95#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {95#false} is VALID [2022-04-28 09:59:46,383 INFO L272 TraceCheckUtils]: 42: Hoare triple {95#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {95#false} is VALID [2022-04-28 09:59:46,384 INFO L290 TraceCheckUtils]: 43: Hoare triple {95#false} ~cond := #in~cond; {95#false} is VALID [2022-04-28 09:59:46,384 INFO L290 TraceCheckUtils]: 44: Hoare triple {95#false} assume 0 == ~cond; {95#false} is VALID [2022-04-28 09:59:46,384 INFO L290 TraceCheckUtils]: 45: Hoare triple {95#false} assume !false; {95#false} is VALID [2022-04-28 09:59:46,385 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-28 09:59:46,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 09:59:46,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551958150] [2022-04-28 09:59:46,387 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [551958150] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:46,387 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 09:59:46,387 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 09:59:46,390 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 09:59:46,390 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [346071362] [2022-04-28 09:59:46,390 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [346071362] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:46,390 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 09:59:46,390 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 09:59:46,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1239073986] [2022-04-28 09:59:46,391 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 09:59:46,397 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-28 09:59:46,399 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 09:59:46,401 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:46,455 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:46,455 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-28 09:59:46,455 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:46,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-28 09:59:46,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-28 09:59:46,488 INFO L87 Difference]: Start difference. First operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:47,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:47,611 INFO L93 Difference]: Finished difference Result 227 states and 347 transitions. [2022-04-28 09:59:47,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-28 09:59:47,611 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-28 09:59:47,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 09:59:47,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:47,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-28 09:59:47,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:47,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-28 09:59:47,636 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 347 transitions. [2022-04-28 09:59:48,013 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 347 edges. 347 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:48,031 INFO L225 Difference]: With dead ends: 227 [2022-04-28 09:59:48,031 INFO L226 Difference]: Without dead ends: 103 [2022-04-28 09:59:48,035 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-28 09:59:48,039 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 202 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-28 09:59:48,040 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [207 Valid, 141 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-28 09:59:48,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-28 09:59:48,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 76. [2022-04-28 09:59:48,074 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 09:59:48,075 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:48,076 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:48,076 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:48,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:48,084 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-28 09:59:48,084 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-28 09:59:48,086 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:48,086 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:48,086 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-28 09:59:48,087 INFO L87 Difference]: Start difference. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-28 09:59:48,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:48,093 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-28 09:59:48,093 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-28 09:59:48,094 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:48,094 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:48,095 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 09:59:48,095 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 09:59:48,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:48,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 98 transitions. [2022-04-28 09:59:48,100 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 98 transitions. Word has length 46 [2022-04-28 09:59:48,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 09:59:48,100 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 98 transitions. [2022-04-28 09:59:48,101 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:48,101 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 98 transitions. [2022-04-28 09:59:48,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:48,224 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 98 transitions. [2022-04-28 09:59:48,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-28 09:59:48,228 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 09:59:48,229 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 09:59:48,229 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-28 09:59:48,229 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 09:59:48,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 09:59:48,230 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 1 times [2022-04-28 09:59:48,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:48,230 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1241237107] [2022-04-28 09:59:48,231 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 09:59:48,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 2 times [2022-04-28 09:59:48,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 09:59:48,235 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477612737] [2022-04-28 09:59:48,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 09:59:48,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 09:59:48,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:48,429 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 09:59:48,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:48,442 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-28 09:59:48,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-28 09:59:48,443 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-28 09:59:48,445 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 09:59:48,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:48,509 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:48,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:48,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:48,514 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} {929#true} #672#return; {930#false} is VALID [2022-04-28 09:59:48,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-28 09:59:48,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:48,520 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {929#true} is VALID [2022-04-28 09:59:48,521 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {929#true} is VALID [2022-04-28 09:59:48,521 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-28 09:59:48,521 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {930#false} #656#return; {930#false} is VALID [2022-04-28 09:59:48,522 INFO L272 TraceCheckUtils]: 0: Hoare triple {929#true} call ULTIMATE.init(); {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 09:59:48,522 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-28 09:59:48,522 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-28 09:59:48,523 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-28 09:59:48,523 INFO L272 TraceCheckUtils]: 4: Hoare triple {929#true} call #t~ret187 := main(); {929#true} is VALID [2022-04-28 09:59:48,523 INFO L290 TraceCheckUtils]: 5: Hoare triple {929#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {929#true} is VALID [2022-04-28 09:59:48,523 INFO L272 TraceCheckUtils]: 6: Hoare triple {929#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {929#true} is VALID [2022-04-28 09:59:48,523 INFO L290 TraceCheckUtils]: 7: Hoare triple {929#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {929#true} is VALID [2022-04-28 09:59:48,523 INFO L290 TraceCheckUtils]: 8: Hoare triple {929#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {929#true} is VALID [2022-04-28 09:59:48,524 INFO L290 TraceCheckUtils]: 9: Hoare triple {929#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:48,524 INFO L290 TraceCheckUtils]: 10: Hoare triple {929#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {929#true} is VALID [2022-04-28 09:59:48,524 INFO L290 TraceCheckUtils]: 11: Hoare triple {929#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:48,524 INFO L290 TraceCheckUtils]: 12: Hoare triple {929#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {929#true} is VALID [2022-04-28 09:59:48,524 INFO L290 TraceCheckUtils]: 13: Hoare triple {929#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:48,524 INFO L290 TraceCheckUtils]: 14: Hoare triple {929#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {929#true} is VALID [2022-04-28 09:59:48,525 INFO L290 TraceCheckUtils]: 15: Hoare triple {929#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {929#true} is VALID [2022-04-28 09:59:48,526 INFO L272 TraceCheckUtils]: 16: Hoare triple {929#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {943#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:48,528 INFO L290 TraceCheckUtils]: 17: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:48,529 INFO L290 TraceCheckUtils]: 18: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:48,529 INFO L290 TraceCheckUtils]: 19: Hoare triple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:48,534 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 18446744073709551616)))} {929#true} #672#return; {930#false} is VALID [2022-04-28 09:59:48,534 INFO L290 TraceCheckUtils]: 21: Hoare triple {930#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {930#false} is VALID [2022-04-28 09:59:48,534 INFO L290 TraceCheckUtils]: 22: Hoare triple {930#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {930#false} is VALID [2022-04-28 09:59:48,534 INFO L290 TraceCheckUtils]: 23: Hoare triple {930#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {930#false} is VALID [2022-04-28 09:59:48,535 INFO L290 TraceCheckUtils]: 24: Hoare triple {930#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {930#false} is VALID [2022-04-28 09:59:48,535 INFO L290 TraceCheckUtils]: 25: Hoare triple {930#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {930#false} is VALID [2022-04-28 09:59:48,535 INFO L290 TraceCheckUtils]: 26: Hoare triple {930#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {930#false} is VALID [2022-04-28 09:59:48,535 INFO L290 TraceCheckUtils]: 27: Hoare triple {930#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {930#false} is VALID [2022-04-28 09:59:48,535 INFO L290 TraceCheckUtils]: 28: Hoare triple {930#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {930#false} is VALID [2022-04-28 09:59:48,535 INFO L290 TraceCheckUtils]: 29: Hoare triple {930#false} assume #t~short172; {930#false} is VALID [2022-04-28 09:59:48,536 INFO L290 TraceCheckUtils]: 30: Hoare triple {930#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {930#false} is VALID [2022-04-28 09:59:48,536 INFO L290 TraceCheckUtils]: 31: Hoare triple {930#false} assume 0 != #t~mem173;havoc #t~mem173; {930#false} is VALID [2022-04-28 09:59:48,536 INFO L272 TraceCheckUtils]: 32: Hoare triple {930#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {930#false} is VALID [2022-04-28 09:59:48,536 INFO L290 TraceCheckUtils]: 33: Hoare triple {930#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {930#false} is VALID [2022-04-28 09:59:48,536 INFO L290 TraceCheckUtils]: 34: Hoare triple {930#false} assume !(~len <= 0); {930#false} is VALID [2022-04-28 09:59:48,537 INFO L272 TraceCheckUtils]: 35: Hoare triple {930#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {943#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:48,537 INFO L290 TraceCheckUtils]: 36: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {929#true} is VALID [2022-04-28 09:59:48,537 INFO L290 TraceCheckUtils]: 37: Hoare triple {929#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {929#true} is VALID [2022-04-28 09:59:48,537 INFO L290 TraceCheckUtils]: 38: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-28 09:59:48,537 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {929#true} {930#false} #656#return; {930#false} is VALID [2022-04-28 09:59:48,537 INFO L290 TraceCheckUtils]: 40: Hoare triple {930#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {930#false} is VALID [2022-04-28 09:59:48,538 INFO L290 TraceCheckUtils]: 41: Hoare triple {930#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {930#false} is VALID [2022-04-28 09:59:48,538 INFO L272 TraceCheckUtils]: 42: Hoare triple {930#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {930#false} is VALID [2022-04-28 09:59:48,538 INFO L290 TraceCheckUtils]: 43: Hoare triple {930#false} ~cond := #in~cond; {930#false} is VALID [2022-04-28 09:59:48,538 INFO L290 TraceCheckUtils]: 44: Hoare triple {930#false} assume 0 == ~cond; {930#false} is VALID [2022-04-28 09:59:48,538 INFO L290 TraceCheckUtils]: 45: Hoare triple {930#false} assume !false; {930#false} is VALID [2022-04-28 09:59:48,539 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 09:59:48,539 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 09:59:48,539 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477612737] [2022-04-28 09:59:48,539 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1477612737] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 09:59:48,539 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [890169286] [2022-04-28 09:59:48,540 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 09:59:48,540 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 09:59:48,540 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 09:59:48,547 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 09:59:48,572 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-28 09:59:49,038 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 09:59:49,039 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 09:59:49,045 INFO L263 TraceCheckSpWp]: Trace formula consists of 681 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-28 09:59:49,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:49,080 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 09:59:49,518 INFO L272 TraceCheckUtils]: 0: Hoare triple {929#true} call ULTIMATE.init(); {929#true} is VALID [2022-04-28 09:59:49,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-28 09:59:49,526 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-28 09:59:49,528 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-28 09:59:49,529 INFO L272 TraceCheckUtils]: 4: Hoare triple {929#true} call #t~ret187 := main(); {929#true} is VALID [2022-04-28 09:59:49,529 INFO L290 TraceCheckUtils]: 5: Hoare triple {929#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {929#true} is VALID [2022-04-28 09:59:49,529 INFO L272 TraceCheckUtils]: 6: Hoare triple {929#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {929#true} is VALID [2022-04-28 09:59:49,529 INFO L290 TraceCheckUtils]: 7: Hoare triple {929#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {929#true} is VALID [2022-04-28 09:59:49,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {929#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 9: Hoare triple {929#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 10: Hoare triple {929#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 11: Hoare triple {929#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 12: Hoare triple {929#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 13: Hoare triple {929#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 14: Hoare triple {929#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {929#true} is VALID [2022-04-28 09:59:49,530 INFO L290 TraceCheckUtils]: 15: Hoare triple {929#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {929#true} is VALID [2022-04-28 09:59:49,531 INFO L272 TraceCheckUtils]: 16: Hoare triple {929#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {929#true} is VALID [2022-04-28 09:59:49,531 INFO L290 TraceCheckUtils]: 17: Hoare triple {929#true} #t~loopctr188 := 0; {929#true} is VALID [2022-04-28 09:59:49,531 INFO L290 TraceCheckUtils]: 18: Hoare triple {929#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {929#true} is VALID [2022-04-28 09:59:49,531 INFO L290 TraceCheckUtils]: 19: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-28 09:59:49,531 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {929#true} {929#true} #672#return; {929#true} is VALID [2022-04-28 09:59:49,531 INFO L290 TraceCheckUtils]: 21: Hoare triple {929#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {929#true} is VALID [2022-04-28 09:59:49,531 INFO L290 TraceCheckUtils]: 22: Hoare triple {929#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 23: Hoare triple {929#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 24: Hoare triple {929#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 25: Hoare triple {929#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 26: Hoare triple {929#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 27: Hoare triple {929#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 28: Hoare triple {929#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 29: Hoare triple {929#true} assume #t~short172; {929#true} is VALID [2022-04-28 09:59:49,532 INFO L290 TraceCheckUtils]: 30: Hoare triple {929#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {929#true} is VALID [2022-04-28 09:59:49,533 INFO L290 TraceCheckUtils]: 31: Hoare triple {929#true} assume 0 != #t~mem173;havoc #t~mem173; {929#true} is VALID [2022-04-28 09:59:49,533 INFO L272 TraceCheckUtils]: 32: Hoare triple {929#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {929#true} is VALID [2022-04-28 09:59:49,533 INFO L290 TraceCheckUtils]: 33: Hoare triple {929#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {929#true} is VALID [2022-04-28 09:59:49,533 INFO L290 TraceCheckUtils]: 34: Hoare triple {929#true} assume !(~len <= 0); {929#true} is VALID [2022-04-28 09:59:49,533 INFO L272 TraceCheckUtils]: 35: Hoare triple {929#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {929#true} is VALID [2022-04-28 09:59:49,536 INFO L290 TraceCheckUtils]: 36: Hoare triple {929#true} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:49,537 INFO L290 TraceCheckUtils]: 37: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1060#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551616) 1))} is VALID [2022-04-28 09:59:49,538 INFO L290 TraceCheckUtils]: 38: Hoare triple {1060#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551616) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1060#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551616) 1))} is VALID [2022-04-28 09:59:49,539 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {1060#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551616) 1))} {929#true} #656#return; {930#false} is VALID [2022-04-28 09:59:49,539 INFO L290 TraceCheckUtils]: 40: Hoare triple {930#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {930#false} is VALID [2022-04-28 09:59:49,539 INFO L290 TraceCheckUtils]: 41: Hoare triple {930#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {930#false} is VALID [2022-04-28 09:59:49,539 INFO L272 TraceCheckUtils]: 42: Hoare triple {930#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {930#false} is VALID [2022-04-28 09:59:49,540 INFO L290 TraceCheckUtils]: 43: Hoare triple {930#false} ~cond := #in~cond; {930#false} is VALID [2022-04-28 09:59:49,540 INFO L290 TraceCheckUtils]: 44: Hoare triple {930#false} assume 0 == ~cond; {930#false} is VALID [2022-04-28 09:59:49,540 INFO L290 TraceCheckUtils]: 45: Hoare triple {930#false} assume !false; {930#false} is VALID [2022-04-28 09:59:49,540 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 09:59:49,540 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 09:59:49,540 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [890169286] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:49,541 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 09:59:49,541 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2022-04-28 09:59:49,541 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 09:59:49,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1241237107] [2022-04-28 09:59:49,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1241237107] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:49,542 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 09:59:49,542 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 09:59:49,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206021141] [2022-04-28 09:59:49,542 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 09:59:49,543 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 46 [2022-04-28 09:59:49,543 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 09:59:49,544 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 09:59:49,592 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:49,592 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 09:59:49,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:49,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 09:59:49,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-04-28 09:59:49,593 INFO L87 Difference]: Start difference. First operand 76 states and 98 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 09:59:49,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:49,865 INFO L93 Difference]: Finished difference Result 136 states and 178 transitions. [2022-04-28 09:59:49,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 09:59:49,865 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 46 [2022-04-28 09:59:49,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 09:59:49,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 09:59:49,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-28 09:59:49,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 09:59:49,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-28 09:59:49,872 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-28 09:59:50,029 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:50,033 INFO L225 Difference]: With dead ends: 136 [2022-04-28 09:59:50,033 INFO L226 Difference]: Without dead ends: 77 [2022-04-28 09:59:50,034 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 09:59:50,035 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 2 mSDsluCounter, 184 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 09:59:50,035 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 278 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 09:59:50,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-28 09:59:50,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2022-04-28 09:59:50,047 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 09:59:50,048 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:50,048 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:50,049 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:50,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:50,053 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-28 09:59:50,053 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-28 09:59:50,055 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:50,055 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:50,056 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-28 09:59:50,057 INFO L87 Difference]: Start difference. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-28 09:59:50,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:50,062 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-28 09:59:50,062 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-28 09:59:50,062 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:50,062 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:50,063 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 09:59:50,063 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 09:59:50,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:50,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 99 transitions. [2022-04-28 09:59:50,067 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 99 transitions. Word has length 46 [2022-04-28 09:59:50,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 09:59:50,067 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 99 transitions. [2022-04-28 09:59:50,067 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 09:59:50,067 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 77 states and 99 transitions. [2022-04-28 09:59:50,196 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:50,196 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-28 09:59:50,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-28 09:59:50,199 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 09:59:50,200 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 09:59:50,226 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-28 09:59:50,400 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 09:59:50,401 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 09:59:50,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 09:59:50,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 1 times [2022-04-28 09:59:50,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:50,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [998453849] [2022-04-28 09:59:50,402 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 09:59:50,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 2 times [2022-04-28 09:59:50,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 09:59:50,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1135501735] [2022-04-28 09:59:50,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 09:59:50,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 09:59:50,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:50,526 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 09:59:50,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:50,542 INFO L290 TraceCheckUtils]: 0: Hoare triple {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 09:59:50,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 09:59:50,542 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 09:59:50,545 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 09:59:50,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:50,659 INFO L290 TraceCheckUtils]: 0: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:50,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1684#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 09:59:50,660 INFO L290 TraceCheckUtils]: 2: Hoare triple {1684#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:50,661 INFO L290 TraceCheckUtils]: 3: Hoare triple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:50,662 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 09:59:50,662 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-28 09:59:50,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:50,675 INFO L290 TraceCheckUtils]: 0: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-28 09:59:50,675 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-28 09:59:50,676 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1666#true} is VALID [2022-04-28 09:59:50,676 INFO L290 TraceCheckUtils]: 3: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-28 09:59:50,676 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 09:59:50,677 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 09:59:50,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 09:59:50,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 09:59:50,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 09:59:50,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-28 09:59:50,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-28 09:59:50,677 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-28 09:59:50,678 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:50,679 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-28 09:59:50,679 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-28 09:59:50,680 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {1682#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:50,680 INFO L290 TraceCheckUtils]: 17: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:50,681 INFO L290 TraceCheckUtils]: 18: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1684#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 09:59:50,682 INFO L290 TraceCheckUtils]: 19: Hoare triple {1684#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:50,683 INFO L290 TraceCheckUtils]: 20: Hoare triple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:50,684 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 09:59:50,684 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-28 09:59:50,684 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-28 09:59:50,684 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-28 09:59:50,684 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-28 09:59:50,684 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-28 09:59:50,685 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-28 09:59:50,686 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-28 09:59:50,686 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-28 09:59:50,686 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1682#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:50,686 INFO L290 TraceCheckUtils]: 37: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-28 09:59:50,686 INFO L290 TraceCheckUtils]: 38: Hoare triple {1666#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-28 09:59:50,686 INFO L290 TraceCheckUtils]: 39: Hoare triple {1666#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1666#true} is VALID [2022-04-28 09:59:50,686 INFO L290 TraceCheckUtils]: 40: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-28 09:59:50,686 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 09:59:50,687 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-28 09:59:50,687 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-28 09:59:50,687 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-28 09:59:50,687 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-28 09:59:50,687 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-28 09:59:50,687 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-28 09:59:50,688 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-28 09:59:50,688 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 09:59:50,688 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1135501735] [2022-04-28 09:59:50,688 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1135501735] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 09:59:50,688 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1646035034] [2022-04-28 09:59:50,688 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 09:59:50,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 09:59:50,689 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 09:59:50,690 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 09:59:50,720 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-28 09:59:51,251 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 09:59:51,251 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 09:59:51,255 INFO L263 TraceCheckSpWp]: Trace formula consists of 695 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-28 09:59:51,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:51,276 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 09:59:51,965 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-28 09:59:51,966 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-28 09:59:51,967 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {1666#true} is VALID [2022-04-28 09:59:51,968 INFO L290 TraceCheckUtils]: 17: Hoare triple {1666#true} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:51,969 INFO L290 TraceCheckUtils]: 18: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:51,977 INFO L290 TraceCheckUtils]: 19: Hoare triple {1743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1747#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551617)) (- 18446744073709551616)) (+ 2 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) 18446744073709551616)))} is VALID [2022-04-28 09:59:51,978 INFO L290 TraceCheckUtils]: 20: Hoare triple {1747#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551617)) (- 18446744073709551616)) (+ 2 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1747#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551617)) (- 18446744073709551616)) (+ 2 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) 18446744073709551616)))} is VALID [2022-04-28 09:59:51,980 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1747#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551617)) (- 18446744073709551616)) (+ 2 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) 18446744073709551616)))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 09:59:51,980 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-28 09:59:51,980 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-28 09:59:51,980 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-28 09:59:51,981 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L290 TraceCheckUtils]: 37: Hoare triple {1667#false} #t~loopctr188 := 0; {1667#false} is VALID [2022-04-28 09:59:51,982 INFO L290 TraceCheckUtils]: 38: Hoare triple {1667#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L290 TraceCheckUtils]: 39: Hoare triple {1667#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L290 TraceCheckUtils]: 40: Hoare triple {1667#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1667#false} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-28 09:59:51,983 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-28 09:59:51,984 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-28 09:59:51,984 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 09:59:51,984 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 09:59:52,253 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-28 09:59:52,255 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-28 09:59:52,255 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-28 09:59:52,256 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-28 09:59:52,256 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-28 09:59:52,256 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-28 09:59:52,256 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 09:59:52,256 INFO L290 TraceCheckUtils]: 40: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-28 09:59:52,256 INFO L290 TraceCheckUtils]: 39: Hoare triple {1666#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1666#true} is VALID [2022-04-28 09:59:52,256 INFO L290 TraceCheckUtils]: 38: Hoare triple {1666#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-28 09:59:52,256 INFO L290 TraceCheckUtils]: 37: Hoare triple {1666#true} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-28 09:59:52,257 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1666#true} is VALID [2022-04-28 09:59:52,257 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-28 09:59:52,257 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-28 09:59:52,257 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-28 09:59:52,257 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-28 09:59:52,257 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-28 09:59:52,257 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-28 09:59:52,257 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-28 09:59:52,258 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-28 09:59:52,259 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1913#(not (= 32 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 09:59:52,260 INFO L290 TraceCheckUtils]: 20: Hoare triple {1913#(not (= 32 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1913#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:52,260 INFO L290 TraceCheckUtils]: 19: Hoare triple {1920#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {1913#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:52,262 INFO L290 TraceCheckUtils]: 18: Hoare triple {1924#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1920#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:52,262 INFO L290 TraceCheckUtils]: 17: Hoare triple {1666#true} #t~loopctr188 := 0; {1924#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 09:59:52,262 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {1666#true} is VALID [2022-04-28 09:59:52,262 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-28 09:59:52,263 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-28 09:59:52,264 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:52,264 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-28 09:59:52,264 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:52,264 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-28 09:59:52,264 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 09:59:52,264 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 09:59:52,265 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1666#true} is VALID [2022-04-28 09:59:52,267 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-28 09:59:52,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1646035034] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 09:59:52,267 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 09:59:52,267 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 12 [2022-04-28 09:59:52,268 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 09:59:52,268 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [998453849] [2022-04-28 09:59:52,268 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [998453849] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:52,268 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 09:59:52,268 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-28 09:59:52,268 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667568933] [2022-04-28 09:59:52,268 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 09:59:52,269 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 48 [2022-04-28 09:59:52,270 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 09:59:52,270 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:52,321 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:52,321 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-28 09:59:52,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:52,321 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-28 09:59:52,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2022-04-28 09:59:52,322 INFO L87 Difference]: Start difference. First operand 77 states and 99 transitions. Second operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:53,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:53,346 INFO L93 Difference]: Finished difference Result 142 states and 186 transitions. [2022-04-28 09:59:53,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-28 09:59:53,346 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 48 [2022-04-28 09:59:53,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 09:59:53,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:53,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 183 transitions. [2022-04-28 09:59:53,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:53,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 183 transitions. [2022-04-28 09:59:53,354 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 183 transitions. [2022-04-28 09:59:53,522 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:53,527 INFO L225 Difference]: With dead ends: 142 [2022-04-28 09:59:53,527 INFO L226 Difference]: Without dead ends: 82 [2022-04-28 09:59:53,533 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 95 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=64, Invalid=176, Unknown=0, NotChecked=0, Total=240 [2022-04-28 09:59:53,535 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 333 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 333 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-28 09:59:53,536 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 333 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-28 09:59:53,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-04-28 09:59:53,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 78. [2022-04-28 09:59:53,553 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 09:59:53,554 INFO L82 GeneralOperation]: Start isEquivalent. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:53,554 INFO L74 IsIncluded]: Start isIncluded. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:53,554 INFO L87 Difference]: Start difference. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:53,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:53,560 INFO L93 Difference]: Finished difference Result 82 states and 106 transitions. [2022-04-28 09:59:53,560 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 106 transitions. [2022-04-28 09:59:53,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:53,561 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:53,561 INFO L74 IsIncluded]: Start isIncluded. First operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 82 states. [2022-04-28 09:59:53,564 INFO L87 Difference]: Start difference. First operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 82 states. [2022-04-28 09:59:53,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:53,567 INFO L93 Difference]: Finished difference Result 82 states and 106 transitions. [2022-04-28 09:59:53,567 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 106 transitions. [2022-04-28 09:59:53,568 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:53,568 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:53,568 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 09:59:53,568 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 09:59:53,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:53,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 100 transitions. [2022-04-28 09:59:53,573 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 100 transitions. Word has length 48 [2022-04-28 09:59:53,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 09:59:53,573 INFO L495 AbstractCegarLoop]: Abstraction has 78 states and 100 transitions. [2022-04-28 09:59:53,574 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:53,574 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 78 states and 100 transitions. [2022-04-28 09:59:53,691 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:53,691 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 100 transitions. [2022-04-28 09:59:53,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-28 09:59:53,692 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 09:59:53,692 INFO L195 NwaCegarLoop]: trace histogram [4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 09:59:53,711 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-28 09:59:53,899 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-28 09:59:53,900 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 09:59:53,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 09:59:53,900 INFO L85 PathProgramCache]: Analyzing trace with hash -110265974, now seen corresponding path program 3 times [2022-04-28 09:59:53,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:53,900 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1624506804] [2022-04-28 09:59:53,901 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 09:59:53,901 INFO L85 PathProgramCache]: Analyzing trace with hash -110265974, now seen corresponding path program 4 times [2022-04-28 09:59:53,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 09:59:53,901 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781647871] [2022-04-28 09:59:53,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 09:59:53,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 09:59:53,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:54,032 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 09:59:54,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:54,043 INFO L290 TraceCheckUtils]: 0: Hoare triple {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,043 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 09:59:54,043 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 09:59:54,046 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 09:59:54,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:54,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:54,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:54,151 INFO L290 TraceCheckUtils]: 2: Hoare triple {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2612#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 2) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 09:59:54,152 INFO L290 TraceCheckUtils]: 3: Hoare triple {2612#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 2) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:54,152 INFO L290 TraceCheckUtils]: 4: Hoare triple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:54,153 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {2591#true} #672#return; {2592#false} is VALID [2022-04-28 09:59:54,153 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-04-28 09:59:54,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:54,161 INFO L290 TraceCheckUtils]: 0: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-28 09:59:54,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:54,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:54,161 INFO L290 TraceCheckUtils]: 3: Hoare triple {2591#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2591#true} is VALID [2022-04-28 09:59:54,162 INFO L290 TraceCheckUtils]: 4: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 09:59:54,162 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2591#true} {2592#false} #656#return; {2592#false} is VALID [2022-04-28 09:59:54,163 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 09:59:54,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,163 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 09:59:54,163 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 09:59:54,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-28 09:59:54,164 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,165 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-28 09:59:54,165 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-28 09:59:54,166 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {2609#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:54,166 INFO L290 TraceCheckUtils]: 17: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:54,167 INFO L290 TraceCheckUtils]: 18: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:54,168 INFO L290 TraceCheckUtils]: 19: Hoare triple {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2612#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 2) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 09:59:54,169 INFO L290 TraceCheckUtils]: 20: Hoare triple {2612#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 2) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:54,170 INFO L290 TraceCheckUtils]: 21: Hoare triple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:54,171 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {2591#true} #672#return; {2592#false} is VALID [2022-04-28 09:59:54,171 INFO L290 TraceCheckUtils]: 23: Hoare triple {2592#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2592#false} is VALID [2022-04-28 09:59:54,171 INFO L290 TraceCheckUtils]: 24: Hoare triple {2592#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {2592#false} is VALID [2022-04-28 09:59:54,171 INFO L290 TraceCheckUtils]: 25: Hoare triple {2592#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2592#false} is VALID [2022-04-28 09:59:54,171 INFO L290 TraceCheckUtils]: 26: Hoare triple {2592#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {2592#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 28: Hoare triple {2592#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 29: Hoare triple {2592#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 30: Hoare triple {2592#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 31: Hoare triple {2592#false} assume #t~short172; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 32: Hoare triple {2592#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 33: Hoare triple {2592#false} assume 0 != #t~mem173;havoc #t~mem173; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L272 TraceCheckUtils]: 34: Hoare triple {2592#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 35: Hoare triple {2592#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2592#false} is VALID [2022-04-28 09:59:54,172 INFO L290 TraceCheckUtils]: 36: Hoare triple {2592#false} assume !(~len <= 0); {2592#false} is VALID [2022-04-28 09:59:54,173 INFO L272 TraceCheckUtils]: 37: Hoare triple {2592#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2609#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:54,173 INFO L290 TraceCheckUtils]: 38: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-28 09:59:54,173 INFO L290 TraceCheckUtils]: 39: Hoare triple {2591#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:54,173 INFO L290 TraceCheckUtils]: 40: Hoare triple {2591#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:54,173 INFO L290 TraceCheckUtils]: 41: Hoare triple {2591#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2591#true} is VALID [2022-04-28 09:59:54,173 INFO L290 TraceCheckUtils]: 42: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 09:59:54,173 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2591#true} {2592#false} #656#return; {2592#false} is VALID [2022-04-28 09:59:54,173 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-28 09:59:54,174 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-28 09:59:54,174 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-28 09:59:54,174 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-28 09:59:54,174 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-28 09:59:54,174 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-28 09:59:54,174 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-28 09:59:54,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 09:59:54,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781647871] [2022-04-28 09:59:54,175 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1781647871] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 09:59:54,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1752592902] [2022-04-28 09:59:54,175 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 09:59:54,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 09:59:54,175 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 09:59:54,176 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 09:59:54,206 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-28 09:59:54,404 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 09:59:54,404 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 09:59:54,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 709 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-28 09:59:54,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:54,429 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 09:59:54,787 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2591#true} is VALID [2022-04-28 09:59:54,787 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,787 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-28 09:59:54,788 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,789 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-28 09:59:54,789 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,789 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-28 09:59:54,789 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-28 09:59:54,789 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {2591#true} is VALID [2022-04-28 09:59:54,790 INFO L290 TraceCheckUtils]: 17: Hoare triple {2591#true} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 18: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 19: Hoare triple {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 20: Hoare triple {2591#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2591#true} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 21: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 09:59:54,791 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2591#true} {2591#true} #672#return; {2591#true} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 23: Hoare triple {2591#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2591#true} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 24: Hoare triple {2591#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,791 INFO L290 TraceCheckUtils]: 25: Hoare triple {2591#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 26: Hoare triple {2591#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 27: Hoare triple {2591#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 28: Hoare triple {2591#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 29: Hoare triple {2591#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 30: Hoare triple {2591#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 31: Hoare triple {2591#true} assume #t~short172; {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 32: Hoare triple {2591#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:54,792 INFO L290 TraceCheckUtils]: 33: Hoare triple {2591#true} assume 0 != #t~mem173;havoc #t~mem173; {2591#true} is VALID [2022-04-28 09:59:54,793 INFO L272 TraceCheckUtils]: 34: Hoare triple {2591#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2591#true} is VALID [2022-04-28 09:59:54,793 INFO L290 TraceCheckUtils]: 35: Hoare triple {2591#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2591#true} is VALID [2022-04-28 09:59:54,793 INFO L290 TraceCheckUtils]: 36: Hoare triple {2591#true} assume !(~len <= 0); {2591#true} is VALID [2022-04-28 09:59:54,793 INFO L272 TraceCheckUtils]: 37: Hoare triple {2591#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2591#true} is VALID [2022-04-28 09:59:54,793 INFO L290 TraceCheckUtils]: 38: Hoare triple {2591#true} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:54,794 INFO L290 TraceCheckUtils]: 39: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:54,795 INFO L290 TraceCheckUtils]: 40: Hoare triple {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 09:59:54,796 INFO L290 TraceCheckUtils]: 41: Hoare triple {2738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2742#(< 0 (+ 1 (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 09:59:54,797 INFO L290 TraceCheckUtils]: 42: Hoare triple {2742#(< 0 (+ 1 (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2742#(< 0 (+ 1 (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 09:59:54,798 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2742#(< 0 (+ 1 (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} {2591#true} #656#return; {2592#false} is VALID [2022-04-28 09:59:54,798 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-28 09:59:54,798 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-28 09:59:54,798 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-28 09:59:54,798 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-28 09:59:54,798 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-28 09:59:54,798 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-28 09:59:54,799 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-28 09:59:54,799 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 09:59:55,021 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-28 09:59:55,022 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-28 09:59:55,022 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-28 09:59:55,022 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-28 09:59:55,022 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-28 09:59:55,022 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-28 09:59:55,023 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2788#(not (= |#Ultimate.C_memset_#amount| 80))} {2591#true} #656#return; {2592#false} is VALID [2022-04-28 09:59:55,023 INFO L290 TraceCheckUtils]: 42: Hoare triple {2788#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2788#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 09:59:55,024 INFO L290 TraceCheckUtils]: 41: Hoare triple {2795#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2788#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 09:59:55,025 INFO L290 TraceCheckUtils]: 40: Hoare triple {2799#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2795#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:55,026 INFO L290 TraceCheckUtils]: 39: Hoare triple {2803#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2799#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 09:59:55,026 INFO L290 TraceCheckUtils]: 38: Hoare triple {2591#true} #t~loopctr188 := 0; {2803#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 09:59:55,026 INFO L272 TraceCheckUtils]: 37: Hoare triple {2591#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2591#true} is VALID [2022-04-28 09:59:55,026 INFO L290 TraceCheckUtils]: 36: Hoare triple {2591#true} assume !(~len <= 0); {2591#true} is VALID [2022-04-28 09:59:55,026 INFO L290 TraceCheckUtils]: 35: Hoare triple {2591#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2591#true} is VALID [2022-04-28 09:59:55,026 INFO L272 TraceCheckUtils]: 34: Hoare triple {2591#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 33: Hoare triple {2591#true} assume 0 != #t~mem173;havoc #t~mem173; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 32: Hoare triple {2591#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 31: Hoare triple {2591#true} assume #t~short172; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 30: Hoare triple {2591#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 29: Hoare triple {2591#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 28: Hoare triple {2591#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 27: Hoare triple {2591#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 26: Hoare triple {2591#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 25: Hoare triple {2591#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 24: Hoare triple {2591#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 23: Hoare triple {2591#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2591#true} {2591#true} #672#return; {2591#true} is VALID [2022-04-28 09:59:55,027 INFO L290 TraceCheckUtils]: 21: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 20: Hoare triple {2591#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 19: Hoare triple {2591#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 18: Hoare triple {2591#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 17: Hoare triple {2591#true} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:55,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-28 09:59:55,029 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 09:59:55,030 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 09:59:55,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 09:59:55,030 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2591#true} is VALID [2022-04-28 09:59:55,030 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-28 09:59:55,030 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1752592902] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 09:59:55,030 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 09:59:55,030 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2022-04-28 09:59:55,031 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 09:59:55,031 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1624506804] [2022-04-28 09:59:55,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1624506804] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:55,031 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 09:59:55,031 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-28 09:59:55,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [929411826] [2022-04-28 09:59:55,031 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 09:59:55,031 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 50 [2022-04-28 09:59:55,032 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 09:59:55,032 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:55,079 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:55,079 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-28 09:59:55,079 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:55,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-28 09:59:55,080 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2022-04-28 09:59:55,080 INFO L87 Difference]: Start difference. First operand 78 states and 100 transitions. Second operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:56,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:56,095 INFO L93 Difference]: Finished difference Result 144 states and 188 transitions. [2022-04-28 09:59:56,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-28 09:59:56,095 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 50 [2022-04-28 09:59:56,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 09:59:56,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:56,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 184 transitions. [2022-04-28 09:59:56,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:56,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 184 transitions. [2022-04-28 09:59:56,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 184 transitions. [2022-04-28 09:59:56,280 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 184 edges. 184 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:56,284 INFO L225 Difference]: With dead ends: 144 [2022-04-28 09:59:56,284 INFO L226 Difference]: Without dead ends: 83 [2022-04-28 09:59:56,285 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2022-04-28 09:59:56,285 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 336 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 371 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 336 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-28 09:59:56,286 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 371 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 336 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-28 09:59:56,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-04-28 09:59:56,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 79. [2022-04-28 09:59:56,309 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 09:59:56,309 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:56,309 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:56,310 INFO L87 Difference]: Start difference. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:56,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:56,313 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-04-28 09:59:56,313 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 107 transitions. [2022-04-28 09:59:56,313 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:56,313 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:56,313 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 83 states. [2022-04-28 09:59:56,314 INFO L87 Difference]: Start difference. First operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 83 states. [2022-04-28 09:59:56,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 09:59:56,316 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-04-28 09:59:56,317 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 107 transitions. [2022-04-28 09:59:56,317 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 09:59:56,317 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 09:59:56,317 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 09:59:56,317 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 09:59:56,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 09:59:56,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 101 transitions. [2022-04-28 09:59:56,320 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 101 transitions. Word has length 50 [2022-04-28 09:59:56,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 09:59:56,320 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 101 transitions. [2022-04-28 09:59:56,320 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:56,321 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 79 states and 101 transitions. [2022-04-28 09:59:56,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:56,431 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 101 transitions. [2022-04-28 09:59:56,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-28 09:59:56,432 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 09:59:56,432 INFO L195 NwaCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 09:59:56,456 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-28 09:59:56,645 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 09:59:56,645 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 09:59:56,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 09:59:56,646 INFO L85 PathProgramCache]: Analyzing trace with hash -523287008, now seen corresponding path program 5 times [2022-04-28 09:59:56,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:56,646 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1222971515] [2022-04-28 09:59:56,646 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 09:59:56,646 INFO L85 PathProgramCache]: Analyzing trace with hash -523287008, now seen corresponding path program 6 times [2022-04-28 09:59:56,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 09:59:56,647 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432177751] [2022-04-28 09:59:56,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 09:59:56,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 09:59:56,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:56,724 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 09:59:56,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:56,734 INFO L290 TraceCheckUtils]: 0: Hoare triple {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 09:59:56,734 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 09:59:56,735 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 09:59:56,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 09:59:56,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:56,862 INFO L290 TraceCheckUtils]: 0: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:56,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:56,864 INFO L290 TraceCheckUtils]: 2: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 09:59:56,865 INFO L290 TraceCheckUtils]: 3: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3567#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 09:59:56,866 INFO L290 TraceCheckUtils]: 4: Hoare triple {3567#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 09:59:56,866 INFO L290 TraceCheckUtils]: 5: Hoare triple {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 09:59:56,868 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} {3543#true} #672#return; {3544#false} is VALID [2022-04-28 09:59:56,868 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-28 09:59:56,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:56,877 INFO L290 TraceCheckUtils]: 0: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 09:59:56,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:56,877 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:56,877 INFO L290 TraceCheckUtils]: 3: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:56,877 INFO L290 TraceCheckUtils]: 4: Hoare triple {3543#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3543#true} is VALID [2022-04-28 09:59:56,877 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 09:59:56,878 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-28 09:59:56,878 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 09:59:56,879 INFO L290 TraceCheckUtils]: 1: Hoare triple {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 09:59:56,879 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 09:59:56,879 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 09:59:56,879 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-28 09:59:56,879 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-28 09:59:56,879 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-28 09:59:56,879 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-28 09:59:56,880 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-28 09:59:56,881 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {3563#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:56,882 INFO L290 TraceCheckUtils]: 17: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:56,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:56,884 INFO L290 TraceCheckUtils]: 19: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 09:59:56,885 INFO L290 TraceCheckUtils]: 20: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3567#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 09:59:56,886 INFO L290 TraceCheckUtils]: 21: Hoare triple {3567#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 09:59:56,886 INFO L290 TraceCheckUtils]: 22: Hoare triple {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 09:59:56,887 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3568#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} {3543#true} #672#return; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-28 09:59:56,888 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-28 09:59:56,889 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-28 09:59:56,889 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3563#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 39: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 40: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 41: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:56,889 INFO L290 TraceCheckUtils]: 42: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 43: Hoare triple {3543#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3543#true} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 44: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 09:59:56,890 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-28 09:59:56,890 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-28 09:59:56,890 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-28 09:59:56,891 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-28 09:59:56,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 09:59:56,891 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432177751] [2022-04-28 09:59:56,891 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432177751] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 09:59:56,891 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [519930849] [2022-04-28 09:59:56,891 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 09:59:56,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 09:59:56,892 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 09:59:56,893 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 09:59:56,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-28 09:59:58,029 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-28 09:59:58,030 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 09:59:58,035 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-28 09:59:58,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 09:59:58,064 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 09:59:58,445 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3543#true} is VALID [2022-04-28 09:59:58,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 09:59:58,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 09:59:58,445 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,446 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 17: Hoare triple {3543#true} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 18: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 19: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 20: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 21: Hoare triple {3543#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L290 TraceCheckUtils]: 22: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 09:59:58,447 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3543#true} {3543#true} #672#return; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 24: Hoare triple {3543#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 25: Hoare triple {3543#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 26: Hoare triple {3543#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 27: Hoare triple {3543#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 28: Hoare triple {3543#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 29: Hoare triple {3543#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 30: Hoare triple {3543#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3543#true} is VALID [2022-04-28 09:59:58,448 INFO L290 TraceCheckUtils]: 31: Hoare triple {3543#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L290 TraceCheckUtils]: 32: Hoare triple {3543#true} assume #t~short172; {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L290 TraceCheckUtils]: 33: Hoare triple {3543#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L290 TraceCheckUtils]: 34: Hoare triple {3543#true} assume 0 != #t~mem173;havoc #t~mem173; {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L272 TraceCheckUtils]: 35: Hoare triple {3543#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L290 TraceCheckUtils]: 36: Hoare triple {3543#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L290 TraceCheckUtils]: 37: Hoare triple {3543#true} assume !(~len <= 0); {3543#true} is VALID [2022-04-28 09:59:58,449 INFO L272 TraceCheckUtils]: 38: Hoare triple {3543#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3543#true} is VALID [2022-04-28 09:59:58,450 INFO L290 TraceCheckUtils]: 39: Hoare triple {3543#true} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 09:59:58,451 INFO L290 TraceCheckUtils]: 40: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 09:59:58,452 INFO L290 TraceCheckUtils]: 41: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 09:59:58,453 INFO L290 TraceCheckUtils]: 42: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3698#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:58,454 INFO L290 TraceCheckUtils]: 43: Hoare triple {3698#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3702#(and (< 0 (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:58,455 INFO L290 TraceCheckUtils]: 44: Hoare triple {3702#(and (< 0 (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3702#(and (< 0 (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 09:59:58,456 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3702#(and (< 0 (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} {3543#true} #656#return; {3544#false} is VALID [2022-04-28 09:59:58,456 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-28 09:59:58,457 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-28 09:59:58,457 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-28 09:59:58,457 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-28 09:59:58,457 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-28 09:59:58,457 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-28 09:59:58,457 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 18 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-28 09:59:58,458 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 09:59:58,757 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-28 09:59:58,757 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-28 09:59:58,757 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-28 09:59:58,757 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-28 09:59:58,757 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-28 09:59:58,757 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-28 09:59:58,759 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3748#(not (= |#Ultimate.C_memset_#amount| 80))} {3543#true} #656#return; {3544#false} is VALID [2022-04-28 09:59:58,759 INFO L290 TraceCheckUtils]: 44: Hoare triple {3748#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3748#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 09:59:58,760 INFO L290 TraceCheckUtils]: 43: Hoare triple {3755#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3748#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 09:59:58,761 INFO L290 TraceCheckUtils]: 42: Hoare triple {3759#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3755#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 09:59:58,762 INFO L290 TraceCheckUtils]: 41: Hoare triple {3763#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3759#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 09:59:58,763 INFO L290 TraceCheckUtils]: 40: Hoare triple {3767#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3763#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 09:59:58,764 INFO L290 TraceCheckUtils]: 39: Hoare triple {3543#true} #t~loopctr188 := 0; {3767#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 09:59:58,764 INFO L272 TraceCheckUtils]: 38: Hoare triple {3543#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3543#true} is VALID [2022-04-28 09:59:58,764 INFO L290 TraceCheckUtils]: 37: Hoare triple {3543#true} assume !(~len <= 0); {3543#true} is VALID [2022-04-28 09:59:58,764 INFO L290 TraceCheckUtils]: 36: Hoare triple {3543#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3543#true} is VALID [2022-04-28 09:59:58,764 INFO L272 TraceCheckUtils]: 35: Hoare triple {3543#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3543#true} is VALID [2022-04-28 09:59:58,764 INFO L290 TraceCheckUtils]: 34: Hoare triple {3543#true} assume 0 != #t~mem173;havoc #t~mem173; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 33: Hoare triple {3543#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 32: Hoare triple {3543#true} assume #t~short172; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 31: Hoare triple {3543#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 30: Hoare triple {3543#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 29: Hoare triple {3543#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 28: Hoare triple {3543#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 27: Hoare triple {3543#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3543#true} is VALID [2022-04-28 09:59:58,765 INFO L290 TraceCheckUtils]: 26: Hoare triple {3543#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 25: Hoare triple {3543#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 24: Hoare triple {3543#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3543#true} {3543#true} #672#return; {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 22: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 21: Hoare triple {3543#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 20: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 19: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:58,766 INFO L290 TraceCheckUtils]: 18: Hoare triple {3543#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 17: Hoare triple {3543#true} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,767 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 09:59:58,768 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 09:59:58,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 09:59:58,769 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3543#true} is VALID [2022-04-28 09:59:58,769 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 18 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-28 09:59:58,769 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [519930849] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 09:59:58,769 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 09:59:58,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 16 [2022-04-28 09:59:58,770 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 09:59:58,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1222971515] [2022-04-28 09:59:58,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1222971515] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 09:59:58,770 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 09:59:58,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-28 09:59:58,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994070398] [2022-04-28 09:59:58,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 09:59:58,771 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 52 [2022-04-28 09:59:58,771 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 09:59:58,771 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 09:59:58,822 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 09:59:58,822 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-28 09:59:58,822 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 09:59:58,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-28 09:59:58,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2022-04-28 09:59:58,823 INFO L87 Difference]: Start difference. First operand 79 states and 101 transitions. Second operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:00,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:00,030 INFO L93 Difference]: Finished difference Result 146 states and 190 transitions. [2022-04-28 10:00:00,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-28 10:00:00,031 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 52 [2022-04-28 10:00:00,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:00,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:00,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 185 transitions. [2022-04-28 10:00:00,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:00,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 185 transitions. [2022-04-28 10:00:00,037 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 185 transitions. [2022-04-28 10:00:00,184 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:00,185 INFO L225 Difference]: With dead ends: 146 [2022-04-28 10:00:00,186 INFO L226 Difference]: Without dead ends: 84 [2022-04-28 10:00:00,186 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=120, Invalid=342, Unknown=0, NotChecked=0, Total=462 [2022-04-28 10:00:00,187 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 422 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 459 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 422 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:00,187 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 459 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 422 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 10:00:00,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-28 10:00:00,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 80. [2022-04-28 10:00:00,209 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:00,209 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:00,209 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:00,210 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:00,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:00,213 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. [2022-04-28 10:00:00,213 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 108 transitions. [2022-04-28 10:00:00,213 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:00,213 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:00,214 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 84 states. [2022-04-28 10:00:00,214 INFO L87 Difference]: Start difference. First operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 84 states. [2022-04-28 10:00:00,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:00,217 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. [2022-04-28 10:00:00,217 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 108 transitions. [2022-04-28 10:00:00,217 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:00,217 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:00,217 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:00,217 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:00,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:00,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 102 transitions. [2022-04-28 10:00:00,220 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 102 transitions. Word has length 52 [2022-04-28 10:00:00,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:00,220 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 102 transitions. [2022-04-28 10:00:00,221 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:00,221 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 80 states and 102 transitions. [2022-04-28 10:00:00,318 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:00,318 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 102 transitions. [2022-04-28 10:00:00,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-28 10:00:00,319 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:00,319 INFO L195 NwaCegarLoop]: trace histogram [8, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:00,338 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:00,523 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:00,523 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:00,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:00,524 INFO L85 PathProgramCache]: Analyzing trace with hash -1966742966, now seen corresponding path program 7 times [2022-04-28 10:00:00,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:00,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [784883045] [2022-04-28 10:00:00,524 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:00,524 INFO L85 PathProgramCache]: Analyzing trace with hash -1966742966, now seen corresponding path program 8 times [2022-04-28 10:00:00,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:00,525 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649176171] [2022-04-28 10:00:00,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:00,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:00,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:00,672 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:00,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:00,682 INFO L290 TraceCheckUtils]: 0: Hoare triple {4541#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4520#true} is VALID [2022-04-28 10:00:00,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {4520#true} assume true; {4520#true} is VALID [2022-04-28 10:00:00,682 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4520#true} {4520#true} #682#return; {4520#true} is VALID [2022-04-28 10:00:00,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:00,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:00,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {4542#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:00,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4544#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:00,830 INFO L290 TraceCheckUtils]: 2: Hoare triple {4544#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4545#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:00,831 INFO L290 TraceCheckUtils]: 3: Hoare triple {4545#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4546#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:00,832 INFO L290 TraceCheckUtils]: 4: Hoare triple {4546#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4547#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:00,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {4547#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:00,833 INFO L290 TraceCheckUtils]: 6: Hoare triple {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:00,834 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {4520#true} #672#return; {4521#false} is VALID [2022-04-28 10:00:00,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-04-28 10:00:00,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:00,843 INFO L290 TraceCheckUtils]: 0: Hoare triple {4542#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4520#true} is VALID [2022-04-28 10:00:00,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,843 INFO L290 TraceCheckUtils]: 2: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,843 INFO L290 TraceCheckUtils]: 3: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,843 INFO L290 TraceCheckUtils]: 4: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,844 INFO L290 TraceCheckUtils]: 5: Hoare triple {4520#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4520#true} is VALID [2022-04-28 10:00:00,844 INFO L290 TraceCheckUtils]: 6: Hoare triple {4520#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4520#true} is VALID [2022-04-28 10:00:00,844 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4520#true} {4521#false} #656#return; {4521#false} is VALID [2022-04-28 10:00:00,846 INFO L272 TraceCheckUtils]: 0: Hoare triple {4520#true} call ULTIMATE.init(); {4541#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:00,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {4541#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4520#true} is VALID [2022-04-28 10:00:00,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {4520#true} assume true; {4520#true} is VALID [2022-04-28 10:00:00,846 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4520#true} {4520#true} #682#return; {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L272 TraceCheckUtils]: 4: Hoare triple {4520#true} call #t~ret187 := main(); {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 5: Hoare triple {4520#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L272 TraceCheckUtils]: 6: Hoare triple {4520#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {4520#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {4520#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 9: Hoare triple {4520#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 10: Hoare triple {4520#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 11: Hoare triple {4520#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:00,847 INFO L290 TraceCheckUtils]: 12: Hoare triple {4520#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4520#true} is VALID [2022-04-28 10:00:00,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {4520#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:00,848 INFO L290 TraceCheckUtils]: 14: Hoare triple {4520#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4520#true} is VALID [2022-04-28 10:00:00,848 INFO L290 TraceCheckUtils]: 15: Hoare triple {4520#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4520#true} is VALID [2022-04-28 10:00:00,849 INFO L272 TraceCheckUtils]: 16: Hoare triple {4520#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {4542#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:00,849 INFO L290 TraceCheckUtils]: 17: Hoare triple {4542#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:00,850 INFO L290 TraceCheckUtils]: 18: Hoare triple {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4544#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:00,851 INFO L290 TraceCheckUtils]: 19: Hoare triple {4544#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4545#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:00,852 INFO L290 TraceCheckUtils]: 20: Hoare triple {4545#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4546#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:00,853 INFO L290 TraceCheckUtils]: 21: Hoare triple {4546#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4547#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:00,854 INFO L290 TraceCheckUtils]: 22: Hoare triple {4547#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:00,855 INFO L290 TraceCheckUtils]: 23: Hoare triple {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:00,861 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4548#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {4520#true} #672#return; {4521#false} is VALID [2022-04-28 10:00:00,861 INFO L290 TraceCheckUtils]: 25: Hoare triple {4521#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4521#false} is VALID [2022-04-28 10:00:00,861 INFO L290 TraceCheckUtils]: 26: Hoare triple {4521#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {4521#false} is VALID [2022-04-28 10:00:00,861 INFO L290 TraceCheckUtils]: 27: Hoare triple {4521#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4521#false} is VALID [2022-04-28 10:00:00,861 INFO L290 TraceCheckUtils]: 28: Hoare triple {4521#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4521#false} is VALID [2022-04-28 10:00:00,861 INFO L290 TraceCheckUtils]: 29: Hoare triple {4521#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4521#false} is VALID [2022-04-28 10:00:00,861 INFO L290 TraceCheckUtils]: 30: Hoare triple {4521#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 31: Hoare triple {4521#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 32: Hoare triple {4521#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 33: Hoare triple {4521#false} assume #t~short172; {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 34: Hoare triple {4521#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 35: Hoare triple {4521#false} assume 0 != #t~mem173;havoc #t~mem173; {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L272 TraceCheckUtils]: 36: Hoare triple {4521#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 37: Hoare triple {4521#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L290 TraceCheckUtils]: 38: Hoare triple {4521#false} assume !(~len <= 0); {4521#false} is VALID [2022-04-28 10:00:00,862 INFO L272 TraceCheckUtils]: 39: Hoare triple {4521#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4542#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 40: Hoare triple {4542#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 41: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 42: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 43: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 44: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 45: Hoare triple {4520#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 46: Hoare triple {4520#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4520#true} is VALID [2022-04-28 10:00:00,863 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4520#true} {4521#false} #656#return; {4521#false} is VALID [2022-04-28 10:00:00,863 INFO L290 TraceCheckUtils]: 48: Hoare triple {4521#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4521#false} is VALID [2022-04-28 10:00:00,864 INFO L290 TraceCheckUtils]: 49: Hoare triple {4521#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4521#false} is VALID [2022-04-28 10:00:00,864 INFO L272 TraceCheckUtils]: 50: Hoare triple {4521#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4521#false} is VALID [2022-04-28 10:00:00,864 INFO L290 TraceCheckUtils]: 51: Hoare triple {4521#false} ~cond := #in~cond; {4521#false} is VALID [2022-04-28 10:00:00,864 INFO L290 TraceCheckUtils]: 52: Hoare triple {4521#false} assume 0 == ~cond; {4521#false} is VALID [2022-04-28 10:00:00,864 INFO L290 TraceCheckUtils]: 53: Hoare triple {4521#false} assume !false; {4521#false} is VALID [2022-04-28 10:00:00,864 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-28 10:00:00,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:00,864 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649176171] [2022-04-28 10:00:00,865 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [649176171] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:00,865 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1446450351] [2022-04-28 10:00:00,865 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 10:00:00,865 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:00,865 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:00,866 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:00,895 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-28 10:00:01,449 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 10:00:01,449 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:01,453 INFO L263 TraceCheckSpWp]: Trace formula consists of 737 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-28 10:00:01,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:01,468 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:01,876 INFO L272 TraceCheckUtils]: 0: Hoare triple {4520#true} call ULTIMATE.init(); {4520#true} is VALID [2022-04-28 10:00:01,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {4520#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4520#true} is VALID [2022-04-28 10:00:01,876 INFO L290 TraceCheckUtils]: 2: Hoare triple {4520#true} assume true; {4520#true} is VALID [2022-04-28 10:00:01,876 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4520#true} {4520#true} #682#return; {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L272 TraceCheckUtils]: 4: Hoare triple {4520#true} call #t~ret187 := main(); {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 5: Hoare triple {4520#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L272 TraceCheckUtils]: 6: Hoare triple {4520#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 7: Hoare triple {4520#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 8: Hoare triple {4520#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 9: Hoare triple {4520#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 10: Hoare triple {4520#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {4520#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 12: Hoare triple {4520#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 13: Hoare triple {4520#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 14: Hoare triple {4520#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4520#true} is VALID [2022-04-28 10:00:01,877 INFO L290 TraceCheckUtils]: 15: Hoare triple {4520#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4520#true} is VALID [2022-04-28 10:00:01,878 INFO L272 TraceCheckUtils]: 16: Hoare triple {4520#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {4520#true} is VALID [2022-04-28 10:00:01,878 INFO L290 TraceCheckUtils]: 17: Hoare triple {4520#true} #t~loopctr188 := 0; {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:01,879 INFO L290 TraceCheckUtils]: 18: Hoare triple {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4606#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:01,879 INFO L290 TraceCheckUtils]: 19: Hoare triple {4606#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4610#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 20: Hoare triple {4610#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4614#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 21: Hoare triple {4614#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 22: Hoare triple {4520#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4520#true} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 23: Hoare triple {4520#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4520#true} is VALID [2022-04-28 10:00:01,884 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4520#true} {4520#true} #672#return; {4520#true} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 25: Hoare triple {4520#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4520#true} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 26: Hoare triple {4520#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {4520#true} is VALID [2022-04-28 10:00:01,884 INFO L290 TraceCheckUtils]: 27: Hoare triple {4520#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 28: Hoare triple {4520#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 29: Hoare triple {4520#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 30: Hoare triple {4520#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 31: Hoare triple {4520#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 32: Hoare triple {4520#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 33: Hoare triple {4520#true} assume #t~short172; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 34: Hoare triple {4520#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 35: Hoare triple {4520#true} assume 0 != #t~mem173;havoc #t~mem173; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L272 TraceCheckUtils]: 36: Hoare triple {4520#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 37: Hoare triple {4520#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L290 TraceCheckUtils]: 38: Hoare triple {4520#true} assume !(~len <= 0); {4520#true} is VALID [2022-04-28 10:00:01,885 INFO L272 TraceCheckUtils]: 39: Hoare triple {4520#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4520#true} is VALID [2022-04-28 10:00:01,886 INFO L290 TraceCheckUtils]: 40: Hoare triple {4520#true} #t~loopctr188 := 0; {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:01,887 INFO L290 TraceCheckUtils]: 41: Hoare triple {4543#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4606#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:01,887 INFO L290 TraceCheckUtils]: 42: Hoare triple {4606#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4610#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:01,888 INFO L290 TraceCheckUtils]: 43: Hoare triple {4610#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4614#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:01,889 INFO L290 TraceCheckUtils]: 44: Hoare triple {4614#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4687#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:01,889 INFO L290 TraceCheckUtils]: 45: Hoare triple {4687#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4691#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 4) 18446744073709551616) 1))} is VALID [2022-04-28 10:00:01,890 INFO L290 TraceCheckUtils]: 46: Hoare triple {4691#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 4) 18446744073709551616) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4691#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 4) 18446744073709551616) 1))} is VALID [2022-04-28 10:00:01,891 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4691#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 4) 18446744073709551616) 1))} {4520#true} #656#return; {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L290 TraceCheckUtils]: 48: Hoare triple {4521#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L290 TraceCheckUtils]: 49: Hoare triple {4521#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L272 TraceCheckUtils]: 50: Hoare triple {4521#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L290 TraceCheckUtils]: 51: Hoare triple {4521#false} ~cond := #in~cond; {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L290 TraceCheckUtils]: 52: Hoare triple {4521#false} assume 0 == ~cond; {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L290 TraceCheckUtils]: 53: Hoare triple {4521#false} assume !false; {4521#false} is VALID [2022-04-28 10:00:01,891 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 36 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-28 10:00:01,891 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:02,258 INFO L290 TraceCheckUtils]: 53: Hoare triple {4521#false} assume !false; {4521#false} is VALID [2022-04-28 10:00:02,258 INFO L290 TraceCheckUtils]: 52: Hoare triple {4521#false} assume 0 == ~cond; {4521#false} is VALID [2022-04-28 10:00:02,258 INFO L290 TraceCheckUtils]: 51: Hoare triple {4521#false} ~cond := #in~cond; {4521#false} is VALID [2022-04-28 10:00:02,258 INFO L272 TraceCheckUtils]: 50: Hoare triple {4521#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4521#false} is VALID [2022-04-28 10:00:02,258 INFO L290 TraceCheckUtils]: 49: Hoare triple {4521#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4521#false} is VALID [2022-04-28 10:00:02,258 INFO L290 TraceCheckUtils]: 48: Hoare triple {4521#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4521#false} is VALID [2022-04-28 10:00:02,259 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4737#(not (= |#Ultimate.C_memset_#amount| 80))} {4520#true} #656#return; {4521#false} is VALID [2022-04-28 10:00:02,260 INFO L290 TraceCheckUtils]: 46: Hoare triple {4737#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4737#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:02,260 INFO L290 TraceCheckUtils]: 45: Hoare triple {4744#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4737#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:02,263 INFO L290 TraceCheckUtils]: 44: Hoare triple {4748#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4744#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:02,264 INFO L290 TraceCheckUtils]: 43: Hoare triple {4752#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4748#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:02,265 INFO L290 TraceCheckUtils]: 42: Hoare triple {4756#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4752#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:02,267 INFO L290 TraceCheckUtils]: 41: Hoare triple {4760#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4756#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:02,267 INFO L290 TraceCheckUtils]: 40: Hoare triple {4520#true} #t~loopctr188 := 0; {4760#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:02,267 INFO L272 TraceCheckUtils]: 39: Hoare triple {4520#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4520#true} is VALID [2022-04-28 10:00:02,267 INFO L290 TraceCheckUtils]: 38: Hoare triple {4520#true} assume !(~len <= 0); {4520#true} is VALID [2022-04-28 10:00:02,267 INFO L290 TraceCheckUtils]: 37: Hoare triple {4520#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4520#true} is VALID [2022-04-28 10:00:02,267 INFO L272 TraceCheckUtils]: 36: Hoare triple {4520#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 35: Hoare triple {4520#true} assume 0 != #t~mem173;havoc #t~mem173; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 34: Hoare triple {4520#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 33: Hoare triple {4520#true} assume #t~short172; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 32: Hoare triple {4520#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 31: Hoare triple {4520#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 30: Hoare triple {4520#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 29: Hoare triple {4520#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 28: Hoare triple {4520#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 27: Hoare triple {4520#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4520#true} is VALID [2022-04-28 10:00:02,268 INFO L290 TraceCheckUtils]: 26: Hoare triple {4520#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 25: Hoare triple {4520#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4520#true} {4520#true} #672#return; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 23: Hoare triple {4520#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 22: Hoare triple {4520#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 21: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 20: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 19: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 18: Hoare triple {4520#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {4520#true} #t~loopctr188 := 0; {4520#true} is VALID [2022-04-28 10:00:02,269 INFO L272 TraceCheckUtils]: 16: Hoare triple {4520#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 15: Hoare triple {4520#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 14: Hoare triple {4520#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 13: Hoare triple {4520#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 12: Hoare triple {4520#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 11: Hoare triple {4520#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 10: Hoare triple {4520#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 9: Hoare triple {4520#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 8: Hoare triple {4520#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L290 TraceCheckUtils]: 7: Hoare triple {4520#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4520#true} is VALID [2022-04-28 10:00:02,270 INFO L272 TraceCheckUtils]: 6: Hoare triple {4520#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {4520#true} is VALID [2022-04-28 10:00:02,271 INFO L290 TraceCheckUtils]: 5: Hoare triple {4520#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4520#true} is VALID [2022-04-28 10:00:02,271 INFO L272 TraceCheckUtils]: 4: Hoare triple {4520#true} call #t~ret187 := main(); {4520#true} is VALID [2022-04-28 10:00:02,271 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4520#true} {4520#true} #682#return; {4520#true} is VALID [2022-04-28 10:00:02,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {4520#true} assume true; {4520#true} is VALID [2022-04-28 10:00:02,271 INFO L290 TraceCheckUtils]: 1: Hoare triple {4520#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4520#true} is VALID [2022-04-28 10:00:02,271 INFO L272 TraceCheckUtils]: 0: Hoare triple {4520#true} call ULTIMATE.init(); {4520#true} is VALID [2022-04-28 10:00:02,272 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-28 10:00:02,272 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1446450351] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:02,272 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:02,272 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 21 [2022-04-28 10:00:02,273 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:02,273 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [784883045] [2022-04-28 10:00:02,273 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [784883045] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:02,273 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:02,273 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-28 10:00:02,273 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1746003350] [2022-04-28 10:00:02,273 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:02,275 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 54 [2022-04-28 10:00:02,276 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:02,276 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:02,326 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:02,326 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-28 10:00:02,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:02,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-28 10:00:02,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=313, Unknown=0, NotChecked=0, Total=420 [2022-04-28 10:00:02,327 INFO L87 Difference]: Start difference. First operand 80 states and 102 transitions. Second operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:03,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:03,561 INFO L93 Difference]: Finished difference Result 148 states and 192 transitions. [2022-04-28 10:00:03,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-28 10:00:03,561 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 54 [2022-04-28 10:00:03,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:03,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:03,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 186 transitions. [2022-04-28 10:00:03,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:03,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 186 transitions. [2022-04-28 10:00:03,567 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 186 transitions. [2022-04-28 10:00:03,731 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:03,733 INFO L225 Difference]: With dead ends: 148 [2022-04-28 10:00:03,733 INFO L226 Difference]: Without dead ends: 85 [2022-04-28 10:00:03,733 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=179, Invalid=577, Unknown=0, NotChecked=0, Total=756 [2022-04-28 10:00:03,734 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 433 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 472 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 433 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:03,734 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 472 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 433 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 10:00:03,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-28 10:00:03,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 81. [2022-04-28 10:00:03,758 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:03,758 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:03,758 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:03,759 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:03,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:03,761 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-28 10:00:03,762 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-28 10:00:03,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:03,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:03,762 INFO L74 IsIncluded]: Start isIncluded. First operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 85 states. [2022-04-28 10:00:03,763 INFO L87 Difference]: Start difference. First operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 85 states. [2022-04-28 10:00:03,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:03,765 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-28 10:00:03,765 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-28 10:00:03,766 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:03,766 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:03,766 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:03,766 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:03,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:03,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 103 transitions. [2022-04-28 10:00:03,769 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 103 transitions. Word has length 54 [2022-04-28 10:00:03,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:03,769 INFO L495 AbstractCegarLoop]: Abstraction has 81 states and 103 transitions. [2022-04-28 10:00:03,769 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:03,769 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 81 states and 103 transitions. [2022-04-28 10:00:03,878 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:03,878 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 103 transitions. [2022-04-28 10:00:03,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-28 10:00:03,879 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:03,879 INFO L195 NwaCegarLoop]: trace histogram [10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:03,907 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:04,095 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:04,096 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:04,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:04,096 INFO L85 PathProgramCache]: Analyzing trace with hash -127655584, now seen corresponding path program 9 times [2022-04-28 10:00:04,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:04,096 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1506444001] [2022-04-28 10:00:04,096 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:04,097 INFO L85 PathProgramCache]: Analyzing trace with hash -127655584, now seen corresponding path program 10 times [2022-04-28 10:00:04,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:04,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295399385] [2022-04-28 10:00:04,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:04,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:04,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:04,222 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:04,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:04,231 INFO L290 TraceCheckUtils]: 0: Hoare triple {5549#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5526#true} is VALID [2022-04-28 10:00:04,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {5526#true} assume true; {5526#true} is VALID [2022-04-28 10:00:04,231 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5526#true} {5526#true} #682#return; {5526#true} is VALID [2022-04-28 10:00:04,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:04,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:04,394 INFO L290 TraceCheckUtils]: 0: Hoare triple {5550#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:04,395 INFO L290 TraceCheckUtils]: 1: Hoare triple {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5552#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:04,396 INFO L290 TraceCheckUtils]: 2: Hoare triple {5552#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5553#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:04,397 INFO L290 TraceCheckUtils]: 3: Hoare triple {5553#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5554#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:04,398 INFO L290 TraceCheckUtils]: 4: Hoare triple {5554#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5555#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:04,399 INFO L290 TraceCheckUtils]: 5: Hoare triple {5555#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5556#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 5) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:04,399 INFO L290 TraceCheckUtils]: 6: Hoare triple {5556#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 5) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 10:00:04,400 INFO L290 TraceCheckUtils]: 7: Hoare triple {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 10:00:04,401 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} {5526#true} #672#return; {5527#false} is VALID [2022-04-28 10:00:04,401 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-28 10:00:04,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:04,424 INFO L290 TraceCheckUtils]: 0: Hoare triple {5550#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5526#true} is VALID [2022-04-28 10:00:04,424 INFO L290 TraceCheckUtils]: 1: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,424 INFO L290 TraceCheckUtils]: 2: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,425 INFO L290 TraceCheckUtils]: 3: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,425 INFO L290 TraceCheckUtils]: 4: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,425 INFO L290 TraceCheckUtils]: 5: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,425 INFO L290 TraceCheckUtils]: 6: Hoare triple {5526#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5526#true} is VALID [2022-04-28 10:00:04,425 INFO L290 TraceCheckUtils]: 7: Hoare triple {5526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5526#true} is VALID [2022-04-28 10:00:04,425 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {5526#true} {5527#false} #656#return; {5527#false} is VALID [2022-04-28 10:00:04,426 INFO L272 TraceCheckUtils]: 0: Hoare triple {5526#true} call ULTIMATE.init(); {5549#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:04,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {5549#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5526#true} is VALID [2022-04-28 10:00:04,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {5526#true} assume true; {5526#true} is VALID [2022-04-28 10:00:04,426 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5526#true} {5526#true} #682#return; {5526#true} is VALID [2022-04-28 10:00:04,426 INFO L272 TraceCheckUtils]: 4: Hoare triple {5526#true} call #t~ret187 := main(); {5526#true} is VALID [2022-04-28 10:00:04,426 INFO L290 TraceCheckUtils]: 5: Hoare triple {5526#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L272 TraceCheckUtils]: 6: Hoare triple {5526#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 7: Hoare triple {5526#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 8: Hoare triple {5526#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 9: Hoare triple {5526#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 10: Hoare triple {5526#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 11: Hoare triple {5526#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 12: Hoare triple {5526#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 13: Hoare triple {5526#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:04,427 INFO L290 TraceCheckUtils]: 14: Hoare triple {5526#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5526#true} is VALID [2022-04-28 10:00:04,428 INFO L290 TraceCheckUtils]: 15: Hoare triple {5526#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5526#true} is VALID [2022-04-28 10:00:04,428 INFO L272 TraceCheckUtils]: 16: Hoare triple {5526#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {5550#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:04,429 INFO L290 TraceCheckUtils]: 17: Hoare triple {5550#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:04,430 INFO L290 TraceCheckUtils]: 18: Hoare triple {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5552#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:04,431 INFO L290 TraceCheckUtils]: 19: Hoare triple {5552#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5553#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:04,432 INFO L290 TraceCheckUtils]: 20: Hoare triple {5553#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5554#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:04,433 INFO L290 TraceCheckUtils]: 21: Hoare triple {5554#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5555#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:04,434 INFO L290 TraceCheckUtils]: 22: Hoare triple {5555#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5556#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 5) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:04,435 INFO L290 TraceCheckUtils]: 23: Hoare triple {5556#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 5) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 10:00:04,436 INFO L290 TraceCheckUtils]: 24: Hoare triple {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 10:00:04,437 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5557#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} {5526#true} #672#return; {5527#false} is VALID [2022-04-28 10:00:04,437 INFO L290 TraceCheckUtils]: 26: Hoare triple {5527#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5527#false} is VALID [2022-04-28 10:00:04,437 INFO L290 TraceCheckUtils]: 27: Hoare triple {5527#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {5527#false} is VALID [2022-04-28 10:00:04,437 INFO L290 TraceCheckUtils]: 28: Hoare triple {5527#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5527#false} is VALID [2022-04-28 10:00:04,437 INFO L290 TraceCheckUtils]: 29: Hoare triple {5527#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5527#false} is VALID [2022-04-28 10:00:04,437 INFO L290 TraceCheckUtils]: 30: Hoare triple {5527#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 31: Hoare triple {5527#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 32: Hoare triple {5527#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 33: Hoare triple {5527#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 34: Hoare triple {5527#false} assume #t~short172; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 35: Hoare triple {5527#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 36: Hoare triple {5527#false} assume 0 != #t~mem173;havoc #t~mem173; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L272 TraceCheckUtils]: 37: Hoare triple {5527#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 38: Hoare triple {5527#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L290 TraceCheckUtils]: 39: Hoare triple {5527#false} assume !(~len <= 0); {5527#false} is VALID [2022-04-28 10:00:04,438 INFO L272 TraceCheckUtils]: 40: Hoare triple {5527#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5550#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 41: Hoare triple {5550#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 42: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 43: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 44: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 45: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 46: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 47: Hoare triple {5526#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 48: Hoare triple {5526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5526#true} is VALID [2022-04-28 10:00:04,439 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5526#true} {5527#false} #656#return; {5527#false} is VALID [2022-04-28 10:00:04,439 INFO L290 TraceCheckUtils]: 50: Hoare triple {5527#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5527#false} is VALID [2022-04-28 10:00:04,440 INFO L290 TraceCheckUtils]: 51: Hoare triple {5527#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5527#false} is VALID [2022-04-28 10:00:04,440 INFO L272 TraceCheckUtils]: 52: Hoare triple {5527#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5527#false} is VALID [2022-04-28 10:00:04,440 INFO L290 TraceCheckUtils]: 53: Hoare triple {5527#false} ~cond := #in~cond; {5527#false} is VALID [2022-04-28 10:00:04,440 INFO L290 TraceCheckUtils]: 54: Hoare triple {5527#false} assume 0 == ~cond; {5527#false} is VALID [2022-04-28 10:00:04,440 INFO L290 TraceCheckUtils]: 55: Hoare triple {5527#false} assume !false; {5527#false} is VALID [2022-04-28 10:00:04,440 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-28 10:00:04,440 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:04,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295399385] [2022-04-28 10:00:04,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [295399385] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:04,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [119394473] [2022-04-28 10:00:04,441 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 10:00:04,441 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:04,441 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:04,442 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:04,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-28 10:00:04,660 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 10:00:04,660 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:04,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 751 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-28 10:00:04,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:04,680 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:05,351 INFO L272 TraceCheckUtils]: 0: Hoare triple {5526#true} call ULTIMATE.init(); {5526#true} is VALID [2022-04-28 10:00:05,351 INFO L290 TraceCheckUtils]: 1: Hoare triple {5526#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,351 INFO L290 TraceCheckUtils]: 2: Hoare triple {5526#true} assume true; {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5526#true} {5526#true} #682#return; {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L272 TraceCheckUtils]: 4: Hoare triple {5526#true} call #t~ret187 := main(); {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L290 TraceCheckUtils]: 5: Hoare triple {5526#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L272 TraceCheckUtils]: 6: Hoare triple {5526#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L290 TraceCheckUtils]: 7: Hoare triple {5526#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L290 TraceCheckUtils]: 8: Hoare triple {5526#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L290 TraceCheckUtils]: 9: Hoare triple {5526#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L290 TraceCheckUtils]: 10: Hoare triple {5526#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5526#true} is VALID [2022-04-28 10:00:05,352 INFO L290 TraceCheckUtils]: 11: Hoare triple {5526#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {5526#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5526#true} is VALID [2022-04-28 10:00:05,353 INFO L290 TraceCheckUtils]: 13: Hoare triple {5526#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,353 INFO L290 TraceCheckUtils]: 14: Hoare triple {5526#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5526#true} is VALID [2022-04-28 10:00:05,353 INFO L290 TraceCheckUtils]: 15: Hoare triple {5526#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5526#true} is VALID [2022-04-28 10:00:05,353 INFO L272 TraceCheckUtils]: 16: Hoare triple {5526#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {5526#true} is VALID [2022-04-28 10:00:05,353 INFO L290 TraceCheckUtils]: 17: Hoare triple {5526#true} #t~loopctr188 := 0; {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:05,355 INFO L290 TraceCheckUtils]: 18: Hoare triple {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5615#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:05,356 INFO L290 TraceCheckUtils]: 19: Hoare triple {5615#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5619#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:05,356 INFO L290 TraceCheckUtils]: 20: Hoare triple {5619#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5623#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:05,357 INFO L290 TraceCheckUtils]: 21: Hoare triple {5623#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5627#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:05,357 INFO L290 TraceCheckUtils]: 22: Hoare triple {5627#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 23: Hoare triple {5526#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 24: Hoare triple {5526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5526#true} {5526#true} #672#return; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 26: Hoare triple {5526#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 27: Hoare triple {5526#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 28: Hoare triple {5526#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 29: Hoare triple {5526#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 30: Hoare triple {5526#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5526#true} is VALID [2022-04-28 10:00:05,358 INFO L290 TraceCheckUtils]: 31: Hoare triple {5526#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 32: Hoare triple {5526#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 33: Hoare triple {5526#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 34: Hoare triple {5526#true} assume #t~short172; {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 35: Hoare triple {5526#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 36: Hoare triple {5526#true} assume 0 != #t~mem173;havoc #t~mem173; {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L272 TraceCheckUtils]: 37: Hoare triple {5526#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 38: Hoare triple {5526#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L290 TraceCheckUtils]: 39: Hoare triple {5526#true} assume !(~len <= 0); {5526#true} is VALID [2022-04-28 10:00:05,359 INFO L272 TraceCheckUtils]: 40: Hoare triple {5526#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5526#true} is VALID [2022-04-28 10:00:05,360 INFO L290 TraceCheckUtils]: 41: Hoare triple {5526#true} #t~loopctr188 := 0; {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:05,360 INFO L290 TraceCheckUtils]: 42: Hoare triple {5551#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5615#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:05,361 INFO L290 TraceCheckUtils]: 43: Hoare triple {5615#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5619#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:05,362 INFO L290 TraceCheckUtils]: 44: Hoare triple {5619#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5623#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:05,362 INFO L290 TraceCheckUtils]: 45: Hoare triple {5623#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5627#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:05,363 INFO L290 TraceCheckUtils]: 46: Hoare triple {5627#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5703#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:05,365 INFO L290 TraceCheckUtils]: 47: Hoare triple {5703#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5707#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) (+ 2 (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 10:00:05,366 INFO L290 TraceCheckUtils]: 48: Hoare triple {5707#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) (+ 2 (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5707#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) (+ 2 (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 10:00:05,366 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5707#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) (+ 2 (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} {5526#true} #656#return; {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L290 TraceCheckUtils]: 50: Hoare triple {5527#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L290 TraceCheckUtils]: 51: Hoare triple {5527#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L272 TraceCheckUtils]: 52: Hoare triple {5527#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L290 TraceCheckUtils]: 53: Hoare triple {5527#false} ~cond := #in~cond; {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L290 TraceCheckUtils]: 54: Hoare triple {5527#false} assume 0 == ~cond; {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L290 TraceCheckUtils]: 55: Hoare triple {5527#false} assume !false; {5527#false} is VALID [2022-04-28 10:00:05,367 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 8 proven. 55 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-28 10:00:05,367 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:05,838 INFO L290 TraceCheckUtils]: 55: Hoare triple {5527#false} assume !false; {5527#false} is VALID [2022-04-28 10:00:05,838 INFO L290 TraceCheckUtils]: 54: Hoare triple {5527#false} assume 0 == ~cond; {5527#false} is VALID [2022-04-28 10:00:05,838 INFO L290 TraceCheckUtils]: 53: Hoare triple {5527#false} ~cond := #in~cond; {5527#false} is VALID [2022-04-28 10:00:05,838 INFO L272 TraceCheckUtils]: 52: Hoare triple {5527#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5527#false} is VALID [2022-04-28 10:00:05,838 INFO L290 TraceCheckUtils]: 51: Hoare triple {5527#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5527#false} is VALID [2022-04-28 10:00:05,838 INFO L290 TraceCheckUtils]: 50: Hoare triple {5527#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5527#false} is VALID [2022-04-28 10:00:05,839 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5753#(not (= |#Ultimate.C_memset_#amount| 80))} {5526#true} #656#return; {5527#false} is VALID [2022-04-28 10:00:05,840 INFO L290 TraceCheckUtils]: 48: Hoare triple {5753#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5753#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:05,840 INFO L290 TraceCheckUtils]: 47: Hoare triple {5760#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5753#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:05,841 INFO L290 TraceCheckUtils]: 46: Hoare triple {5764#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5760#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:05,842 INFO L290 TraceCheckUtils]: 45: Hoare triple {5768#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5764#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:05,844 INFO L290 TraceCheckUtils]: 44: Hoare triple {5772#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5768#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:05,845 INFO L290 TraceCheckUtils]: 43: Hoare triple {5776#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5772#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:05,846 INFO L290 TraceCheckUtils]: 42: Hoare triple {5780#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5776#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:05,846 INFO L290 TraceCheckUtils]: 41: Hoare triple {5526#true} #t~loopctr188 := 0; {5780#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:05,846 INFO L272 TraceCheckUtils]: 40: Hoare triple {5526#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5526#true} is VALID [2022-04-28 10:00:05,846 INFO L290 TraceCheckUtils]: 39: Hoare triple {5526#true} assume !(~len <= 0); {5526#true} is VALID [2022-04-28 10:00:05,846 INFO L290 TraceCheckUtils]: 38: Hoare triple {5526#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L272 TraceCheckUtils]: 37: Hoare triple {5526#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 36: Hoare triple {5526#true} assume 0 != #t~mem173;havoc #t~mem173; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 35: Hoare triple {5526#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 34: Hoare triple {5526#true} assume #t~short172; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 33: Hoare triple {5526#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 32: Hoare triple {5526#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 31: Hoare triple {5526#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 30: Hoare triple {5526#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 29: Hoare triple {5526#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 28: Hoare triple {5526#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 27: Hoare triple {5526#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L290 TraceCheckUtils]: 26: Hoare triple {5526#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5526#true} is VALID [2022-04-28 10:00:05,847 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5526#true} {5526#true} #672#return; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 24: Hoare triple {5526#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 23: Hoare triple {5526#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 22: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 21: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 20: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 19: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 18: Hoare triple {5526#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 17: Hoare triple {5526#true} #t~loopctr188 := 0; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L272 TraceCheckUtils]: 16: Hoare triple {5526#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 15: Hoare triple {5526#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 14: Hoare triple {5526#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5526#true} is VALID [2022-04-28 10:00:05,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {5526#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,849 INFO L290 TraceCheckUtils]: 12: Hoare triple {5526#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5526#true} is VALID [2022-04-28 10:00:05,849 INFO L290 TraceCheckUtils]: 11: Hoare triple {5526#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,849 INFO L290 TraceCheckUtils]: 10: Hoare triple {5526#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5526#true} is VALID [2022-04-28 10:00:05,849 INFO L290 TraceCheckUtils]: 9: Hoare triple {5526#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {5526#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5526#true} is VALID [2022-04-28 10:00:05,851 INFO L290 TraceCheckUtils]: 7: Hoare triple {5526#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5526#true} is VALID [2022-04-28 10:00:05,851 INFO L272 TraceCheckUtils]: 6: Hoare triple {5526#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {5526#true} is VALID [2022-04-28 10:00:05,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {5526#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5526#true} is VALID [2022-04-28 10:00:05,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {5526#true} call #t~ret187 := main(); {5526#true} is VALID [2022-04-28 10:00:05,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5526#true} {5526#true} #682#return; {5526#true} is VALID [2022-04-28 10:00:05,852 INFO L290 TraceCheckUtils]: 2: Hoare triple {5526#true} assume true; {5526#true} is VALID [2022-04-28 10:00:05,852 INFO L290 TraceCheckUtils]: 1: Hoare triple {5526#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5526#true} is VALID [2022-04-28 10:00:05,852 INFO L272 TraceCheckUtils]: 0: Hoare triple {5526#true} call ULTIMATE.init(); {5526#true} is VALID [2022-04-28 10:00:05,852 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 38 proven. 15 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-28 10:00:05,852 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [119394473] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:05,852 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:05,852 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 24 [2022-04-28 10:00:05,853 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:05,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1506444001] [2022-04-28 10:00:05,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1506444001] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:05,853 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:05,853 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-04-28 10:00:05,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932621684] [2022-04-28 10:00:05,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:05,854 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 56 [2022-04-28 10:00:05,854 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:05,854 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:05,897 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:05,898 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-28 10:00:05,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:05,898 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-28 10:00:05,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=411, Unknown=0, NotChecked=0, Total=552 [2022-04-28 10:00:05,898 INFO L87 Difference]: Start difference. First operand 81 states and 103 transitions. Second operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:07,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:07,765 INFO L93 Difference]: Finished difference Result 150 states and 194 transitions. [2022-04-28 10:00:07,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-28 10:00:07,766 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 56 [2022-04-28 10:00:07,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:07,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:07,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 187 transitions. [2022-04-28 10:00:07,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:07,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 187 transitions. [2022-04-28 10:00:07,771 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 187 transitions. [2022-04-28 10:00:07,922 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 187 edges. 187 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:07,925 INFO L225 Difference]: With dead ends: 150 [2022-04-28 10:00:07,925 INFO L226 Difference]: Without dead ends: 86 [2022-04-28 10:00:07,926 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=232, Invalid=760, Unknown=0, NotChecked=0, Total=992 [2022-04-28 10:00:07,927 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 677 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 718 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 677 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:07,927 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 211 Invalid, 718 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 677 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 10:00:07,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-04-28 10:00:07,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 82. [2022-04-28 10:00:07,949 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:07,949 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:07,949 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:07,949 INFO L87 Difference]: Start difference. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:07,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:07,956 INFO L93 Difference]: Finished difference Result 86 states and 110 transitions. [2022-04-28 10:00:07,957 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-28 10:00:07,957 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:07,957 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:07,957 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 86 states. [2022-04-28 10:00:07,958 INFO L87 Difference]: Start difference. First operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 86 states. [2022-04-28 10:00:07,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:07,960 INFO L93 Difference]: Finished difference Result 86 states and 110 transitions. [2022-04-28 10:00:07,961 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-28 10:00:07,961 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:07,961 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:07,961 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:07,961 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:07,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:07,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 104 transitions. [2022-04-28 10:00:07,964 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 104 transitions. Word has length 56 [2022-04-28 10:00:07,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:07,964 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 104 transitions. [2022-04-28 10:00:07,964 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:07,964 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 82 states and 104 transitions. [2022-04-28 10:00:08,066 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:08,066 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 104 transitions. [2022-04-28 10:00:08,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-04-28 10:00:08,067 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:08,067 INFO L195 NwaCegarLoop]: trace histogram [12, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:08,086 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:08,268 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:08,268 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:08,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:08,269 INFO L85 PathProgramCache]: Analyzing trace with hash -330196214, now seen corresponding path program 11 times [2022-04-28 10:00:08,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:08,269 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1974419103] [2022-04-28 10:00:08,269 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:08,269 INFO L85 PathProgramCache]: Analyzing trace with hash -330196214, now seen corresponding path program 12 times [2022-04-28 10:00:08,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:08,269 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451379017] [2022-04-28 10:00:08,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:08,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:08,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:08,353 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:08,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:08,362 INFO L290 TraceCheckUtils]: 0: Hoare triple {6584#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6559#true} is VALID [2022-04-28 10:00:08,362 INFO L290 TraceCheckUtils]: 1: Hoare triple {6559#true} assume true; {6559#true} is VALID [2022-04-28 10:00:08,363 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6559#true} {6559#true} #682#return; {6559#true} is VALID [2022-04-28 10:00:08,365 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:08,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:08,569 INFO L290 TraceCheckUtils]: 0: Hoare triple {6585#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6586#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:08,571 INFO L290 TraceCheckUtils]: 1: Hoare triple {6586#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6587#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:08,572 INFO L290 TraceCheckUtils]: 2: Hoare triple {6587#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6588#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:08,573 INFO L290 TraceCheckUtils]: 3: Hoare triple {6588#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,574 INFO L290 TraceCheckUtils]: 4: Hoare triple {6589#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,575 INFO L290 TraceCheckUtils]: 5: Hoare triple {6590#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:08,576 INFO L290 TraceCheckUtils]: 6: Hoare triple {6591#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 6) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:08,577 INFO L290 TraceCheckUtils]: 7: Hoare triple {6592#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 6) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,578 INFO L290 TraceCheckUtils]: 8: Hoare triple {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,579 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {6559#true} #672#return; {6560#false} is VALID [2022-04-28 10:00:08,579 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 41 [2022-04-28 10:00:08,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:08,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {6585#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6559#true} is VALID [2022-04-28 10:00:08,591 INFO L290 TraceCheckUtils]: 1: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,591 INFO L290 TraceCheckUtils]: 3: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,592 INFO L290 TraceCheckUtils]: 4: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,592 INFO L290 TraceCheckUtils]: 5: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,592 INFO L290 TraceCheckUtils]: 6: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,592 INFO L290 TraceCheckUtils]: 7: Hoare triple {6559#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6559#true} is VALID [2022-04-28 10:00:08,592 INFO L290 TraceCheckUtils]: 8: Hoare triple {6559#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6559#true} is VALID [2022-04-28 10:00:08,592 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6559#true} {6560#false} #656#return; {6560#false} is VALID [2022-04-28 10:00:08,593 INFO L272 TraceCheckUtils]: 0: Hoare triple {6559#true} call ULTIMATE.init(); {6584#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:08,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {6584#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6559#true} is VALID [2022-04-28 10:00:08,593 INFO L290 TraceCheckUtils]: 2: Hoare triple {6559#true} assume true; {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6559#true} {6559#true} #682#return; {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L272 TraceCheckUtils]: 4: Hoare triple {6559#true} call #t~ret187 := main(); {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 5: Hoare triple {6559#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L272 TraceCheckUtils]: 6: Hoare triple {6559#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 7: Hoare triple {6559#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 8: Hoare triple {6559#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 9: Hoare triple {6559#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 10: Hoare triple {6559#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 11: Hoare triple {6559#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 12: Hoare triple {6559#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6559#true} is VALID [2022-04-28 10:00:08,594 INFO L290 TraceCheckUtils]: 13: Hoare triple {6559#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:08,595 INFO L290 TraceCheckUtils]: 14: Hoare triple {6559#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6559#true} is VALID [2022-04-28 10:00:08,595 INFO L290 TraceCheckUtils]: 15: Hoare triple {6559#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6559#true} is VALID [2022-04-28 10:00:08,595 INFO L272 TraceCheckUtils]: 16: Hoare triple {6559#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {6585#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:08,596 INFO L290 TraceCheckUtils]: 17: Hoare triple {6585#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6586#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:08,597 INFO L290 TraceCheckUtils]: 18: Hoare triple {6586#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6587#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:08,599 INFO L290 TraceCheckUtils]: 19: Hoare triple {6587#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6588#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:08,600 INFO L290 TraceCheckUtils]: 20: Hoare triple {6588#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,601 INFO L290 TraceCheckUtils]: 21: Hoare triple {6589#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,602 INFO L290 TraceCheckUtils]: 22: Hoare triple {6590#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:08,603 INFO L290 TraceCheckUtils]: 23: Hoare triple {6591#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 6) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:08,604 INFO L290 TraceCheckUtils]: 24: Hoare triple {6592#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 6) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,605 INFO L290 TraceCheckUtils]: 25: Hoare triple {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:08,606 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6593#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {6559#true} #672#return; {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 27: Hoare triple {6560#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 28: Hoare triple {6560#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 29: Hoare triple {6560#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 30: Hoare triple {6560#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 31: Hoare triple {6560#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 32: Hoare triple {6560#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6560#false} is VALID [2022-04-28 10:00:08,606 INFO L290 TraceCheckUtils]: 33: Hoare triple {6560#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 34: Hoare triple {6560#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 35: Hoare triple {6560#false} assume #t~short172; {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 36: Hoare triple {6560#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 37: Hoare triple {6560#false} assume 0 != #t~mem173;havoc #t~mem173; {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L272 TraceCheckUtils]: 38: Hoare triple {6560#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 39: Hoare triple {6560#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 40: Hoare triple {6560#false} assume !(~len <= 0); {6560#false} is VALID [2022-04-28 10:00:08,607 INFO L272 TraceCheckUtils]: 41: Hoare triple {6560#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6585#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 42: Hoare triple {6585#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6559#true} is VALID [2022-04-28 10:00:08,607 INFO L290 TraceCheckUtils]: 43: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 44: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 45: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 46: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 47: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 48: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 49: Hoare triple {6559#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 50: Hoare triple {6559#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6559#true} is VALID [2022-04-28 10:00:08,608 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6559#true} {6560#false} #656#return; {6560#false} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 52: Hoare triple {6560#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6560#false} is VALID [2022-04-28 10:00:08,608 INFO L290 TraceCheckUtils]: 53: Hoare triple {6560#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6560#false} is VALID [2022-04-28 10:00:08,609 INFO L272 TraceCheckUtils]: 54: Hoare triple {6560#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6560#false} is VALID [2022-04-28 10:00:08,609 INFO L290 TraceCheckUtils]: 55: Hoare triple {6560#false} ~cond := #in~cond; {6560#false} is VALID [2022-04-28 10:00:08,609 INFO L290 TraceCheckUtils]: 56: Hoare triple {6560#false} assume 0 == ~cond; {6560#false} is VALID [2022-04-28 10:00:08,609 INFO L290 TraceCheckUtils]: 57: Hoare triple {6560#false} assume !false; {6560#false} is VALID [2022-04-28 10:00:08,609 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-28 10:00:08,609 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:08,609 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451379017] [2022-04-28 10:00:08,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451379017] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:08,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1448042228] [2022-04-28 10:00:08,610 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 10:00:08,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:08,610 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:08,612 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:08,621 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-28 10:00:11,827 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-28 10:00:11,827 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:11,835 INFO L263 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-28 10:00:11,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:11,851 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:12,268 INFO L272 TraceCheckUtils]: 0: Hoare triple {6559#true} call ULTIMATE.init(); {6559#true} is VALID [2022-04-28 10:00:12,268 INFO L290 TraceCheckUtils]: 1: Hoare triple {6559#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,268 INFO L290 TraceCheckUtils]: 2: Hoare triple {6559#true} assume true; {6559#true} is VALID [2022-04-28 10:00:12,268 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6559#true} {6559#true} #682#return; {6559#true} is VALID [2022-04-28 10:00:12,268 INFO L272 TraceCheckUtils]: 4: Hoare triple {6559#true} call #t~ret187 := main(); {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 5: Hoare triple {6559#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L272 TraceCheckUtils]: 6: Hoare triple {6559#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 7: Hoare triple {6559#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 8: Hoare triple {6559#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 9: Hoare triple {6559#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 10: Hoare triple {6559#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 11: Hoare triple {6559#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,269 INFO L290 TraceCheckUtils]: 12: Hoare triple {6559#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 13: Hoare triple {6559#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 14: Hoare triple {6559#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 15: Hoare triple {6559#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L272 TraceCheckUtils]: 16: Hoare triple {6559#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 17: Hoare triple {6559#true} #t~loopctr188 := 0; {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 18: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 19: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,270 INFO L290 TraceCheckUtils]: 20: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 21: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 22: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 23: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 24: Hoare triple {6559#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 25: Hoare triple {6559#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6559#true} {6559#true} #672#return; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 27: Hoare triple {6559#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 28: Hoare triple {6559#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 29: Hoare triple {6559#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6559#true} is VALID [2022-04-28 10:00:12,271 INFO L290 TraceCheckUtils]: 30: Hoare triple {6559#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 31: Hoare triple {6559#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 32: Hoare triple {6559#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 33: Hoare triple {6559#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 34: Hoare triple {6559#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 35: Hoare triple {6559#true} assume #t~short172; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 36: Hoare triple {6559#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L290 TraceCheckUtils]: 37: Hoare triple {6559#true} assume 0 != #t~mem173;havoc #t~mem173; {6559#true} is VALID [2022-04-28 10:00:12,272 INFO L272 TraceCheckUtils]: 38: Hoare triple {6559#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6559#true} is VALID [2022-04-28 10:00:12,273 INFO L290 TraceCheckUtils]: 39: Hoare triple {6559#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6714#(= |dStrHex_~#buff~0.offset| 0)} is VALID [2022-04-28 10:00:12,274 INFO L290 TraceCheckUtils]: 40: Hoare triple {6714#(= |dStrHex_~#buff~0.offset| 0)} assume !(~len <= 0); {6714#(= |dStrHex_~#buff~0.offset| 0)} is VALID [2022-04-28 10:00:12,274 INFO L272 TraceCheckUtils]: 41: Hoare triple {6714#(= |dStrHex_~#buff~0.offset| 0)} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6559#true} is VALID [2022-04-28 10:00:12,274 INFO L290 TraceCheckUtils]: 42: Hoare triple {6559#true} #t~loopctr188 := 0; {6586#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:12,275 INFO L290 TraceCheckUtils]: 43: Hoare triple {6586#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6727#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:12,276 INFO L290 TraceCheckUtils]: 44: Hoare triple {6727#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6731#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:12,277 INFO L290 TraceCheckUtils]: 45: Hoare triple {6731#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6735#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:12,278 INFO L290 TraceCheckUtils]: 46: Hoare triple {6735#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6739#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:12,278 INFO L290 TraceCheckUtils]: 47: Hoare triple {6739#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6743#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:12,279 INFO L290 TraceCheckUtils]: 48: Hoare triple {6743#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6747#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:12,280 INFO L290 TraceCheckUtils]: 49: Hoare triple {6747#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6751#(< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} is VALID [2022-04-28 10:00:12,280 INFO L290 TraceCheckUtils]: 50: Hoare triple {6751#(< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6751#(< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} is VALID [2022-04-28 10:00:12,281 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6751#(< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} {6714#(= |dStrHex_~#buff~0.offset| 0)} #656#return; {6560#false} is VALID [2022-04-28 10:00:12,281 INFO L290 TraceCheckUtils]: 52: Hoare triple {6560#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6560#false} is VALID [2022-04-28 10:00:12,281 INFO L290 TraceCheckUtils]: 53: Hoare triple {6560#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6560#false} is VALID [2022-04-28 10:00:12,281 INFO L272 TraceCheckUtils]: 54: Hoare triple {6560#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6560#false} is VALID [2022-04-28 10:00:12,281 INFO L290 TraceCheckUtils]: 55: Hoare triple {6560#false} ~cond := #in~cond; {6560#false} is VALID [2022-04-28 10:00:12,282 INFO L290 TraceCheckUtils]: 56: Hoare triple {6560#false} assume 0 == ~cond; {6560#false} is VALID [2022-04-28 10:00:12,282 INFO L290 TraceCheckUtils]: 57: Hoare triple {6560#false} assume !false; {6560#false} is VALID [2022-04-28 10:00:12,282 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 51 proven. 21 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-28 10:00:12,282 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:12,705 INFO L290 TraceCheckUtils]: 57: Hoare triple {6560#false} assume !false; {6560#false} is VALID [2022-04-28 10:00:12,705 INFO L290 TraceCheckUtils]: 56: Hoare triple {6560#false} assume 0 == ~cond; {6560#false} is VALID [2022-04-28 10:00:12,705 INFO L290 TraceCheckUtils]: 55: Hoare triple {6560#false} ~cond := #in~cond; {6560#false} is VALID [2022-04-28 10:00:12,705 INFO L272 TraceCheckUtils]: 54: Hoare triple {6560#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6560#false} is VALID [2022-04-28 10:00:12,706 INFO L290 TraceCheckUtils]: 53: Hoare triple {6560#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6560#false} is VALID [2022-04-28 10:00:12,706 INFO L290 TraceCheckUtils]: 52: Hoare triple {6560#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6560#false} is VALID [2022-04-28 10:00:12,706 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6797#(not (= |#Ultimate.C_memset_#amount| 80))} {6559#true} #656#return; {6560#false} is VALID [2022-04-28 10:00:12,707 INFO L290 TraceCheckUtils]: 50: Hoare triple {6797#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6797#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:12,707 INFO L290 TraceCheckUtils]: 49: Hoare triple {6804#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6797#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:12,711 INFO L290 TraceCheckUtils]: 48: Hoare triple {6808#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6804#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:12,712 INFO L290 TraceCheckUtils]: 47: Hoare triple {6812#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6808#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:12,713 INFO L290 TraceCheckUtils]: 46: Hoare triple {6816#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6812#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:12,714 INFO L290 TraceCheckUtils]: 45: Hoare triple {6820#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6816#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:12,714 INFO L290 TraceCheckUtils]: 44: Hoare triple {6824#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6820#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:12,715 INFO L290 TraceCheckUtils]: 43: Hoare triple {6828#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6824#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 42: Hoare triple {6559#true} #t~loopctr188 := 0; {6828#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:12,716 INFO L272 TraceCheckUtils]: 41: Hoare triple {6559#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 40: Hoare triple {6559#true} assume !(~len <= 0); {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 39: Hoare triple {6559#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L272 TraceCheckUtils]: 38: Hoare triple {6559#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 37: Hoare triple {6559#true} assume 0 != #t~mem173;havoc #t~mem173; {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 36: Hoare triple {6559#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 35: Hoare triple {6559#true} assume #t~short172; {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 34: Hoare triple {6559#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 33: Hoare triple {6559#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6559#true} is VALID [2022-04-28 10:00:12,716 INFO L290 TraceCheckUtils]: 32: Hoare triple {6559#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 31: Hoare triple {6559#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 30: Hoare triple {6559#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 29: Hoare triple {6559#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 28: Hoare triple {6559#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 27: Hoare triple {6559#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6559#true} {6559#true} #672#return; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 25: Hoare triple {6559#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 24: Hoare triple {6559#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 23: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 22: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 21: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 20: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,717 INFO L290 TraceCheckUtils]: 19: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 18: Hoare triple {6559#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 17: Hoare triple {6559#true} #t~loopctr188 := 0; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L272 TraceCheckUtils]: 16: Hoare triple {6559#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 15: Hoare triple {6559#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 14: Hoare triple {6559#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 13: Hoare triple {6559#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 12: Hoare triple {6559#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 11: Hoare triple {6559#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 10: Hoare triple {6559#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {6559#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {6559#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6559#true} is VALID [2022-04-28 10:00:12,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {6559#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L272 TraceCheckUtils]: 6: Hoare triple {6559#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L290 TraceCheckUtils]: 5: Hoare triple {6559#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L272 TraceCheckUtils]: 4: Hoare triple {6559#true} call #t~ret187 := main(); {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6559#true} {6559#true} #682#return; {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L290 TraceCheckUtils]: 2: Hoare triple {6559#true} assume true; {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {6559#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L272 TraceCheckUtils]: 0: Hoare triple {6559#true} call ULTIMATE.init(); {6559#true} is VALID [2022-04-28 10:00:12,719 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 51 proven. 21 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-28 10:00:12,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1448042228] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:12,720 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:12,720 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 28 [2022-04-28 10:00:12,720 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:12,720 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1974419103] [2022-04-28 10:00:12,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1974419103] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:12,720 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:12,720 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2022-04-28 10:00:12,720 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383409638] [2022-04-28 10:00:12,720 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:12,721 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 58 [2022-04-28 10:00:12,721 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:12,721 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:12,764 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:12,765 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-28 10:00:12,765 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:12,765 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-28 10:00:12,766 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=177, Invalid=579, Unknown=0, NotChecked=0, Total=756 [2022-04-28 10:00:12,766 INFO L87 Difference]: Start difference. First operand 82 states and 104 transitions. Second operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:14,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:14,774 INFO L93 Difference]: Finished difference Result 152 states and 196 transitions. [2022-04-28 10:00:14,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-28 10:00:14,774 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 58 [2022-04-28 10:00:14,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:14,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:14,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 188 transitions. [2022-04-28 10:00:14,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:14,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 188 transitions. [2022-04-28 10:00:14,783 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 188 transitions. [2022-04-28 10:00:14,961 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:14,963 INFO L225 Difference]: With dead ends: 152 [2022-04-28 10:00:14,963 INFO L226 Difference]: Without dead ends: 87 [2022-04-28 10:00:14,964 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 104 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=289, Invalid=1043, Unknown=0, NotChecked=0, Total=1332 [2022-04-28 10:00:14,964 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 769 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 228 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 769 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:14,964 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 228 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 769 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 10:00:14,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-04-28 10:00:14,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 83. [2022-04-28 10:00:14,987 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:14,987 INFO L82 GeneralOperation]: Start isEquivalent. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:14,989 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:14,990 INFO L87 Difference]: Start difference. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:14,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:14,992 INFO L93 Difference]: Finished difference Result 87 states and 111 transitions. [2022-04-28 10:00:14,993 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-28 10:00:14,993 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:14,993 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:14,993 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 87 states. [2022-04-28 10:00:14,994 INFO L87 Difference]: Start difference. First operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 87 states. [2022-04-28 10:00:14,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:14,996 INFO L93 Difference]: Finished difference Result 87 states and 111 transitions. [2022-04-28 10:00:14,996 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-28 10:00:14,996 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:14,996 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:14,996 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:14,996 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:14,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:14,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 105 transitions. [2022-04-28 10:00:14,998 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 105 transitions. Word has length 58 [2022-04-28 10:00:14,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:14,999 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 105 transitions. [2022-04-28 10:00:14,999 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:14,999 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 83 states and 105 transitions. [2022-04-28 10:00:15,115 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:15,116 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 105 transitions. [2022-04-28 10:00:15,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-04-28 10:00:15,116 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:15,116 INFO L195 NwaCegarLoop]: trace histogram [14, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:15,126 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:15,316 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:15,317 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:15,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:15,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1036407648, now seen corresponding path program 13 times [2022-04-28 10:00:15,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:15,317 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1724851963] [2022-04-28 10:00:15,318 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:15,318 INFO L85 PathProgramCache]: Analyzing trace with hash -1036407648, now seen corresponding path program 14 times [2022-04-28 10:00:15,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:15,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638561710] [2022-04-28 10:00:15,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:15,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:15,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:15,405 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:15,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:15,413 INFO L290 TraceCheckUtils]: 0: Hoare triple {7647#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7620#true} is VALID [2022-04-28 10:00:15,414 INFO L290 TraceCheckUtils]: 1: Hoare triple {7620#true} assume true; {7620#true} is VALID [2022-04-28 10:00:15,414 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7620#true} {7620#true} #682#return; {7620#true} is VALID [2022-04-28 10:00:15,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:15,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:15,643 INFO L290 TraceCheckUtils]: 0: Hoare triple {7648#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:15,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:15,645 INFO L290 TraceCheckUtils]: 2: Hoare triple {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7651#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:15,646 INFO L290 TraceCheckUtils]: 3: Hoare triple {7651#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7652#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,647 INFO L290 TraceCheckUtils]: 4: Hoare triple {7652#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7653#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,648 INFO L290 TraceCheckUtils]: 5: Hoare triple {7653#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7654#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:15,649 INFO L290 TraceCheckUtils]: 6: Hoare triple {7654#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7655#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:15,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {7655#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7656#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:15,651 INFO L290 TraceCheckUtils]: 8: Hoare triple {7656#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,652 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {7620#true} #672#return; {7621#false} is VALID [2022-04-28 10:00:15,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-28 10:00:15,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:15,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {7648#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7620#true} is VALID [2022-04-28 10:00:15,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 3: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 4: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 5: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 6: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 7: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 8: Hoare triple {7620#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L290 TraceCheckUtils]: 9: Hoare triple {7620#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7620#true} is VALID [2022-04-28 10:00:15,666 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7620#true} {7621#false} #656#return; {7621#false} is VALID [2022-04-28 10:00:15,667 INFO L272 TraceCheckUtils]: 0: Hoare triple {7620#true} call ULTIMATE.init(); {7647#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:15,667 INFO L290 TraceCheckUtils]: 1: Hoare triple {7647#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7620#true} is VALID [2022-04-28 10:00:15,667 INFO L290 TraceCheckUtils]: 2: Hoare triple {7620#true} assume true; {7620#true} is VALID [2022-04-28 10:00:15,667 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7620#true} {7620#true} #682#return; {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L272 TraceCheckUtils]: 4: Hoare triple {7620#true} call #t~ret187 := main(); {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 5: Hoare triple {7620#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L272 TraceCheckUtils]: 6: Hoare triple {7620#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 7: Hoare triple {7620#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 8: Hoare triple {7620#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 9: Hoare triple {7620#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 10: Hoare triple {7620#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 11: Hoare triple {7620#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:15,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {7620#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7620#true} is VALID [2022-04-28 10:00:15,669 INFO L290 TraceCheckUtils]: 13: Hoare triple {7620#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:15,669 INFO L290 TraceCheckUtils]: 14: Hoare triple {7620#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7620#true} is VALID [2022-04-28 10:00:15,669 INFO L290 TraceCheckUtils]: 15: Hoare triple {7620#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7620#true} is VALID [2022-04-28 10:00:15,676 INFO L272 TraceCheckUtils]: 16: Hoare triple {7620#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {7648#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:15,676 INFO L290 TraceCheckUtils]: 17: Hoare triple {7648#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:15,678 INFO L290 TraceCheckUtils]: 18: Hoare triple {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:15,679 INFO L290 TraceCheckUtils]: 19: Hoare triple {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7651#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:15,680 INFO L290 TraceCheckUtils]: 20: Hoare triple {7651#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7652#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,681 INFO L290 TraceCheckUtils]: 21: Hoare triple {7652#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7653#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,682 INFO L290 TraceCheckUtils]: 22: Hoare triple {7653#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7654#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:15,684 INFO L290 TraceCheckUtils]: 23: Hoare triple {7654#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7655#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:15,685 INFO L290 TraceCheckUtils]: 24: Hoare triple {7655#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7656#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:15,686 INFO L290 TraceCheckUtils]: 25: Hoare triple {7656#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,686 INFO L290 TraceCheckUtils]: 26: Hoare triple {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:15,688 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7657#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {7620#true} #672#return; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 28: Hoare triple {7621#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 29: Hoare triple {7621#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 30: Hoare triple {7621#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 31: Hoare triple {7621#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 32: Hoare triple {7621#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 33: Hoare triple {7621#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 34: Hoare triple {7621#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 35: Hoare triple {7621#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7621#false} is VALID [2022-04-28 10:00:15,688 INFO L290 TraceCheckUtils]: 36: Hoare triple {7621#false} assume #t~short172; {7621#false} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 37: Hoare triple {7621#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7621#false} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 38: Hoare triple {7621#false} assume 0 != #t~mem173;havoc #t~mem173; {7621#false} is VALID [2022-04-28 10:00:15,689 INFO L272 TraceCheckUtils]: 39: Hoare triple {7621#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7621#false} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 40: Hoare triple {7621#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7621#false} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 41: Hoare triple {7621#false} assume !(~len <= 0); {7621#false} is VALID [2022-04-28 10:00:15,689 INFO L272 TraceCheckUtils]: 42: Hoare triple {7621#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7648#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 43: Hoare triple {7648#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7620#true} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 44: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 45: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,689 INFO L290 TraceCheckUtils]: 46: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 47: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 48: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 49: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 50: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 51: Hoare triple {7620#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 52: Hoare triple {7620#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7620#true} is VALID [2022-04-28 10:00:15,690 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7620#true} {7621#false} #656#return; {7621#false} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 54: Hoare triple {7621#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7621#false} is VALID [2022-04-28 10:00:15,690 INFO L290 TraceCheckUtils]: 55: Hoare triple {7621#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7621#false} is VALID [2022-04-28 10:00:15,690 INFO L272 TraceCheckUtils]: 56: Hoare triple {7621#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7621#false} is VALID [2022-04-28 10:00:15,691 INFO L290 TraceCheckUtils]: 57: Hoare triple {7621#false} ~cond := #in~cond; {7621#false} is VALID [2022-04-28 10:00:15,691 INFO L290 TraceCheckUtils]: 58: Hoare triple {7621#false} assume 0 == ~cond; {7621#false} is VALID [2022-04-28 10:00:15,691 INFO L290 TraceCheckUtils]: 59: Hoare triple {7621#false} assume !false; {7621#false} is VALID [2022-04-28 10:00:15,691 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-28 10:00:15,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:15,691 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638561710] [2022-04-28 10:00:15,691 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1638561710] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:15,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [482949757] [2022-04-28 10:00:15,692 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 10:00:15,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:15,692 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:15,696 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:15,697 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-28 10:00:16,233 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 10:00:16,234 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:16,239 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-28 10:00:16,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:16,257 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:16,979 INFO L272 TraceCheckUtils]: 0: Hoare triple {7620#true} call ULTIMATE.init(); {7620#true} is VALID [2022-04-28 10:00:16,979 INFO L290 TraceCheckUtils]: 1: Hoare triple {7620#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7620#true} is VALID [2022-04-28 10:00:16,979 INFO L290 TraceCheckUtils]: 2: Hoare triple {7620#true} assume true; {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7620#true} {7620#true} #682#return; {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L272 TraceCheckUtils]: 4: Hoare triple {7620#true} call #t~ret187 := main(); {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 5: Hoare triple {7620#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L272 TraceCheckUtils]: 6: Hoare triple {7620#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 7: Hoare triple {7620#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 8: Hoare triple {7620#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 9: Hoare triple {7620#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 10: Hoare triple {7620#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 11: Hoare triple {7620#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:16,980 INFO L290 TraceCheckUtils]: 12: Hoare triple {7620#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7620#true} is VALID [2022-04-28 10:00:16,981 INFO L290 TraceCheckUtils]: 13: Hoare triple {7620#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:16,981 INFO L290 TraceCheckUtils]: 14: Hoare triple {7620#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7620#true} is VALID [2022-04-28 10:00:16,981 INFO L290 TraceCheckUtils]: 15: Hoare triple {7620#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7620#true} is VALID [2022-04-28 10:00:16,981 INFO L272 TraceCheckUtils]: 16: Hoare triple {7620#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {7620#true} is VALID [2022-04-28 10:00:16,982 INFO L290 TraceCheckUtils]: 17: Hoare triple {7620#true} #t~loopctr188 := 0; {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:16,984 INFO L290 TraceCheckUtils]: 18: Hoare triple {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7715#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:16,984 INFO L290 TraceCheckUtils]: 19: Hoare triple {7715#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7719#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:16,985 INFO L290 TraceCheckUtils]: 20: Hoare triple {7719#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7723#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:16,986 INFO L290 TraceCheckUtils]: 21: Hoare triple {7723#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7727#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:16,987 INFO L290 TraceCheckUtils]: 22: Hoare triple {7727#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7731#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:16,988 INFO L290 TraceCheckUtils]: 23: Hoare triple {7731#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7735#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:16,988 INFO L290 TraceCheckUtils]: 24: Hoare triple {7735#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:16,988 INFO L290 TraceCheckUtils]: 25: Hoare triple {7620#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 26: Hoare triple {7620#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7620#true} {7620#true} #672#return; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 28: Hoare triple {7620#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 29: Hoare triple {7620#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 30: Hoare triple {7620#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 31: Hoare triple {7620#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 32: Hoare triple {7620#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 33: Hoare triple {7620#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 34: Hoare triple {7620#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7620#true} is VALID [2022-04-28 10:00:16,989 INFO L290 TraceCheckUtils]: 35: Hoare triple {7620#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L290 TraceCheckUtils]: 36: Hoare triple {7620#true} assume #t~short172; {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L290 TraceCheckUtils]: 37: Hoare triple {7620#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L290 TraceCheckUtils]: 38: Hoare triple {7620#true} assume 0 != #t~mem173;havoc #t~mem173; {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L272 TraceCheckUtils]: 39: Hoare triple {7620#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L290 TraceCheckUtils]: 40: Hoare triple {7620#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L290 TraceCheckUtils]: 41: Hoare triple {7620#true} assume !(~len <= 0); {7620#true} is VALID [2022-04-28 10:00:16,990 INFO L272 TraceCheckUtils]: 42: Hoare triple {7620#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7620#true} is VALID [2022-04-28 10:00:16,991 INFO L290 TraceCheckUtils]: 43: Hoare triple {7620#true} #t~loopctr188 := 0; {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:16,992 INFO L290 TraceCheckUtils]: 44: Hoare triple {7649#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7715#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:16,993 INFO L290 TraceCheckUtils]: 45: Hoare triple {7715#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7719#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:16,994 INFO L290 TraceCheckUtils]: 46: Hoare triple {7719#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7723#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:16,995 INFO L290 TraceCheckUtils]: 47: Hoare triple {7723#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7727#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:16,995 INFO L290 TraceCheckUtils]: 48: Hoare triple {7727#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7731#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:16,996 INFO L290 TraceCheckUtils]: 49: Hoare triple {7731#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7735#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:16,998 INFO L290 TraceCheckUtils]: 50: Hoare triple {7735#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7817#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:17,000 INFO L290 TraceCheckUtils]: 51: Hoare triple {7817#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7821#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 2))} is VALID [2022-04-28 10:00:17,000 INFO L290 TraceCheckUtils]: 52: Hoare triple {7821#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7821#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 2))} is VALID [2022-04-28 10:00:17,002 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7821#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 2))} {7620#true} #656#return; {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L290 TraceCheckUtils]: 54: Hoare triple {7621#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L290 TraceCheckUtils]: 55: Hoare triple {7621#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L272 TraceCheckUtils]: 56: Hoare triple {7621#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L290 TraceCheckUtils]: 57: Hoare triple {7621#false} ~cond := #in~cond; {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L290 TraceCheckUtils]: 58: Hoare triple {7621#false} assume 0 == ~cond; {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L290 TraceCheckUtils]: 59: Hoare triple {7621#false} assume !false; {7621#false} is VALID [2022-04-28 10:00:17,002 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 10 proven. 105 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-04-28 10:00:17,003 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:17,661 INFO L290 TraceCheckUtils]: 59: Hoare triple {7621#false} assume !false; {7621#false} is VALID [2022-04-28 10:00:17,662 INFO L290 TraceCheckUtils]: 58: Hoare triple {7621#false} assume 0 == ~cond; {7621#false} is VALID [2022-04-28 10:00:17,662 INFO L290 TraceCheckUtils]: 57: Hoare triple {7621#false} ~cond := #in~cond; {7621#false} is VALID [2022-04-28 10:00:17,662 INFO L272 TraceCheckUtils]: 56: Hoare triple {7621#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7621#false} is VALID [2022-04-28 10:00:17,662 INFO L290 TraceCheckUtils]: 55: Hoare triple {7621#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7621#false} is VALID [2022-04-28 10:00:17,662 INFO L290 TraceCheckUtils]: 54: Hoare triple {7621#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7621#false} is VALID [2022-04-28 10:00:17,663 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7867#(not (= |#Ultimate.C_memset_#amount| 80))} {7620#true} #656#return; {7621#false} is VALID [2022-04-28 10:00:17,663 INFO L290 TraceCheckUtils]: 52: Hoare triple {7867#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7867#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:17,663 INFO L290 TraceCheckUtils]: 51: Hoare triple {7874#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7867#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:17,665 INFO L290 TraceCheckUtils]: 50: Hoare triple {7878#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7874#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:17,666 INFO L290 TraceCheckUtils]: 49: Hoare triple {7882#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7878#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:17,668 INFO L290 TraceCheckUtils]: 48: Hoare triple {7886#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7882#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:17,669 INFO L290 TraceCheckUtils]: 47: Hoare triple {7890#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7886#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:17,670 INFO L290 TraceCheckUtils]: 46: Hoare triple {7894#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7890#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:17,671 INFO L290 TraceCheckUtils]: 45: Hoare triple {7898#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7894#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:17,673 INFO L290 TraceCheckUtils]: 44: Hoare triple {7902#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7898#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:17,673 INFO L290 TraceCheckUtils]: 43: Hoare triple {7620#true} #t~loopctr188 := 0; {7902#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:17,673 INFO L272 TraceCheckUtils]: 42: Hoare triple {7620#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7620#true} is VALID [2022-04-28 10:00:17,673 INFO L290 TraceCheckUtils]: 41: Hoare triple {7620#true} assume !(~len <= 0); {7620#true} is VALID [2022-04-28 10:00:17,673 INFO L290 TraceCheckUtils]: 40: Hoare triple {7620#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7620#true} is VALID [2022-04-28 10:00:17,673 INFO L272 TraceCheckUtils]: 39: Hoare triple {7620#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 38: Hoare triple {7620#true} assume 0 != #t~mem173;havoc #t~mem173; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 37: Hoare triple {7620#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 36: Hoare triple {7620#true} assume #t~short172; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 35: Hoare triple {7620#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 34: Hoare triple {7620#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 33: Hoare triple {7620#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 32: Hoare triple {7620#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 31: Hoare triple {7620#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 30: Hoare triple {7620#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 29: Hoare triple {7620#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {7620#true} is VALID [2022-04-28 10:00:17,674 INFO L290 TraceCheckUtils]: 28: Hoare triple {7620#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7620#true} {7620#true} #672#return; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 26: Hoare triple {7620#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 25: Hoare triple {7620#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 24: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 23: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 22: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 21: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 20: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,675 INFO L290 TraceCheckUtils]: 19: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 18: Hoare triple {7620#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 17: Hoare triple {7620#true} #t~loopctr188 := 0; {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L272 TraceCheckUtils]: 16: Hoare triple {7620#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 15: Hoare triple {7620#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 14: Hoare triple {7620#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 13: Hoare triple {7620#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 12: Hoare triple {7620#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 11: Hoare triple {7620#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:17,676 INFO L290 TraceCheckUtils]: 10: Hoare triple {7620#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L290 TraceCheckUtils]: 9: Hoare triple {7620#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L290 TraceCheckUtils]: 8: Hoare triple {7620#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L290 TraceCheckUtils]: 7: Hoare triple {7620#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L272 TraceCheckUtils]: 6: Hoare triple {7620#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {7620#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {7620#true} call #t~ret187 := main(); {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7620#true} {7620#true} #682#return; {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {7620#true} assume true; {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {7620#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7620#true} is VALID [2022-04-28 10:00:17,677 INFO L272 TraceCheckUtils]: 0: Hoare triple {7620#true} call ULTIMATE.init(); {7620#true} is VALID [2022-04-28 10:00:17,678 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 66 proven. 28 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-28 10:00:17,678 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [482949757] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:17,678 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:17,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11, 11] total 30 [2022-04-28 10:00:17,678 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:17,679 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1724851963] [2022-04-28 10:00:17,679 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1724851963] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:17,679 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:17,679 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2022-04-28 10:00:17,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922724158] [2022-04-28 10:00:17,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:17,680 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 60 [2022-04-28 10:00:17,680 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:17,681 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:17,737 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:17,738 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-28 10:00:17,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:17,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-28 10:00:17,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=217, Invalid=653, Unknown=0, NotChecked=0, Total=870 [2022-04-28 10:00:17,739 INFO L87 Difference]: Start difference. First operand 83 states and 105 transitions. Second operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:19,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:19,325 INFO L93 Difference]: Finished difference Result 154 states and 198 transitions. [2022-04-28 10:00:19,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-28 10:00:19,325 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 60 [2022-04-28 10:00:19,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:19,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:19,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 189 transitions. [2022-04-28 10:00:19,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:19,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 189 transitions. [2022-04-28 10:00:19,330 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 189 transitions. [2022-04-28 10:00:19,528 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:19,529 INFO L225 Difference]: With dead ends: 154 [2022-04-28 10:00:19,529 INFO L226 Difference]: Without dead ends: 88 [2022-04-28 10:00:19,530 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=352, Invalid=1208, Unknown=0, NotChecked=0, Total=1560 [2022-04-28 10:00:19,531 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 478 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 523 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 478 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:19,531 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 523 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 478 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-28 10:00:19,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-28 10:00:19,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2022-04-28 10:00:19,561 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:19,561 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:19,562 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:19,562 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:19,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:19,564 INFO L93 Difference]: Finished difference Result 88 states and 112 transitions. [2022-04-28 10:00:19,564 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 112 transitions. [2022-04-28 10:00:19,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:19,565 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:19,565 INFO L74 IsIncluded]: Start isIncluded. First operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 88 states. [2022-04-28 10:00:19,565 INFO L87 Difference]: Start difference. First operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 88 states. [2022-04-28 10:00:19,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:19,567 INFO L93 Difference]: Finished difference Result 88 states and 112 transitions. [2022-04-28 10:00:19,567 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 112 transitions. [2022-04-28 10:00:19,567 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:19,567 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:19,568 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:19,568 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:19,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:19,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 106 transitions. [2022-04-28 10:00:19,570 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 106 transitions. Word has length 60 [2022-04-28 10:00:19,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:19,570 INFO L495 AbstractCegarLoop]: Abstraction has 84 states and 106 transitions. [2022-04-28 10:00:19,570 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:19,570 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 84 states and 106 transitions. [2022-04-28 10:00:19,693 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:19,693 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 106 transitions. [2022-04-28 10:00:19,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-04-28 10:00:19,694 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:19,694 INFO L195 NwaCegarLoop]: trace histogram [16, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:19,722 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:19,894 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-28 10:00:19,894 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:19,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:19,895 INFO L85 PathProgramCache]: Analyzing trace with hash -2059623478, now seen corresponding path program 15 times [2022-04-28 10:00:19,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:19,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [611868561] [2022-04-28 10:00:19,895 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:19,896 INFO L85 PathProgramCache]: Analyzing trace with hash -2059623478, now seen corresponding path program 16 times [2022-04-28 10:00:19,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:19,896 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048415579] [2022-04-28 10:00:19,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:19,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:19,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:19,992 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:19,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:20,010 INFO L290 TraceCheckUtils]: 0: Hoare triple {8736#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8707#true} is VALID [2022-04-28 10:00:20,011 INFO L290 TraceCheckUtils]: 1: Hoare triple {8707#true} assume true; {8707#true} is VALID [2022-04-28 10:00:20,011 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8707#true} {8707#true} #682#return; {8707#true} is VALID [2022-04-28 10:00:20,013 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:20,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:20,304 INFO L290 TraceCheckUtils]: 0: Hoare triple {8737#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:20,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8739#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:20,308 INFO L290 TraceCheckUtils]: 2: Hoare triple {8739#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8740#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:20,309 INFO L290 TraceCheckUtils]: 3: Hoare triple {8740#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8741#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,310 INFO L290 TraceCheckUtils]: 4: Hoare triple {8741#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8742#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,312 INFO L290 TraceCheckUtils]: 5: Hoare triple {8742#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8743#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:20,313 INFO L290 TraceCheckUtils]: 6: Hoare triple {8743#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:20,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {8744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8745#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,315 INFO L290 TraceCheckUtils]: 8: Hoare triple {8745#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8746#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 8) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:20,317 INFO L290 TraceCheckUtils]: 9: Hoare triple {8746#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 8) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,317 INFO L290 TraceCheckUtils]: 10: Hoare triple {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,318 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {8707#true} #672#return; {8708#false} is VALID [2022-04-28 10:00:20,319 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2022-04-28 10:00:20,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:20,352 INFO L290 TraceCheckUtils]: 0: Hoare triple {8737#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8707#true} is VALID [2022-04-28 10:00:20,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 2: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 3: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 4: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 6: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 7: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 8: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 9: Hoare triple {8707#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L290 TraceCheckUtils]: 10: Hoare triple {8707#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8707#true} is VALID [2022-04-28 10:00:20,353 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {8707#true} {8708#false} #656#return; {8708#false} is VALID [2022-04-28 10:00:20,354 INFO L272 TraceCheckUtils]: 0: Hoare triple {8707#true} call ULTIMATE.init(); {8736#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:20,354 INFO L290 TraceCheckUtils]: 1: Hoare triple {8736#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 2: Hoare triple {8707#true} assume true; {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8707#true} {8707#true} #682#return; {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L272 TraceCheckUtils]: 4: Hoare triple {8707#true} call #t~ret187 := main(); {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 5: Hoare triple {8707#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L272 TraceCheckUtils]: 6: Hoare triple {8707#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 7: Hoare triple {8707#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 8: Hoare triple {8707#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 9: Hoare triple {8707#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 10: Hoare triple {8707#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 11: Hoare triple {8707#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:20,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {8707#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8707#true} is VALID [2022-04-28 10:00:20,356 INFO L290 TraceCheckUtils]: 13: Hoare triple {8707#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:20,356 INFO L290 TraceCheckUtils]: 14: Hoare triple {8707#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8707#true} is VALID [2022-04-28 10:00:20,356 INFO L290 TraceCheckUtils]: 15: Hoare triple {8707#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8707#true} is VALID [2022-04-28 10:00:20,357 INFO L272 TraceCheckUtils]: 16: Hoare triple {8707#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {8737#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:20,357 INFO L290 TraceCheckUtils]: 17: Hoare triple {8737#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:20,359 INFO L290 TraceCheckUtils]: 18: Hoare triple {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8739#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:20,361 INFO L290 TraceCheckUtils]: 19: Hoare triple {8739#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8740#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:20,362 INFO L290 TraceCheckUtils]: 20: Hoare triple {8740#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8741#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,363 INFO L290 TraceCheckUtils]: 21: Hoare triple {8741#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8742#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,364 INFO L290 TraceCheckUtils]: 22: Hoare triple {8742#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8743#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:20,366 INFO L290 TraceCheckUtils]: 23: Hoare triple {8743#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:20,367 INFO L290 TraceCheckUtils]: 24: Hoare triple {8744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8745#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,368 INFO L290 TraceCheckUtils]: 25: Hoare triple {8745#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8746#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 8) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:20,369 INFO L290 TraceCheckUtils]: 26: Hoare triple {8746#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 8) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,370 INFO L290 TraceCheckUtils]: 27: Hoare triple {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:20,371 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8747#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {8707#true} #672#return; {8708#false} is VALID [2022-04-28 10:00:20,371 INFO L290 TraceCheckUtils]: 29: Hoare triple {8708#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8708#false} is VALID [2022-04-28 10:00:20,371 INFO L290 TraceCheckUtils]: 30: Hoare triple {8708#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {8708#false} is VALID [2022-04-28 10:00:20,371 INFO L290 TraceCheckUtils]: 31: Hoare triple {8708#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8708#false} is VALID [2022-04-28 10:00:20,371 INFO L290 TraceCheckUtils]: 32: Hoare triple {8708#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8708#false} is VALID [2022-04-28 10:00:20,371 INFO L290 TraceCheckUtils]: 33: Hoare triple {8708#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8708#false} is VALID [2022-04-28 10:00:20,371 INFO L290 TraceCheckUtils]: 34: Hoare triple {8708#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 35: Hoare triple {8708#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 36: Hoare triple {8708#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 37: Hoare triple {8708#false} assume #t~short172; {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 38: Hoare triple {8708#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 39: Hoare triple {8708#false} assume 0 != #t~mem173;havoc #t~mem173; {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L272 TraceCheckUtils]: 40: Hoare triple {8708#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 41: Hoare triple {8708#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 42: Hoare triple {8708#false} assume !(~len <= 0); {8708#false} is VALID [2022-04-28 10:00:20,372 INFO L272 TraceCheckUtils]: 43: Hoare triple {8708#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8737#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 44: Hoare triple {8737#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8707#true} is VALID [2022-04-28 10:00:20,372 INFO L290 TraceCheckUtils]: 45: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 46: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 47: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 48: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 49: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 50: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 51: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 52: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 53: Hoare triple {8707#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 54: Hoare triple {8707#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8707#true} is VALID [2022-04-28 10:00:20,373 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8707#true} {8708#false} #656#return; {8708#false} is VALID [2022-04-28 10:00:20,373 INFO L290 TraceCheckUtils]: 56: Hoare triple {8708#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8708#false} is VALID [2022-04-28 10:00:20,374 INFO L290 TraceCheckUtils]: 57: Hoare triple {8708#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8708#false} is VALID [2022-04-28 10:00:20,374 INFO L272 TraceCheckUtils]: 58: Hoare triple {8708#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8708#false} is VALID [2022-04-28 10:00:20,374 INFO L290 TraceCheckUtils]: 59: Hoare triple {8708#false} ~cond := #in~cond; {8708#false} is VALID [2022-04-28 10:00:20,374 INFO L290 TraceCheckUtils]: 60: Hoare triple {8708#false} assume 0 == ~cond; {8708#false} is VALID [2022-04-28 10:00:20,374 INFO L290 TraceCheckUtils]: 61: Hoare triple {8708#false} assume !false; {8708#false} is VALID [2022-04-28 10:00:20,374 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-28 10:00:20,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:20,375 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048415579] [2022-04-28 10:00:20,375 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1048415579] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:20,375 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [97994793] [2022-04-28 10:00:20,375 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 10:00:20,375 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:20,375 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:20,380 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:20,381 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-28 10:00:20,676 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 10:00:20,676 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:20,680 INFO L263 TraceCheckSpWp]: Trace formula consists of 793 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-28 10:00:20,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:20,698 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:21,575 INFO L272 TraceCheckUtils]: 0: Hoare triple {8707#true} call ULTIMATE.init(); {8707#true} is VALID [2022-04-28 10:00:21,575 INFO L290 TraceCheckUtils]: 1: Hoare triple {8707#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8707#true} is VALID [2022-04-28 10:00:21,575 INFO L290 TraceCheckUtils]: 2: Hoare triple {8707#true} assume true; {8707#true} is VALID [2022-04-28 10:00:21,575 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8707#true} {8707#true} #682#return; {8707#true} is VALID [2022-04-28 10:00:21,575 INFO L272 TraceCheckUtils]: 4: Hoare triple {8707#true} call #t~ret187 := main(); {8707#true} is VALID [2022-04-28 10:00:21,575 INFO L290 TraceCheckUtils]: 5: Hoare triple {8707#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L272 TraceCheckUtils]: 6: Hoare triple {8707#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 7: Hoare triple {8707#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 8: Hoare triple {8707#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 9: Hoare triple {8707#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 10: Hoare triple {8707#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 11: Hoare triple {8707#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 12: Hoare triple {8707#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 13: Hoare triple {8707#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 14: Hoare triple {8707#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L290 TraceCheckUtils]: 15: Hoare triple {8707#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8707#true} is VALID [2022-04-28 10:00:21,576 INFO L272 TraceCheckUtils]: 16: Hoare triple {8707#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {8707#true} is VALID [2022-04-28 10:00:21,577 INFO L290 TraceCheckUtils]: 17: Hoare triple {8707#true} #t~loopctr188 := 0; {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:21,578 INFO L290 TraceCheckUtils]: 18: Hoare triple {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8805#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:21,579 INFO L290 TraceCheckUtils]: 19: Hoare triple {8805#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8809#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:21,580 INFO L290 TraceCheckUtils]: 20: Hoare triple {8809#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8813#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:21,581 INFO L290 TraceCheckUtils]: 21: Hoare triple {8813#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8817#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:21,581 INFO L290 TraceCheckUtils]: 22: Hoare triple {8817#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8821#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:21,582 INFO L290 TraceCheckUtils]: 23: Hoare triple {8821#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8825#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:21,583 INFO L290 TraceCheckUtils]: 24: Hoare triple {8825#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8829#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:21,583 INFO L290 TraceCheckUtils]: 25: Hoare triple {8829#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:21,583 INFO L290 TraceCheckUtils]: 26: Hoare triple {8707#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8707#true} is VALID [2022-04-28 10:00:21,583 INFO L290 TraceCheckUtils]: 27: Hoare triple {8707#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8707#true} is VALID [2022-04-28 10:00:21,583 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8707#true} {8707#true} #672#return; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 29: Hoare triple {8707#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 30: Hoare triple {8707#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 31: Hoare triple {8707#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 32: Hoare triple {8707#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 33: Hoare triple {8707#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 34: Hoare triple {8707#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 35: Hoare triple {8707#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 36: Hoare triple {8707#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 37: Hoare triple {8707#true} assume #t~short172; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 38: Hoare triple {8707#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 39: Hoare triple {8707#true} assume 0 != #t~mem173;havoc #t~mem173; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L272 TraceCheckUtils]: 40: Hoare triple {8707#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 41: Hoare triple {8707#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8707#true} is VALID [2022-04-28 10:00:21,584 INFO L290 TraceCheckUtils]: 42: Hoare triple {8707#true} assume !(~len <= 0); {8707#true} is VALID [2022-04-28 10:00:21,585 INFO L272 TraceCheckUtils]: 43: Hoare triple {8707#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8707#true} is VALID [2022-04-28 10:00:21,585 INFO L290 TraceCheckUtils]: 44: Hoare triple {8707#true} #t~loopctr188 := 0; {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:21,586 INFO L290 TraceCheckUtils]: 45: Hoare triple {8738#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8805#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:21,586 INFO L290 TraceCheckUtils]: 46: Hoare triple {8805#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8809#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:21,587 INFO L290 TraceCheckUtils]: 47: Hoare triple {8809#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8813#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:21,588 INFO L290 TraceCheckUtils]: 48: Hoare triple {8813#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8817#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:21,589 INFO L290 TraceCheckUtils]: 49: Hoare triple {8817#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8821#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:21,590 INFO L290 TraceCheckUtils]: 50: Hoare triple {8821#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8825#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:21,592 INFO L290 TraceCheckUtils]: 51: Hoare triple {8825#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8829#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:21,593 INFO L290 TraceCheckUtils]: 52: Hoare triple {8829#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8914#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:21,596 INFO L290 TraceCheckUtils]: 53: Hoare triple {8914#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8918#(and (< 0 (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (< (+ (div (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551624)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 8 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} is VALID [2022-04-28 10:00:21,596 INFO L290 TraceCheckUtils]: 54: Hoare triple {8918#(and (< 0 (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (< (+ (div (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551624)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 8 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8918#(and (< 0 (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (< (+ (div (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551624)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 8 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} is VALID [2022-04-28 10:00:21,597 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8918#(and (< 0 (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (< (+ (div (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551624)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 8 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} {8707#true} #656#return; {8708#false} is VALID [2022-04-28 10:00:21,597 INFO L290 TraceCheckUtils]: 56: Hoare triple {8708#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8708#false} is VALID [2022-04-28 10:00:21,597 INFO L290 TraceCheckUtils]: 57: Hoare triple {8708#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8708#false} is VALID [2022-04-28 10:00:21,597 INFO L272 TraceCheckUtils]: 58: Hoare triple {8708#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8708#false} is VALID [2022-04-28 10:00:21,597 INFO L290 TraceCheckUtils]: 59: Hoare triple {8708#false} ~cond := #in~cond; {8708#false} is VALID [2022-04-28 10:00:21,597 INFO L290 TraceCheckUtils]: 60: Hoare triple {8708#false} assume 0 == ~cond; {8708#false} is VALID [2022-04-28 10:00:21,598 INFO L290 TraceCheckUtils]: 61: Hoare triple {8708#false} assume !false; {8708#false} is VALID [2022-04-28 10:00:21,598 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 11 proven. 136 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-28 10:00:21,598 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:22,365 INFO L290 TraceCheckUtils]: 61: Hoare triple {8708#false} assume !false; {8708#false} is VALID [2022-04-28 10:00:22,365 INFO L290 TraceCheckUtils]: 60: Hoare triple {8708#false} assume 0 == ~cond; {8708#false} is VALID [2022-04-28 10:00:22,365 INFO L290 TraceCheckUtils]: 59: Hoare triple {8708#false} ~cond := #in~cond; {8708#false} is VALID [2022-04-28 10:00:22,365 INFO L272 TraceCheckUtils]: 58: Hoare triple {8708#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8708#false} is VALID [2022-04-28 10:00:22,366 INFO L290 TraceCheckUtils]: 57: Hoare triple {8708#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8708#false} is VALID [2022-04-28 10:00:22,366 INFO L290 TraceCheckUtils]: 56: Hoare triple {8708#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8708#false} is VALID [2022-04-28 10:00:22,366 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8964#(not (= |#Ultimate.C_memset_#amount| 80))} {8707#true} #656#return; {8708#false} is VALID [2022-04-28 10:00:22,367 INFO L290 TraceCheckUtils]: 54: Hoare triple {8964#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8964#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:22,367 INFO L290 TraceCheckUtils]: 53: Hoare triple {8971#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8964#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:22,369 INFO L290 TraceCheckUtils]: 52: Hoare triple {8975#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8971#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:22,370 INFO L290 TraceCheckUtils]: 51: Hoare triple {8979#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8975#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,372 INFO L290 TraceCheckUtils]: 50: Hoare triple {8983#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8979#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,373 INFO L290 TraceCheckUtils]: 49: Hoare triple {8987#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8983#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,374 INFO L290 TraceCheckUtils]: 48: Hoare triple {8991#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8987#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,375 INFO L290 TraceCheckUtils]: 47: Hoare triple {8995#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8991#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,377 INFO L290 TraceCheckUtils]: 46: Hoare triple {8999#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8995#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,378 INFO L290 TraceCheckUtils]: 45: Hoare triple {9003#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8999#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 44: Hoare triple {8707#true} #t~loopctr188 := 0; {9003#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:22,379 INFO L272 TraceCheckUtils]: 43: Hoare triple {8707#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 42: Hoare triple {8707#true} assume !(~len <= 0); {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 41: Hoare triple {8707#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L272 TraceCheckUtils]: 40: Hoare triple {8707#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 39: Hoare triple {8707#true} assume 0 != #t~mem173;havoc #t~mem173; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 38: Hoare triple {8707#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 37: Hoare triple {8707#true} assume #t~short172; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 36: Hoare triple {8707#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 35: Hoare triple {8707#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 34: Hoare triple {8707#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 33: Hoare triple {8707#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8707#true} is VALID [2022-04-28 10:00:22,379 INFO L290 TraceCheckUtils]: 32: Hoare triple {8707#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 31: Hoare triple {8707#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 30: Hoare triple {8707#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 29: Hoare triple {8707#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8707#true} {8707#true} #672#return; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 27: Hoare triple {8707#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 26: Hoare triple {8707#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 25: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 24: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 23: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 22: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 21: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 20: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,380 INFO L290 TraceCheckUtils]: 19: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 18: Hoare triple {8707#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 17: Hoare triple {8707#true} #t~loopctr188 := 0; {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L272 TraceCheckUtils]: 16: Hoare triple {8707#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 15: Hoare triple {8707#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 14: Hoare triple {8707#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 13: Hoare triple {8707#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 12: Hoare triple {8707#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 11: Hoare triple {8707#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:22,381 INFO L290 TraceCheckUtils]: 10: Hoare triple {8707#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L290 TraceCheckUtils]: 9: Hoare triple {8707#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L290 TraceCheckUtils]: 8: Hoare triple {8707#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L290 TraceCheckUtils]: 7: Hoare triple {8707#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L272 TraceCheckUtils]: 6: Hoare triple {8707#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L290 TraceCheckUtils]: 5: Hoare triple {8707#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L272 TraceCheckUtils]: 4: Hoare triple {8707#true} call #t~ret187 := main(); {8707#true} is VALID [2022-04-28 10:00:22,382 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8707#true} {8707#true} #682#return; {8707#true} is VALID [2022-04-28 10:00:22,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {8707#true} assume true; {8707#true} is VALID [2022-04-28 10:00:22,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {8707#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8707#true} is VALID [2022-04-28 10:00:22,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {8707#true} call ULTIMATE.init(); {8707#true} is VALID [2022-04-28 10:00:22,385 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 83 proven. 36 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-28 10:00:22,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [97994793] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:22,386 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:22,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 12] total 33 [2022-04-28 10:00:22,387 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:22,387 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [611868561] [2022-04-28 10:00:22,387 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [611868561] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:22,387 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:22,387 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2022-04-28 10:00:22,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795646491] [2022-04-28 10:00:22,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:22,388 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 62 [2022-04-28 10:00:22,388 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:22,388 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:22,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:22,453 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-28 10:00:22,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:22,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-28 10:00:22,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=261, Invalid=795, Unknown=0, NotChecked=0, Total=1056 [2022-04-28 10:00:22,453 INFO L87 Difference]: Start difference. First operand 84 states and 106 transitions. Second operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:24,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:24,552 INFO L93 Difference]: Finished difference Result 156 states and 200 transitions. [2022-04-28 10:00:24,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-28 10:00:24,552 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 62 [2022-04-28 10:00:24,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:24,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:24,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 190 transitions. [2022-04-28 10:00:24,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:24,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 190 transitions. [2022-04-28 10:00:24,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 190 transitions. [2022-04-28 10:00:24,734 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 190 edges. 190 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:24,739 INFO L225 Difference]: With dead ends: 156 [2022-04-28 10:00:24,740 INFO L226 Difference]: Without dead ends: 89 [2022-04-28 10:00:24,740 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=421, Invalid=1471, Unknown=0, NotChecked=0, Total=1892 [2022-04-28 10:00:24,741 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 728 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 775 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 728 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:24,742 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 211 Invalid, 775 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 728 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 10:00:24,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-04-28 10:00:24,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 85. [2022-04-28 10:00:24,769 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:24,769 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:24,769 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:24,769 INFO L87 Difference]: Start difference. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:24,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:24,772 INFO L93 Difference]: Finished difference Result 89 states and 113 transitions. [2022-04-28 10:00:24,772 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 113 transitions. [2022-04-28 10:00:24,772 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:24,772 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:24,773 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 89 states. [2022-04-28 10:00:24,773 INFO L87 Difference]: Start difference. First operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 89 states. [2022-04-28 10:00:24,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:24,775 INFO L93 Difference]: Finished difference Result 89 states and 113 transitions. [2022-04-28 10:00:24,775 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 113 transitions. [2022-04-28 10:00:24,775 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:24,775 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:24,775 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:24,775 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:24,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:24,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 107 transitions. [2022-04-28 10:00:24,778 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 107 transitions. Word has length 62 [2022-04-28 10:00:24,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:24,778 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 107 transitions. [2022-04-28 10:00:24,778 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:24,778 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 85 states and 107 transitions. [2022-04-28 10:00:24,898 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:24,898 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 107 transitions. [2022-04-28 10:00:24,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-04-28 10:00:24,899 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:24,899 INFO L195 NwaCegarLoop]: trace histogram [18, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:24,918 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:25,104 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-28 10:00:25,104 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:25,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:25,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1482430496, now seen corresponding path program 17 times [2022-04-28 10:00:25,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:25,105 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [997402242] [2022-04-28 10:00:25,105 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:25,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1482430496, now seen corresponding path program 18 times [2022-04-28 10:00:25,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:25,105 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20924112] [2022-04-28 10:00:25,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:25,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:25,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:25,198 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:25,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:25,207 INFO L290 TraceCheckUtils]: 0: Hoare triple {9852#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9821#true} is VALID [2022-04-28 10:00:25,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {9821#true} assume true; {9821#true} is VALID [2022-04-28 10:00:25,207 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9821#true} {9821#true} #682#return; {9821#true} is VALID [2022-04-28 10:00:25,210 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:25,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:25,544 INFO L290 TraceCheckUtils]: 0: Hoare triple {9853#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9854#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:25,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {9854#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9855#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:25,547 INFO L290 TraceCheckUtils]: 2: Hoare triple {9855#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9856#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:25,549 INFO L290 TraceCheckUtils]: 3: Hoare triple {9856#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9857#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,550 INFO L290 TraceCheckUtils]: 4: Hoare triple {9857#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9858#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,551 INFO L290 TraceCheckUtils]: 5: Hoare triple {9858#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9859#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:25,553 INFO L290 TraceCheckUtils]: 6: Hoare triple {9859#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9860#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:25,554 INFO L290 TraceCheckUtils]: 7: Hoare triple {9860#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9861#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,555 INFO L290 TraceCheckUtils]: 8: Hoare triple {9861#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9862#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:25,557 INFO L290 TraceCheckUtils]: 9: Hoare triple {9862#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9863#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 9) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:25,558 INFO L290 TraceCheckUtils]: 10: Hoare triple {9863#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 9) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,559 INFO L290 TraceCheckUtils]: 11: Hoare triple {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,560 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {9821#true} #672#return; {9822#false} is VALID [2022-04-28 10:00:25,560 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-28 10:00:25,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:25,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {9853#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 2: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 3: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 4: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 5: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 6: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 7: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 8: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,574 INFO L290 TraceCheckUtils]: 9: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,575 INFO L290 TraceCheckUtils]: 10: Hoare triple {9821#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9821#true} is VALID [2022-04-28 10:00:25,575 INFO L290 TraceCheckUtils]: 11: Hoare triple {9821#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9821#true} is VALID [2022-04-28 10:00:25,575 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {9821#true} {9822#false} #656#return; {9822#false} is VALID [2022-04-28 10:00:25,576 INFO L272 TraceCheckUtils]: 0: Hoare triple {9821#true} call ULTIMATE.init(); {9852#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:25,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {9852#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9821#true} is VALID [2022-04-28 10:00:25,576 INFO L290 TraceCheckUtils]: 2: Hoare triple {9821#true} assume true; {9821#true} is VALID [2022-04-28 10:00:25,576 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9821#true} {9821#true} #682#return; {9821#true} is VALID [2022-04-28 10:00:25,576 INFO L272 TraceCheckUtils]: 4: Hoare triple {9821#true} call #t~ret187 := main(); {9821#true} is VALID [2022-04-28 10:00:25,576 INFO L290 TraceCheckUtils]: 5: Hoare triple {9821#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9821#true} is VALID [2022-04-28 10:00:25,576 INFO L272 TraceCheckUtils]: 6: Hoare triple {9821#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {9821#true} is VALID [2022-04-28 10:00:25,576 INFO L290 TraceCheckUtils]: 7: Hoare triple {9821#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 8: Hoare triple {9821#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 9: Hoare triple {9821#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 10: Hoare triple {9821#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 11: Hoare triple {9821#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 12: Hoare triple {9821#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 13: Hoare triple {9821#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 14: Hoare triple {9821#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9821#true} is VALID [2022-04-28 10:00:25,577 INFO L290 TraceCheckUtils]: 15: Hoare triple {9821#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9821#true} is VALID [2022-04-28 10:00:25,578 INFO L272 TraceCheckUtils]: 16: Hoare triple {9821#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {9853#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:25,579 INFO L290 TraceCheckUtils]: 17: Hoare triple {9853#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9854#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:25,581 INFO L290 TraceCheckUtils]: 18: Hoare triple {9854#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9855#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:25,583 INFO L290 TraceCheckUtils]: 19: Hoare triple {9855#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9856#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:25,584 INFO L290 TraceCheckUtils]: 20: Hoare triple {9856#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9857#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,585 INFO L290 TraceCheckUtils]: 21: Hoare triple {9857#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9858#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,587 INFO L290 TraceCheckUtils]: 22: Hoare triple {9858#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9859#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:25,588 INFO L290 TraceCheckUtils]: 23: Hoare triple {9859#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9860#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:25,590 INFO L290 TraceCheckUtils]: 24: Hoare triple {9860#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9861#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,591 INFO L290 TraceCheckUtils]: 25: Hoare triple {9861#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9862#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:25,592 INFO L290 TraceCheckUtils]: 26: Hoare triple {9862#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9863#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 9) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:25,594 INFO L290 TraceCheckUtils]: 27: Hoare triple {9863#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 9) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,594 INFO L290 TraceCheckUtils]: 28: Hoare triple {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:25,595 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {9864#(or (<= |#Ultimate.C_memset_#amount| 9) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {9821#true} #672#return; {9822#false} is VALID [2022-04-28 10:00:25,595 INFO L290 TraceCheckUtils]: 30: Hoare triple {9822#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 31: Hoare triple {9822#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 32: Hoare triple {9822#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 33: Hoare triple {9822#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 34: Hoare triple {9822#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 35: Hoare triple {9822#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 36: Hoare triple {9822#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 37: Hoare triple {9822#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 38: Hoare triple {9822#false} assume #t~short172; {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 39: Hoare triple {9822#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9822#false} is VALID [2022-04-28 10:00:25,596 INFO L290 TraceCheckUtils]: 40: Hoare triple {9822#false} assume 0 != #t~mem173;havoc #t~mem173; {9822#false} is VALID [2022-04-28 10:00:25,597 INFO L272 TraceCheckUtils]: 41: Hoare triple {9822#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9822#false} is VALID [2022-04-28 10:00:25,597 INFO L290 TraceCheckUtils]: 42: Hoare triple {9822#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9822#false} is VALID [2022-04-28 10:00:25,597 INFO L290 TraceCheckUtils]: 43: Hoare triple {9822#false} assume !(~len <= 0); {9822#false} is VALID [2022-04-28 10:00:25,597 INFO L272 TraceCheckUtils]: 44: Hoare triple {9822#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9853#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:25,597 INFO L290 TraceCheckUtils]: 45: Hoare triple {9853#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9821#true} is VALID [2022-04-28 10:00:25,597 INFO L290 TraceCheckUtils]: 46: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,597 INFO L290 TraceCheckUtils]: 47: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,620 INFO L290 TraceCheckUtils]: 48: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 49: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 50: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 51: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 52: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 53: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 54: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 55: Hoare triple {9821#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9821#true} is VALID [2022-04-28 10:00:25,621 INFO L290 TraceCheckUtils]: 56: Hoare triple {9821#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9821#true} is VALID [2022-04-28 10:00:25,622 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9821#true} {9822#false} #656#return; {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L290 TraceCheckUtils]: 58: Hoare triple {9822#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L290 TraceCheckUtils]: 59: Hoare triple {9822#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L272 TraceCheckUtils]: 60: Hoare triple {9822#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L290 TraceCheckUtils]: 61: Hoare triple {9822#false} ~cond := #in~cond; {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L290 TraceCheckUtils]: 62: Hoare triple {9822#false} assume 0 == ~cond; {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L290 TraceCheckUtils]: 63: Hoare triple {9822#false} assume !false; {9822#false} is VALID [2022-04-28 10:00:25,622 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2022-04-28 10:00:25,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:25,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20924112] [2022-04-28 10:00:25,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [20924112] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:25,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [275905951] [2022-04-28 10:00:25,623 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 10:00:25,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:25,623 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:25,628 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:25,661 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-28 10:00:32,449 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-04-28 10:00:32,449 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:32,466 INFO L263 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-28 10:00:32,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:32,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:33,234 INFO L272 TraceCheckUtils]: 0: Hoare triple {9821#true} call ULTIMATE.init(); {9821#true} is VALID [2022-04-28 10:00:33,234 INFO L290 TraceCheckUtils]: 1: Hoare triple {9821#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9821#true} is VALID [2022-04-28 10:00:33,234 INFO L290 TraceCheckUtils]: 2: Hoare triple {9821#true} assume true; {9821#true} is VALID [2022-04-28 10:00:33,234 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9821#true} {9821#true} #682#return; {9821#true} is VALID [2022-04-28 10:00:33,234 INFO L272 TraceCheckUtils]: 4: Hoare triple {9821#true} call #t~ret187 := main(); {9821#true} is VALID [2022-04-28 10:00:33,234 INFO L290 TraceCheckUtils]: 5: Hoare triple {9821#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9821#true} is VALID [2022-04-28 10:00:33,234 INFO L272 TraceCheckUtils]: 6: Hoare triple {9821#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 7: Hoare triple {9821#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 8: Hoare triple {9821#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 9: Hoare triple {9821#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 10: Hoare triple {9821#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {9821#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {9821#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 13: Hoare triple {9821#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 14: Hoare triple {9821#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L290 TraceCheckUtils]: 15: Hoare triple {9821#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9821#true} is VALID [2022-04-28 10:00:33,235 INFO L272 TraceCheckUtils]: 16: Hoare triple {9821#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {9821#true} is VALID [2022-04-28 10:00:33,236 INFO L290 TraceCheckUtils]: 17: Hoare triple {9821#true} #t~loopctr188 := 0; {9854#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:33,240 INFO L290 TraceCheckUtils]: 18: Hoare triple {9854#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9922#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:33,241 INFO L290 TraceCheckUtils]: 19: Hoare triple {9922#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9926#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:33,242 INFO L290 TraceCheckUtils]: 20: Hoare triple {9926#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9930#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:33,242 INFO L290 TraceCheckUtils]: 21: Hoare triple {9930#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9934#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:33,244 INFO L290 TraceCheckUtils]: 22: Hoare triple {9934#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9938#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:33,245 INFO L290 TraceCheckUtils]: 23: Hoare triple {9938#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9942#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:33,249 INFO L290 TraceCheckUtils]: 24: Hoare triple {9942#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9946#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551613) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:33,250 INFO L290 TraceCheckUtils]: 25: Hoare triple {9946#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551613) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9950#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551612) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:33,254 INFO L290 TraceCheckUtils]: 26: Hoare triple {9950#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551612) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9954#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551611) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:33,255 INFO L290 TraceCheckUtils]: 27: Hoare triple {9954#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551611) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9958#(and (< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) 2) (< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} is VALID [2022-04-28 10:00:33,256 INFO L290 TraceCheckUtils]: 28: Hoare triple {9958#(and (< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) 2) (< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9958#(and (< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) 2) (< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} is VALID [2022-04-28 10:00:33,257 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {9958#(and (< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551621)) (- 18446744073709551616)) 2) (< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} {9821#true} #672#return; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 30: Hoare triple {9822#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 31: Hoare triple {9822#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 32: Hoare triple {9822#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 33: Hoare triple {9822#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 34: Hoare triple {9822#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 35: Hoare triple {9822#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 36: Hoare triple {9822#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 37: Hoare triple {9822#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 38: Hoare triple {9822#false} assume #t~short172; {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 39: Hoare triple {9822#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9822#false} is VALID [2022-04-28 10:00:33,257 INFO L290 TraceCheckUtils]: 40: Hoare triple {9822#false} assume 0 != #t~mem173;havoc #t~mem173; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L272 TraceCheckUtils]: 41: Hoare triple {9822#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 42: Hoare triple {9822#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 43: Hoare triple {9822#false} assume !(~len <= 0); {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L272 TraceCheckUtils]: 44: Hoare triple {9822#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 45: Hoare triple {9822#false} #t~loopctr188 := 0; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 46: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 47: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 48: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 49: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 50: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 51: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 52: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 53: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,258 INFO L290 TraceCheckUtils]: 54: Hoare triple {9822#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 55: Hoare triple {9822#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 56: Hoare triple {9822#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9822#false} {9822#false} #656#return; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 58: Hoare triple {9822#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 59: Hoare triple {9822#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L272 TraceCheckUtils]: 60: Hoare triple {9822#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 61: Hoare triple {9822#false} ~cond := #in~cond; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 62: Hoare triple {9822#false} assume 0 == ~cond; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L290 TraceCheckUtils]: 63: Hoare triple {9822#false} assume !false; {9822#false} is VALID [2022-04-28 10:00:33,259 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 103 proven. 45 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-28 10:00:33,260 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:34,079 INFO L290 TraceCheckUtils]: 63: Hoare triple {9822#false} assume !false; {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 62: Hoare triple {9822#false} assume 0 == ~cond; {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 61: Hoare triple {9822#false} ~cond := #in~cond; {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L272 TraceCheckUtils]: 60: Hoare triple {9822#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 59: Hoare triple {9822#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 58: Hoare triple {9822#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9821#true} {9822#false} #656#return; {9822#false} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 56: Hoare triple {9821#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9821#true} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 55: Hoare triple {9821#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {9821#true} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 54: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 53: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 52: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 51: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,080 INFO L290 TraceCheckUtils]: 50: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 49: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 48: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 47: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 46: Hoare triple {9821#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 45: Hoare triple {9821#true} #t~loopctr188 := 0; {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L272 TraceCheckUtils]: 44: Hoare triple {9822#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9821#true} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 43: Hoare triple {9822#false} assume !(~len <= 0); {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 42: Hoare triple {9822#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L272 TraceCheckUtils]: 41: Hoare triple {9822#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 40: Hoare triple {9822#false} assume 0 != #t~mem173;havoc #t~mem173; {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 39: Hoare triple {9822#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 38: Hoare triple {9822#false} assume #t~short172; {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 37: Hoare triple {9822#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9822#false} is VALID [2022-04-28 10:00:34,081 INFO L290 TraceCheckUtils]: 36: Hoare triple {9822#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9822#false} is VALID [2022-04-28 10:00:34,082 INFO L290 TraceCheckUtils]: 35: Hoare triple {9822#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9822#false} is VALID [2022-04-28 10:00:34,082 INFO L290 TraceCheckUtils]: 34: Hoare triple {9822#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9822#false} is VALID [2022-04-28 10:00:34,082 INFO L290 TraceCheckUtils]: 33: Hoare triple {9822#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9822#false} is VALID [2022-04-28 10:00:34,082 INFO L290 TraceCheckUtils]: 32: Hoare triple {9822#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9822#false} is VALID [2022-04-28 10:00:34,082 INFO L290 TraceCheckUtils]: 31: Hoare triple {9822#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {9822#false} is VALID [2022-04-28 10:00:34,082 INFO L290 TraceCheckUtils]: 30: Hoare triple {9822#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9822#false} is VALID [2022-04-28 10:00:34,083 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {10172#(not (= 32 |#Ultimate.C_memset_#amount|))} {9821#true} #672#return; {9822#false} is VALID [2022-04-28 10:00:34,083 INFO L290 TraceCheckUtils]: 28: Hoare triple {10172#(not (= 32 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10172#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:34,083 INFO L290 TraceCheckUtils]: 27: Hoare triple {10179#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {10172#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:34,085 INFO L290 TraceCheckUtils]: 26: Hoare triple {10183#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10179#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:34,086 INFO L290 TraceCheckUtils]: 25: Hoare triple {10187#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10183#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:34,088 INFO L290 TraceCheckUtils]: 24: Hoare triple {10191#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10187#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:34,089 INFO L290 TraceCheckUtils]: 23: Hoare triple {10195#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10191#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:34,090 INFO L290 TraceCheckUtils]: 22: Hoare triple {10199#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10195#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:34,092 INFO L290 TraceCheckUtils]: 21: Hoare triple {10203#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10199#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:34,093 INFO L290 TraceCheckUtils]: 20: Hoare triple {10207#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10203#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:34,094 INFO L290 TraceCheckUtils]: 19: Hoare triple {10211#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10207#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:34,096 INFO L290 TraceCheckUtils]: 18: Hoare triple {10215#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10211#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:34,096 INFO L290 TraceCheckUtils]: 17: Hoare triple {9821#true} #t~loopctr188 := 0; {10215#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:34,096 INFO L272 TraceCheckUtils]: 16: Hoare triple {9821#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 15: Hoare triple {9821#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 14: Hoare triple {9821#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 13: Hoare triple {9821#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 12: Hoare triple {9821#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 11: Hoare triple {9821#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 10: Hoare triple {9821#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 9: Hoare triple {9821#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 8: Hoare triple {9821#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 7: Hoare triple {9821#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L272 TraceCheckUtils]: 6: Hoare triple {9821#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {9821#true} is VALID [2022-04-28 10:00:34,097 INFO L290 TraceCheckUtils]: 5: Hoare triple {9821#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9821#true} is VALID [2022-04-28 10:00:34,098 INFO L272 TraceCheckUtils]: 4: Hoare triple {9821#true} call #t~ret187 := main(); {9821#true} is VALID [2022-04-28 10:00:34,098 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9821#true} {9821#true} #682#return; {9821#true} is VALID [2022-04-28 10:00:34,098 INFO L290 TraceCheckUtils]: 2: Hoare triple {9821#true} assume true; {9821#true} is VALID [2022-04-28 10:00:34,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {9821#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9821#true} is VALID [2022-04-28 10:00:34,098 INFO L272 TraceCheckUtils]: 0: Hoare triple {9821#true} call ULTIMATE.init(); {9821#true} is VALID [2022-04-28 10:00:34,098 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2022-04-28 10:00:34,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [275905951] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:34,099 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:34,099 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 13] total 36 [2022-04-28 10:00:34,099 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:34,099 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [997402242] [2022-04-28 10:00:34,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [997402242] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:34,099 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:34,100 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2022-04-28 10:00:34,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811709937] [2022-04-28 10:00:34,100 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:34,100 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-04-28 10:00:34,100 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:34,101 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:34,158 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:34,158 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-28 10:00:34,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:34,158 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-28 10:00:34,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=313, Invalid=947, Unknown=0, NotChecked=0, Total=1260 [2022-04-28 10:00:34,159 INFO L87 Difference]: Start difference. First operand 85 states and 107 transitions. Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:36,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:36,459 INFO L93 Difference]: Finished difference Result 158 states and 202 transitions. [2022-04-28 10:00:36,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-28 10:00:36,459 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-04-28 10:00:36,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:36,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:36,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 191 transitions. [2022-04-28 10:00:36,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:36,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 191 transitions. [2022-04-28 10:00:36,464 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 191 transitions. [2022-04-28 10:00:36,641 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 191 edges. 191 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:36,643 INFO L225 Difference]: With dead ends: 158 [2022-04-28 10:00:36,643 INFO L226 Difference]: Without dead ends: 90 [2022-04-28 10:00:36,643 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=496, Invalid=1760, Unknown=0, NotChecked=0, Total=2256 [2022-04-28 10:00:36,644 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 228 SdHoareTripleChecker+Invalid, 875 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:36,644 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 228 Invalid, 875 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-28 10:00:36,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-28 10:00:36,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 86. [2022-04-28 10:00:36,681 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:36,682 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:36,682 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:36,682 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:36,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:36,684 INFO L93 Difference]: Finished difference Result 90 states and 114 transitions. [2022-04-28 10:00:36,684 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 114 transitions. [2022-04-28 10:00:36,684 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:36,685 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:36,685 INFO L74 IsIncluded]: Start isIncluded. First operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-28 10:00:36,685 INFO L87 Difference]: Start difference. First operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-28 10:00:36,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:36,687 INFO L93 Difference]: Finished difference Result 90 states and 114 transitions. [2022-04-28 10:00:36,687 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 114 transitions. [2022-04-28 10:00:36,687 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:36,687 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:36,688 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:36,688 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:36,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:36,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 108 transitions. [2022-04-28 10:00:36,690 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 108 transitions. Word has length 64 [2022-04-28 10:00:36,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:36,690 INFO L495 AbstractCegarLoop]: Abstraction has 86 states and 108 transitions. [2022-04-28 10:00:36,690 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:36,690 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 86 states and 108 transitions. [2022-04-28 10:00:36,815 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:36,815 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 108 transitions. [2022-04-28 10:00:36,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-28 10:00:36,815 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:36,816 INFO L195 NwaCegarLoop]: trace histogram [20, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:36,824 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-04-28 10:00:37,019 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-28 10:00:37,019 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:37,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:37,020 INFO L85 PathProgramCache]: Analyzing trace with hash 1102249098, now seen corresponding path program 19 times [2022-04-28 10:00:37,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:37,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1341142057] [2022-04-28 10:00:37,020 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:37,020 INFO L85 PathProgramCache]: Analyzing trace with hash 1102249098, now seen corresponding path program 20 times [2022-04-28 10:00:37,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:37,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [166293448] [2022-04-28 10:00:37,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:37,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:37,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:37,111 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:37,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:37,121 INFO L290 TraceCheckUtils]: 0: Hoare triple {10995#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10962#true} is VALID [2022-04-28 10:00:37,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {10962#true} assume true; {10962#true} is VALID [2022-04-28 10:00:37,121 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10962#true} {10962#true} #682#return; {10962#true} is VALID [2022-04-28 10:00:37,125 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:37,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:37,514 INFO L290 TraceCheckUtils]: 0: Hoare triple {10996#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:37,517 INFO L290 TraceCheckUtils]: 1: Hoare triple {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10998#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:37,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {10998#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10999#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:37,520 INFO L290 TraceCheckUtils]: 3: Hoare triple {10999#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11000#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,522 INFO L290 TraceCheckUtils]: 4: Hoare triple {11000#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11001#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,523 INFO L290 TraceCheckUtils]: 5: Hoare triple {11001#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11002#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:37,525 INFO L290 TraceCheckUtils]: 6: Hoare triple {11002#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11003#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:37,526 INFO L290 TraceCheckUtils]: 7: Hoare triple {11003#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11004#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,528 INFO L290 TraceCheckUtils]: 8: Hoare triple {11004#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11005#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:37,530 INFO L290 TraceCheckUtils]: 9: Hoare triple {11005#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11006#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:37,532 INFO L290 TraceCheckUtils]: 10: Hoare triple {11006#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11007#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 10) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))))} is VALID [2022-04-28 10:00:37,533 INFO L290 TraceCheckUtils]: 11: Hoare triple {11007#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 10) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,534 INFO L290 TraceCheckUtils]: 12: Hoare triple {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,535 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {10962#true} #672#return; {10963#false} is VALID [2022-04-28 10:00:37,535 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-04-28 10:00:37,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:37,551 INFO L290 TraceCheckUtils]: 0: Hoare triple {10996#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10962#true} is VALID [2022-04-28 10:00:37,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,551 INFO L290 TraceCheckUtils]: 2: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,551 INFO L290 TraceCheckUtils]: 3: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 4: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 5: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 6: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 7: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 8: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 9: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {10962#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L290 TraceCheckUtils]: 12: Hoare triple {10962#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10962#true} is VALID [2022-04-28 10:00:37,552 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {10962#true} {10963#false} #656#return; {10963#false} is VALID [2022-04-28 10:00:37,553 INFO L272 TraceCheckUtils]: 0: Hoare triple {10962#true} call ULTIMATE.init(); {10995#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:37,553 INFO L290 TraceCheckUtils]: 1: Hoare triple {10995#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10962#true} is VALID [2022-04-28 10:00:37,553 INFO L290 TraceCheckUtils]: 2: Hoare triple {10962#true} assume true; {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10962#true} {10962#true} #682#return; {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L272 TraceCheckUtils]: 4: Hoare triple {10962#true} call #t~ret187 := main(); {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 5: Hoare triple {10962#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L272 TraceCheckUtils]: 6: Hoare triple {10962#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 7: Hoare triple {10962#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 8: Hoare triple {10962#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 9: Hoare triple {10962#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 10: Hoare triple {10962#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 11: Hoare triple {10962#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:37,554 INFO L290 TraceCheckUtils]: 12: Hoare triple {10962#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10962#true} is VALID [2022-04-28 10:00:37,555 INFO L290 TraceCheckUtils]: 13: Hoare triple {10962#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:37,555 INFO L290 TraceCheckUtils]: 14: Hoare triple {10962#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10962#true} is VALID [2022-04-28 10:00:37,555 INFO L290 TraceCheckUtils]: 15: Hoare triple {10962#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10962#true} is VALID [2022-04-28 10:00:37,556 INFO L272 TraceCheckUtils]: 16: Hoare triple {10962#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {10996#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:37,556 INFO L290 TraceCheckUtils]: 17: Hoare triple {10996#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:37,559 INFO L290 TraceCheckUtils]: 18: Hoare triple {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10998#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:37,561 INFO L290 TraceCheckUtils]: 19: Hoare triple {10998#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10999#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:37,562 INFO L290 TraceCheckUtils]: 20: Hoare triple {10999#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11000#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,563 INFO L290 TraceCheckUtils]: 21: Hoare triple {11000#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11001#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,565 INFO L290 TraceCheckUtils]: 22: Hoare triple {11001#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11002#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:37,566 INFO L290 TraceCheckUtils]: 23: Hoare triple {11002#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11003#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:37,568 INFO L290 TraceCheckUtils]: 24: Hoare triple {11003#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11004#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,569 INFO L290 TraceCheckUtils]: 25: Hoare triple {11004#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11005#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:37,571 INFO L290 TraceCheckUtils]: 26: Hoare triple {11005#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11006#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:37,572 INFO L290 TraceCheckUtils]: 27: Hoare triple {11006#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11007#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 10) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))))} is VALID [2022-04-28 10:00:37,574 INFO L290 TraceCheckUtils]: 28: Hoare triple {11007#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 10) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,574 INFO L290 TraceCheckUtils]: 29: Hoare triple {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:37,575 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {11008#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {10962#true} #672#return; {10963#false} is VALID [2022-04-28 10:00:37,575 INFO L290 TraceCheckUtils]: 31: Hoare triple {10963#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 32: Hoare triple {10963#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 33: Hoare triple {10963#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 34: Hoare triple {10963#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 35: Hoare triple {10963#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 36: Hoare triple {10963#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 37: Hoare triple {10963#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 38: Hoare triple {10963#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 39: Hoare triple {10963#false} assume #t~short172; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 40: Hoare triple {10963#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L290 TraceCheckUtils]: 41: Hoare triple {10963#false} assume 0 != #t~mem173;havoc #t~mem173; {10963#false} is VALID [2022-04-28 10:00:37,576 INFO L272 TraceCheckUtils]: 42: Hoare triple {10963#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10963#false} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 43: Hoare triple {10963#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10963#false} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 44: Hoare triple {10963#false} assume !(~len <= 0); {10963#false} is VALID [2022-04-28 10:00:37,577 INFO L272 TraceCheckUtils]: 45: Hoare triple {10963#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10996#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 46: Hoare triple {10996#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10962#true} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 47: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 48: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 49: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 50: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 51: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,577 INFO L290 TraceCheckUtils]: 52: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 53: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 54: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 55: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 56: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 57: Hoare triple {10962#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 58: Hoare triple {10962#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10962#true} is VALID [2022-04-28 10:00:37,578 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {10962#true} {10963#false} #656#return; {10963#false} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 60: Hoare triple {10963#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10963#false} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 61: Hoare triple {10963#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10963#false} is VALID [2022-04-28 10:00:37,578 INFO L272 TraceCheckUtils]: 62: Hoare triple {10963#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10963#false} is VALID [2022-04-28 10:00:37,578 INFO L290 TraceCheckUtils]: 63: Hoare triple {10963#false} ~cond := #in~cond; {10963#false} is VALID [2022-04-28 10:00:37,579 INFO L290 TraceCheckUtils]: 64: Hoare triple {10963#false} assume 0 == ~cond; {10963#false} is VALID [2022-04-28 10:00:37,579 INFO L290 TraceCheckUtils]: 65: Hoare triple {10963#false} assume !false; {10963#false} is VALID [2022-04-28 10:00:37,579 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 0 proven. 178 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-04-28 10:00:37,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:37,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [166293448] [2022-04-28 10:00:37,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [166293448] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:37,580 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1634579870] [2022-04-28 10:00:37,580 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 10:00:37,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:37,580 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:37,584 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:37,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-28 10:00:38,170 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 10:00:38,171 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:38,175 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 46 conjunts are in the unsatisfiable core [2022-04-28 10:00:38,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:38,194 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:39,018 INFO L272 TraceCheckUtils]: 0: Hoare triple {10962#true} call ULTIMATE.init(); {10962#true} is VALID [2022-04-28 10:00:39,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {10962#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10962#true} is VALID [2022-04-28 10:00:39,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {10962#true} assume true; {10962#true} is VALID [2022-04-28 10:00:39,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10962#true} {10962#true} #682#return; {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L272 TraceCheckUtils]: 4: Hoare triple {10962#true} call #t~ret187 := main(); {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 5: Hoare triple {10962#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L272 TraceCheckUtils]: 6: Hoare triple {10962#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 7: Hoare triple {10962#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 8: Hoare triple {10962#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {10962#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 10: Hoare triple {10962#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 11: Hoare triple {10962#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 12: Hoare triple {10962#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10962#true} is VALID [2022-04-28 10:00:39,019 INFO L290 TraceCheckUtils]: 13: Hoare triple {10962#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:39,020 INFO L290 TraceCheckUtils]: 14: Hoare triple {10962#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10962#true} is VALID [2022-04-28 10:00:39,020 INFO L290 TraceCheckUtils]: 15: Hoare triple {10962#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10962#true} is VALID [2022-04-28 10:00:39,020 INFO L272 TraceCheckUtils]: 16: Hoare triple {10962#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {10962#true} is VALID [2022-04-28 10:00:39,023 INFO L290 TraceCheckUtils]: 17: Hoare triple {10962#true} #t~loopctr188 := 0; {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:39,026 INFO L290 TraceCheckUtils]: 18: Hoare triple {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11066#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,027 INFO L290 TraceCheckUtils]: 19: Hoare triple {11066#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11070#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:39,028 INFO L290 TraceCheckUtils]: 20: Hoare triple {11070#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11074#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:39,029 INFO L290 TraceCheckUtils]: 21: Hoare triple {11074#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11078#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,031 INFO L290 TraceCheckUtils]: 22: Hoare triple {11078#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11082#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:39,032 INFO L290 TraceCheckUtils]: 23: Hoare triple {11082#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11086#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:39,033 INFO L290 TraceCheckUtils]: 24: Hoare triple {11086#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11090#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,034 INFO L290 TraceCheckUtils]: 25: Hoare triple {11090#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11094#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:39,034 INFO L290 TraceCheckUtils]: 26: Hoare triple {11094#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:39,034 INFO L290 TraceCheckUtils]: 27: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:39,034 INFO L290 TraceCheckUtils]: 28: Hoare triple {10962#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 29: Hoare triple {10962#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10962#true} {10962#true} #672#return; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 31: Hoare triple {10962#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 32: Hoare triple {10962#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 33: Hoare triple {10962#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 34: Hoare triple {10962#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 35: Hoare triple {10962#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 36: Hoare triple {10962#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 37: Hoare triple {10962#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10962#true} is VALID [2022-04-28 10:00:39,035 INFO L290 TraceCheckUtils]: 38: Hoare triple {10962#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L290 TraceCheckUtils]: 39: Hoare triple {10962#true} assume #t~short172; {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L290 TraceCheckUtils]: 40: Hoare triple {10962#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L290 TraceCheckUtils]: 41: Hoare triple {10962#true} assume 0 != #t~mem173;havoc #t~mem173; {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L272 TraceCheckUtils]: 42: Hoare triple {10962#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L290 TraceCheckUtils]: 43: Hoare triple {10962#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L290 TraceCheckUtils]: 44: Hoare triple {10962#true} assume !(~len <= 0); {10962#true} is VALID [2022-04-28 10:00:39,036 INFO L272 TraceCheckUtils]: 45: Hoare triple {10962#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10962#true} is VALID [2022-04-28 10:00:39,037 INFO L290 TraceCheckUtils]: 46: Hoare triple {10962#true} #t~loopctr188 := 0; {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:39,038 INFO L290 TraceCheckUtils]: 47: Hoare triple {10997#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11066#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,039 INFO L290 TraceCheckUtils]: 48: Hoare triple {11066#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11070#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:39,041 INFO L290 TraceCheckUtils]: 49: Hoare triple {11070#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11074#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:39,042 INFO L290 TraceCheckUtils]: 50: Hoare triple {11074#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11078#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,043 INFO L290 TraceCheckUtils]: 51: Hoare triple {11078#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11082#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:39,044 INFO L290 TraceCheckUtils]: 52: Hoare triple {11082#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11086#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:39,045 INFO L290 TraceCheckUtils]: 53: Hoare triple {11086#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11090#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,046 INFO L290 TraceCheckUtils]: 54: Hoare triple {11090#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11094#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:39,048 INFO L290 TraceCheckUtils]: 55: Hoare triple {11094#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11185#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,049 INFO L290 TraceCheckUtils]: 56: Hoare triple {11185#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11189#(and (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:39,053 INFO L290 TraceCheckUtils]: 57: Hoare triple {11189#(and (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {11193#(and (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 10) 18446744073709551616) 1)) (< (div (+ (- 18446744073709551626) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) 2))} is VALID [2022-04-28 10:00:39,053 INFO L290 TraceCheckUtils]: 58: Hoare triple {11193#(and (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 10) 18446744073709551616) 1)) (< (div (+ (- 18446744073709551626) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11193#(and (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 10) 18446744073709551616) 1)) (< (div (+ (- 18446744073709551626) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) 2))} is VALID [2022-04-28 10:00:39,054 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {11193#(and (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 10) 18446744073709551616) 1)) (< (div (+ (- 18446744073709551626) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616)) 2))} {10962#true} #656#return; {10963#false} is VALID [2022-04-28 10:00:39,055 INFO L290 TraceCheckUtils]: 60: Hoare triple {10963#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10963#false} is VALID [2022-04-28 10:00:39,055 INFO L290 TraceCheckUtils]: 61: Hoare triple {10963#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10963#false} is VALID [2022-04-28 10:00:39,055 INFO L272 TraceCheckUtils]: 62: Hoare triple {10963#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10963#false} is VALID [2022-04-28 10:00:39,055 INFO L290 TraceCheckUtils]: 63: Hoare triple {10963#false} ~cond := #in~cond; {10963#false} is VALID [2022-04-28 10:00:39,055 INFO L290 TraceCheckUtils]: 64: Hoare triple {10963#false} assume 0 == ~cond; {10963#false} is VALID [2022-04-28 10:00:39,055 INFO L290 TraceCheckUtils]: 65: Hoare triple {10963#false} assume !false; {10963#false} is VALID [2022-04-28 10:00:39,056 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 24 proven. 199 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-28 10:00:39,056 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:40,146 INFO L290 TraceCheckUtils]: 65: Hoare triple {10963#false} assume !false; {10963#false} is VALID [2022-04-28 10:00:40,147 INFO L290 TraceCheckUtils]: 64: Hoare triple {10963#false} assume 0 == ~cond; {10963#false} is VALID [2022-04-28 10:00:40,147 INFO L290 TraceCheckUtils]: 63: Hoare triple {10963#false} ~cond := #in~cond; {10963#false} is VALID [2022-04-28 10:00:40,147 INFO L272 TraceCheckUtils]: 62: Hoare triple {10963#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10963#false} is VALID [2022-04-28 10:00:40,147 INFO L290 TraceCheckUtils]: 61: Hoare triple {10963#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10963#false} is VALID [2022-04-28 10:00:40,147 INFO L290 TraceCheckUtils]: 60: Hoare triple {10963#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10963#false} is VALID [2022-04-28 10:00:40,148 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {11239#(not (= |#Ultimate.C_memset_#amount| 80))} {10962#true} #656#return; {10963#false} is VALID [2022-04-28 10:00:40,148 INFO L290 TraceCheckUtils]: 58: Hoare triple {11239#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11239#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:40,153 INFO L290 TraceCheckUtils]: 57: Hoare triple {11246#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {11239#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:00:40,156 INFO L290 TraceCheckUtils]: 56: Hoare triple {11250#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11246#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:40,157 INFO L290 TraceCheckUtils]: 55: Hoare triple {11254#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11250#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,159 INFO L290 TraceCheckUtils]: 54: Hoare triple {11258#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11254#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,161 INFO L290 TraceCheckUtils]: 53: Hoare triple {11262#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11258#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,163 INFO L290 TraceCheckUtils]: 52: Hoare triple {11266#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11262#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,165 INFO L290 TraceCheckUtils]: 51: Hoare triple {11270#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11266#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,167 INFO L290 TraceCheckUtils]: 50: Hoare triple {11274#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11270#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,169 INFO L290 TraceCheckUtils]: 49: Hoare triple {11278#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11274#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:40,171 INFO L290 TraceCheckUtils]: 48: Hoare triple {11282#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11278#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:00:40,172 INFO L290 TraceCheckUtils]: 47: Hoare triple {11286#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11282#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 46: Hoare triple {10962#true} #t~loopctr188 := 0; {11286#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:40,173 INFO L272 TraceCheckUtils]: 45: Hoare triple {10962#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 44: Hoare triple {10962#true} assume !(~len <= 0); {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 43: Hoare triple {10962#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L272 TraceCheckUtils]: 42: Hoare triple {10962#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 41: Hoare triple {10962#true} assume 0 != #t~mem173;havoc #t~mem173; {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 40: Hoare triple {10962#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 39: Hoare triple {10962#true} assume #t~short172; {10962#true} is VALID [2022-04-28 10:00:40,173 INFO L290 TraceCheckUtils]: 38: Hoare triple {10962#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 37: Hoare triple {10962#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 36: Hoare triple {10962#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 35: Hoare triple {10962#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 34: Hoare triple {10962#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 33: Hoare triple {10962#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 32: Hoare triple {10962#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 31: Hoare triple {10962#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10962#true} {10962#true} #672#return; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 29: Hoare triple {10962#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10962#true} is VALID [2022-04-28 10:00:40,174 INFO L290 TraceCheckUtils]: 28: Hoare triple {10962#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 27: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 26: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 25: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 24: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 23: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 22: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 21: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 20: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 19: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 18: Hoare triple {10962#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10962#true} is VALID [2022-04-28 10:00:40,175 INFO L290 TraceCheckUtils]: 17: Hoare triple {10962#true} #t~loopctr188 := 0; {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L272 TraceCheckUtils]: 16: Hoare triple {10962#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 15: Hoare triple {10962#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 14: Hoare triple {10962#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 13: Hoare triple {10962#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 12: Hoare triple {10962#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 11: Hoare triple {10962#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 10: Hoare triple {10962#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 9: Hoare triple {10962#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 8: Hoare triple {10962#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L290 TraceCheckUtils]: 7: Hoare triple {10962#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10962#true} is VALID [2022-04-28 10:00:40,176 INFO L272 TraceCheckUtils]: 6: Hoare triple {10962#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L290 TraceCheckUtils]: 5: Hoare triple {10962#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L272 TraceCheckUtils]: 4: Hoare triple {10962#true} call #t~ret187 := main(); {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10962#true} {10962#true} #682#return; {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L290 TraceCheckUtils]: 2: Hoare triple {10962#true} assume true; {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L290 TraceCheckUtils]: 1: Hoare triple {10962#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L272 TraceCheckUtils]: 0: Hoare triple {10962#true} call ULTIMATE.init(); {10962#true} is VALID [2022-04-28 10:00:40,177 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 123 proven. 55 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-04-28 10:00:40,178 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1634579870] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:40,178 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:40,178 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14] total 39 [2022-04-28 10:00:40,178 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:40,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1341142057] [2022-04-28 10:00:40,178 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1341142057] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:40,178 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:40,178 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-04-28 10:00:40,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [4854676] [2022-04-28 10:00:40,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:40,179 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 66 [2022-04-28 10:00:40,179 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:40,179 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:40,243 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:40,244 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-28 10:00:40,244 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:40,244 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-28 10:00:40,244 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=361, Invalid=1121, Unknown=0, NotChecked=0, Total=1482 [2022-04-28 10:00:40,245 INFO L87 Difference]: Start difference. First operand 86 states and 108 transitions. Second operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:42,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:42,056 INFO L93 Difference]: Finished difference Result 160 states and 204 transitions. [2022-04-28 10:00:42,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-28 10:00:42,057 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 66 [2022-04-28 10:00:42,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:42,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:42,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 192 transitions. [2022-04-28 10:00:42,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:42,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 192 transitions. [2022-04-28 10:00:42,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 192 transitions. [2022-04-28 10:00:42,254 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 192 edges. 192 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:42,256 INFO L225 Difference]: With dead ends: 160 [2022-04-28 10:00:42,256 INFO L226 Difference]: Without dead ends: 91 [2022-04-28 10:00:42,257 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=577, Invalid=2075, Unknown=0, NotChecked=0, Total=2652 [2022-04-28 10:00:42,258 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 464 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 515 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 464 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:42,258 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 515 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 464 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-28 10:00:42,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-04-28 10:00:42,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 87. [2022-04-28 10:00:42,287 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:42,287 INFO L82 GeneralOperation]: Start isEquivalent. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:42,287 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:42,287 INFO L87 Difference]: Start difference. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:42,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:42,289 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2022-04-28 10:00:42,289 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 115 transitions. [2022-04-28 10:00:42,290 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:42,290 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:42,290 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 91 states. [2022-04-28 10:00:42,290 INFO L87 Difference]: Start difference. First operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 91 states. [2022-04-28 10:00:42,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:42,292 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2022-04-28 10:00:42,292 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 115 transitions. [2022-04-28 10:00:42,293 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:42,293 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:42,293 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:42,293 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:42,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:42,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 109 transitions. [2022-04-28 10:00:42,295 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 109 transitions. Word has length 66 [2022-04-28 10:00:42,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:42,295 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 109 transitions. [2022-04-28 10:00:42,295 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:42,296 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 87 states and 109 transitions. [2022-04-28 10:00:42,426 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:42,426 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 109 transitions. [2022-04-28 10:00:42,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-28 10:00:42,427 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:42,427 INFO L195 NwaCegarLoop]: trace histogram [22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:42,454 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:42,647 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-28 10:00:42,647 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:42,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:42,648 INFO L85 PathProgramCache]: Analyzing trace with hash -1393110240, now seen corresponding path program 21 times [2022-04-28 10:00:42,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:42,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1656212672] [2022-04-28 10:00:42,648 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:42,648 INFO L85 PathProgramCache]: Analyzing trace with hash -1393110240, now seen corresponding path program 22 times [2022-04-28 10:00:42,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:42,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978325297] [2022-04-28 10:00:42,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:42,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:42,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:42,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:42,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:42,760 INFO L290 TraceCheckUtils]: 0: Hoare triple {12165#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12130#true} is VALID [2022-04-28 10:00:42,761 INFO L290 TraceCheckUtils]: 1: Hoare triple {12130#true} assume true; {12130#true} is VALID [2022-04-28 10:00:42,761 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12130#true} {12130#true} #682#return; {12130#true} is VALID [2022-04-28 10:00:42,764 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:42,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:43,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {12166#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12167#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:43,191 INFO L290 TraceCheckUtils]: 1: Hoare triple {12167#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12168#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:43,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {12168#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12169#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:43,194 INFO L290 TraceCheckUtils]: 3: Hoare triple {12169#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12170#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:43,195 INFO L290 TraceCheckUtils]: 4: Hoare triple {12170#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12171#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:43,197 INFO L290 TraceCheckUtils]: 5: Hoare triple {12171#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12172#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:43,198 INFO L290 TraceCheckUtils]: 6: Hoare triple {12172#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12173#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:43,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {12173#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12174#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:43,201 INFO L290 TraceCheckUtils]: 8: Hoare triple {12174#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12175#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:43,202 INFO L290 TraceCheckUtils]: 9: Hoare triple {12175#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12176#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:43,215 INFO L290 TraceCheckUtils]: 10: Hoare triple {12176#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12177#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:43,217 INFO L290 TraceCheckUtils]: 11: Hoare triple {12177#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12178#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 11) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:43,218 INFO L290 TraceCheckUtils]: 12: Hoare triple {12178#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 11) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 10:00:43,219 INFO L290 TraceCheckUtils]: 13: Hoare triple {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 10:00:43,220 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} {12130#true} #672#return; {12131#false} is VALID [2022-04-28 10:00:43,220 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-28 10:00:43,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:43,237 INFO L290 TraceCheckUtils]: 0: Hoare triple {12166#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12130#true} is VALID [2022-04-28 10:00:43,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,237 INFO L290 TraceCheckUtils]: 3: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,237 INFO L290 TraceCheckUtils]: 4: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 5: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 8: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 9: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 10: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 12: Hoare triple {12130#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {12130#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12130#true} is VALID [2022-04-28 10:00:43,238 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {12130#true} {12131#false} #656#return; {12131#false} is VALID [2022-04-28 10:00:43,239 INFO L272 TraceCheckUtils]: 0: Hoare triple {12130#true} call ULTIMATE.init(); {12165#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:43,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {12165#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12130#true} is VALID [2022-04-28 10:00:43,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {12130#true} assume true; {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12130#true} {12130#true} #682#return; {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L272 TraceCheckUtils]: 4: Hoare triple {12130#true} call #t~ret187 := main(); {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 5: Hoare triple {12130#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L272 TraceCheckUtils]: 6: Hoare triple {12130#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 7: Hoare triple {12130#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 8: Hoare triple {12130#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 9: Hoare triple {12130#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 10: Hoare triple {12130#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 11: Hoare triple {12130#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:43,240 INFO L290 TraceCheckUtils]: 12: Hoare triple {12130#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12130#true} is VALID [2022-04-28 10:00:43,241 INFO L290 TraceCheckUtils]: 13: Hoare triple {12130#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:43,241 INFO L290 TraceCheckUtils]: 14: Hoare triple {12130#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12130#true} is VALID [2022-04-28 10:00:43,241 INFO L290 TraceCheckUtils]: 15: Hoare triple {12130#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12130#true} is VALID [2022-04-28 10:00:43,241 INFO L272 TraceCheckUtils]: 16: Hoare triple {12130#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {12166#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:43,242 INFO L290 TraceCheckUtils]: 17: Hoare triple {12166#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12167#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:43,245 INFO L290 TraceCheckUtils]: 18: Hoare triple {12167#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12168#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:43,247 INFO L290 TraceCheckUtils]: 19: Hoare triple {12168#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12169#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:43,248 INFO L290 TraceCheckUtils]: 20: Hoare triple {12169#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12170#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:43,250 INFO L290 TraceCheckUtils]: 21: Hoare triple {12170#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12171#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:43,252 INFO L290 TraceCheckUtils]: 22: Hoare triple {12171#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12172#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:43,253 INFO L290 TraceCheckUtils]: 23: Hoare triple {12172#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12173#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:43,255 INFO L290 TraceCheckUtils]: 24: Hoare triple {12173#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12174#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:43,257 INFO L290 TraceCheckUtils]: 25: Hoare triple {12174#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12175#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:43,259 INFO L290 TraceCheckUtils]: 26: Hoare triple {12175#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12176#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:43,260 INFO L290 TraceCheckUtils]: 27: Hoare triple {12176#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12177#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:43,262 INFO L290 TraceCheckUtils]: 28: Hoare triple {12177#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12178#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 11) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:43,264 INFO L290 TraceCheckUtils]: 29: Hoare triple {12178#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 11) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 10:00:43,264 INFO L290 TraceCheckUtils]: 30: Hoare triple {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 10:00:43,265 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12179#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} {12130#true} #672#return; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 32: Hoare triple {12131#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 33: Hoare triple {12131#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 34: Hoare triple {12131#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 35: Hoare triple {12131#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 36: Hoare triple {12131#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 37: Hoare triple {12131#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 38: Hoare triple {12131#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 39: Hoare triple {12131#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 40: Hoare triple {12131#false} assume #t~short172; {12131#false} is VALID [2022-04-28 10:00:43,266 INFO L290 TraceCheckUtils]: 41: Hoare triple {12131#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12131#false} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 42: Hoare triple {12131#false} assume 0 != #t~mem173;havoc #t~mem173; {12131#false} is VALID [2022-04-28 10:00:43,267 INFO L272 TraceCheckUtils]: 43: Hoare triple {12131#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12131#false} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 44: Hoare triple {12131#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12131#false} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 45: Hoare triple {12131#false} assume !(~len <= 0); {12131#false} is VALID [2022-04-28 10:00:43,267 INFO L272 TraceCheckUtils]: 46: Hoare triple {12131#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12166#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 47: Hoare triple {12166#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12130#true} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 48: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 49: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 50: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 51: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,267 INFO L290 TraceCheckUtils]: 52: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 53: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 54: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 55: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 56: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 57: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 58: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 59: Hoare triple {12130#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 60: Hoare triple {12130#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12130#true} is VALID [2022-04-28 10:00:43,268 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12130#true} {12131#false} #656#return; {12131#false} is VALID [2022-04-28 10:00:43,268 INFO L290 TraceCheckUtils]: 62: Hoare triple {12131#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12131#false} is VALID [2022-04-28 10:00:43,269 INFO L290 TraceCheckUtils]: 63: Hoare triple {12131#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12131#false} is VALID [2022-04-28 10:00:43,269 INFO L272 TraceCheckUtils]: 64: Hoare triple {12131#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12131#false} is VALID [2022-04-28 10:00:43,269 INFO L290 TraceCheckUtils]: 65: Hoare triple {12131#false} ~cond := #in~cond; {12131#false} is VALID [2022-04-28 10:00:43,269 INFO L290 TraceCheckUtils]: 66: Hoare triple {12131#false} assume 0 == ~cond; {12131#false} is VALID [2022-04-28 10:00:43,269 INFO L290 TraceCheckUtils]: 67: Hoare triple {12131#false} assume !false; {12131#false} is VALID [2022-04-28 10:00:43,269 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 0 proven. 212 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2022-04-28 10:00:43,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:43,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978325297] [2022-04-28 10:00:43,270 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1978325297] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:43,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [782619158] [2022-04-28 10:00:43,270 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 10:00:43,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:43,270 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:43,272 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:43,287 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-28 10:00:43,553 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 10:00:43,553 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:00:43,557 INFO L263 TraceCheckSpWp]: Trace formula consists of 835 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-28 10:00:43,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:43,577 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:00:44,460 INFO L272 TraceCheckUtils]: 0: Hoare triple {12130#true} call ULTIMATE.init(); {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L290 TraceCheckUtils]: 1: Hoare triple {12130#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L290 TraceCheckUtils]: 2: Hoare triple {12130#true} assume true; {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12130#true} {12130#true} #682#return; {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L272 TraceCheckUtils]: 4: Hoare triple {12130#true} call #t~ret187 := main(); {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L290 TraceCheckUtils]: 5: Hoare triple {12130#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L272 TraceCheckUtils]: 6: Hoare triple {12130#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {12130#true} is VALID [2022-04-28 10:00:44,460 INFO L290 TraceCheckUtils]: 7: Hoare triple {12130#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 8: Hoare triple {12130#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 9: Hoare triple {12130#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 10: Hoare triple {12130#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 11: Hoare triple {12130#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 12: Hoare triple {12130#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 13: Hoare triple {12130#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 14: Hoare triple {12130#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 15: Hoare triple {12130#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L272 TraceCheckUtils]: 16: Hoare triple {12130#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {12130#true} is VALID [2022-04-28 10:00:44,461 INFO L290 TraceCheckUtils]: 17: Hoare triple {12130#true} #t~loopctr188 := 0; {12167#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:44,464 INFO L290 TraceCheckUtils]: 18: Hoare triple {12167#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12237#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:44,465 INFO L290 TraceCheckUtils]: 19: Hoare triple {12237#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12241#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:44,466 INFO L290 TraceCheckUtils]: 20: Hoare triple {12241#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12245#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:00:44,467 INFO L290 TraceCheckUtils]: 21: Hoare triple {12245#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12249#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:44,468 INFO L290 TraceCheckUtils]: 22: Hoare triple {12249#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12253#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:44,469 INFO L290 TraceCheckUtils]: 23: Hoare triple {12253#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12257#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:44,471 INFO L290 TraceCheckUtils]: 24: Hoare triple {12257#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12261#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:44,472 INFO L290 TraceCheckUtils]: 25: Hoare triple {12261#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12265#(and (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:44,474 INFO L290 TraceCheckUtils]: 26: Hoare triple {12265#(and (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12269#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551613) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:44,475 INFO L290 TraceCheckUtils]: 27: Hoare triple {12269#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551613) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12273#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551612) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:44,477 INFO L290 TraceCheckUtils]: 28: Hoare triple {12273#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551612) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12277#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551611) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:44,480 INFO L290 TraceCheckUtils]: 29: Hoare triple {12277#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551611) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12281#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 11) 18446744073709551616) 2))} is VALID [2022-04-28 10:00:44,480 INFO L290 TraceCheckUtils]: 30: Hoare triple {12281#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 11) 18446744073709551616) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12281#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 11) 18446744073709551616) 2))} is VALID [2022-04-28 10:00:44,481 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12281#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551623)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 11) 18446744073709551616) 2))} {12130#true} #672#return; {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 32: Hoare triple {12131#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 33: Hoare triple {12131#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 34: Hoare triple {12131#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 35: Hoare triple {12131#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 36: Hoare triple {12131#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 37: Hoare triple {12131#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12131#false} is VALID [2022-04-28 10:00:44,481 INFO L290 TraceCheckUtils]: 38: Hoare triple {12131#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 39: Hoare triple {12131#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 40: Hoare triple {12131#false} assume #t~short172; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 41: Hoare triple {12131#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 42: Hoare triple {12131#false} assume 0 != #t~mem173;havoc #t~mem173; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L272 TraceCheckUtils]: 43: Hoare triple {12131#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 44: Hoare triple {12131#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 45: Hoare triple {12131#false} assume !(~len <= 0); {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L272 TraceCheckUtils]: 46: Hoare triple {12131#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 47: Hoare triple {12131#false} #t~loopctr188 := 0; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 48: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 49: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 50: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 51: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,482 INFO L290 TraceCheckUtils]: 52: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 53: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 54: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 55: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 56: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 57: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 58: Hoare triple {12131#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 59: Hoare triple {12131#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 60: Hoare triple {12131#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12131#false} {12131#false} #656#return; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 62: Hoare triple {12131#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 63: Hoare triple {12131#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L272 TraceCheckUtils]: 64: Hoare triple {12131#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 65: Hoare triple {12131#false} ~cond := #in~cond; {12131#false} is VALID [2022-04-28 10:00:44,483 INFO L290 TraceCheckUtils]: 66: Hoare triple {12131#false} assume 0 == ~cond; {12131#false} is VALID [2022-04-28 10:00:44,484 INFO L290 TraceCheckUtils]: 67: Hoare triple {12131#false} assume !false; {12131#false} is VALID [2022-04-28 10:00:44,484 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 147 proven. 66 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2022-04-28 10:00:44,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:00:45,567 INFO L290 TraceCheckUtils]: 67: Hoare triple {12131#false} assume !false; {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 66: Hoare triple {12131#false} assume 0 == ~cond; {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 65: Hoare triple {12131#false} ~cond := #in~cond; {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L272 TraceCheckUtils]: 64: Hoare triple {12131#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 63: Hoare triple {12131#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 62: Hoare triple {12131#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12130#true} {12131#false} #656#return; {12131#false} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 60: Hoare triple {12130#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12130#true} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 59: Hoare triple {12130#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12130#true} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 58: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 57: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 56: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,568 INFO L290 TraceCheckUtils]: 55: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 54: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 53: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 52: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 51: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 50: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 49: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 48: Hoare triple {12130#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 47: Hoare triple {12130#true} #t~loopctr188 := 0; {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L272 TraceCheckUtils]: 46: Hoare triple {12131#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12130#true} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 45: Hoare triple {12131#false} assume !(~len <= 0); {12131#false} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 44: Hoare triple {12131#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12131#false} is VALID [2022-04-28 10:00:45,569 INFO L272 TraceCheckUtils]: 43: Hoare triple {12131#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12131#false} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 42: Hoare triple {12131#false} assume 0 != #t~mem173;havoc #t~mem173; {12131#false} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 41: Hoare triple {12131#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12131#false} is VALID [2022-04-28 10:00:45,569 INFO L290 TraceCheckUtils]: 40: Hoare triple {12131#false} assume #t~short172; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 39: Hoare triple {12131#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 38: Hoare triple {12131#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 37: Hoare triple {12131#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 36: Hoare triple {12131#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 35: Hoare triple {12131#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 34: Hoare triple {12131#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 33: Hoare triple {12131#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {12131#false} is VALID [2022-04-28 10:00:45,570 INFO L290 TraceCheckUtils]: 32: Hoare triple {12131#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12131#false} is VALID [2022-04-28 10:00:45,572 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12507#(not (= 32 |#Ultimate.C_memset_#amount|))} {12130#true} #672#return; {12131#false} is VALID [2022-04-28 10:00:45,572 INFO L290 TraceCheckUtils]: 30: Hoare triple {12507#(not (= 32 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12507#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:45,573 INFO L290 TraceCheckUtils]: 29: Hoare triple {12514#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {12507#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:45,574 INFO L290 TraceCheckUtils]: 28: Hoare triple {12518#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12514#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,575 INFO L290 TraceCheckUtils]: 27: Hoare triple {12522#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12518#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:45,577 INFO L290 TraceCheckUtils]: 26: Hoare triple {12526#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12522#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:45,579 INFO L290 TraceCheckUtils]: 25: Hoare triple {12530#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12526#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:45,580 INFO L290 TraceCheckUtils]: 24: Hoare triple {12534#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12530#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,582 INFO L290 TraceCheckUtils]: 23: Hoare triple {12538#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12534#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:45,584 INFO L290 TraceCheckUtils]: 22: Hoare triple {12542#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12538#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:00:45,585 INFO L290 TraceCheckUtils]: 21: Hoare triple {12546#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12542#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,601 INFO L290 TraceCheckUtils]: 20: Hoare triple {12550#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12546#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,602 INFO L290 TraceCheckUtils]: 19: Hoare triple {12554#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12550#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,605 INFO L290 TraceCheckUtils]: 18: Hoare triple {12558#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12554#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,605 INFO L290 TraceCheckUtils]: 17: Hoare triple {12130#true} #t~loopctr188 := 0; {12558#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:00:45,605 INFO L272 TraceCheckUtils]: 16: Hoare triple {12130#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {12130#true} is VALID [2022-04-28 10:00:45,605 INFO L290 TraceCheckUtils]: 15: Hoare triple {12130#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12130#true} is VALID [2022-04-28 10:00:45,605 INFO L290 TraceCheckUtils]: 14: Hoare triple {12130#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12130#true} is VALID [2022-04-28 10:00:45,605 INFO L290 TraceCheckUtils]: 13: Hoare triple {12130#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 12: Hoare triple {12130#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 11: Hoare triple {12130#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 10: Hoare triple {12130#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 9: Hoare triple {12130#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 8: Hoare triple {12130#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 7: Hoare triple {12130#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L272 TraceCheckUtils]: 6: Hoare triple {12130#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {12130#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L272 TraceCheckUtils]: 4: Hoare triple {12130#true} call #t~ret187 := main(); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12130#true} {12130#true} #682#return; {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {12130#true} assume true; {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {12130#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12130#true} is VALID [2022-04-28 10:00:45,606 INFO L272 TraceCheckUtils]: 0: Hoare triple {12130#true} call ULTIMATE.init(); {12130#true} is VALID [2022-04-28 10:00:45,607 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 0 proven. 212 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2022-04-28 10:00:45,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [782619158] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:00:45,607 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:00:45,607 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 15] total 42 [2022-04-28 10:00:45,607 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:00:45,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1656212672] [2022-04-28 10:00:45,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1656212672] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:00:45,608 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:00:45,608 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-04-28 10:00:45,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [599689047] [2022-04-28 10:00:45,608 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:00:45,608 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 68 [2022-04-28 10:00:45,609 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:00:45,609 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:45,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:45,663 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-28 10:00:45,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:45,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-28 10:00:45,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=421, Invalid=1301, Unknown=0, NotChecked=0, Total=1722 [2022-04-28 10:00:45,664 INFO L87 Difference]: Start difference. First operand 87 states and 109 transitions. Second operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:48,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:48,318 INFO L93 Difference]: Finished difference Result 162 states and 206 transitions. [2022-04-28 10:00:48,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-28 10:00:48,318 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 68 [2022-04-28 10:00:48,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:00:48,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:48,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 193 transitions. [2022-04-28 10:00:48,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:48,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 193 transitions. [2022-04-28 10:00:48,323 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 193 transitions. [2022-04-28 10:00:48,565 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:48,566 INFO L225 Difference]: With dead ends: 162 [2022-04-28 10:00:48,567 INFO L226 Difference]: Without dead ends: 92 [2022-04-28 10:00:48,568 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 115 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=664, Invalid=2416, Unknown=0, NotChecked=0, Total=3080 [2022-04-28 10:00:48,568 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 797 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 850 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 797 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-28 10:00:48,568 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 211 Invalid, 850 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 797 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-28 10:00:48,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-04-28 10:00:48,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 88. [2022-04-28 10:00:48,613 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:00:48,614 INFO L82 GeneralOperation]: Start isEquivalent. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:48,614 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:48,614 INFO L87 Difference]: Start difference. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:48,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:48,616 INFO L93 Difference]: Finished difference Result 92 states and 116 transitions. [2022-04-28 10:00:48,616 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 116 transitions. [2022-04-28 10:00:48,617 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:48,617 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:48,617 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 92 states. [2022-04-28 10:00:48,617 INFO L87 Difference]: Start difference. First operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 92 states. [2022-04-28 10:00:48,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:00:48,619 INFO L93 Difference]: Finished difference Result 92 states and 116 transitions. [2022-04-28 10:00:48,619 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 116 transitions. [2022-04-28 10:00:48,619 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:00:48,619 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:00:48,620 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:00:48,620 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:00:48,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:00:48,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 110 transitions. [2022-04-28 10:00:48,622 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 110 transitions. Word has length 68 [2022-04-28 10:00:48,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:00:48,622 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 110 transitions. [2022-04-28 10:00:48,622 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:00:48,622 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 88 states and 110 transitions. [2022-04-28 10:00:48,799 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:00:48,799 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 110 transitions. [2022-04-28 10:00:48,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-28 10:00:48,800 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:00:48,800 INFO L195 NwaCegarLoop]: trace histogram [24, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:00:48,820 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-28 10:00:49,000 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-28 10:00:49,000 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:00:49,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:00:49,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1390454090, now seen corresponding path program 23 times [2022-04-28 10:00:49,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:00:49,001 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [28945278] [2022-04-28 10:00:49,001 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:00:49,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1390454090, now seen corresponding path program 24 times [2022-04-28 10:00:49,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:00:49,002 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581076919] [2022-04-28 10:00:49,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:00:49,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:00:49,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:49,118 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:00:49,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:49,125 INFO L290 TraceCheckUtils]: 0: Hoare triple {13362#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13325#true} is VALID [2022-04-28 10:00:49,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {13325#true} assume true; {13325#true} is VALID [2022-04-28 10:00:49,126 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13325#true} {13325#true} #682#return; {13325#true} is VALID [2022-04-28 10:00:49,128 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:00:49,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:49,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {13363#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13364#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:49,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {13364#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13365#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,668 INFO L290 TraceCheckUtils]: 2: Hoare triple {13365#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13366#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:49,670 INFO L290 TraceCheckUtils]: 3: Hoare triple {13366#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13367#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:49,672 INFO L290 TraceCheckUtils]: 4: Hoare triple {13367#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13368#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:49,674 INFO L290 TraceCheckUtils]: 5: Hoare triple {13368#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13369#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:49,677 INFO L290 TraceCheckUtils]: 6: Hoare triple {13369#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13370#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:49,679 INFO L290 TraceCheckUtils]: 7: Hoare triple {13370#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13371#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:49,681 INFO L290 TraceCheckUtils]: 8: Hoare triple {13371#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13372#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:49,683 INFO L290 TraceCheckUtils]: 9: Hoare triple {13372#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13373#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,684 INFO L290 TraceCheckUtils]: 10: Hoare triple {13373#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13374#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,686 INFO L290 TraceCheckUtils]: 11: Hoare triple {13374#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13375#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,688 INFO L290 TraceCheckUtils]: 12: Hoare triple {13375#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13376#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:49,690 INFO L290 TraceCheckUtils]: 13: Hoare triple {13376#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 10:00:49,691 INFO L290 TraceCheckUtils]: 14: Hoare triple {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 10:00:49,692 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} {13325#true} #672#return; {13326#false} is VALID [2022-04-28 10:00:49,692 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-04-28 10:00:49,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:00:49,708 INFO L290 TraceCheckUtils]: 0: Hoare triple {13363#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13325#true} is VALID [2022-04-28 10:00:49,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,708 INFO L290 TraceCheckUtils]: 2: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,708 INFO L290 TraceCheckUtils]: 3: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 4: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 8: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 9: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 10: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 11: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,709 INFO L290 TraceCheckUtils]: 12: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,710 INFO L290 TraceCheckUtils]: 13: Hoare triple {13325#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13325#true} is VALID [2022-04-28 10:00:49,710 INFO L290 TraceCheckUtils]: 14: Hoare triple {13325#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13325#true} is VALID [2022-04-28 10:00:49,710 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {13325#true} {13326#false} #656#return; {13326#false} is VALID [2022-04-28 10:00:49,711 INFO L272 TraceCheckUtils]: 0: Hoare triple {13325#true} call ULTIMATE.init(); {13362#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:00:49,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {13362#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L290 TraceCheckUtils]: 2: Hoare triple {13325#true} assume true; {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13325#true} {13325#true} #682#return; {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L272 TraceCheckUtils]: 4: Hoare triple {13325#true} call #t~ret187 := main(); {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L290 TraceCheckUtils]: 5: Hoare triple {13325#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L272 TraceCheckUtils]: 6: Hoare triple {13325#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L290 TraceCheckUtils]: 7: Hoare triple {13325#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13325#true} is VALID [2022-04-28 10:00:49,711 INFO L290 TraceCheckUtils]: 8: Hoare triple {13325#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 9: Hoare triple {13325#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 10: Hoare triple {13325#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 11: Hoare triple {13325#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 12: Hoare triple {13325#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 13: Hoare triple {13325#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 14: Hoare triple {13325#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13325#true} is VALID [2022-04-28 10:00:49,712 INFO L290 TraceCheckUtils]: 15: Hoare triple {13325#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13325#true} is VALID [2022-04-28 10:00:49,713 INFO L272 TraceCheckUtils]: 16: Hoare triple {13325#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {13363#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:49,714 INFO L290 TraceCheckUtils]: 17: Hoare triple {13363#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13364#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:00:49,717 INFO L290 TraceCheckUtils]: 18: Hoare triple {13364#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13365#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,720 INFO L290 TraceCheckUtils]: 19: Hoare triple {13365#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13366#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:00:49,721 INFO L290 TraceCheckUtils]: 20: Hoare triple {13366#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13367#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:49,724 INFO L290 TraceCheckUtils]: 21: Hoare triple {13367#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13368#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:49,726 INFO L290 TraceCheckUtils]: 22: Hoare triple {13368#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13369#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:00:49,728 INFO L290 TraceCheckUtils]: 23: Hoare triple {13369#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13370#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:00:49,730 INFO L290 TraceCheckUtils]: 24: Hoare triple {13370#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13371#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:00:49,732 INFO L290 TraceCheckUtils]: 25: Hoare triple {13371#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13372#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:00:49,734 INFO L290 TraceCheckUtils]: 26: Hoare triple {13372#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13373#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,736 INFO L290 TraceCheckUtils]: 27: Hoare triple {13373#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13374#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,738 INFO L290 TraceCheckUtils]: 28: Hoare triple {13374#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13375#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:00:49,740 INFO L290 TraceCheckUtils]: 29: Hoare triple {13375#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13376#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:00:49,742 INFO L290 TraceCheckUtils]: 30: Hoare triple {13376#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 10:00:49,743 INFO L290 TraceCheckUtils]: 31: Hoare triple {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 10:00:49,744 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13377#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} {13325#true} #672#return; {13326#false} is VALID [2022-04-28 10:00:49,744 INFO L290 TraceCheckUtils]: 33: Hoare triple {13326#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13326#false} is VALID [2022-04-28 10:00:49,744 INFO L290 TraceCheckUtils]: 34: Hoare triple {13326#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {13326#false} is VALID [2022-04-28 10:00:49,744 INFO L290 TraceCheckUtils]: 35: Hoare triple {13326#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13326#false} is VALID [2022-04-28 10:00:49,744 INFO L290 TraceCheckUtils]: 36: Hoare triple {13326#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13326#false} is VALID [2022-04-28 10:00:49,744 INFO L290 TraceCheckUtils]: 37: Hoare triple {13326#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13326#false} is VALID [2022-04-28 10:00:49,744 INFO L290 TraceCheckUtils]: 38: Hoare triple {13326#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 39: Hoare triple {13326#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 40: Hoare triple {13326#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 41: Hoare triple {13326#false} assume #t~short172; {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 42: Hoare triple {13326#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 43: Hoare triple {13326#false} assume 0 != #t~mem173;havoc #t~mem173; {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L272 TraceCheckUtils]: 44: Hoare triple {13326#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 45: Hoare triple {13326#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 46: Hoare triple {13326#false} assume !(~len <= 0); {13326#false} is VALID [2022-04-28 10:00:49,745 INFO L272 TraceCheckUtils]: 47: Hoare triple {13326#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13363#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 48: Hoare triple {13363#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13325#true} is VALID [2022-04-28 10:00:49,745 INFO L290 TraceCheckUtils]: 49: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 50: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 51: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 52: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 53: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 54: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 55: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 56: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 57: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 58: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,746 INFO L290 TraceCheckUtils]: 59: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 60: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 61: Hoare triple {13325#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13325#true} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 62: Hoare triple {13325#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13325#true} is VALID [2022-04-28 10:00:49,747 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13325#true} {13326#false} #656#return; {13326#false} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 64: Hoare triple {13326#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13326#false} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 65: Hoare triple {13326#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13326#false} is VALID [2022-04-28 10:00:49,747 INFO L272 TraceCheckUtils]: 66: Hoare triple {13326#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13326#false} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 67: Hoare triple {13326#false} ~cond := #in~cond; {13326#false} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 68: Hoare triple {13326#false} assume 0 == ~cond; {13326#false} is VALID [2022-04-28 10:00:49,747 INFO L290 TraceCheckUtils]: 69: Hoare triple {13326#false} assume !false; {13326#false} is VALID [2022-04-28 10:00:49,748 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 249 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-28 10:00:49,748 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:00:49,748 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581076919] [2022-04-28 10:00:49,748 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [581076919] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:00:49,748 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1896432595] [2022-04-28 10:00:49,749 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 10:00:49,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:00:49,749 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:00:49,750 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:00:49,751 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-28 10:02:17,157 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-28 10:02:17,157 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:02:17,197 INFO L263 TraceCheckSpWp]: Trace formula consists of 849 conjuncts, 62 conjunts are in the unsatisfiable core [2022-04-28 10:02:17,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:17,218 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:02:18,299 INFO L272 TraceCheckUtils]: 0: Hoare triple {13325#true} call ULTIMATE.init(); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 1: Hoare triple {13325#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 2: Hoare triple {13325#true} assume true; {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13325#true} {13325#true} #682#return; {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L272 TraceCheckUtils]: 4: Hoare triple {13325#true} call #t~ret187 := main(); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 5: Hoare triple {13325#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L272 TraceCheckUtils]: 6: Hoare triple {13325#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 7: Hoare triple {13325#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 8: Hoare triple {13325#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 9: Hoare triple {13325#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 10: Hoare triple {13325#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 11: Hoare triple {13325#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:18,300 INFO L290 TraceCheckUtils]: 12: Hoare triple {13325#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13325#true} is VALID [2022-04-28 10:02:18,301 INFO L290 TraceCheckUtils]: 13: Hoare triple {13325#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:18,301 INFO L290 TraceCheckUtils]: 14: Hoare triple {13325#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13325#true} is VALID [2022-04-28 10:02:18,301 INFO L290 TraceCheckUtils]: 15: Hoare triple {13325#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13325#true} is VALID [2022-04-28 10:02:18,301 INFO L272 TraceCheckUtils]: 16: Hoare triple {13325#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {13325#true} is VALID [2022-04-28 10:02:18,301 INFO L290 TraceCheckUtils]: 17: Hoare triple {13325#true} #t~loopctr188 := 0; {13364#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:18,304 INFO L290 TraceCheckUtils]: 18: Hoare triple {13364#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13435#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:18,305 INFO L290 TraceCheckUtils]: 19: Hoare triple {13435#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13439#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:18,307 INFO L290 TraceCheckUtils]: 20: Hoare triple {13439#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13443#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:02:18,308 INFO L290 TraceCheckUtils]: 21: Hoare triple {13443#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13447#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:18,310 INFO L290 TraceCheckUtils]: 22: Hoare triple {13447#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13451#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:18,312 INFO L290 TraceCheckUtils]: 23: Hoare triple {13451#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13455#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:18,314 INFO L290 TraceCheckUtils]: 24: Hoare triple {13455#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13459#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:18,316 INFO L290 TraceCheckUtils]: 25: Hoare triple {13459#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13463#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551613) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:18,318 INFO L290 TraceCheckUtils]: 26: Hoare triple {13463#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551613) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13467#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551612) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:18,320 INFO L290 TraceCheckUtils]: 27: Hoare triple {13467#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551612) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13471#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551611) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:18,322 INFO L290 TraceCheckUtils]: 28: Hoare triple {13471#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551611) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13475#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551610) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:18,324 INFO L290 TraceCheckUtils]: 29: Hoare triple {13475#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 18446744073709551610) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13479#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:18,327 INFO L290 TraceCheckUtils]: 30: Hoare triple {13479#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13483#(and (< (+ (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551628)) (- 18446744073709551616)) (div (+ (- 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 12 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} is VALID [2022-04-28 10:02:18,328 INFO L290 TraceCheckUtils]: 31: Hoare triple {13483#(and (< (+ (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551628)) (- 18446744073709551616)) (div (+ (- 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 12 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13483#(and (< (+ (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551628)) (- 18446744073709551616)) (div (+ (- 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 12 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} is VALID [2022-04-28 10:02:18,329 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13483#(and (< (+ (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551628)) (- 18446744073709551616)) (div (+ (- 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (- 18446744073709551616))) 3) (< 0 (+ (div (+ 12 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1)))} {13325#true} #672#return; {13326#false} is VALID [2022-04-28 10:02:18,329 INFO L290 TraceCheckUtils]: 33: Hoare triple {13326#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13326#false} is VALID [2022-04-28 10:02:18,329 INFO L290 TraceCheckUtils]: 34: Hoare triple {13326#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 35: Hoare triple {13326#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 36: Hoare triple {13326#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 37: Hoare triple {13326#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 38: Hoare triple {13326#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 39: Hoare triple {13326#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 40: Hoare triple {13326#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 41: Hoare triple {13326#false} assume #t~short172; {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 42: Hoare triple {13326#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13326#false} is VALID [2022-04-28 10:02:18,330 INFO L290 TraceCheckUtils]: 43: Hoare triple {13326#false} assume 0 != #t~mem173;havoc #t~mem173; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L272 TraceCheckUtils]: 44: Hoare triple {13326#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 45: Hoare triple {13326#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 46: Hoare triple {13326#false} assume !(~len <= 0); {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L272 TraceCheckUtils]: 47: Hoare triple {13326#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 48: Hoare triple {13326#false} #t~loopctr188 := 0; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 49: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 50: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 51: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 52: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,331 INFO L290 TraceCheckUtils]: 53: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 54: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 55: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 56: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 57: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 58: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 59: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 60: Hoare triple {13326#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 61: Hoare triple {13326#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L290 TraceCheckUtils]: 62: Hoare triple {13326#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13326#false} is VALID [2022-04-28 10:02:18,332 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13326#false} {13326#false} #656#return; {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L290 TraceCheckUtils]: 64: Hoare triple {13326#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L290 TraceCheckUtils]: 65: Hoare triple {13326#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L272 TraceCheckUtils]: 66: Hoare triple {13326#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L290 TraceCheckUtils]: 67: Hoare triple {13326#false} ~cond := #in~cond; {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L290 TraceCheckUtils]: 68: Hoare triple {13326#false} assume 0 == ~cond; {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L290 TraceCheckUtils]: 69: Hoare triple {13326#false} assume !false; {13326#false} is VALID [2022-04-28 10:02:18,333 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 172 proven. 78 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2022-04-28 10:02:18,334 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:02:19,932 INFO L290 TraceCheckUtils]: 69: Hoare triple {13326#false} assume !false; {13326#false} is VALID [2022-04-28 10:02:19,932 INFO L290 TraceCheckUtils]: 68: Hoare triple {13326#false} assume 0 == ~cond; {13326#false} is VALID [2022-04-28 10:02:19,932 INFO L290 TraceCheckUtils]: 67: Hoare triple {13326#false} ~cond := #in~cond; {13326#false} is VALID [2022-04-28 10:02:19,932 INFO L272 TraceCheckUtils]: 66: Hoare triple {13326#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13326#false} is VALID [2022-04-28 10:02:19,932 INFO L290 TraceCheckUtils]: 65: Hoare triple {13326#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13326#false} is VALID [2022-04-28 10:02:19,932 INFO L290 TraceCheckUtils]: 64: Hoare triple {13326#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13326#false} is VALID [2022-04-28 10:02:19,933 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13622#(not (= |#Ultimate.C_memset_#amount| 80))} {13325#true} #656#return; {13326#false} is VALID [2022-04-28 10:02:19,933 INFO L290 TraceCheckUtils]: 62: Hoare triple {13622#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13622#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:02:19,934 INFO L290 TraceCheckUtils]: 61: Hoare triple {13629#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13622#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:02:19,937 INFO L290 TraceCheckUtils]: 60: Hoare triple {13633#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13629#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:19,939 INFO L290 TraceCheckUtils]: 59: Hoare triple {13637#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13633#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,941 INFO L290 TraceCheckUtils]: 58: Hoare triple {13641#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13637#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,943 INFO L290 TraceCheckUtils]: 57: Hoare triple {13645#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13641#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,945 INFO L290 TraceCheckUtils]: 56: Hoare triple {13649#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13645#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,946 INFO L290 TraceCheckUtils]: 55: Hoare triple {13653#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13649#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,949 INFO L290 TraceCheckUtils]: 54: Hoare triple {13657#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13653#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,951 INFO L290 TraceCheckUtils]: 53: Hoare triple {13661#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13657#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:19,952 INFO L290 TraceCheckUtils]: 52: Hoare triple {13665#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13661#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,954 INFO L290 TraceCheckUtils]: 51: Hoare triple {13669#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13665#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:19,956 INFO L290 TraceCheckUtils]: 50: Hoare triple {13673#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13669#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:19,958 INFO L290 TraceCheckUtils]: 49: Hoare triple {13677#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13673#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:19,958 INFO L290 TraceCheckUtils]: 48: Hoare triple {13325#true} #t~loopctr188 := 0; {13677#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:19,958 INFO L272 TraceCheckUtils]: 47: Hoare triple {13325#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13325#true} is VALID [2022-04-28 10:02:19,958 INFO L290 TraceCheckUtils]: 46: Hoare triple {13325#true} assume !(~len <= 0); {13325#true} is VALID [2022-04-28 10:02:19,958 INFO L290 TraceCheckUtils]: 45: Hoare triple {13325#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13325#true} is VALID [2022-04-28 10:02:19,958 INFO L272 TraceCheckUtils]: 44: Hoare triple {13325#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13325#true} is VALID [2022-04-28 10:02:19,958 INFO L290 TraceCheckUtils]: 43: Hoare triple {13325#true} assume 0 != #t~mem173;havoc #t~mem173; {13325#true} is VALID [2022-04-28 10:02:19,958 INFO L290 TraceCheckUtils]: 42: Hoare triple {13325#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 41: Hoare triple {13325#true} assume #t~short172; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 40: Hoare triple {13325#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 39: Hoare triple {13325#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 38: Hoare triple {13325#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 37: Hoare triple {13325#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 36: Hoare triple {13325#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 35: Hoare triple {13325#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 34: Hoare triple {13325#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 33: Hoare triple {13325#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13325#true} {13325#true} #672#return; {13325#true} is VALID [2022-04-28 10:02:19,959 INFO L290 TraceCheckUtils]: 31: Hoare triple {13325#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 30: Hoare triple {13325#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 29: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 28: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 27: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 26: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 25: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 24: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 23: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 22: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,960 INFO L290 TraceCheckUtils]: 21: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 20: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 19: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 18: Hoare triple {13325#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 17: Hoare triple {13325#true} #t~loopctr188 := 0; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L272 TraceCheckUtils]: 16: Hoare triple {13325#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 15: Hoare triple {13325#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 14: Hoare triple {13325#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 13: Hoare triple {13325#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 12: Hoare triple {13325#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 11: Hoare triple {13325#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 10: Hoare triple {13325#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13325#true} is VALID [2022-04-28 10:02:19,961 INFO L290 TraceCheckUtils]: 9: Hoare triple {13325#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L290 TraceCheckUtils]: 8: Hoare triple {13325#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L290 TraceCheckUtils]: 7: Hoare triple {13325#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L272 TraceCheckUtils]: 6: Hoare triple {13325#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L290 TraceCheckUtils]: 5: Hoare triple {13325#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L272 TraceCheckUtils]: 4: Hoare triple {13325#true} call #t~ret187 := main(); {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13325#true} {13325#true} #682#return; {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L290 TraceCheckUtils]: 2: Hoare triple {13325#true} assume true; {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L290 TraceCheckUtils]: 1: Hoare triple {13325#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L272 TraceCheckUtils]: 0: Hoare triple {13325#true} call ULTIMATE.init(); {13325#true} is VALID [2022-04-28 10:02:19,962 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 171 proven. 78 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-28 10:02:19,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1896432595] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:02:19,963 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:02:19,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 16, 16] total 45 [2022-04-28 10:02:19,963 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:02:19,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [28945278] [2022-04-28 10:02:19,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [28945278] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:02:19,963 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:02:19,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-04-28 10:02:19,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231511512] [2022-04-28 10:02:19,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:02:19,964 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 70 [2022-04-28 10:02:19,964 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:02:19,964 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:20,021 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:20,022 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-28 10:02:20,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:02:20,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-28 10:02:20,023 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=483, Invalid=1497, Unknown=0, NotChecked=0, Total=1980 [2022-04-28 10:02:20,023 INFO L87 Difference]: Start difference. First operand 88 states and 110 transitions. Second operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:23,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:23,755 INFO L93 Difference]: Finished difference Result 164 states and 208 transitions. [2022-04-28 10:02:23,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-28 10:02:23,755 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 70 [2022-04-28 10:02:23,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:02:23,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:23,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 194 transitions. [2022-04-28 10:02:23,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:23,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 194 transitions. [2022-04-28 10:02:23,760 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 194 transitions. [2022-04-28 10:02:24,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:24,013 INFO L225 Difference]: With dead ends: 164 [2022-04-28 10:02:24,013 INFO L226 Difference]: Without dead ends: 93 [2022-04-28 10:02:24,014 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 117 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 524 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=757, Invalid=2783, Unknown=0, NotChecked=0, Total=3540 [2022-04-28 10:02:24,014 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1132 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 1132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-28 10:02:24,015 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 1132 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-28 10:02:24,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-28 10:02:24,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2022-04-28 10:02:24,058 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:02:24,058 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:24,059 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:24,059 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:24,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:24,061 INFO L93 Difference]: Finished difference Result 93 states and 117 transitions. [2022-04-28 10:02:24,061 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 117 transitions. [2022-04-28 10:02:24,061 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:02:24,061 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:02:24,061 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 93 states. [2022-04-28 10:02:24,062 INFO L87 Difference]: Start difference. First operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 93 states. [2022-04-28 10:02:24,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:24,063 INFO L93 Difference]: Finished difference Result 93 states and 117 transitions. [2022-04-28 10:02:24,063 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 117 transitions. [2022-04-28 10:02:24,064 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:02:24,064 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:02:24,064 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:02:24,064 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:02:24,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:24,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 111 transitions. [2022-04-28 10:02:24,066 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 111 transitions. Word has length 70 [2022-04-28 10:02:24,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:02:24,066 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 111 transitions. [2022-04-28 10:02:24,066 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:24,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 89 states and 111 transitions. [2022-04-28 10:02:24,245 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:24,246 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 111 transitions. [2022-04-28 10:02:24,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2022-04-28 10:02:24,246 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:02:24,246 INFO L195 NwaCegarLoop]: trace histogram [26, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:02:24,262 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-04-28 10:02:24,446 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-28 10:02:24,447 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:02:24,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:02:24,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1316589984, now seen corresponding path program 25 times [2022-04-28 10:02:24,447 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:02:24,447 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [184401533] [2022-04-28 10:02:24,447 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:02:24,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1316589984, now seen corresponding path program 26 times [2022-04-28 10:02:24,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:02:24,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261138259] [2022-04-28 10:02:24,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:02:24,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:02:24,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:24,586 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:02:24,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:24,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {14586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14547#true} is VALID [2022-04-28 10:02:24,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {14547#true} assume true; {14547#true} is VALID [2022-04-28 10:02:24,595 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14547#true} {14547#true} #682#return; {14547#true} is VALID [2022-04-28 10:02:24,598 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:02:24,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:25,129 INFO L290 TraceCheckUtils]: 0: Hoare triple {14587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:25,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {14588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,136 INFO L290 TraceCheckUtils]: 2: Hoare triple {14589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:25,138 INFO L290 TraceCheckUtils]: 3: Hoare triple {14590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:25,140 INFO L290 TraceCheckUtils]: 4: Hoare triple {14591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:25,142 INFO L290 TraceCheckUtils]: 5: Hoare triple {14592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:25,144 INFO L290 TraceCheckUtils]: 6: Hoare triple {14593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14594#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:25,146 INFO L290 TraceCheckUtils]: 7: Hoare triple {14594#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14595#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:25,148 INFO L290 TraceCheckUtils]: 8: Hoare triple {14595#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14596#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:25,150 INFO L290 TraceCheckUtils]: 9: Hoare triple {14596#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14597#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,152 INFO L290 TraceCheckUtils]: 10: Hoare triple {14597#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14598#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,154 INFO L290 TraceCheckUtils]: 11: Hoare triple {14598#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,157 INFO L290 TraceCheckUtils]: 12: Hoare triple {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14600#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,158 INFO L290 TraceCheckUtils]: 13: Hoare triple {14600#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14601#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 13) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:02:25,160 INFO L290 TraceCheckUtils]: 14: Hoare triple {14601#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 13) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 10:02:25,161 INFO L290 TraceCheckUtils]: 15: Hoare triple {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 10:02:25,162 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} {14547#true} #672#return; {14548#false} is VALID [2022-04-28 10:02:25,162 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-28 10:02:25,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:25,181 INFO L290 TraceCheckUtils]: 0: Hoare triple {14587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14547#true} is VALID [2022-04-28 10:02:25,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 2: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 3: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 4: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 5: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 6: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 7: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 8: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 9: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 10: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,182 INFO L290 TraceCheckUtils]: 11: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,183 INFO L290 TraceCheckUtils]: 12: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,183 INFO L290 TraceCheckUtils]: 13: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,183 INFO L290 TraceCheckUtils]: 14: Hoare triple {14547#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14547#true} is VALID [2022-04-28 10:02:25,183 INFO L290 TraceCheckUtils]: 15: Hoare triple {14547#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14547#true} is VALID [2022-04-28 10:02:25,183 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14547#true} {14548#false} #656#return; {14548#false} is VALID [2022-04-28 10:02:25,184 INFO L272 TraceCheckUtils]: 0: Hoare triple {14547#true} call ULTIMATE.init(); {14586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:02:25,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {14586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L290 TraceCheckUtils]: 2: Hoare triple {14547#true} assume true; {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14547#true} {14547#true} #682#return; {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L272 TraceCheckUtils]: 4: Hoare triple {14547#true} call #t~ret187 := main(); {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L290 TraceCheckUtils]: 5: Hoare triple {14547#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L272 TraceCheckUtils]: 6: Hoare triple {14547#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L290 TraceCheckUtils]: 7: Hoare triple {14547#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14547#true} is VALID [2022-04-28 10:02:25,184 INFO L290 TraceCheckUtils]: 8: Hoare triple {14547#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 9: Hoare triple {14547#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 10: Hoare triple {14547#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 11: Hoare triple {14547#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 12: Hoare triple {14547#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 13: Hoare triple {14547#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 14: Hoare triple {14547#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14547#true} is VALID [2022-04-28 10:02:25,185 INFO L290 TraceCheckUtils]: 15: Hoare triple {14547#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14547#true} is VALID [2022-04-28 10:02:25,186 INFO L272 TraceCheckUtils]: 16: Hoare triple {14547#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {14587#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:02:25,186 INFO L290 TraceCheckUtils]: 17: Hoare triple {14587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:25,191 INFO L290 TraceCheckUtils]: 18: Hoare triple {14588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,194 INFO L290 TraceCheckUtils]: 19: Hoare triple {14589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:25,197 INFO L290 TraceCheckUtils]: 20: Hoare triple {14590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:25,200 INFO L290 TraceCheckUtils]: 21: Hoare triple {14591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:25,203 INFO L290 TraceCheckUtils]: 22: Hoare triple {14592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:25,206 INFO L290 TraceCheckUtils]: 23: Hoare triple {14593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14594#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:25,209 INFO L290 TraceCheckUtils]: 24: Hoare triple {14594#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14595#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:25,213 INFO L290 TraceCheckUtils]: 25: Hoare triple {14595#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14596#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:25,216 INFO L290 TraceCheckUtils]: 26: Hoare triple {14596#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14597#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,219 INFO L290 TraceCheckUtils]: 27: Hoare triple {14597#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14598#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,222 INFO L290 TraceCheckUtils]: 28: Hoare triple {14598#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,225 INFO L290 TraceCheckUtils]: 29: Hoare triple {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14600#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:25,228 INFO L290 TraceCheckUtils]: 30: Hoare triple {14600#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14601#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 13) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:02:25,230 INFO L290 TraceCheckUtils]: 31: Hoare triple {14601#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 13) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 10:02:25,231 INFO L290 TraceCheckUtils]: 32: Hoare triple {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 10:02:25,232 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14602#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} {14547#true} #672#return; {14548#false} is VALID [2022-04-28 10:02:25,232 INFO L290 TraceCheckUtils]: 34: Hoare triple {14548#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14548#false} is VALID [2022-04-28 10:02:25,232 INFO L290 TraceCheckUtils]: 35: Hoare triple {14548#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {14548#false} is VALID [2022-04-28 10:02:25,232 INFO L290 TraceCheckUtils]: 36: Hoare triple {14548#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14548#false} is VALID [2022-04-28 10:02:25,232 INFO L290 TraceCheckUtils]: 37: Hoare triple {14548#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14548#false} is VALID [2022-04-28 10:02:25,232 INFO L290 TraceCheckUtils]: 38: Hoare triple {14548#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14548#false} is VALID [2022-04-28 10:02:25,232 INFO L290 TraceCheckUtils]: 39: Hoare triple {14548#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 40: Hoare triple {14548#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 41: Hoare triple {14548#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 42: Hoare triple {14548#false} assume #t~short172; {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 43: Hoare triple {14548#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 44: Hoare triple {14548#false} assume 0 != #t~mem173;havoc #t~mem173; {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L272 TraceCheckUtils]: 45: Hoare triple {14548#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 46: Hoare triple {14548#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 47: Hoare triple {14548#false} assume !(~len <= 0); {14548#false} is VALID [2022-04-28 10:02:25,233 INFO L272 TraceCheckUtils]: 48: Hoare triple {14548#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14587#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 49: Hoare triple {14587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14547#true} is VALID [2022-04-28 10:02:25,233 INFO L290 TraceCheckUtils]: 50: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 51: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 52: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 53: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 54: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 55: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 56: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 57: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 58: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 59: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 60: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,234 INFO L290 TraceCheckUtils]: 61: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 62: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 63: Hoare triple {14547#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14547#true} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 64: Hoare triple {14547#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14547#true} is VALID [2022-04-28 10:02:25,235 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14547#true} {14548#false} #656#return; {14548#false} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 66: Hoare triple {14548#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14548#false} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 67: Hoare triple {14548#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14548#false} is VALID [2022-04-28 10:02:25,235 INFO L272 TraceCheckUtils]: 68: Hoare triple {14548#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14548#false} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 69: Hoare triple {14548#false} ~cond := #in~cond; {14548#false} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 70: Hoare triple {14548#false} assume 0 == ~cond; {14548#false} is VALID [2022-04-28 10:02:25,235 INFO L290 TraceCheckUtils]: 71: Hoare triple {14548#false} assume !false; {14548#false} is VALID [2022-04-28 10:02:25,236 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2022-04-28 10:02:25,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:02:25,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261138259] [2022-04-28 10:02:25,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [261138259] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:02:25,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [187947963] [2022-04-28 10:02:25,236 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 10:02:25,237 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:02:25,237 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:02:25,240 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:02:25,243 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-28 10:02:25,881 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 10:02:25,882 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:02:25,886 INFO L263 TraceCheckSpWp]: Trace formula consists of 863 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-28 10:02:25,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:25,908 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:02:26,709 INFO L272 TraceCheckUtils]: 0: Hoare triple {14547#true} call ULTIMATE.init(); {14547#true} is VALID [2022-04-28 10:02:26,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {14547#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14547#true} is VALID [2022-04-28 10:02:26,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {14547#true} assume true; {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14547#true} {14547#true} #682#return; {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L272 TraceCheckUtils]: 4: Hoare triple {14547#true} call #t~ret187 := main(); {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 5: Hoare triple {14547#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L272 TraceCheckUtils]: 6: Hoare triple {14547#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 7: Hoare triple {14547#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 8: Hoare triple {14547#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 9: Hoare triple {14547#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 10: Hoare triple {14547#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 11: Hoare triple {14547#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:26,710 INFO L290 TraceCheckUtils]: 12: Hoare triple {14547#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14547#true} is VALID [2022-04-28 10:02:26,711 INFO L290 TraceCheckUtils]: 13: Hoare triple {14547#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:26,711 INFO L290 TraceCheckUtils]: 14: Hoare triple {14547#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14547#true} is VALID [2022-04-28 10:02:26,711 INFO L290 TraceCheckUtils]: 15: Hoare triple {14547#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14547#true} is VALID [2022-04-28 10:02:26,711 INFO L272 TraceCheckUtils]: 16: Hoare triple {14547#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {14547#true} is VALID [2022-04-28 10:02:26,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {14547#true} #t~loopctr188 := 0; {14588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:26,715 INFO L290 TraceCheckUtils]: 18: Hoare triple {14588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14660#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,717 INFO L290 TraceCheckUtils]: 19: Hoare triple {14660#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14664#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:26,719 INFO L290 TraceCheckUtils]: 20: Hoare triple {14664#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14668#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:02:26,721 INFO L290 TraceCheckUtils]: 21: Hoare triple {14668#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14672#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,723 INFO L290 TraceCheckUtils]: 22: Hoare triple {14672#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14676#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:26,725 INFO L290 TraceCheckUtils]: 23: Hoare triple {14676#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14680#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:26,727 INFO L290 TraceCheckUtils]: 24: Hoare triple {14680#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14684#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,729 INFO L290 TraceCheckUtils]: 25: Hoare triple {14684#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14688#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:26,731 INFO L290 TraceCheckUtils]: 26: Hoare triple {14688#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14692#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,733 INFO L290 TraceCheckUtils]: 27: Hoare triple {14692#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14696#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,735 INFO L290 TraceCheckUtils]: 28: Hoare triple {14696#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14700#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,737 INFO L290 TraceCheckUtils]: 29: Hoare triple {14700#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14704#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:26,740 INFO L290 TraceCheckUtils]: 30: Hoare triple {14704#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14708#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:02:26,742 INFO L290 TraceCheckUtils]: 31: Hoare triple {14708#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14712#(< 0 (+ 1 (div (+ 13 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 10:02:26,742 INFO L290 TraceCheckUtils]: 32: Hoare triple {14712#(< 0 (+ 1 (div (+ 13 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14712#(< 0 (+ 1 (div (+ 13 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 10:02:26,743 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14712#(< 0 (+ 1 (div (+ 13 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} {14547#true} #672#return; {14548#false} is VALID [2022-04-28 10:02:26,743 INFO L290 TraceCheckUtils]: 34: Hoare triple {14548#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 35: Hoare triple {14548#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 36: Hoare triple {14548#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 37: Hoare triple {14548#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 38: Hoare triple {14548#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 39: Hoare triple {14548#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 40: Hoare triple {14548#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 41: Hoare triple {14548#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 42: Hoare triple {14548#false} assume #t~short172; {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 43: Hoare triple {14548#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14548#false} is VALID [2022-04-28 10:02:26,744 INFO L290 TraceCheckUtils]: 44: Hoare triple {14548#false} assume 0 != #t~mem173;havoc #t~mem173; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L272 TraceCheckUtils]: 45: Hoare triple {14548#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 46: Hoare triple {14548#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 47: Hoare triple {14548#false} assume !(~len <= 0); {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L272 TraceCheckUtils]: 48: Hoare triple {14548#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 49: Hoare triple {14548#false} #t~loopctr188 := 0; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 50: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 51: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 52: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 53: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 54: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,745 INFO L290 TraceCheckUtils]: 55: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 56: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 57: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 58: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 59: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 60: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 61: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 62: Hoare triple {14548#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 63: Hoare triple {14548#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 64: Hoare triple {14548#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14548#false} {14548#false} #656#return; {14548#false} is VALID [2022-04-28 10:02:26,746 INFO L290 TraceCheckUtils]: 66: Hoare triple {14548#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14548#false} is VALID [2022-04-28 10:02:26,747 INFO L290 TraceCheckUtils]: 67: Hoare triple {14548#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14548#false} is VALID [2022-04-28 10:02:26,747 INFO L272 TraceCheckUtils]: 68: Hoare triple {14548#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14548#false} is VALID [2022-04-28 10:02:26,747 INFO L290 TraceCheckUtils]: 69: Hoare triple {14548#false} ~cond := #in~cond; {14548#false} is VALID [2022-04-28 10:02:26,747 INFO L290 TraceCheckUtils]: 70: Hoare triple {14548#false} assume 0 == ~cond; {14548#false} is VALID [2022-04-28 10:02:26,747 INFO L290 TraceCheckUtils]: 71: Hoare triple {14548#false} assume !false; {14548#false} is VALID [2022-04-28 10:02:26,747 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 199 proven. 91 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-04-28 10:02:26,747 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:02:27,968 INFO L290 TraceCheckUtils]: 71: Hoare triple {14548#false} assume !false; {14548#false} is VALID [2022-04-28 10:02:27,968 INFO L290 TraceCheckUtils]: 70: Hoare triple {14548#false} assume 0 == ~cond; {14548#false} is VALID [2022-04-28 10:02:27,968 INFO L290 TraceCheckUtils]: 69: Hoare triple {14548#false} ~cond := #in~cond; {14548#false} is VALID [2022-04-28 10:02:27,968 INFO L272 TraceCheckUtils]: 68: Hoare triple {14548#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14548#false} is VALID [2022-04-28 10:02:27,968 INFO L290 TraceCheckUtils]: 67: Hoare triple {14548#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14548#false} is VALID [2022-04-28 10:02:27,968 INFO L290 TraceCheckUtils]: 66: Hoare triple {14548#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14548#false} is VALID [2022-04-28 10:02:27,969 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14547#true} {14548#false} #656#return; {14548#false} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 64: Hoare triple {14547#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 63: Hoare triple {14547#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 62: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 61: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 60: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 59: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 58: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 57: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 56: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 55: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 54: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 53: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 52: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,969 INFO L290 TraceCheckUtils]: 51: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 50: Hoare triple {14547#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#true} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 49: Hoare triple {14547#true} #t~loopctr188 := 0; {14547#true} is VALID [2022-04-28 10:02:27,970 INFO L272 TraceCheckUtils]: 48: Hoare triple {14548#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14547#true} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 47: Hoare triple {14548#false} assume !(~len <= 0); {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 46: Hoare triple {14548#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L272 TraceCheckUtils]: 45: Hoare triple {14548#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 44: Hoare triple {14548#false} assume 0 != #t~mem173;havoc #t~mem173; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 43: Hoare triple {14548#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 42: Hoare triple {14548#false} assume #t~short172; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 41: Hoare triple {14548#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 40: Hoare triple {14548#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 39: Hoare triple {14548#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 38: Hoare triple {14548#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14548#false} is VALID [2022-04-28 10:02:27,970 INFO L290 TraceCheckUtils]: 37: Hoare triple {14548#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14548#false} is VALID [2022-04-28 10:02:27,971 INFO L290 TraceCheckUtils]: 36: Hoare triple {14548#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14548#false} is VALID [2022-04-28 10:02:27,971 INFO L290 TraceCheckUtils]: 35: Hoare triple {14548#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {14548#false} is VALID [2022-04-28 10:02:27,971 INFO L290 TraceCheckUtils]: 34: Hoare triple {14548#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14548#false} is VALID [2022-04-28 10:02:27,972 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14950#(not (= 32 |#Ultimate.C_memset_#amount|))} {14547#true} #672#return; {14548#false} is VALID [2022-04-28 10:02:27,972 INFO L290 TraceCheckUtils]: 32: Hoare triple {14950#(not (= 32 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14950#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:27,972 INFO L290 TraceCheckUtils]: 31: Hoare triple {14957#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {14950#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:27,974 INFO L290 TraceCheckUtils]: 30: Hoare triple {14961#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14957#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,975 INFO L290 TraceCheckUtils]: 29: Hoare triple {14965#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14961#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,979 INFO L290 TraceCheckUtils]: 28: Hoare triple {14969#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14965#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,981 INFO L290 TraceCheckUtils]: 27: Hoare triple {14973#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14969#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,983 INFO L290 TraceCheckUtils]: 26: Hoare triple {14977#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14973#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,985 INFO L290 TraceCheckUtils]: 25: Hoare triple {14981#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14977#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,987 INFO L290 TraceCheckUtils]: 24: Hoare triple {14985#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14981#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,989 INFO L290 TraceCheckUtils]: 23: Hoare triple {14989#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14985#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,990 INFO L290 TraceCheckUtils]: 22: Hoare triple {14993#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14989#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,993 INFO L290 TraceCheckUtils]: 21: Hoare triple {14997#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14993#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,994 INFO L290 TraceCheckUtils]: 20: Hoare triple {15001#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14997#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,996 INFO L290 TraceCheckUtils]: 19: Hoare triple {15005#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15001#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:27,997 INFO L290 TraceCheckUtils]: 18: Hoare triple {15009#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15005#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 17: Hoare triple {14547#true} #t~loopctr188 := 0; {15009#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:27,998 INFO L272 TraceCheckUtils]: 16: Hoare triple {14547#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 15: Hoare triple {14547#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 14: Hoare triple {14547#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 13: Hoare triple {14547#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 12: Hoare triple {14547#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 11: Hoare triple {14547#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 10: Hoare triple {14547#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 9: Hoare triple {14547#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 8: Hoare triple {14547#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14547#true} is VALID [2022-04-28 10:02:27,998 INFO L290 TraceCheckUtils]: 7: Hoare triple {14547#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L272 TraceCheckUtils]: 6: Hoare triple {14547#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L290 TraceCheckUtils]: 5: Hoare triple {14547#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L272 TraceCheckUtils]: 4: Hoare triple {14547#true} call #t~ret187 := main(); {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14547#true} {14547#true} #682#return; {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L290 TraceCheckUtils]: 2: Hoare triple {14547#true} assume true; {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L290 TraceCheckUtils]: 1: Hoare triple {14547#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L272 TraceCheckUtils]: 0: Hoare triple {14547#true} call ULTIMATE.init(); {14547#true} is VALID [2022-04-28 10:02:27,999 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2022-04-28 10:02:28,000 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [187947963] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:02:28,000 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:02:28,000 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17] total 48 [2022-04-28 10:02:28,000 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:02:28,000 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [184401533] [2022-04-28 10:02:28,000 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [184401533] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:02:28,000 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:02:28,000 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-04-28 10:02:28,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546919900] [2022-04-28 10:02:28,000 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:02:28,001 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 72 [2022-04-28 10:02:28,001 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:02:28,001 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:28,071 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:28,071 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-28 10:02:28,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:02:28,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-28 10:02:28,072 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=539, Invalid=1717, Unknown=0, NotChecked=0, Total=2256 [2022-04-28 10:02:28,073 INFO L87 Difference]: Start difference. First operand 89 states and 111 transitions. Second operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:31,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:31,118 INFO L93 Difference]: Finished difference Result 166 states and 210 transitions. [2022-04-28 10:02:31,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-28 10:02:31,119 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 72 [2022-04-28 10:02:31,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:02:31,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:31,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 195 transitions. [2022-04-28 10:02:31,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:31,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 195 transitions. [2022-04-28 10:02:31,123 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 195 transitions. [2022-04-28 10:02:31,385 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 195 edges. 195 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:31,386 INFO L225 Difference]: With dead ends: 166 [2022-04-28 10:02:31,387 INFO L226 Difference]: Without dead ends: 94 [2022-04-28 10:02:31,388 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 182 GetRequests, 119 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=854, Invalid=3178, Unknown=0, NotChecked=0, Total=4032 [2022-04-28 10:02:31,388 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 622 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 679 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 622 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-28 10:02:31,389 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 679 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 622 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-28 10:02:31,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-28 10:02:31,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 90. [2022-04-28 10:02:31,436 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:02:31,436 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:31,436 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:31,437 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:31,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:31,439 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-28 10:02:31,439 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-28 10:02:31,440 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:02:31,440 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:02:31,440 INFO L74 IsIncluded]: Start isIncluded. First operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-28 10:02:31,440 INFO L87 Difference]: Start difference. First operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-28 10:02:31,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:31,442 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-28 10:02:31,443 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-28 10:02:31,443 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:02:31,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:02:31,443 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:02:31,443 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:02:31,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:31,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 112 transitions. [2022-04-28 10:02:31,445 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 112 transitions. Word has length 72 [2022-04-28 10:02:31,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:02:31,445 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 112 transitions. [2022-04-28 10:02:31,445 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:31,446 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 90 states and 112 transitions. [2022-04-28 10:02:31,624 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:31,624 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 112 transitions. [2022-04-28 10:02:31,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-28 10:02:31,625 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:02:31,625 INFO L195 NwaCegarLoop]: trace histogram [28, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:02:31,650 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-28 10:02:31,845 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:02:31,845 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:02:31,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:02:31,846 INFO L85 PathProgramCache]: Analyzing trace with hash -286155254, now seen corresponding path program 27 times [2022-04-28 10:02:31,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:02:31,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1625090968] [2022-04-28 10:02:31,846 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:02:31,846 INFO L85 PathProgramCache]: Analyzing trace with hash -286155254, now seen corresponding path program 28 times [2022-04-28 10:02:31,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:02:31,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879281484] [2022-04-28 10:02:31,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:02:31,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:02:31,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:31,951 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:02:31,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:31,959 INFO L290 TraceCheckUtils]: 0: Hoare triple {15837#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15796#true} is VALID [2022-04-28 10:02:31,960 INFO L290 TraceCheckUtils]: 1: Hoare triple {15796#true} assume true; {15796#true} is VALID [2022-04-28 10:02:31,960 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15796#true} {15796#true} #682#return; {15796#true} is VALID [2022-04-28 10:02:31,962 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:02:31,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:32,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {15838#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:32,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15840#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {15840#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15841#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:32,709 INFO L290 TraceCheckUtils]: 3: Hoare triple {15841#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15842#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:32,713 INFO L290 TraceCheckUtils]: 4: Hoare triple {15842#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15843#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:32,718 INFO L290 TraceCheckUtils]: 5: Hoare triple {15843#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15844#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:32,723 INFO L290 TraceCheckUtils]: 6: Hoare triple {15844#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15845#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:32,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {15845#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15846#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:32,730 INFO L290 TraceCheckUtils]: 8: Hoare triple {15846#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15847#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:32,734 INFO L290 TraceCheckUtils]: 9: Hoare triple {15847#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15848#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,737 INFO L290 TraceCheckUtils]: 10: Hoare triple {15848#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15849#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,742 INFO L290 TraceCheckUtils]: 11: Hoare triple {15849#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,747 INFO L290 TraceCheckUtils]: 12: Hoare triple {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15851#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,752 INFO L290 TraceCheckUtils]: 13: Hoare triple {15851#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15852#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:02:32,757 INFO L290 TraceCheckUtils]: 14: Hoare triple {15852#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15853#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 14) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:32,758 INFO L290 TraceCheckUtils]: 15: Hoare triple {15853#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 14) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 10:02:32,759 INFO L290 TraceCheckUtils]: 16: Hoare triple {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 10:02:32,760 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} {15796#true} #672#return; {15797#false} is VALID [2022-04-28 10:02:32,760 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 49 [2022-04-28 10:02:32,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:32,780 INFO L290 TraceCheckUtils]: 0: Hoare triple {15838#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15796#true} is VALID [2022-04-28 10:02:32,780 INFO L290 TraceCheckUtils]: 1: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,780 INFO L290 TraceCheckUtils]: 2: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,780 INFO L290 TraceCheckUtils]: 3: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,780 INFO L290 TraceCheckUtils]: 4: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 5: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 6: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 7: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 8: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 9: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 10: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 11: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 12: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 13: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 14: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,781 INFO L290 TraceCheckUtils]: 15: Hoare triple {15796#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {15796#true} is VALID [2022-04-28 10:02:32,782 INFO L290 TraceCheckUtils]: 16: Hoare triple {15796#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15796#true} is VALID [2022-04-28 10:02:32,782 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {15796#true} {15797#false} #656#return; {15797#false} is VALID [2022-04-28 10:02:32,783 INFO L272 TraceCheckUtils]: 0: Hoare triple {15796#true} call ULTIMATE.init(); {15837#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:02:32,783 INFO L290 TraceCheckUtils]: 1: Hoare triple {15837#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L290 TraceCheckUtils]: 2: Hoare triple {15796#true} assume true; {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15796#true} {15796#true} #682#return; {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L272 TraceCheckUtils]: 4: Hoare triple {15796#true} call #t~ret187 := main(); {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L290 TraceCheckUtils]: 5: Hoare triple {15796#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L272 TraceCheckUtils]: 6: Hoare triple {15796#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L290 TraceCheckUtils]: 7: Hoare triple {15796#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15796#true} is VALID [2022-04-28 10:02:32,783 INFO L290 TraceCheckUtils]: 8: Hoare triple {15796#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 9: Hoare triple {15796#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 10: Hoare triple {15796#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 11: Hoare triple {15796#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 12: Hoare triple {15796#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 13: Hoare triple {15796#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 14: Hoare triple {15796#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15796#true} is VALID [2022-04-28 10:02:32,784 INFO L290 TraceCheckUtils]: 15: Hoare triple {15796#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15796#true} is VALID [2022-04-28 10:02:32,785 INFO L272 TraceCheckUtils]: 16: Hoare triple {15796#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {15838#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:02:32,785 INFO L290 TraceCheckUtils]: 17: Hoare triple {15838#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:32,791 INFO L290 TraceCheckUtils]: 18: Hoare triple {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15840#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,795 INFO L290 TraceCheckUtils]: 19: Hoare triple {15840#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15841#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:32,800 INFO L290 TraceCheckUtils]: 20: Hoare triple {15841#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15842#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:32,803 INFO L290 TraceCheckUtils]: 21: Hoare triple {15842#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15843#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:32,809 INFO L290 TraceCheckUtils]: 22: Hoare triple {15843#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15844#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:32,814 INFO L290 TraceCheckUtils]: 23: Hoare triple {15844#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15845#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:32,817 INFO L290 TraceCheckUtils]: 24: Hoare triple {15845#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15846#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:32,821 INFO L290 TraceCheckUtils]: 25: Hoare triple {15846#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15847#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:32,824 INFO L290 TraceCheckUtils]: 26: Hoare triple {15847#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15848#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,829 INFO L290 TraceCheckUtils]: 27: Hoare triple {15848#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15849#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,834 INFO L290 TraceCheckUtils]: 28: Hoare triple {15849#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,840 INFO L290 TraceCheckUtils]: 29: Hoare triple {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15851#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:32,844 INFO L290 TraceCheckUtils]: 30: Hoare triple {15851#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15852#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:02:32,848 INFO L290 TraceCheckUtils]: 31: Hoare triple {15852#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15853#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 14) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:32,850 INFO L290 TraceCheckUtils]: 32: Hoare triple {15853#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 14) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 10:02:32,850 INFO L290 TraceCheckUtils]: 33: Hoare triple {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 10:02:32,851 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15854#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} {15796#true} #672#return; {15797#false} is VALID [2022-04-28 10:02:32,851 INFO L290 TraceCheckUtils]: 35: Hoare triple {15797#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15797#false} is VALID [2022-04-28 10:02:32,851 INFO L290 TraceCheckUtils]: 36: Hoare triple {15797#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {15797#false} is VALID [2022-04-28 10:02:32,851 INFO L290 TraceCheckUtils]: 37: Hoare triple {15797#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15797#false} is VALID [2022-04-28 10:02:32,851 INFO L290 TraceCheckUtils]: 38: Hoare triple {15797#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 39: Hoare triple {15797#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 40: Hoare triple {15797#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 41: Hoare triple {15797#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 42: Hoare triple {15797#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 43: Hoare triple {15797#false} assume #t~short172; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 44: Hoare triple {15797#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 45: Hoare triple {15797#false} assume 0 != #t~mem173;havoc #t~mem173; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L272 TraceCheckUtils]: 46: Hoare triple {15797#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 47: Hoare triple {15797#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L290 TraceCheckUtils]: 48: Hoare triple {15797#false} assume !(~len <= 0); {15797#false} is VALID [2022-04-28 10:02:32,852 INFO L272 TraceCheckUtils]: 49: Hoare triple {15797#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15838#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 50: Hoare triple {15838#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 51: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 52: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 53: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 54: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 55: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 56: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 57: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 58: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 59: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,853 INFO L290 TraceCheckUtils]: 60: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 61: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 62: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 63: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 64: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 65: Hoare triple {15796#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 66: Hoare triple {15796#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15796#true} is VALID [2022-04-28 10:02:32,854 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15796#true} {15797#false} #656#return; {15797#false} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 68: Hoare triple {15797#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15797#false} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 69: Hoare triple {15797#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15797#false} is VALID [2022-04-28 10:02:32,854 INFO L272 TraceCheckUtils]: 70: Hoare triple {15797#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15797#false} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 71: Hoare triple {15797#false} ~cond := #in~cond; {15797#false} is VALID [2022-04-28 10:02:32,854 INFO L290 TraceCheckUtils]: 72: Hoare triple {15797#false} assume 0 == ~cond; {15797#false} is VALID [2022-04-28 10:02:32,855 INFO L290 TraceCheckUtils]: 73: Hoare triple {15797#false} assume !false; {15797#false} is VALID [2022-04-28 10:02:32,855 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 332 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-04-28 10:02:32,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:02:32,855 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1879281484] [2022-04-28 10:02:32,855 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1879281484] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:02:32,855 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1191158975] [2022-04-28 10:02:32,856 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 10:02:32,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:02:32,856 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:02:32,860 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:02:32,861 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-28 10:02:33,537 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 10:02:33,537 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:02:33,542 INFO L263 TraceCheckSpWp]: Trace formula consists of 877 conjuncts, 60 conjunts are in the unsatisfiable core [2022-04-28 10:02:33,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:33,561 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:02:34,876 INFO L272 TraceCheckUtils]: 0: Hoare triple {15796#true} call ULTIMATE.init(); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {15796#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 2: Hoare triple {15796#true} assume true; {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15796#true} {15796#true} #682#return; {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L272 TraceCheckUtils]: 4: Hoare triple {15796#true} call #t~ret187 := main(); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 5: Hoare triple {15796#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L272 TraceCheckUtils]: 6: Hoare triple {15796#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 7: Hoare triple {15796#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 8: Hoare triple {15796#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 9: Hoare triple {15796#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 10: Hoare triple {15796#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {15796#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:34,877 INFO L290 TraceCheckUtils]: 12: Hoare triple {15796#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15796#true} is VALID [2022-04-28 10:02:34,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {15796#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:34,878 INFO L290 TraceCheckUtils]: 14: Hoare triple {15796#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15796#true} is VALID [2022-04-28 10:02:34,878 INFO L290 TraceCheckUtils]: 15: Hoare triple {15796#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15796#true} is VALID [2022-04-28 10:02:34,878 INFO L272 TraceCheckUtils]: 16: Hoare triple {15796#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {15796#true} is VALID [2022-04-28 10:02:34,878 INFO L290 TraceCheckUtils]: 17: Hoare triple {15796#true} #t~loopctr188 := 0; {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:34,881 INFO L290 TraceCheckUtils]: 18: Hoare triple {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15912#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {15912#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15916#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:34,885 INFO L290 TraceCheckUtils]: 20: Hoare triple {15916#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15920#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:02:34,886 INFO L290 TraceCheckUtils]: 21: Hoare triple {15920#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15924#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,888 INFO L290 TraceCheckUtils]: 22: Hoare triple {15924#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15928#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:34,890 INFO L290 TraceCheckUtils]: 23: Hoare triple {15928#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15932#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:34,891 INFO L290 TraceCheckUtils]: 24: Hoare triple {15932#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15936#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,893 INFO L290 TraceCheckUtils]: 25: Hoare triple {15936#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15940#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:34,895 INFO L290 TraceCheckUtils]: 26: Hoare triple {15940#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,896 INFO L290 TraceCheckUtils]: 27: Hoare triple {15944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15948#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,898 INFO L290 TraceCheckUtils]: 28: Hoare triple {15948#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,898 INFO L290 TraceCheckUtils]: 29: Hoare triple {15952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:34,898 INFO L290 TraceCheckUtils]: 30: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:34,898 INFO L290 TraceCheckUtils]: 31: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:34,898 INFO L290 TraceCheckUtils]: 32: Hoare triple {15796#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {15796#true} is VALID [2022-04-28 10:02:34,898 INFO L290 TraceCheckUtils]: 33: Hoare triple {15796#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15796#true} is VALID [2022-04-28 10:02:34,898 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15796#true} {15796#true} #672#return; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#true} assume #t~short172; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#true} assume 0 != #t~mem173;havoc #t~mem173; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#true} is VALID [2022-04-28 10:02:34,899 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#true} assume !(~len <= 0); {15796#true} is VALID [2022-04-28 10:02:34,900 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15796#true} is VALID [2022-04-28 10:02:34,900 INFO L290 TraceCheckUtils]: 50: Hoare triple {15796#true} #t~loopctr188 := 0; {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:34,902 INFO L290 TraceCheckUtils]: 51: Hoare triple {15839#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15912#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,904 INFO L290 TraceCheckUtils]: 52: Hoare triple {15912#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15916#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:34,905 INFO L290 TraceCheckUtils]: 53: Hoare triple {15916#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15920#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:02:34,907 INFO L290 TraceCheckUtils]: 54: Hoare triple {15920#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15924#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,909 INFO L290 TraceCheckUtils]: 55: Hoare triple {15924#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15928#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:34,910 INFO L290 TraceCheckUtils]: 56: Hoare triple {15928#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15932#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:34,912 INFO L290 TraceCheckUtils]: 57: Hoare triple {15932#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15936#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,913 INFO L290 TraceCheckUtils]: 58: Hoare triple {15936#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15940#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:34,915 INFO L290 TraceCheckUtils]: 59: Hoare triple {15940#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,916 INFO L290 TraceCheckUtils]: 60: Hoare triple {15944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15948#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,918 INFO L290 TraceCheckUtils]: 61: Hoare triple {15948#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,920 INFO L290 TraceCheckUtils]: 62: Hoare triple {15952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16055#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:34,921 INFO L290 TraceCheckUtils]: 63: Hoare triple {16055#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16059#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:02:34,923 INFO L290 TraceCheckUtils]: 64: Hoare triple {16059#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 18446744073709551615 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16063#(and (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:02:34,926 INFO L290 TraceCheckUtils]: 65: Hoare triple {16063#(and (< (mod (+ 18446744073709551614 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {16067#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551629)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551630) 18446744073709551616) 1))} is VALID [2022-04-28 10:02:34,926 INFO L290 TraceCheckUtils]: 66: Hoare triple {16067#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551629)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551630) 18446744073709551616) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16067#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551629)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551630) 18446744073709551616) 1))} is VALID [2022-04-28 10:02:34,927 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {16067#(< (div (+ (mod |#Ultimate.C_memset_#amount| 18446744073709551616) (- 18446744073709551629)) (- 18446744073709551616)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) 18446744073709551630) 18446744073709551616) 1))} {15796#true} #656#return; {15797#false} is VALID [2022-04-28 10:02:34,927 INFO L290 TraceCheckUtils]: 68: Hoare triple {15797#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15797#false} is VALID [2022-04-28 10:02:34,927 INFO L290 TraceCheckUtils]: 69: Hoare triple {15797#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15797#false} is VALID [2022-04-28 10:02:34,927 INFO L272 TraceCheckUtils]: 70: Hoare triple {15797#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15797#false} is VALID [2022-04-28 10:02:34,927 INFO L290 TraceCheckUtils]: 71: Hoare triple {15797#false} ~cond := #in~cond; {15797#false} is VALID [2022-04-28 10:02:34,928 INFO L290 TraceCheckUtils]: 72: Hoare triple {15797#false} assume 0 == ~cond; {15797#false} is VALID [2022-04-28 10:02:34,928 INFO L290 TraceCheckUtils]: 73: Hoare triple {15797#false} assume !false; {15797#false} is VALID [2022-04-28 10:02:34,928 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 47 proven. 375 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-28 10:02:34,928 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:02:37,079 INFO L290 TraceCheckUtils]: 73: Hoare triple {15797#false} assume !false; {15797#false} is VALID [2022-04-28 10:02:37,079 INFO L290 TraceCheckUtils]: 72: Hoare triple {15797#false} assume 0 == ~cond; {15797#false} is VALID [2022-04-28 10:02:37,079 INFO L290 TraceCheckUtils]: 71: Hoare triple {15797#false} ~cond := #in~cond; {15797#false} is VALID [2022-04-28 10:02:37,079 INFO L272 TraceCheckUtils]: 70: Hoare triple {15797#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15797#false} is VALID [2022-04-28 10:02:37,079 INFO L290 TraceCheckUtils]: 69: Hoare triple {15797#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15797#false} is VALID [2022-04-28 10:02:37,080 INFO L290 TraceCheckUtils]: 68: Hoare triple {15797#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15797#false} is VALID [2022-04-28 10:02:37,080 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {16113#(not (= |#Ultimate.C_memset_#amount| 80))} {15796#true} #656#return; {15797#false} is VALID [2022-04-28 10:02:37,081 INFO L290 TraceCheckUtils]: 66: Hoare triple {16113#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16113#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:02:37,081 INFO L290 TraceCheckUtils]: 65: Hoare triple {16120#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {16113#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:02:37,085 INFO L290 TraceCheckUtils]: 64: Hoare triple {16124#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16120#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:37,089 INFO L290 TraceCheckUtils]: 63: Hoare triple {16128#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16124#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,092 INFO L290 TraceCheckUtils]: 62: Hoare triple {16132#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16128#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,094 INFO L290 TraceCheckUtils]: 61: Hoare triple {16136#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16132#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,095 INFO L290 TraceCheckUtils]: 60: Hoare triple {16140#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16136#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,099 INFO L290 TraceCheckUtils]: 59: Hoare triple {16144#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16140#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,101 INFO L290 TraceCheckUtils]: 58: Hoare triple {16148#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16144#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,105 INFO L290 TraceCheckUtils]: 57: Hoare triple {16152#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16148#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:37,108 INFO L290 TraceCheckUtils]: 56: Hoare triple {16156#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16152#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,111 INFO L290 TraceCheckUtils]: 55: Hoare triple {16160#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16156#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:37,120 INFO L290 TraceCheckUtils]: 54: Hoare triple {16164#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16160#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:37,123 INFO L290 TraceCheckUtils]: 53: Hoare triple {16168#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16164#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:02:37,126 INFO L290 TraceCheckUtils]: 52: Hoare triple {16172#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16168#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,128 INFO L290 TraceCheckUtils]: 51: Hoare triple {16176#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16172#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 50: Hoare triple {15796#true} #t~loopctr188 := 0; {16176#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:02:37,129 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#true} assume !(~len <= 0); {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#true} assume 0 != #t~mem173;havoc #t~mem173; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#true} assume #t~short172; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#true} is VALID [2022-04-28 10:02:37,129 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15796#true} {15796#true} #672#return; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 33: Hoare triple {15796#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 32: Hoare triple {15796#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 31: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 30: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 29: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 28: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 27: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 26: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 25: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 24: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,130 INFO L290 TraceCheckUtils]: 23: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 22: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 21: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 20: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 19: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 18: Hoare triple {15796#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 17: Hoare triple {15796#true} #t~loopctr188 := 0; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L272 TraceCheckUtils]: 16: Hoare triple {15796#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 15: Hoare triple {15796#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 14: Hoare triple {15796#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 13: Hoare triple {15796#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 12: Hoare triple {15796#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 11: Hoare triple {15796#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 10: Hoare triple {15796#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 9: Hoare triple {15796#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15796#true} is VALID [2022-04-28 10:02:37,131 INFO L290 TraceCheckUtils]: 8: Hoare triple {15796#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L290 TraceCheckUtils]: 7: Hoare triple {15796#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L272 TraceCheckUtils]: 6: Hoare triple {15796#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L290 TraceCheckUtils]: 5: Hoare triple {15796#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L272 TraceCheckUtils]: 4: Hoare triple {15796#true} call #t~ret187 := main(); {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15796#true} {15796#true} #682#return; {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L290 TraceCheckUtils]: 2: Hoare triple {15796#true} assume true; {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L290 TraceCheckUtils]: 1: Hoare triple {15796#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L272 TraceCheckUtils]: 0: Hoare triple {15796#true} call ULTIMATE.init(); {15796#true} is VALID [2022-04-28 10:02:37,132 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 227 proven. 105 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-04-28 10:02:37,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1191158975] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:02:37,133 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:02:37,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 18] total 51 [2022-04-28 10:02:37,133 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:02:37,133 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1625090968] [2022-04-28 10:02:37,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1625090968] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:02:37,133 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:02:37,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2022-04-28 10:02:37,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13851177] [2022-04-28 10:02:37,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:02:37,134 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 74 [2022-04-28 10:02:37,134 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:02:37,134 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:37,220 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:37,220 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-28 10:02:37,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:02:37,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-28 10:02:37,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=610, Invalid=1940, Unknown=0, NotChecked=0, Total=2550 [2022-04-28 10:02:37,221 INFO L87 Difference]: Start difference. First operand 90 states and 112 transitions. Second operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:41,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:41,283 INFO L93 Difference]: Finished difference Result 168 states and 212 transitions. [2022-04-28 10:02:41,283 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-28 10:02:41,284 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 74 [2022-04-28 10:02:41,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:02:41,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:41,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 196 transitions. [2022-04-28 10:02:41,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:41,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 196 transitions. [2022-04-28 10:02:41,288 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 196 transitions. [2022-04-28 10:02:41,571 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:41,572 INFO L225 Difference]: With dead ends: 168 [2022-04-28 10:02:41,572 INFO L226 Difference]: Without dead ends: 95 [2022-04-28 10:02:41,574 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=961, Invalid=3595, Unknown=0, NotChecked=0, Total=4556 [2022-04-28 10:02:41,574 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 884 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 943 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 884 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-28 10:02:41,574 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 211 Invalid, 943 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 884 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-28 10:02:41,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-28 10:02:41,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 91. [2022-04-28 10:02:41,625 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:02:41,625 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:41,625 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:41,626 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:41,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:41,627 INFO L93 Difference]: Finished difference Result 95 states and 119 transitions. [2022-04-28 10:02:41,627 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 119 transitions. [2022-04-28 10:02:41,628 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:02:41,628 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:02:41,628 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 95 states. [2022-04-28 10:02:41,628 INFO L87 Difference]: Start difference. First operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 95 states. [2022-04-28 10:02:41,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:02:41,630 INFO L93 Difference]: Finished difference Result 95 states and 119 transitions. [2022-04-28 10:02:41,630 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 119 transitions. [2022-04-28 10:02:41,630 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:02:41,630 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:02:41,631 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:02:41,631 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:02:41,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:02:41,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 113 transitions. [2022-04-28 10:02:41,634 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 113 transitions. Word has length 74 [2022-04-28 10:02:41,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:02:41,634 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 113 transitions. [2022-04-28 10:02:41,634 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:02:41,634 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 91 states and 113 transitions. [2022-04-28 10:02:41,845 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:02:41,845 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 113 transitions. [2022-04-28 10:02:41,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-28 10:02:41,846 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:02:41,846 INFO L195 NwaCegarLoop]: trace histogram [30, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:02:41,865 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-28 10:02:42,046 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-28 10:02:42,046 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:02:42,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:02:42,047 INFO L85 PathProgramCache]: Analyzing trace with hash -1348028000, now seen corresponding path program 29 times [2022-04-28 10:02:42,047 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:02:42,047 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1162569268] [2022-04-28 10:02:42,047 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:02:42,047 INFO L85 PathProgramCache]: Analyzing trace with hash -1348028000, now seen corresponding path program 30 times [2022-04-28 10:02:42,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:02:42,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027643679] [2022-04-28 10:02:42,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:02:42,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:02:42,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:42,153 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:02:42,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:42,161 INFO L290 TraceCheckUtils]: 0: Hoare triple {17115#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17072#true} is VALID [2022-04-28 10:02:42,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {17072#true} assume true; {17072#true} is VALID [2022-04-28 10:02:42,161 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17072#true} {17072#true} #682#return; {17072#true} is VALID [2022-04-28 10:02:42,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:02:42,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:42,897 INFO L290 TraceCheckUtils]: 0: Hoare triple {17116#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17117#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:42,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {17117#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:42,905 INFO L290 TraceCheckUtils]: 2: Hoare triple {17118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17119#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:42,908 INFO L290 TraceCheckUtils]: 3: Hoare triple {17119#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17120#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:42,911 INFO L290 TraceCheckUtils]: 4: Hoare triple {17120#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:42,915 INFO L290 TraceCheckUtils]: 5: Hoare triple {17121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17122#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:42,918 INFO L290 TraceCheckUtils]: 6: Hoare triple {17122#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17123#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:42,921 INFO L290 TraceCheckUtils]: 7: Hoare triple {17123#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17124#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:42,924 INFO L290 TraceCheckUtils]: 8: Hoare triple {17124#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17125#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:42,927 INFO L290 TraceCheckUtils]: 9: Hoare triple {17125#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17126#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:42,929 INFO L290 TraceCheckUtils]: 10: Hoare triple {17126#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17127#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:42,932 INFO L290 TraceCheckUtils]: 11: Hoare triple {17127#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:42,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:42,938 INFO L290 TraceCheckUtils]: 13: Hoare triple {17129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17130#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:02:42,941 INFO L290 TraceCheckUtils]: 14: Hoare triple {17130#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17131#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:02:42,943 INFO L290 TraceCheckUtils]: 15: Hoare triple {17131#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17132#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:42,944 INFO L290 TraceCheckUtils]: 16: Hoare triple {17132#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:42,945 INFO L290 TraceCheckUtils]: 17: Hoare triple {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:42,945 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {17072#true} #672#return; {17073#false} is VALID [2022-04-28 10:02:42,946 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-28 10:02:42,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:02:42,975 INFO L290 TraceCheckUtils]: 0: Hoare triple {17116#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 3: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 4: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 5: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 6: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 7: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 8: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,976 INFO L290 TraceCheckUtils]: 9: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 10: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 11: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 12: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 13: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 14: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 15: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 16: Hoare triple {17072#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L290 TraceCheckUtils]: 17: Hoare triple {17072#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17072#true} is VALID [2022-04-28 10:02:42,977 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {17072#true} {17073#false} #656#return; {17073#false} is VALID [2022-04-28 10:02:42,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {17072#true} call ULTIMATE.init(); {17115#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:02:42,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {17115#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17072#true} is VALID [2022-04-28 10:02:42,978 INFO L290 TraceCheckUtils]: 2: Hoare triple {17072#true} assume true; {17072#true} is VALID [2022-04-28 10:02:42,978 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17072#true} {17072#true} #682#return; {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {17072#true} call #t~ret187 := main(); {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 5: Hoare triple {17072#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L272 TraceCheckUtils]: 6: Hoare triple {17072#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 7: Hoare triple {17072#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 8: Hoare triple {17072#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 9: Hoare triple {17072#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 10: Hoare triple {17072#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 11: Hoare triple {17072#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 12: Hoare triple {17072#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17072#true} is VALID [2022-04-28 10:02:42,979 INFO L290 TraceCheckUtils]: 13: Hoare triple {17072#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17072#true} is VALID [2022-04-28 10:02:42,980 INFO L290 TraceCheckUtils]: 14: Hoare triple {17072#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17072#true} is VALID [2022-04-28 10:02:42,980 INFO L290 TraceCheckUtils]: 15: Hoare triple {17072#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17072#true} is VALID [2022-04-28 10:02:42,981 INFO L272 TraceCheckUtils]: 16: Hoare triple {17072#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {17116#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:02:42,981 INFO L290 TraceCheckUtils]: 17: Hoare triple {17116#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17117#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:02:42,987 INFO L290 TraceCheckUtils]: 18: Hoare triple {17117#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:42,993 INFO L290 TraceCheckUtils]: 19: Hoare triple {17118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17119#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:02:42,999 INFO L290 TraceCheckUtils]: 20: Hoare triple {17119#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17120#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:43,003 INFO L290 TraceCheckUtils]: 21: Hoare triple {17120#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:43,008 INFO L290 TraceCheckUtils]: 22: Hoare triple {17121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17122#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:02:43,013 INFO L290 TraceCheckUtils]: 23: Hoare triple {17122#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17123#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:02:43,018 INFO L290 TraceCheckUtils]: 24: Hoare triple {17123#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17124#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:43,023 INFO L290 TraceCheckUtils]: 25: Hoare triple {17124#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17125#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:02:43,030 INFO L290 TraceCheckUtils]: 26: Hoare triple {17125#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17126#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:43,034 INFO L290 TraceCheckUtils]: 27: Hoare triple {17126#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17127#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:43,039 INFO L290 TraceCheckUtils]: 28: Hoare triple {17127#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:43,043 INFO L290 TraceCheckUtils]: 29: Hoare triple {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:02:43,047 INFO L290 TraceCheckUtils]: 30: Hoare triple {17129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17130#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:02:43,051 INFO L290 TraceCheckUtils]: 31: Hoare triple {17130#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17131#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:02:43,054 INFO L290 TraceCheckUtils]: 32: Hoare triple {17131#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17132#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:02:43,055 INFO L290 TraceCheckUtils]: 33: Hoare triple {17132#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:43,056 INFO L290 TraceCheckUtils]: 34: Hoare triple {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:02:43,057 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17133#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {17072#true} #672#return; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 36: Hoare triple {17073#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 37: Hoare triple {17073#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 38: Hoare triple {17073#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 39: Hoare triple {17073#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 40: Hoare triple {17073#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 41: Hoare triple {17073#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 42: Hoare triple {17073#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17073#false} is VALID [2022-04-28 10:02:43,057 INFO L290 TraceCheckUtils]: 43: Hoare triple {17073#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 44: Hoare triple {17073#false} assume #t~short172; {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 45: Hoare triple {17073#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 46: Hoare triple {17073#false} assume 0 != #t~mem173;havoc #t~mem173; {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L272 TraceCheckUtils]: 47: Hoare triple {17073#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 48: Hoare triple {17073#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 49: Hoare triple {17073#false} assume !(~len <= 0); {17073#false} is VALID [2022-04-28 10:02:43,058 INFO L272 TraceCheckUtils]: 50: Hoare triple {17073#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17116#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 51: Hoare triple {17116#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17072#true} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 52: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,058 INFO L290 TraceCheckUtils]: 53: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 54: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 55: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 56: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 57: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 58: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 59: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 60: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 61: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 62: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,059 INFO L290 TraceCheckUtils]: 63: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 64: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 65: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 66: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 67: Hoare triple {17072#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17072#true} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 68: Hoare triple {17072#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17072#true} is VALID [2022-04-28 10:02:43,060 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17072#true} {17073#false} #656#return; {17073#false} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 70: Hoare triple {17073#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17073#false} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 71: Hoare triple {17073#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17073#false} is VALID [2022-04-28 10:02:43,060 INFO L272 TraceCheckUtils]: 72: Hoare triple {17073#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17073#false} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 73: Hoare triple {17073#false} ~cond := #in~cond; {17073#false} is VALID [2022-04-28 10:02:43,060 INFO L290 TraceCheckUtils]: 74: Hoare triple {17073#false} assume 0 == ~cond; {17073#false} is VALID [2022-04-28 10:02:43,061 INFO L290 TraceCheckUtils]: 75: Hoare triple {17073#false} assume !false; {17073#false} is VALID [2022-04-28 10:02:43,061 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2022-04-28 10:02:43,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:02:43,061 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027643679] [2022-04-28 10:02:43,061 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1027643679] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:02:43,062 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [54850467] [2022-04-28 10:02:43,062 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 10:02:43,062 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:02:43,062 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:02:43,064 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:02:43,078 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-28 10:03:43,004 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2022-04-28 10:03:43,004 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:03:43,053 INFO L263 TraceCheckSpWp]: Trace formula consists of 891 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-28 10:03:43,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:03:43,075 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:03:44,141 INFO L272 TraceCheckUtils]: 0: Hoare triple {17072#true} call ULTIMATE.init(); {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L290 TraceCheckUtils]: 1: Hoare triple {17072#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L290 TraceCheckUtils]: 2: Hoare triple {17072#true} assume true; {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17072#true} {17072#true} #682#return; {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L272 TraceCheckUtils]: 4: Hoare triple {17072#true} call #t~ret187 := main(); {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L290 TraceCheckUtils]: 5: Hoare triple {17072#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L272 TraceCheckUtils]: 6: Hoare triple {17072#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {17072#true} is VALID [2022-04-28 10:03:44,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {17072#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,143 INFO L290 TraceCheckUtils]: 8: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,143 INFO L290 TraceCheckUtils]: 9: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,143 INFO L290 TraceCheckUtils]: 10: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,143 INFO L290 TraceCheckUtils]: 11: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,144 INFO L290 TraceCheckUtils]: 12: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,144 INFO L290 TraceCheckUtils]: 13: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,144 INFO L290 TraceCheckUtils]: 14: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 10:03:44,145 INFO L272 TraceCheckUtils]: 16: Hoare triple {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {17072#true} is VALID [2022-04-28 10:03:44,145 INFO L290 TraceCheckUtils]: 17: Hoare triple {17072#true} #t~loopctr188 := 0; {17117#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:03:44,149 INFO L290 TraceCheckUtils]: 18: Hoare triple {17117#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17192#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,152 INFO L290 TraceCheckUtils]: 19: Hoare triple {17192#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17196#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:03:44,154 INFO L290 TraceCheckUtils]: 20: Hoare triple {17196#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17200#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:03:44,156 INFO L290 TraceCheckUtils]: 21: Hoare triple {17200#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17204#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,158 INFO L290 TraceCheckUtils]: 22: Hoare triple {17204#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17208#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:03:44,161 INFO L290 TraceCheckUtils]: 23: Hoare triple {17208#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17212#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:03:44,163 INFO L290 TraceCheckUtils]: 24: Hoare triple {17212#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17216#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,165 INFO L290 TraceCheckUtils]: 25: Hoare triple {17216#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17220#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:03:44,167 INFO L290 TraceCheckUtils]: 26: Hoare triple {17220#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17224#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,169 INFO L290 TraceCheckUtils]: 27: Hoare triple {17224#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17228#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,171 INFO L290 TraceCheckUtils]: 28: Hoare triple {17228#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17232#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {17232#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17236#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,176 INFO L290 TraceCheckUtils]: 30: Hoare triple {17236#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17240#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:03:44,178 INFO L290 TraceCheckUtils]: 31: Hoare triple {17240#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17244#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:03:44,180 INFO L290 TraceCheckUtils]: 32: Hoare triple {17244#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17248#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:44,183 INFO L290 TraceCheckUtils]: 33: Hoare triple {17248#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17252#(< 0 (+ 1 (div (+ 15 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 10:03:44,184 INFO L290 TraceCheckUtils]: 34: Hoare triple {17252#(< 0 (+ 1 (div (+ 15 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17252#(< 0 (+ 1 (div (+ 15 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} is VALID [2022-04-28 10:03:44,185 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17252#(< 0 (+ 1 (div (+ 15 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616)))} {17158#(= |do_discover_list_~#smp_rr~0.offset| 0)} #672#return; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 36: Hoare triple {17073#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 37: Hoare triple {17073#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 38: Hoare triple {17073#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 39: Hoare triple {17073#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 40: Hoare triple {17073#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 41: Hoare triple {17073#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 42: Hoare triple {17073#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 43: Hoare triple {17073#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 44: Hoare triple {17073#false} assume #t~short172; {17073#false} is VALID [2022-04-28 10:03:44,185 INFO L290 TraceCheckUtils]: 45: Hoare triple {17073#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 46: Hoare triple {17073#false} assume 0 != #t~mem173;havoc #t~mem173; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L272 TraceCheckUtils]: 47: Hoare triple {17073#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 48: Hoare triple {17073#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 49: Hoare triple {17073#false} assume !(~len <= 0); {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L272 TraceCheckUtils]: 50: Hoare triple {17073#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 51: Hoare triple {17073#false} #t~loopctr188 := 0; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 52: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 53: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 54: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 55: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 56: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 57: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 58: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,186 INFO L290 TraceCheckUtils]: 59: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 60: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 61: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 62: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 63: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 64: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 65: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 66: Hoare triple {17073#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 67: Hoare triple {17073#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 68: Hoare triple {17073#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17073#false} {17073#false} #656#return; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 70: Hoare triple {17073#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L290 TraceCheckUtils]: 71: Hoare triple {17073#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17073#false} is VALID [2022-04-28 10:03:44,187 INFO L272 TraceCheckUtils]: 72: Hoare triple {17073#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17073#false} is VALID [2022-04-28 10:03:44,188 INFO L290 TraceCheckUtils]: 73: Hoare triple {17073#false} ~cond := #in~cond; {17073#false} is VALID [2022-04-28 10:03:44,188 INFO L290 TraceCheckUtils]: 74: Hoare triple {17073#false} assume 0 == ~cond; {17073#false} is VALID [2022-04-28 10:03:44,188 INFO L290 TraceCheckUtils]: 75: Hoare triple {17073#false} assume !false; {17073#false} is VALID [2022-04-28 10:03:44,188 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 259 proven. 120 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2022-04-28 10:03:44,188 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 75: Hoare triple {17073#false} assume !false; {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 74: Hoare triple {17073#false} assume 0 == ~cond; {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 73: Hoare triple {17073#false} ~cond := #in~cond; {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L272 TraceCheckUtils]: 72: Hoare triple {17073#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 71: Hoare triple {17073#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 70: Hoare triple {17073#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17072#true} {17073#false} #656#return; {17073#false} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 68: Hoare triple {17072#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17072#true} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 67: Hoare triple {17072#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17072#true} is VALID [2022-04-28 10:03:45,827 INFO L290 TraceCheckUtils]: 66: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 65: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 64: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 63: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 62: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 61: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 60: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 59: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 58: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,828 INFO L290 TraceCheckUtils]: 57: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 56: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 55: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 54: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 53: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 52: Hoare triple {17072#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 51: Hoare triple {17072#true} #t~loopctr188 := 0; {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L272 TraceCheckUtils]: 50: Hoare triple {17073#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17072#true} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 49: Hoare triple {17073#false} assume !(~len <= 0); {17073#false} is VALID [2022-04-28 10:03:45,829 INFO L290 TraceCheckUtils]: 48: Hoare triple {17073#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17073#false} is VALID [2022-04-28 10:03:45,829 INFO L272 TraceCheckUtils]: 47: Hoare triple {17073#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 46: Hoare triple {17073#false} assume 0 != #t~mem173;havoc #t~mem173; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 45: Hoare triple {17073#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 44: Hoare triple {17073#false} assume #t~short172; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 43: Hoare triple {17073#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 42: Hoare triple {17073#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 41: Hoare triple {17073#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 40: Hoare triple {17073#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 39: Hoare triple {17073#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 38: Hoare triple {17073#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 37: Hoare triple {17073#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {17073#false} is VALID [2022-04-28 10:03:45,830 INFO L290 TraceCheckUtils]: 36: Hoare triple {17073#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17073#false} is VALID [2022-04-28 10:03:45,838 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17502#(not (= 32 |#Ultimate.C_memset_#amount|))} {17072#true} #672#return; {17073#false} is VALID [2022-04-28 10:03:45,838 INFO L290 TraceCheckUtils]: 34: Hoare triple {17502#(not (= 32 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17502#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:45,839 INFO L290 TraceCheckUtils]: 33: Hoare triple {17509#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {17502#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:45,841 INFO L290 TraceCheckUtils]: 32: Hoare triple {17513#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17509#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,843 INFO L290 TraceCheckUtils]: 31: Hoare triple {17517#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17513#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,848 INFO L290 TraceCheckUtils]: 30: Hoare triple {17521#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17517#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,850 INFO L290 TraceCheckUtils]: 29: Hoare triple {17525#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17521#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,852 INFO L290 TraceCheckUtils]: 28: Hoare triple {17529#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17525#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,853 INFO L290 TraceCheckUtils]: 27: Hoare triple {17533#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17529#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,856 INFO L290 TraceCheckUtils]: 26: Hoare triple {17537#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17533#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,858 INFO L290 TraceCheckUtils]: 25: Hoare triple {17541#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17537#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,859 INFO L290 TraceCheckUtils]: 24: Hoare triple {17545#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17541#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,862 INFO L290 TraceCheckUtils]: 23: Hoare triple {17549#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17545#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,863 INFO L290 TraceCheckUtils]: 22: Hoare triple {17553#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17549#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,866 INFO L290 TraceCheckUtils]: 21: Hoare triple {17557#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17553#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,867 INFO L290 TraceCheckUtils]: 20: Hoare triple {17561#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17557#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,868 INFO L290 TraceCheckUtils]: 19: Hoare triple {17565#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17561#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,869 INFO L290 TraceCheckUtils]: 18: Hoare triple {17569#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17565#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 17: Hoare triple {17072#true} #t~loopctr188 := 0; {17569#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:45,870 INFO L272 TraceCheckUtils]: 16: Hoare triple {17072#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 15: Hoare triple {17072#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 14: Hoare triple {17072#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 13: Hoare triple {17072#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 12: Hoare triple {17072#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 11: Hoare triple {17072#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 10: Hoare triple {17072#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17072#true} is VALID [2022-04-28 10:03:45,870 INFO L290 TraceCheckUtils]: 9: Hoare triple {17072#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L290 TraceCheckUtils]: 8: Hoare triple {17072#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L290 TraceCheckUtils]: 7: Hoare triple {17072#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L272 TraceCheckUtils]: 6: Hoare triple {17072#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L290 TraceCheckUtils]: 5: Hoare triple {17072#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L272 TraceCheckUtils]: 4: Hoare triple {17072#true} call #t~ret187 := main(); {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17072#true} {17072#true} #682#return; {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L290 TraceCheckUtils]: 2: Hoare triple {17072#true} assume true; {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {17072#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17072#true} is VALID [2022-04-28 10:03:45,871 INFO L272 TraceCheckUtils]: 0: Hoare triple {17072#true} call ULTIMATE.init(); {17072#true} is VALID [2022-04-28 10:03:45,872 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2022-04-28 10:03:45,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [54850467] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:03:45,872 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:03:45,872 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 19] total 55 [2022-04-28 10:03:45,872 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:03:45,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1162569268] [2022-04-28 10:03:45,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1162569268] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:03:45,872 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:03:45,872 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2022-04-28 10:03:45,872 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790644081] [2022-04-28 10:03:45,872 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:03:45,873 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 76 [2022-04-28 10:03:45,873 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:03:45,873 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:03:45,954 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:03:45,955 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-28 10:03:45,955 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:03:45,955 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-28 10:03:45,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=681, Invalid=2289, Unknown=0, NotChecked=0, Total=2970 [2022-04-28 10:03:45,956 INFO L87 Difference]: Start difference. First operand 91 states and 113 transitions. Second operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:03:50,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:03:50,164 INFO L93 Difference]: Finished difference Result 170 states and 214 transitions. [2022-04-28 10:03:50,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-28 10:03:50,165 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 76 [2022-04-28 10:03:50,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:03:50,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:03:50,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 197 transitions. [2022-04-28 10:03:50,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:03:50,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 197 transitions. [2022-04-28 10:03:50,172 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 197 transitions. [2022-04-28 10:03:50,417 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 197 edges. 197 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:03:50,419 INFO L225 Difference]: With dead ends: 170 [2022-04-28 10:03:50,419 INFO L226 Difference]: Without dead ends: 96 [2022-04-28 10:03:50,420 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=1072, Invalid=4184, Unknown=0, NotChecked=0, Total=5256 [2022-04-28 10:03:50,421 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 609 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 670 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 609 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-28 10:03:50,421 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 670 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 609 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-28 10:03:50,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-04-28 10:03:50,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 92. [2022-04-28 10:03:50,473 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:03:50,473 INFO L82 GeneralOperation]: Start isEquivalent. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:03:50,473 INFO L74 IsIncluded]: Start isIncluded. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:03:50,473 INFO L87 Difference]: Start difference. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:03:50,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:03:50,476 INFO L93 Difference]: Finished difference Result 96 states and 120 transitions. [2022-04-28 10:03:50,476 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 120 transitions. [2022-04-28 10:03:50,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:03:50,476 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:03:50,476 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 96 states. [2022-04-28 10:03:50,477 INFO L87 Difference]: Start difference. First operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 96 states. [2022-04-28 10:03:50,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:03:50,480 INFO L93 Difference]: Finished difference Result 96 states and 120 transitions. [2022-04-28 10:03:50,480 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 120 transitions. [2022-04-28 10:03:50,480 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:03:50,480 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:03:50,480 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:03:50,480 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:03:50,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:03:50,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 114 transitions. [2022-04-28 10:03:50,483 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 114 transitions. Word has length 76 [2022-04-28 10:03:50,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:03:50,483 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 114 transitions. [2022-04-28 10:03:50,483 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:03:50,484 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 92 states and 114 transitions. [2022-04-28 10:03:50,745 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:03:50,746 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 114 transitions. [2022-04-28 10:03:50,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-04-28 10:03:50,746 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:03:50,746 INFO L195 NwaCegarLoop]: trace histogram [32, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:03:50,770 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-28 10:03:50,947 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-28 10:03:50,947 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:03:50,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:03:50,947 INFO L85 PathProgramCache]: Analyzing trace with hash 286385866, now seen corresponding path program 31 times [2022-04-28 10:03:50,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:03:50,947 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1648073226] [2022-04-28 10:03:50,948 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:03:50,948 INFO L85 PathProgramCache]: Analyzing trace with hash 286385866, now seen corresponding path program 32 times [2022-04-28 10:03:50,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:03:50,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075567704] [2022-04-28 10:03:50,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:03:50,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:03:51,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:03:51,070 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:03:51,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:03:51,079 INFO L290 TraceCheckUtils]: 0: Hoare triple {18421#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18376#true} is VALID [2022-04-28 10:03:51,079 INFO L290 TraceCheckUtils]: 1: Hoare triple {18376#true} assume true; {18376#true} is VALID [2022-04-28 10:03:51,079 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18376#true} {18376#true} #682#return; {18376#true} is VALID [2022-04-28 10:03:51,082 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:03:51,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:03:52,055 INFO L290 TraceCheckUtils]: 0: Hoare triple {18422#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18423#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:03:52,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {18423#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18424#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,064 INFO L290 TraceCheckUtils]: 2: Hoare triple {18424#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18425#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:03:52,067 INFO L290 TraceCheckUtils]: 3: Hoare triple {18425#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18426#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,071 INFO L290 TraceCheckUtils]: 4: Hoare triple {18426#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18427#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,076 INFO L290 TraceCheckUtils]: 5: Hoare triple {18427#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18428#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:03:52,080 INFO L290 TraceCheckUtils]: 6: Hoare triple {18428#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18429#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:03:52,084 INFO L290 TraceCheckUtils]: 7: Hoare triple {18429#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18430#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,088 INFO L290 TraceCheckUtils]: 8: Hoare triple {18430#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18431#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:03:52,092 INFO L290 TraceCheckUtils]: 9: Hoare triple {18431#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18432#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,095 INFO L290 TraceCheckUtils]: 10: Hoare triple {18432#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18433#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,100 INFO L290 TraceCheckUtils]: 11: Hoare triple {18433#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,104 INFO L290 TraceCheckUtils]: 12: Hoare triple {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18435#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,108 INFO L290 TraceCheckUtils]: 13: Hoare triple {18435#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18436#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:03:52,113 INFO L290 TraceCheckUtils]: 14: Hoare triple {18436#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18437#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:03:52,118 INFO L290 TraceCheckUtils]: 15: Hoare triple {18437#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18438#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,120 INFO L290 TraceCheckUtils]: 16: Hoare triple {18438#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18439#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:03:52,122 INFO L290 TraceCheckUtils]: 17: Hoare triple {18439#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,122 INFO L290 TraceCheckUtils]: 18: Hoare triple {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,123 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {18376#true} #672#return; {18377#false} is VALID [2022-04-28 10:03:52,123 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2022-04-28 10:03:52,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:03:52,144 INFO L290 TraceCheckUtils]: 0: Hoare triple {18422#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18376#true} is VALID [2022-04-28 10:03:52,144 INFO L290 TraceCheckUtils]: 1: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,144 INFO L290 TraceCheckUtils]: 2: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,144 INFO L290 TraceCheckUtils]: 3: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 4: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 5: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 6: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 7: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 8: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 9: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 10: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 11: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 12: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,145 INFO L290 TraceCheckUtils]: 13: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,146 INFO L290 TraceCheckUtils]: 14: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,146 INFO L290 TraceCheckUtils]: 15: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,146 INFO L290 TraceCheckUtils]: 16: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,146 INFO L290 TraceCheckUtils]: 17: Hoare triple {18376#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18376#true} is VALID [2022-04-28 10:03:52,146 INFO L290 TraceCheckUtils]: 18: Hoare triple {18376#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18376#true} is VALID [2022-04-28 10:03:52,146 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {18376#true} {18377#false} #656#return; {18377#false} is VALID [2022-04-28 10:03:52,147 INFO L272 TraceCheckUtils]: 0: Hoare triple {18376#true} call ULTIMATE.init(); {18421#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:03:52,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {18421#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {18376#true} assume true; {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18376#true} {18376#true} #682#return; {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L272 TraceCheckUtils]: 4: Hoare triple {18376#true} call #t~ret187 := main(); {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L290 TraceCheckUtils]: 5: Hoare triple {18376#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L272 TraceCheckUtils]: 6: Hoare triple {18376#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L290 TraceCheckUtils]: 7: Hoare triple {18376#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L290 TraceCheckUtils]: 8: Hoare triple {18376#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18376#true} is VALID [2022-04-28 10:03:52,148 INFO L290 TraceCheckUtils]: 9: Hoare triple {18376#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:52,149 INFO L290 TraceCheckUtils]: 10: Hoare triple {18376#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18376#true} is VALID [2022-04-28 10:03:52,149 INFO L290 TraceCheckUtils]: 11: Hoare triple {18376#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:52,149 INFO L290 TraceCheckUtils]: 12: Hoare triple {18376#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18376#true} is VALID [2022-04-28 10:03:52,149 INFO L290 TraceCheckUtils]: 13: Hoare triple {18376#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:52,149 INFO L290 TraceCheckUtils]: 14: Hoare triple {18376#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18376#true} is VALID [2022-04-28 10:03:52,149 INFO L290 TraceCheckUtils]: 15: Hoare triple {18376#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18376#true} is VALID [2022-04-28 10:03:52,150 INFO L272 TraceCheckUtils]: 16: Hoare triple {18376#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {18422#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:03:52,150 INFO L290 TraceCheckUtils]: 17: Hoare triple {18422#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18423#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:03:52,158 INFO L290 TraceCheckUtils]: 18: Hoare triple {18423#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18424#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,165 INFO L290 TraceCheckUtils]: 19: Hoare triple {18424#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18425#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:03:52,171 INFO L290 TraceCheckUtils]: 20: Hoare triple {18425#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18426#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,176 INFO L290 TraceCheckUtils]: 21: Hoare triple {18426#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18427#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,183 INFO L290 TraceCheckUtils]: 22: Hoare triple {18427#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18428#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:03:52,189 INFO L290 TraceCheckUtils]: 23: Hoare triple {18428#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18429#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:03:52,195 INFO L290 TraceCheckUtils]: 24: Hoare triple {18429#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18430#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,199 INFO L290 TraceCheckUtils]: 25: Hoare triple {18430#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18431#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:03:52,203 INFO L290 TraceCheckUtils]: 26: Hoare triple {18431#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18432#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,207 INFO L290 TraceCheckUtils]: 27: Hoare triple {18432#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18433#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,211 INFO L290 TraceCheckUtils]: 28: Hoare triple {18433#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,215 INFO L290 TraceCheckUtils]: 29: Hoare triple {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18435#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,219 INFO L290 TraceCheckUtils]: 30: Hoare triple {18435#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18436#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:03:52,223 INFO L290 TraceCheckUtils]: 31: Hoare triple {18436#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18437#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:03:52,226 INFO L290 TraceCheckUtils]: 32: Hoare triple {18437#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18438#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:52,229 INFO L290 TraceCheckUtils]: 33: Hoare triple {18438#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18439#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:03:52,230 INFO L290 TraceCheckUtils]: 34: Hoare triple {18439#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,230 INFO L290 TraceCheckUtils]: 35: Hoare triple {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:52,231 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18440#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 18446744073709551617 |#Ultimate.C_memset_#amount|))} {18376#true} #672#return; {18377#false} is VALID [2022-04-28 10:03:52,231 INFO L290 TraceCheckUtils]: 37: Hoare triple {18377#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18377#false} is VALID [2022-04-28 10:03:52,231 INFO L290 TraceCheckUtils]: 38: Hoare triple {18377#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 39: Hoare triple {18377#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 40: Hoare triple {18377#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 41: Hoare triple {18377#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 42: Hoare triple {18377#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 43: Hoare triple {18377#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 44: Hoare triple {18377#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 45: Hoare triple {18377#false} assume #t~short172; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 46: Hoare triple {18377#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 47: Hoare triple {18377#false} assume 0 != #t~mem173;havoc #t~mem173; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L272 TraceCheckUtils]: 48: Hoare triple {18377#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 49: Hoare triple {18377#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 50: Hoare triple {18377#false} assume !(~len <= 0); {18377#false} is VALID [2022-04-28 10:03:52,232 INFO L272 TraceCheckUtils]: 51: Hoare triple {18377#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18422#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 52: Hoare triple {18422#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18376#true} is VALID [2022-04-28 10:03:52,232 INFO L290 TraceCheckUtils]: 53: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 54: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 55: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 56: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 57: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 58: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 59: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 60: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 61: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 62: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 63: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 64: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 65: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 66: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 67: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,233 INFO L290 TraceCheckUtils]: 68: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 69: Hoare triple {18376#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18376#true} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 70: Hoare triple {18376#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18376#true} is VALID [2022-04-28 10:03:52,234 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18376#true} {18377#false} #656#return; {18377#false} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 72: Hoare triple {18377#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18377#false} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 73: Hoare triple {18377#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18377#false} is VALID [2022-04-28 10:03:52,234 INFO L272 TraceCheckUtils]: 74: Hoare triple {18377#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18377#false} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 75: Hoare triple {18377#false} ~cond := #in~cond; {18377#false} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 76: Hoare triple {18377#false} assume 0 == ~cond; {18377#false} is VALID [2022-04-28 10:03:52,234 INFO L290 TraceCheckUtils]: 77: Hoare triple {18377#false} assume !false; {18377#false} is VALID [2022-04-28 10:03:52,235 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 427 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2022-04-28 10:03:52,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:03:52,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075567704] [2022-04-28 10:03:52,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075567704] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:03:52,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [447434168] [2022-04-28 10:03:52,235 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 10:03:52,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:03:52,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:03:52,236 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:03:52,238 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-28 10:03:53,072 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 10:03:53,073 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:03:53,079 INFO L263 TraceCheckSpWp]: Trace formula consists of 905 conjuncts, 71 conjunts are in the unsatisfiable core [2022-04-28 10:03:53,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:03:53,099 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:03:54,208 INFO L272 TraceCheckUtils]: 0: Hoare triple {18376#true} call ULTIMATE.init(); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {18376#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 2: Hoare triple {18376#true} assume true; {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18376#true} {18376#true} #682#return; {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L272 TraceCheckUtils]: 4: Hoare triple {18376#true} call #t~ret187 := main(); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 5: Hoare triple {18376#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L272 TraceCheckUtils]: 6: Hoare triple {18376#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 7: Hoare triple {18376#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 8: Hoare triple {18376#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 9: Hoare triple {18376#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 10: Hoare triple {18376#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 11: Hoare triple {18376#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 12: Hoare triple {18376#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18376#true} is VALID [2022-04-28 10:03:54,209 INFO L290 TraceCheckUtils]: 13: Hoare triple {18376#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:54,210 INFO L290 TraceCheckUtils]: 14: Hoare triple {18376#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18376#true} is VALID [2022-04-28 10:03:54,210 INFO L290 TraceCheckUtils]: 15: Hoare triple {18376#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18376#true} is VALID [2022-04-28 10:03:54,210 INFO L272 TraceCheckUtils]: 16: Hoare triple {18376#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {18376#true} is VALID [2022-04-28 10:03:54,210 INFO L290 TraceCheckUtils]: 17: Hoare triple {18376#true} #t~loopctr188 := 0; {18423#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:03:54,214 INFO L290 TraceCheckUtils]: 18: Hoare triple {18423#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18498#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,216 INFO L290 TraceCheckUtils]: 19: Hoare triple {18498#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18502#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:03:54,218 INFO L290 TraceCheckUtils]: 20: Hoare triple {18502#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18506#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:03:54,220 INFO L290 TraceCheckUtils]: 21: Hoare triple {18506#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18510#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,222 INFO L290 TraceCheckUtils]: 22: Hoare triple {18510#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18514#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:03:54,224 INFO L290 TraceCheckUtils]: 23: Hoare triple {18514#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18518#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:03:54,226 INFO L290 TraceCheckUtils]: 24: Hoare triple {18518#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18522#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,228 INFO L290 TraceCheckUtils]: 25: Hoare triple {18522#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18526#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:03:54,230 INFO L290 TraceCheckUtils]: 26: Hoare triple {18526#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18530#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,231 INFO L290 TraceCheckUtils]: 27: Hoare triple {18530#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18534#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,233 INFO L290 TraceCheckUtils]: 28: Hoare triple {18534#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18538#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,235 INFO L290 TraceCheckUtils]: 29: Hoare triple {18538#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18542#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,237 INFO L290 TraceCheckUtils]: 30: Hoare triple {18542#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18546#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:03:54,239 INFO L290 TraceCheckUtils]: 31: Hoare triple {18546#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18550#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:03:54,241 INFO L290 TraceCheckUtils]: 32: Hoare triple {18550#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,243 INFO L290 TraceCheckUtils]: 33: Hoare triple {18554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18558#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:03:54,245 INFO L290 TraceCheckUtils]: 34: Hoare triple {18558#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18562#(< 0 (+ (div (+ 16 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} is VALID [2022-04-28 10:03:54,245 INFO L290 TraceCheckUtils]: 35: Hoare triple {18562#(< 0 (+ (div (+ 16 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18562#(< 0 (+ (div (+ 16 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} is VALID [2022-04-28 10:03:54,246 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18562#(< 0 (+ (div (+ 16 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} {18376#true} #672#return; {18377#false} is VALID [2022-04-28 10:03:54,246 INFO L290 TraceCheckUtils]: 37: Hoare triple {18377#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18377#false} is VALID [2022-04-28 10:03:54,246 INFO L290 TraceCheckUtils]: 38: Hoare triple {18377#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {18377#false} is VALID [2022-04-28 10:03:54,246 INFO L290 TraceCheckUtils]: 39: Hoare triple {18377#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18377#false} is VALID [2022-04-28 10:03:54,246 INFO L290 TraceCheckUtils]: 40: Hoare triple {18377#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18377#false} is VALID [2022-04-28 10:03:54,246 INFO L290 TraceCheckUtils]: 41: Hoare triple {18377#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18377#false} is VALID [2022-04-28 10:03:54,246 INFO L290 TraceCheckUtils]: 42: Hoare triple {18377#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 43: Hoare triple {18377#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 44: Hoare triple {18377#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 45: Hoare triple {18377#false} assume #t~short172; {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 46: Hoare triple {18377#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 47: Hoare triple {18377#false} assume 0 != #t~mem173;havoc #t~mem173; {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L272 TraceCheckUtils]: 48: Hoare triple {18377#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 49: Hoare triple {18377#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 50: Hoare triple {18377#false} assume !(~len <= 0); {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L272 TraceCheckUtils]: 51: Hoare triple {18377#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18377#false} is VALID [2022-04-28 10:03:54,247 INFO L290 TraceCheckUtils]: 52: Hoare triple {18377#false} #t~loopctr188 := 0; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 53: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 54: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 55: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 56: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 57: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 58: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 59: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 60: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 61: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,248 INFO L290 TraceCheckUtils]: 62: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 63: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 64: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 65: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 66: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 67: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 68: Hoare triple {18377#false} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 69: Hoare triple {18377#false} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L290 TraceCheckUtils]: 70: Hoare triple {18377#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18377#false} is VALID [2022-04-28 10:03:54,249 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18377#false} {18377#false} #656#return; {18377#false} is VALID [2022-04-28 10:03:54,250 INFO L290 TraceCheckUtils]: 72: Hoare triple {18377#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18377#false} is VALID [2022-04-28 10:03:54,250 INFO L290 TraceCheckUtils]: 73: Hoare triple {18377#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18377#false} is VALID [2022-04-28 10:03:54,250 INFO L272 TraceCheckUtils]: 74: Hoare triple {18377#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18377#false} is VALID [2022-04-28 10:03:54,250 INFO L290 TraceCheckUtils]: 75: Hoare triple {18377#false} ~cond := #in~cond; {18377#false} is VALID [2022-04-28 10:03:54,250 INFO L290 TraceCheckUtils]: 76: Hoare triple {18377#false} assume 0 == ~cond; {18377#false} is VALID [2022-04-28 10:03:54,250 INFO L290 TraceCheckUtils]: 77: Hoare triple {18377#false} assume !false; {18377#false} is VALID [2022-04-28 10:03:54,251 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 292 proven. 136 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2022-04-28 10:03:54,251 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:03:56,146 INFO L290 TraceCheckUtils]: 77: Hoare triple {18377#false} assume !false; {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 76: Hoare triple {18377#false} assume 0 == ~cond; {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 75: Hoare triple {18377#false} ~cond := #in~cond; {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L272 TraceCheckUtils]: 74: Hoare triple {18377#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 73: Hoare triple {18377#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 72: Hoare triple {18377#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18376#true} {18377#false} #656#return; {18377#false} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 70: Hoare triple {18376#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18376#true} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 69: Hoare triple {18376#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18376#true} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 68: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 67: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 66: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,147 INFO L290 TraceCheckUtils]: 65: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 64: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 63: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 62: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 61: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 60: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 59: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 58: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 57: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 56: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 55: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 54: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 53: Hoare triple {18376#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#true} is VALID [2022-04-28 10:03:56,148 INFO L290 TraceCheckUtils]: 52: Hoare triple {18376#true} #t~loopctr188 := 0; {18376#true} is VALID [2022-04-28 10:03:56,149 INFO L272 TraceCheckUtils]: 51: Hoare triple {18377#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18376#true} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 50: Hoare triple {18377#false} assume !(~len <= 0); {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 49: Hoare triple {18377#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L272 TraceCheckUtils]: 48: Hoare triple {18377#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 47: Hoare triple {18377#false} assume 0 != #t~mem173;havoc #t~mem173; {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 46: Hoare triple {18377#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 45: Hoare triple {18377#false} assume #t~short172; {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 44: Hoare triple {18377#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 43: Hoare triple {18377#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18377#false} is VALID [2022-04-28 10:03:56,149 INFO L290 TraceCheckUtils]: 42: Hoare triple {18377#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18377#false} is VALID [2022-04-28 10:03:56,150 INFO L290 TraceCheckUtils]: 41: Hoare triple {18377#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18377#false} is VALID [2022-04-28 10:03:56,150 INFO L290 TraceCheckUtils]: 40: Hoare triple {18377#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18377#false} is VALID [2022-04-28 10:03:56,150 INFO L290 TraceCheckUtils]: 39: Hoare triple {18377#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18377#false} is VALID [2022-04-28 10:03:56,150 INFO L290 TraceCheckUtils]: 38: Hoare triple {18377#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {18377#false} is VALID [2022-04-28 10:03:56,150 INFO L290 TraceCheckUtils]: 37: Hoare triple {18377#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18377#false} is VALID [2022-04-28 10:03:56,151 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18818#(not (= 32 |#Ultimate.C_memset_#amount|))} {18376#true} #672#return; {18377#false} is VALID [2022-04-28 10:03:56,152 INFO L290 TraceCheckUtils]: 35: Hoare triple {18818#(not (= 32 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18818#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:56,152 INFO L290 TraceCheckUtils]: 34: Hoare triple {18825#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {18818#(not (= 32 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:03:56,155 INFO L290 TraceCheckUtils]: 33: Hoare triple {18829#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18825#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,156 INFO L290 TraceCheckUtils]: 32: Hoare triple {18833#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18829#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,161 INFO L290 TraceCheckUtils]: 31: Hoare triple {18837#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18833#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,165 INFO L290 TraceCheckUtils]: 30: Hoare triple {18841#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18837#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,169 INFO L290 TraceCheckUtils]: 29: Hoare triple {18845#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18841#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,180 INFO L290 TraceCheckUtils]: 28: Hoare triple {18849#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18845#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,185 INFO L290 TraceCheckUtils]: 27: Hoare triple {18853#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18849#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,187 INFO L290 TraceCheckUtils]: 26: Hoare triple {18857#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18853#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,189 INFO L290 TraceCheckUtils]: 25: Hoare triple {18861#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18857#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,194 INFO L290 TraceCheckUtils]: 24: Hoare triple {18865#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18861#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,196 INFO L290 TraceCheckUtils]: 23: Hoare triple {18869#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18865#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,200 INFO L290 TraceCheckUtils]: 22: Hoare triple {18873#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18869#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,202 INFO L290 TraceCheckUtils]: 21: Hoare triple {18877#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18873#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,203 INFO L290 TraceCheckUtils]: 20: Hoare triple {18881#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18877#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,206 INFO L290 TraceCheckUtils]: 19: Hoare triple {18885#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18881#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,211 INFO L290 TraceCheckUtils]: 18: Hoare triple {18889#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18885#(or (not (= 32 |#Ultimate.C_memset_#amount|)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:03:56,211 INFO L290 TraceCheckUtils]: 17: Hoare triple {18376#true} #t~loopctr188 := 0; {18889#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= 32 |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:03:56,212 INFO L272 TraceCheckUtils]: 16: Hoare triple {18376#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 15: Hoare triple {18376#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 14: Hoare triple {18376#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 13: Hoare triple {18376#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 12: Hoare triple {18376#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 11: Hoare triple {18376#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 10: Hoare triple {18376#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 9: Hoare triple {18376#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 8: Hoare triple {18376#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 7: Hoare triple {18376#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L272 TraceCheckUtils]: 6: Hoare triple {18376#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L290 TraceCheckUtils]: 5: Hoare triple {18376#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L272 TraceCheckUtils]: 4: Hoare triple {18376#true} call #t~ret187 := main(); {18376#true} is VALID [2022-04-28 10:03:56,212 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18376#true} {18376#true} #682#return; {18376#true} is VALID [2022-04-28 10:03:56,213 INFO L290 TraceCheckUtils]: 2: Hoare triple {18376#true} assume true; {18376#true} is VALID [2022-04-28 10:03:56,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {18376#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18376#true} is VALID [2022-04-28 10:03:56,213 INFO L272 TraceCheckUtils]: 0: Hoare triple {18376#true} call ULTIMATE.init(); {18376#true} is VALID [2022-04-28 10:03:56,213 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 427 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2022-04-28 10:03:56,213 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [447434168] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:03:56,213 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:03:56,214 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20, 20] total 57 [2022-04-28 10:03:56,214 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:03:56,214 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1648073226] [2022-04-28 10:03:56,214 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1648073226] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:03:56,214 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:03:56,214 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2022-04-28 10:03:56,214 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1532206588] [2022-04-28 10:03:56,214 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:03:56,215 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 78 [2022-04-28 10:03:56,215 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:03:56,215 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:03:56,316 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:03:56,316 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-28 10:03:56,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:03:56,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-28 10:03:56,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=753, Invalid=2439, Unknown=0, NotChecked=0, Total=3192 [2022-04-28 10:03:56,317 INFO L87 Difference]: Start difference. First operand 92 states and 114 transitions. Second operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:03,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:04:03,406 INFO L93 Difference]: Finished difference Result 172 states and 216 transitions. [2022-04-28 10:04:03,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-28 10:04:03,407 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 78 [2022-04-28 10:04:03,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:04:03,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:03,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 198 transitions. [2022-04-28 10:04:03,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:03,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 198 transitions. [2022-04-28 10:04:03,412 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 198 transitions. [2022-04-28 10:04:03,701 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 198 edges. 198 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:04:03,703 INFO L225 Difference]: With dead ends: 172 [2022-04-28 10:04:03,703 INFO L226 Difference]: Without dead ends: 97 [2022-04-28 10:04:03,704 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 125 SyntacticMatches, 1 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 354 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=1184, Invalid=4516, Unknown=0, NotChecked=0, Total=5700 [2022-04-28 10:04:03,705 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 798 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 861 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 798 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-28 10:04:03,705 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 861 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 798 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-28 10:04:03,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-28 10:04:03,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 93. [2022-04-28 10:04:03,759 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:04:03,759 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:03,759 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:03,759 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:03,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:04:03,762 INFO L93 Difference]: Finished difference Result 97 states and 121 transitions. [2022-04-28 10:04:03,762 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 121 transitions. [2022-04-28 10:04:03,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:04:03,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:04:03,762 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 97 states. [2022-04-28 10:04:03,763 INFO L87 Difference]: Start difference. First operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 97 states. [2022-04-28 10:04:03,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:04:03,765 INFO L93 Difference]: Finished difference Result 97 states and 121 transitions. [2022-04-28 10:04:03,765 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 121 transitions. [2022-04-28 10:04:03,766 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:04:03,766 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:04:03,766 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:04:03,766 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:04:03,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:03,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 115 transitions. [2022-04-28 10:04:03,769 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 115 transitions. Word has length 78 [2022-04-28 10:04:03,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:04:03,769 INFO L495 AbstractCegarLoop]: Abstraction has 93 states and 115 transitions. [2022-04-28 10:04:03,769 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:03,770 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 93 states and 115 transitions. [2022-04-28 10:04:04,073 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:04:04,073 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 115 transitions. [2022-04-28 10:04:04,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-04-28 10:04:04,074 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:04:04,074 INFO L195 NwaCegarLoop]: trace histogram [34, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:04:04,104 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-28 10:04:04,281 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-28 10:04:04,281 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:04:04,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:04:04,282 INFO L85 PathProgramCache]: Analyzing trace with hash -55855904, now seen corresponding path program 33 times [2022-04-28 10:04:04,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:04:04,282 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [257960080] [2022-04-28 10:04:04,282 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:04:04,282 INFO L85 PathProgramCache]: Analyzing trace with hash -55855904, now seen corresponding path program 34 times [2022-04-28 10:04:04,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:04:04,282 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822805784] [2022-04-28 10:04:04,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:04:04,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:04:04,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:04,392 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:04:04,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:04,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {19753#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19706#true} is VALID [2022-04-28 10:04:04,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {19706#true} assume true; {19706#true} is VALID [2022-04-28 10:04:04,403 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19706#true} {19706#true} #682#return; {19706#true} is VALID [2022-04-28 10:04:04,405 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:04:04,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:05,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {19754#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19755#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:04:05,537 INFO L290 TraceCheckUtils]: 1: Hoare triple {19755#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19756#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,543 INFO L290 TraceCheckUtils]: 2: Hoare triple {19756#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19757#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:04:05,549 INFO L290 TraceCheckUtils]: 3: Hoare triple {19757#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19758#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:05,552 INFO L290 TraceCheckUtils]: 4: Hoare triple {19758#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19759#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:05,559 INFO L290 TraceCheckUtils]: 5: Hoare triple {19759#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19760#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:04:05,566 INFO L290 TraceCheckUtils]: 6: Hoare triple {19760#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19761#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:04:05,574 INFO L290 TraceCheckUtils]: 7: Hoare triple {19761#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19762#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:05,583 INFO L290 TraceCheckUtils]: 8: Hoare triple {19762#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19763#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:04:05,590 INFO L290 TraceCheckUtils]: 9: Hoare triple {19763#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19764#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,595 INFO L290 TraceCheckUtils]: 10: Hoare triple {19764#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19765#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,601 INFO L290 TraceCheckUtils]: 11: Hoare triple {19765#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,606 INFO L290 TraceCheckUtils]: 12: Hoare triple {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19767#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,612 INFO L290 TraceCheckUtils]: 13: Hoare triple {19767#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19768#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:04:05,617 INFO L290 TraceCheckUtils]: 14: Hoare triple {19768#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19769#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:04:05,626 INFO L290 TraceCheckUtils]: 15: Hoare triple {19769#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,634 INFO L290 TraceCheckUtils]: 16: Hoare triple {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19771#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,635 INFO L290 TraceCheckUtils]: 17: Hoare triple {19771#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19772#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 17) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:04:05,636 INFO L290 TraceCheckUtils]: 18: Hoare triple {19772#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 17) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 10:04:05,637 INFO L290 TraceCheckUtils]: 19: Hoare triple {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 10:04:05,638 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} {19706#true} #672#return; {19707#false} is VALID [2022-04-28 10:04:05,638 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-28 10:04:05,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:05,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {19754#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 3: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 4: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,659 INFO L290 TraceCheckUtils]: 8: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,660 INFO L290 TraceCheckUtils]: 10: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,669 INFO L290 TraceCheckUtils]: 11: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 12: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 13: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 14: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 15: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 16: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 18: Hoare triple {19706#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L290 TraceCheckUtils]: 19: Hoare triple {19706#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19706#true} is VALID [2022-04-28 10:04:05,670 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {19706#true} {19707#false} #656#return; {19707#false} is VALID [2022-04-28 10:04:05,672 INFO L272 TraceCheckUtils]: 0: Hoare triple {19706#true} call ULTIMATE.init(); {19753#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:04:05,672 INFO L290 TraceCheckUtils]: 1: Hoare triple {19753#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L290 TraceCheckUtils]: 2: Hoare triple {19706#true} assume true; {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19706#true} {19706#true} #682#return; {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L272 TraceCheckUtils]: 4: Hoare triple {19706#true} call #t~ret187 := main(); {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L290 TraceCheckUtils]: 5: Hoare triple {19706#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L272 TraceCheckUtils]: 6: Hoare triple {19706#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {19706#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19706#true} is VALID [2022-04-28 10:04:05,672 INFO L290 TraceCheckUtils]: 8: Hoare triple {19706#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 9: Hoare triple {19706#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 10: Hoare triple {19706#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {19706#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 12: Hoare triple {19706#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 13: Hoare triple {19706#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 14: Hoare triple {19706#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19706#true} is VALID [2022-04-28 10:04:05,673 INFO L290 TraceCheckUtils]: 15: Hoare triple {19706#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19706#true} is VALID [2022-04-28 10:04:05,674 INFO L272 TraceCheckUtils]: 16: Hoare triple {19706#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {19754#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:04:05,674 INFO L290 TraceCheckUtils]: 17: Hoare triple {19754#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19755#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:04:05,685 INFO L290 TraceCheckUtils]: 18: Hoare triple {19755#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19756#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,695 INFO L290 TraceCheckUtils]: 19: Hoare triple {19756#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19757#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:04:05,705 INFO L290 TraceCheckUtils]: 20: Hoare triple {19757#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19758#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:05,713 INFO L290 TraceCheckUtils]: 21: Hoare triple {19758#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19759#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:05,724 INFO L290 TraceCheckUtils]: 22: Hoare triple {19759#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19760#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:04:05,733 INFO L290 TraceCheckUtils]: 23: Hoare triple {19760#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19761#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:04:05,743 INFO L290 TraceCheckUtils]: 24: Hoare triple {19761#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19762#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:05,753 INFO L290 TraceCheckUtils]: 25: Hoare triple {19762#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19763#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:04:05,763 INFO L290 TraceCheckUtils]: 26: Hoare triple {19763#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19764#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,771 INFO L290 TraceCheckUtils]: 27: Hoare triple {19764#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19765#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,779 INFO L290 TraceCheckUtils]: 28: Hoare triple {19765#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,787 INFO L290 TraceCheckUtils]: 29: Hoare triple {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19767#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,795 INFO L290 TraceCheckUtils]: 30: Hoare triple {19767#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19768#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:04:05,804 INFO L290 TraceCheckUtils]: 31: Hoare triple {19768#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19769#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:04:05,813 INFO L290 TraceCheckUtils]: 32: Hoare triple {19769#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,820 INFO L290 TraceCheckUtils]: 33: Hoare triple {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19771#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:05,822 INFO L290 TraceCheckUtils]: 34: Hoare triple {19771#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19772#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 17) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} is VALID [2022-04-28 10:04:05,823 INFO L290 TraceCheckUtils]: 35: Hoare triple {19772#(and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 17) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 10:04:05,823 INFO L290 TraceCheckUtils]: 36: Hoare triple {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 10:04:05,824 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19773#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} {19706#true} #672#return; {19707#false} is VALID [2022-04-28 10:04:05,824 INFO L290 TraceCheckUtils]: 38: Hoare triple {19707#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19707#false} is VALID [2022-04-28 10:04:05,824 INFO L290 TraceCheckUtils]: 39: Hoare triple {19707#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {19707#false} is VALID [2022-04-28 10:04:05,824 INFO L290 TraceCheckUtils]: 40: Hoare triple {19707#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19707#false} is VALID [2022-04-28 10:04:05,824 INFO L290 TraceCheckUtils]: 41: Hoare triple {19707#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19707#false} is VALID [2022-04-28 10:04:05,824 INFO L290 TraceCheckUtils]: 42: Hoare triple {19707#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 43: Hoare triple {19707#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 44: Hoare triple {19707#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 45: Hoare triple {19707#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 46: Hoare triple {19707#false} assume #t~short172; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 47: Hoare triple {19707#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 48: Hoare triple {19707#false} assume 0 != #t~mem173;havoc #t~mem173; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L272 TraceCheckUtils]: 49: Hoare triple {19707#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 50: Hoare triple {19707#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 51: Hoare triple {19707#false} assume !(~len <= 0); {19707#false} is VALID [2022-04-28 10:04:05,825 INFO L272 TraceCheckUtils]: 52: Hoare triple {19707#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19754#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 53: Hoare triple {19754#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19706#true} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 54: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 55: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 56: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,825 INFO L290 TraceCheckUtils]: 57: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 58: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 59: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 60: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 61: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 62: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 63: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 64: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 65: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 66: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 67: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 68: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 69: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 70: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 71: Hoare triple {19706#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {19706#true} is VALID [2022-04-28 10:04:05,826 INFO L290 TraceCheckUtils]: 72: Hoare triple {19706#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19706#true} is VALID [2022-04-28 10:04:05,827 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19706#true} {19707#false} #656#return; {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L290 TraceCheckUtils]: 74: Hoare triple {19707#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L290 TraceCheckUtils]: 75: Hoare triple {19707#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L272 TraceCheckUtils]: 76: Hoare triple {19707#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L290 TraceCheckUtils]: 77: Hoare triple {19707#false} ~cond := #in~cond; {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L290 TraceCheckUtils]: 78: Hoare triple {19707#false} assume 0 == ~cond; {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L290 TraceCheckUtils]: 79: Hoare triple {19707#false} assume !false; {19707#false} is VALID [2022-04-28 10:04:05,827 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 479 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-28 10:04:05,827 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:04:05,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822805784] [2022-04-28 10:04:05,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1822805784] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:04:05,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [992013347] [2022-04-28 10:04:05,828 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 10:04:05,828 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:04:05,828 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:04:05,829 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:04:05,830 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-28 10:04:06,389 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 10:04:06,389 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 10:04:06,394 INFO L263 TraceCheckSpWp]: Trace formula consists of 919 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-28 10:04:06,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:06,414 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 10:04:07,795 INFO L272 TraceCheckUtils]: 0: Hoare triple {19706#true} call ULTIMATE.init(); {19706#true} is VALID [2022-04-28 10:04:07,795 INFO L290 TraceCheckUtils]: 1: Hoare triple {19706#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 2: Hoare triple {19706#true} assume true; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19706#true} {19706#true} #682#return; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L272 TraceCheckUtils]: 4: Hoare triple {19706#true} call #t~ret187 := main(); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 5: Hoare triple {19706#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L272 TraceCheckUtils]: 6: Hoare triple {19706#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 7: Hoare triple {19706#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 8: Hoare triple {19706#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 9: Hoare triple {19706#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 10: Hoare triple {19706#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 11: Hoare triple {19706#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 12: Hoare triple {19706#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 13: Hoare triple {19706#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 14: Hoare triple {19706#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19706#true} is VALID [2022-04-28 10:04:07,796 INFO L290 TraceCheckUtils]: 15: Hoare triple {19706#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L272 TraceCheckUtils]: 16: Hoare triple {19706#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#true} #t~loopctr188 := 0; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 18: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 19: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 20: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 21: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 22: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 23: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 24: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 25: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 26: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 27: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 28: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,797 INFO L290 TraceCheckUtils]: 29: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 30: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 31: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 32: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 33: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 34: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 35: Hoare triple {19706#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 36: Hoare triple {19706#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19706#true} {19706#true} #672#return; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 38: Hoare triple {19706#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 39: Hoare triple {19706#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 40: Hoare triple {19706#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 41: Hoare triple {19706#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 42: Hoare triple {19706#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#true} is VALID [2022-04-28 10:04:07,798 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#true} assume #t~short172; {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#true} assume 0 != #t~mem173;havoc #t~mem173; {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#true} assume !(~len <= 0); {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19706#true} is VALID [2022-04-28 10:04:07,799 INFO L290 TraceCheckUtils]: 53: Hoare triple {19706#true} #t~loopctr188 := 0; {19755#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:04:07,805 INFO L290 TraceCheckUtils]: 54: Hoare triple {19755#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19939#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,808 INFO L290 TraceCheckUtils]: 55: Hoare triple {19939#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19943#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:04:07,813 INFO L290 TraceCheckUtils]: 56: Hoare triple {19943#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19947#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 10:04:07,816 INFO L290 TraceCheckUtils]: 57: Hoare triple {19947#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19951#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,820 INFO L290 TraceCheckUtils]: 58: Hoare triple {19951#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19955#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:04:07,824 INFO L290 TraceCheckUtils]: 59: Hoare triple {19955#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19959#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:04:07,827 INFO L290 TraceCheckUtils]: 60: Hoare triple {19959#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19963#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,831 INFO L290 TraceCheckUtils]: 61: Hoare triple {19963#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19967#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:04:07,836 INFO L290 TraceCheckUtils]: 62: Hoare triple {19967#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19971#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,839 INFO L290 TraceCheckUtils]: 63: Hoare triple {19971#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19975#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,842 INFO L290 TraceCheckUtils]: 64: Hoare triple {19975#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19979#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,845 INFO L290 TraceCheckUtils]: 65: Hoare triple {19979#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19983#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,850 INFO L290 TraceCheckUtils]: 66: Hoare triple {19983#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19987#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:04:07,856 INFO L290 TraceCheckUtils]: 67: Hoare triple {19987#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19991#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:04:07,860 INFO L290 TraceCheckUtils]: 68: Hoare triple {19991#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19995#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,863 INFO L290 TraceCheckUtils]: 69: Hoare triple {19995#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:07,868 INFO L290 TraceCheckUtils]: 70: Hoare triple {19999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20003#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-28 10:04:07,869 INFO L290 TraceCheckUtils]: 71: Hoare triple {20003#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {20007#(< 0 (+ (div (+ 17 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} is VALID [2022-04-28 10:04:07,870 INFO L290 TraceCheckUtils]: 72: Hoare triple {20007#(< 0 (+ (div (+ 17 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {20007#(< 0 (+ (div (+ 17 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} is VALID [2022-04-28 10:04:07,871 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {20007#(< 0 (+ (div (+ 17 (* (- 1) (mod |#Ultimate.C_memset_#amount| 18446744073709551616))) 18446744073709551616) 1))} {19706#true} #656#return; {19707#false} is VALID [2022-04-28 10:04:07,871 INFO L290 TraceCheckUtils]: 74: Hoare triple {19707#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19707#false} is VALID [2022-04-28 10:04:07,871 INFO L290 TraceCheckUtils]: 75: Hoare triple {19707#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19707#false} is VALID [2022-04-28 10:04:07,871 INFO L272 TraceCheckUtils]: 76: Hoare triple {19707#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19707#false} is VALID [2022-04-28 10:04:07,871 INFO L290 TraceCheckUtils]: 77: Hoare triple {19707#false} ~cond := #in~cond; {19707#false} is VALID [2022-04-28 10:04:07,871 INFO L290 TraceCheckUtils]: 78: Hoare triple {19707#false} assume 0 == ~cond; {19707#false} is VALID [2022-04-28 10:04:07,871 INFO L290 TraceCheckUtils]: 79: Hoare triple {19707#false} assume !false; {19707#false} is VALID [2022-04-28 10:04:07,872 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 326 proven. 153 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-28 10:04:07,872 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 10:04:09,922 INFO L290 TraceCheckUtils]: 79: Hoare triple {19707#false} assume !false; {19707#false} is VALID [2022-04-28 10:04:09,922 INFO L290 TraceCheckUtils]: 78: Hoare triple {19707#false} assume 0 == ~cond; {19707#false} is VALID [2022-04-28 10:04:09,922 INFO L290 TraceCheckUtils]: 77: Hoare triple {19707#false} ~cond := #in~cond; {19707#false} is VALID [2022-04-28 10:04:09,922 INFO L272 TraceCheckUtils]: 76: Hoare triple {19707#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19707#false} is VALID [2022-04-28 10:04:09,923 INFO L290 TraceCheckUtils]: 75: Hoare triple {19707#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19707#false} is VALID [2022-04-28 10:04:09,923 INFO L290 TraceCheckUtils]: 74: Hoare triple {19707#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19707#false} is VALID [2022-04-28 10:04:09,923 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {20053#(not (= |#Ultimate.C_memset_#amount| 80))} {19706#true} #656#return; {19707#false} is VALID [2022-04-28 10:04:09,924 INFO L290 TraceCheckUtils]: 72: Hoare triple {20053#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {20053#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:04:09,924 INFO L290 TraceCheckUtils]: 71: Hoare triple {20060#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {20053#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 10:04:09,932 INFO L290 TraceCheckUtils]: 70: Hoare triple {20064#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20060#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:09,939 INFO L290 TraceCheckUtils]: 69: Hoare triple {20068#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20064#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,944 INFO L290 TraceCheckUtils]: 68: Hoare triple {20072#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20068#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,949 INFO L290 TraceCheckUtils]: 67: Hoare triple {20076#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20072#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,951 INFO L290 TraceCheckUtils]: 66: Hoare triple {20080#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20076#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,953 INFO L290 TraceCheckUtils]: 65: Hoare triple {20084#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20080#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,957 INFO L290 TraceCheckUtils]: 64: Hoare triple {20088#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20084#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,960 INFO L290 TraceCheckUtils]: 63: Hoare triple {20092#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20088#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:09,967 INFO L290 TraceCheckUtils]: 62: Hoare triple {20096#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20092#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,974 INFO L290 TraceCheckUtils]: 61: Hoare triple {20100#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20096#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:09,981 INFO L290 TraceCheckUtils]: 60: Hoare triple {20104#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20100#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:09,986 INFO L290 TraceCheckUtils]: 59: Hoare triple {20108#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20104#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:09,990 INFO L290 TraceCheckUtils]: 58: Hoare triple {20112#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20108#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,994 INFO L290 TraceCheckUtils]: 57: Hoare triple {20116#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20112#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:09,996 INFO L290 TraceCheckUtils]: 56: Hoare triple {20120#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20116#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:10,001 INFO L290 TraceCheckUtils]: 55: Hoare triple {20124#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20120#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:10,003 INFO L290 TraceCheckUtils]: 54: Hoare triple {20128#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 17) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20124#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 10:04:10,003 INFO L290 TraceCheckUtils]: 53: Hoare triple {19706#true} #t~loopctr188 := 0; {20128#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 17) 18446744073709551616) (mod |#Ultimate.C_memset_#amount| 18446744073709551616)))} is VALID [2022-04-28 10:04:10,003 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#true} assume !(~len <= 0); {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#true} assume 0 != #t~mem173;havoc #t~mem173; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#true} assume #t~short172; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 42: Hoare triple {19706#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 41: Hoare triple {19706#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 40: Hoare triple {19706#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 39: Hoare triple {19706#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L290 TraceCheckUtils]: 38: Hoare triple {19706#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19706#true} is VALID [2022-04-28 10:04:10,004 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19706#true} {19706#true} #672#return; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 36: Hoare triple {19706#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 35: Hoare triple {19706#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 34: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 33: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 32: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 31: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 30: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 29: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 28: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 27: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 26: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 25: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 24: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 23: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,005 INFO L290 TraceCheckUtils]: 22: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 21: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 20: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 19: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 18: Hoare triple {19706#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#true} #t~loopctr188 := 0; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L272 TraceCheckUtils]: 16: Hoare triple {19706#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 15: Hoare triple {19706#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 14: Hoare triple {19706#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 13: Hoare triple {19706#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 12: Hoare triple {19706#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 11: Hoare triple {19706#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 10: Hoare triple {19706#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 9: Hoare triple {19706#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 8: Hoare triple {19706#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19706#true} is VALID [2022-04-28 10:04:10,006 INFO L290 TraceCheckUtils]: 7: Hoare triple {19706#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L272 TraceCheckUtils]: 6: Hoare triple {19706#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {19706#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L272 TraceCheckUtils]: 4: Hoare triple {19706#true} call #t~ret187 := main(); {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19706#true} {19706#true} #682#return; {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {19706#true} assume true; {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {19706#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L272 TraceCheckUtils]: 0: Hoare triple {19706#true} call ULTIMATE.init(); {19706#true} is VALID [2022-04-28 10:04:10,007 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 326 proven. 153 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-28 10:04:10,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [992013347] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 10:04:10,008 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 10:04:10,008 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 21, 21] total 60 [2022-04-28 10:04:10,008 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 10:04:10,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [257960080] [2022-04-28 10:04:10,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [257960080] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 10:04:10,008 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 10:04:10,008 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-04-28 10:04:10,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446976893] [2022-04-28 10:04:10,008 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 10:04:10,009 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 80 [2022-04-28 10:04:10,009 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 10:04:10,009 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:10,103 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:04:10,103 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-28 10:04:10,103 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 10:04:10,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-28 10:04:10,104 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=835, Invalid=2705, Unknown=0, NotChecked=0, Total=3540 [2022-04-28 10:04:10,105 INFO L87 Difference]: Start difference. First operand 93 states and 115 transitions. Second operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:20,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:04:20,571 INFO L93 Difference]: Finished difference Result 174 states and 218 transitions. [2022-04-28 10:04:20,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-28 10:04:20,571 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 80 [2022-04-28 10:04:20,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 10:04:20,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:20,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 199 transitions. [2022-04-28 10:04:20,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:20,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 199 transitions. [2022-04-28 10:04:20,578 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 199 transitions. [2022-04-28 10:04:20,876 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:04:20,878 INFO L225 Difference]: With dead ends: 174 [2022-04-28 10:04:20,878 INFO L226 Difference]: Without dead ends: 98 [2022-04-28 10:04:20,879 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 127 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=1310, Invalid=5010, Unknown=0, NotChecked=0, Total=6320 [2022-04-28 10:04:20,880 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 315 mSDsCounter, 0 mSdLazyCounter, 1836 mSolverCounterSat, 65 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 398 SdHoareTripleChecker+Invalid, 1901 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 65 IncrementalHoareTripleChecker+Valid, 1836 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-28 10:04:20,880 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 398 Invalid, 1901 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [65 Valid, 1836 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-28 10:04:20,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-28 10:04:20,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2022-04-28 10:04:20,935 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 10:04:20,936 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:20,936 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:20,936 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:20,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:04:20,938 INFO L93 Difference]: Finished difference Result 98 states and 122 transitions. [2022-04-28 10:04:20,938 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 122 transitions. [2022-04-28 10:04:20,939 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:04:20,939 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:04:20,939 INFO L74 IsIncluded]: Start isIncluded. First operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 98 states. [2022-04-28 10:04:20,939 INFO L87 Difference]: Start difference. First operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 98 states. [2022-04-28 10:04:20,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 10:04:20,942 INFO L93 Difference]: Finished difference Result 98 states and 122 transitions. [2022-04-28 10:04:20,942 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 122 transitions. [2022-04-28 10:04:20,942 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 10:04:20,943 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 10:04:20,943 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 10:04:20,943 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 10:04:20,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 10:04:20,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 116 transitions. [2022-04-28 10:04:20,946 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 116 transitions. Word has length 80 [2022-04-28 10:04:20,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 10:04:20,946 INFO L495 AbstractCegarLoop]: Abstraction has 94 states and 116 transitions. [2022-04-28 10:04:20,947 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 10:04:20,947 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 94 states and 116 transitions. [2022-04-28 10:04:21,203 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 116 edges. 116 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 10:04:21,204 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 116 transitions. [2022-04-28 10:04:21,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-04-28 10:04:21,204 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 10:04:21,204 INFO L195 NwaCegarLoop]: trace histogram [36, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 10:04:21,226 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-28 10:04:21,407 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:04:21,407 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 10:04:21,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 10:04:21,408 INFO L85 PathProgramCache]: Analyzing trace with hash 963477386, now seen corresponding path program 35 times [2022-04-28 10:04:21,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 10:04:21,408 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [697667245] [2022-04-28 10:04:21,408 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 10:04:21,408 INFO L85 PathProgramCache]: Analyzing trace with hash 963477386, now seen corresponding path program 36 times [2022-04-28 10:04:21,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 10:04:21,408 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491562347] [2022-04-28 10:04:21,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 10:04:21,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 10:04:21,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:21,518 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 10:04:21,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:21,526 INFO L290 TraceCheckUtils]: 0: Hoare triple {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {21063#true} is VALID [2022-04-28 10:04:21,526 INFO L290 TraceCheckUtils]: 1: Hoare triple {21063#true} assume true; {21063#true} is VALID [2022-04-28 10:04:21,527 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21063#true} {21063#true} #682#return; {21063#true} is VALID [2022-04-28 10:04:21,529 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 10:04:21,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:22,761 INFO L290 TraceCheckUtils]: 0: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:04:22,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,775 INFO L290 TraceCheckUtils]: 2: Hoare triple {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:04:22,779 INFO L290 TraceCheckUtils]: 3: Hoare triple {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:22,783 INFO L290 TraceCheckUtils]: 4: Hoare triple {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:22,789 INFO L290 TraceCheckUtils]: 5: Hoare triple {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:04:22,795 INFO L290 TraceCheckUtils]: 6: Hoare triple {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:04:22,801 INFO L290 TraceCheckUtils]: 7: Hoare triple {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:22,806 INFO L290 TraceCheckUtils]: 8: Hoare triple {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:04:22,812 INFO L290 TraceCheckUtils]: 9: Hoare triple {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21123#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,815 INFO L290 TraceCheckUtils]: 10: Hoare triple {21123#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21124#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,821 INFO L290 TraceCheckUtils]: 11: Hoare triple {21124#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,828 INFO L290 TraceCheckUtils]: 12: Hoare triple {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,833 INFO L290 TraceCheckUtils]: 13: Hoare triple {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:04:22,838 INFO L290 TraceCheckUtils]: 14: Hoare triple {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21128#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:04:22,843 INFO L290 TraceCheckUtils]: 15: Hoare triple {21128#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,850 INFO L290 TraceCheckUtils]: 16: Hoare triple {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,856 INFO L290 TraceCheckUtils]: 17: Hoare triple {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-28 10:04:22,860 INFO L290 TraceCheckUtils]: 18: Hoare triple {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:04:22,863 INFO L290 TraceCheckUtils]: 19: Hoare triple {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 10:04:22,863 INFO L290 TraceCheckUtils]: 20: Hoare triple {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 10:04:22,864 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} {21063#true} #672#return; {21064#false} is VALID [2022-04-28 10:04:22,864 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-04-28 10:04:22,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 10:04:22,884 INFO L290 TraceCheckUtils]: 0: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 1: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 2: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 3: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 4: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 5: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 6: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 7: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 8: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,885 INFO L290 TraceCheckUtils]: 9: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 10: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 11: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 12: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 14: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 15: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 16: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 17: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 18: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:22,886 INFO L290 TraceCheckUtils]: 19: Hoare triple {21063#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {21063#true} is VALID [2022-04-28 10:04:22,887 INFO L290 TraceCheckUtils]: 20: Hoare triple {21063#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21063#true} is VALID [2022-04-28 10:04:22,887 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {21063#true} {21064#false} #656#return; {21064#false} is VALID [2022-04-28 10:04:22,887 INFO L272 TraceCheckUtils]: 0: Hoare triple {21063#true} call ULTIMATE.init(); {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 10:04:22,887 INFO L290 TraceCheckUtils]: 1: Hoare triple {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {21063#true} assume true; {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21063#true} {21063#true} #682#return; {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {21063#true} call #t~ret187 := main(); {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {21063#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(88);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L272 TraceCheckUtils]: 6: Hoare triple {21063#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 8, ~#opts~0.base, ~#opts~0.offset); {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 7: Hoare triple {21063#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(32);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 8: Hoare triple {21063#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 9: Hoare triple {21063#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 10: Hoare triple {21063#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 11: Hoare triple {21063#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {21063#true} is VALID [2022-04-28 10:04:22,888 INFO L290 TraceCheckUtils]: 12: Hoare triple {21063#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {21063#true} is VALID [2022-04-28 10:04:22,889 INFO L290 TraceCheckUtils]: 13: Hoare triple {21063#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {21063#true} is VALID [2022-04-28 10:04:22,889 INFO L290 TraceCheckUtils]: 14: Hoare triple {21063#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {21063#true} is VALID [2022-04-28 10:04:22,889 INFO L290 TraceCheckUtils]: 15: Hoare triple {21063#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {21063#true} is VALID [2022-04-28 10:04:22,889 INFO L272 TraceCheckUtils]: 16: Hoare triple {21063#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 32); {21113#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:04:22,890 INFO L290 TraceCheckUtils]: 17: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 10:04:22,901 INFO L290 TraceCheckUtils]: 18: Hoare triple {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,910 INFO L290 TraceCheckUtils]: 19: Hoare triple {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 10:04:22,918 INFO L290 TraceCheckUtils]: 20: Hoare triple {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:22,923 INFO L290 TraceCheckUtils]: 21: Hoare triple {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:22,927 INFO L290 TraceCheckUtils]: 22: Hoare triple {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 10:04:22,933 INFO L290 TraceCheckUtils]: 23: Hoare triple {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 10:04:22,938 INFO L290 TraceCheckUtils]: 24: Hoare triple {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 10:04:22,944 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 10:04:22,949 INFO L290 TraceCheckUtils]: 26: Hoare triple {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21123#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,953 INFO L290 TraceCheckUtils]: 27: Hoare triple {21123#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21124#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,958 INFO L290 TraceCheckUtils]: 28: Hoare triple {21124#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,963 INFO L290 TraceCheckUtils]: 29: Hoare triple {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,968 INFO L290 TraceCheckUtils]: 30: Hoare triple {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 10:04:22,973 INFO L290 TraceCheckUtils]: 31: Hoare triple {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21128#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 10:04:22,979 INFO L290 TraceCheckUtils]: 32: Hoare triple {21128#(and (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,985 INFO L290 TraceCheckUtils]: 33: Hoare triple {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 10:04:22,991 INFO L290 TraceCheckUtils]: 34: Hoare triple {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-28 10:04:22,996 INFO L290 TraceCheckUtils]: 35: Hoare triple {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} is VALID [2022-04-28 10:04:22,998 INFO L290 TraceCheckUtils]: 36: Hoare triple {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616)))) (or (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616) 1) 0)) (<= (+ (* 18446744073709551616 (div |#Ultimate.C_memset_#amount| 18446744073709551616)) 1) |#Ultimate.C_memset_#amount|)) (<= (div |#Ultimate.C_memset_#amount| 18446744073709551616) (div |#Ultimate.C_memset_#t~loopctr188| 18446744073709551616))))} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 10:04:22,998 INFO L290 TraceCheckUtils]: 37: Hoare triple {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 10:04:22,999 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {21133#(or (<= 18446744073709551617 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} {21063#true} #672#return; {21064#false} is VALID [2022-04-28 10:04:22,999 INFO L290 TraceCheckUtils]: 39: Hoare triple {21064#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {21064#false} is VALID [2022-04-28 10:04:22,999 INFO L290 TraceCheckUtils]: 40: Hoare triple {21064#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 28 + ~#smp_rr~0.offset, 4); {21064#false} is VALID [2022-04-28 10:04:22,999 INFO L290 TraceCheckUtils]: 41: Hoare triple {21064#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {21064#false} is VALID [2022-04-28 10:04:22,999 INFO L290 TraceCheckUtils]: 42: Hoare triple {21064#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 24 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {21064#false} is VALID [2022-04-28 10:04:22,999 INFO L290 TraceCheckUtils]: 43: Hoare triple {21064#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {21064#false} is VALID [2022-04-28 10:04:22,999 INFO L290 TraceCheckUtils]: 44: Hoare triple {21064#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 45: Hoare triple {21064#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 46: Hoare triple {21064#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 47: Hoare triple {21064#false} assume #t~short172; {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 48: Hoare triple {21064#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 49: Hoare triple {21064#false} assume 0 != #t~mem173;havoc #t~mem173; {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L272 TraceCheckUtils]: 50: Hoare triple {21064#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 51: Hoare triple {21064#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 52: Hoare triple {21064#false} assume !(~len <= 0); {21064#false} is VALID [2022-04-28 10:04:23,000 INFO L272 TraceCheckUtils]: 53: Hoare triple {21064#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {21113#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 54: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21063#true} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 55: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 56: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 57: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 58: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,000 INFO L290 TraceCheckUtils]: 59: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 60: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 61: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 62: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 63: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 64: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 65: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 66: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 67: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 68: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 69: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 70: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 71: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 72: Hoare triple {21063#true} assume #t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 73: Hoare triple {21063#true} assume !(#t~loopctr188 % 18446744073709551616 < #amount % 18446744073709551616); {21063#true} is VALID [2022-04-28 10:04:23,001 INFO L290 TraceCheckUtils]: 74: Hoare triple {21063#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21063#true} is VALID [2022-04-28 10:04:23,002 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {21063#true} {21064#false} #656#return; {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L290 TraceCheckUtils]: 76: Hoare triple {21064#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L290 TraceCheckUtils]: 77: Hoare triple {21064#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L272 TraceCheckUtils]: 78: Hoare triple {21064#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L290 TraceCheckUtils]: 79: Hoare triple {21064#false} ~cond := #in~cond; {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L290 TraceCheckUtils]: 80: Hoare triple {21064#false} assume 0 == ~cond; {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L290 TraceCheckUtils]: 81: Hoare triple {21064#false} assume !false; {21064#false} is VALID [2022-04-28 10:04:23,002 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 0 proven. 534 refuted. 0 times theorem prover too weak. 172 trivial. 0 not checked. [2022-04-28 10:04:23,002 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 10:04:23,003 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491562347] [2022-04-28 10:04:23,003 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491562347] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 10:04:23,003 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [114365637] [2022-04-28 10:04:23,003 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 10:04:23,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 10:04:23,003 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 10:04:23,004 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 10:04:23,007 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process