/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-acceleration/array_1-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:00:19,954 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:00:19,956 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:00:20,004 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 16:00:20,005 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 16:00:20,006 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 16:00:20,010 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 16:00:20,012 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 16:00:20,014 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 16:00:20,019 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 16:00:20,020 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 16:00:20,021 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 16:00:20,021 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:00:20,023 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:00:20,024 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:00:20,027 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:00:20,028 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:00:20,028 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:00:20,031 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:00:20,037 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:00:20,040 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:00:20,042 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:00:20,042 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:00:20,043 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:00:20,045 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:00:20,051 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 16:00:20,059 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:00:20,060 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:00:20,061 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:00:20,062 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:00:20,073 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:00:20,074 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:00:20,076 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:00:20,076 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:00:20,076 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:00:20,076 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:00:20,076 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:00:20,077 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:00:20,077 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:00:20,077 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:00:20,078 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:00:20,078 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:00:20,079 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:00:20,079 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:00:20,079 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:00:20,080 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:00:20,081 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:00:20,323 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:00:20,342 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:00:20,344 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:00:20,345 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:00:20,346 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:00:20,347 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/array_1-2.c [2022-04-27 16:00:20,417 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d161a84f0/b02dd85a1fdd43dfbc6842bdc83c37da/FLAG5838d3039 [2022-04-27 16:00:20,787 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:00:20,787 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/array_1-2.c [2022-04-27 16:00:20,792 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d161a84f0/b02dd85a1fdd43dfbc6842bdc83c37da/FLAG5838d3039 [2022-04-27 16:00:20,817 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d161a84f0/b02dd85a1fdd43dfbc6842bdc83c37da [2022-04-27 16:00:20,819 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:00:20,820 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:00:20,823 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:00:20,824 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:00:20,827 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:00:20,829 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:00:20" (1/1) ... [2022-04-27 16:00:20,830 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@766b9d54 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:20, skipping insertion in model container [2022-04-27 16:00:20,830 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:00:20" (1/1) ... [2022-04-27 16:00:20,837 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:00:20,849 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:00:20,964 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/array_1-2.c[321,334] [2022-04-27 16:00:20,999 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:00:21,010 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:00:21,020 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/array_1-2.c[321,334] [2022-04-27 16:00:21,024 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:00:21,036 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:00:21,036 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21 WrapperNode [2022-04-27 16:00:21,037 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:00:21,038 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:00:21,038 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:00:21,038 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:00:21,048 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,048 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,054 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,054 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,068 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,074 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,081 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,083 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:00:21,085 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:00:21,086 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:00:21,086 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:00:21,087 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,097 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:00:21,108 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:00:21,125 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:00:21,150 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:00:21,172 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:00:21,173 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:00:21,173 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:00:21,173 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:00:21,174 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:00:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:00:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:00:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:00:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:00:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:00:21,174 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:00:21,175 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-27 16:00:21,175 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:00:21,175 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:00:21,176 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:00:21,176 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:00:21,177 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:00:21,177 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:00:21,238 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:00:21,239 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:00:21,341 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:00:21,347 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:00:21,348 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 16:00:21,349 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:00:21 BoogieIcfgContainer [2022-04-27 16:00:21,350 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:00:21,350 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:00:21,350 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:00:21,351 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:00:21,354 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:00:21" (1/1) ... [2022-04-27 16:00:21,357 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:00:21,377 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:00:21 BasicIcfg [2022-04-27 16:00:21,377 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:00:21,378 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:00:21,379 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:00:21,381 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:00:21,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:00:20" (1/4) ... [2022-04-27 16:00:21,383 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64084ae0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:00:21, skipping insertion in model container [2022-04-27 16:00:21,383 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:00:21" (2/4) ... [2022-04-27 16:00:21,383 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64084ae0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:00:21, skipping insertion in model container [2022-04-27 16:00:21,383 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:00:21" (3/4) ... [2022-04-27 16:00:21,383 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64084ae0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:00:21, skipping insertion in model container [2022-04-27 16:00:21,384 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:00:21" (4/4) ... [2022-04-27 16:00:21,385 INFO L111 eAbstractionObserver]: Analyzing ICFG array_1-2.cJordan [2022-04-27 16:00:21,398 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:00:21,398 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:00:21,436 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:00:21,442 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2144ab71, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@391af5f7 [2022-04-27 16:00:21,443 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:00:21,455 INFO L276 IsEmpty]: Start isEmpty. Operand has 21 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:00:21,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-27 16:00:21,462 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:00:21,462 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:00:21,464 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:00:21,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:00:21,472 INFO L85 PathProgramCache]: Analyzing trace with hash -737742564, now seen corresponding path program 1 times [2022-04-27 16:00:21,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:00:21,482 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250373205] [2022-04-27 16:00:21,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:00:21,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:00:21,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:21,617 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:00:21,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:21,635 INFO L290 TraceCheckUtils]: 0: Hoare triple {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24#true} is VALID [2022-04-27 16:00:21,635 INFO L290 TraceCheckUtils]: 1: Hoare triple {24#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 16:00:21,636 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24#true} {24#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 16:00:21,638 INFO L272 TraceCheckUtils]: 0: Hoare triple {24#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:00:21,638 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24#true} is VALID [2022-04-27 16:00:21,639 INFO L290 TraceCheckUtils]: 2: Hoare triple {24#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 16:00:21,639 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24#true} {24#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 16:00:21,639 INFO L272 TraceCheckUtils]: 4: Hoare triple {24#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 16:00:21,640 INFO L290 TraceCheckUtils]: 5: Hoare triple {24#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {24#true} is VALID [2022-04-27 16:00:21,641 INFO L290 TraceCheckUtils]: 6: Hoare triple {24#true} [48] L16-3-->L16-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 16:00:21,641 INFO L290 TraceCheckUtils]: 7: Hoare triple {25#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {25#false} is VALID [2022-04-27 16:00:21,641 INFO L272 TraceCheckUtils]: 8: Hoare triple {25#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {25#false} is VALID [2022-04-27 16:00:21,642 INFO L290 TraceCheckUtils]: 9: Hoare triple {25#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25#false} is VALID [2022-04-27 16:00:21,642 INFO L290 TraceCheckUtils]: 10: Hoare triple {25#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 16:00:21,642 INFO L290 TraceCheckUtils]: 11: Hoare triple {25#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 16:00:21,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:21,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:00:21,643 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250373205] [2022-04-27 16:00:21,644 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [250373205] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:00:21,644 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:00:21,644 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:00:21,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846111809] [2022-04-27 16:00:21,646 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:00:21,651 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 16:00:21,653 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:00:21,656 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,675 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:21,675 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:00:21,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:00:21,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:00:21,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:00:21,711 INFO L87 Difference]: Start difference. First operand has 21 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:21,813 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-27 16:00:21,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:00:21,813 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 16:00:21,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:00:21,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 23 transitions. [2022-04-27 16:00:21,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 23 transitions. [2022-04-27 16:00:21,827 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 23 transitions. [2022-04-27 16:00:21,888 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:21,894 INFO L225 Difference]: With dead ends: 21 [2022-04-27 16:00:21,895 INFO L226 Difference]: Without dead ends: 14 [2022-04-27 16:00:21,896 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:00:21,900 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 12 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:00:21,901 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 23 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:00:21,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-04-27 16:00:21,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2022-04-27 16:00:21,927 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:00:21,930 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,932 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,932 INFO L87 Difference]: Start difference. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:21,938 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2022-04-27 16:00:21,938 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2022-04-27 16:00:21,938 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:21,938 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:21,939 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-27 16:00:21,939 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-27 16:00:21,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:21,945 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2022-04-27 16:00:21,945 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2022-04-27 16:00:21,945 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:21,946 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:21,946 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:00:21,946 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:00:21,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2022-04-27 16:00:21,950 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 12 [2022-04-27 16:00:21,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:00:21,950 INFO L495 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2022-04-27 16:00:21,951 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:21,951 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2022-04-27 16:00:21,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-27 16:00:21,952 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:00:21,953 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:00:21,954 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:00:21,956 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:00:21,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:00:21,957 INFO L85 PathProgramCache]: Analyzing trace with hash -709113413, now seen corresponding path program 1 times [2022-04-27 16:00:21,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:00:21,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1871591707] [2022-04-27 16:00:21,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:00:21,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:00:21,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:22,041 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:00:22,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:22,053 INFO L290 TraceCheckUtils]: 0: Hoare triple {101#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {95#true} is VALID [2022-04-27 16:00:22,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {95#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-27 16:00:22,054 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {95#true} {95#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-27 16:00:22,055 INFO L272 TraceCheckUtils]: 0: Hoare triple {95#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:00:22,055 INFO L290 TraceCheckUtils]: 1: Hoare triple {101#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {95#true} is VALID [2022-04-27 16:00:22,055 INFO L290 TraceCheckUtils]: 2: Hoare triple {95#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-27 16:00:22,056 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {95#true} {95#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-27 16:00:22,056 INFO L272 TraceCheckUtils]: 4: Hoare triple {95#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-27 16:00:22,057 INFO L290 TraceCheckUtils]: 5: Hoare triple {95#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {100#(= main_~i~0 0)} is VALID [2022-04-27 16:00:22,057 INFO L290 TraceCheckUtils]: 6: Hoare triple {100#(= main_~i~0 0)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {96#false} is VALID [2022-04-27 16:00:22,058 INFO L290 TraceCheckUtils]: 7: Hoare triple {96#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {96#false} is VALID [2022-04-27 16:00:22,058 INFO L272 TraceCheckUtils]: 8: Hoare triple {96#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {96#false} is VALID [2022-04-27 16:00:22,058 INFO L290 TraceCheckUtils]: 9: Hoare triple {96#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {96#false} is VALID [2022-04-27 16:00:22,058 INFO L290 TraceCheckUtils]: 10: Hoare triple {96#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {96#false} is VALID [2022-04-27 16:00:22,059 INFO L290 TraceCheckUtils]: 11: Hoare triple {96#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {96#false} is VALID [2022-04-27 16:00:22,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:22,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:00:22,059 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1871591707] [2022-04-27 16:00:22,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1871591707] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:00:22,060 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:00:22,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:00:22,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258885786] [2022-04-27 16:00:22,060 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:00:22,062 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 16:00:22,062 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:00:22,063 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,079 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:22,080 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:00:22,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:00:22,081 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:00:22,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:00:22,081 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:22,156 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 16:00:22,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 16:00:22,157 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 16:00:22,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:00:22,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 17 transitions. [2022-04-27 16:00:22,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 17 transitions. [2022-04-27 16:00:22,161 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 17 transitions. [2022-04-27 16:00:22,194 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:22,195 INFO L225 Difference]: With dead ends: 16 [2022-04-27 16:00:22,196 INFO L226 Difference]: Without dead ends: 16 [2022-04-27 16:00:22,196 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:00:22,197 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:00:22,198 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 19 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:00:22,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-27 16:00:22,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2022-04-27 16:00:22,208 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:00:22,208 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,208 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,208 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:22,210 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 16:00:22,210 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 16:00:22,210 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:22,210 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:22,211 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 16:00:22,211 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 16:00:22,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:22,214 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 16:00:22,214 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 16:00:22,215 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:22,215 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:22,215 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:00:22,215 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:00:22,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2022-04-27 16:00:22,218 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 12 [2022-04-27 16:00:22,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:00:22,219 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2022-04-27 16:00:22,219 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 3 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,220 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2022-04-27 16:00:22,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 16:00:22,220 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:00:22,220 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:00:22,220 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:00:22,221 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:00:22,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:00:22,221 INFO L85 PathProgramCache]: Analyzing trace with hash -341174979, now seen corresponding path program 1 times [2022-04-27 16:00:22,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:00:22,222 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244761692] [2022-04-27 16:00:22,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:00:22,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:00:22,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:22,277 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:00:22,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:22,286 INFO L290 TraceCheckUtils]: 0: Hoare triple {176#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {169#true} is VALID [2022-04-27 16:00:22,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {169#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,286 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {169#true} {169#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {169#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {176#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:00:22,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {176#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {169#true} is VALID [2022-04-27 16:00:22,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {169#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {169#true} {169#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,288 INFO L272 TraceCheckUtils]: 4: Hoare triple {169#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,289 INFO L290 TraceCheckUtils]: 5: Hoare triple {169#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {174#(= main_~i~0 0)} is VALID [2022-04-27 16:00:22,289 INFO L290 TraceCheckUtils]: 6: Hoare triple {174#(= main_~i~0 0)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {174#(= main_~i~0 0)} is VALID [2022-04-27 16:00:22,290 INFO L290 TraceCheckUtils]: 7: Hoare triple {174#(= main_~i~0 0)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {175#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:22,291 INFO L290 TraceCheckUtils]: 8: Hoare triple {175#(<= main_~i~0 1)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,291 INFO L290 TraceCheckUtils]: 9: Hoare triple {170#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {170#false} is VALID [2022-04-27 16:00:22,291 INFO L272 TraceCheckUtils]: 10: Hoare triple {170#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {170#false} is VALID [2022-04-27 16:00:22,291 INFO L290 TraceCheckUtils]: 11: Hoare triple {170#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {170#false} is VALID [2022-04-27 16:00:22,292 INFO L290 TraceCheckUtils]: 12: Hoare triple {170#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,292 INFO L290 TraceCheckUtils]: 13: Hoare triple {170#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,292 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:22,292 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:00:22,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244761692] [2022-04-27 16:00:22,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [244761692] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:00:22,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2078408823] [2022-04-27 16:00:22,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:00:22,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:00:22,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:00:22,295 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:00:22,309 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:00:22,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:22,359 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-27 16:00:22,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:22,371 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:00:22,488 INFO L272 TraceCheckUtils]: 0: Hoare triple {169#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {169#true} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {169#true} is VALID [2022-04-27 16:00:22,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {169#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,493 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {169#true} {169#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,493 INFO L272 TraceCheckUtils]: 4: Hoare triple {169#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,496 INFO L290 TraceCheckUtils]: 5: Hoare triple {169#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {195#(<= main_~i~0 0)} is VALID [2022-04-27 16:00:22,497 INFO L290 TraceCheckUtils]: 6: Hoare triple {195#(<= main_~i~0 0)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {195#(<= main_~i~0 0)} is VALID [2022-04-27 16:00:22,498 INFO L290 TraceCheckUtils]: 7: Hoare triple {195#(<= main_~i~0 0)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {175#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:22,499 INFO L290 TraceCheckUtils]: 8: Hoare triple {175#(<= main_~i~0 1)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,499 INFO L290 TraceCheckUtils]: 9: Hoare triple {170#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {170#false} is VALID [2022-04-27 16:00:22,500 INFO L272 TraceCheckUtils]: 10: Hoare triple {170#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {170#false} is VALID [2022-04-27 16:00:22,500 INFO L290 TraceCheckUtils]: 11: Hoare triple {170#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {170#false} is VALID [2022-04-27 16:00:22,500 INFO L290 TraceCheckUtils]: 12: Hoare triple {170#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,501 INFO L290 TraceCheckUtils]: 13: Hoare triple {170#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,501 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:22,501 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:00:22,601 INFO L290 TraceCheckUtils]: 13: Hoare triple {170#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,602 INFO L290 TraceCheckUtils]: 12: Hoare triple {170#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,602 INFO L290 TraceCheckUtils]: 11: Hoare triple {170#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {170#false} is VALID [2022-04-27 16:00:22,602 INFO L272 TraceCheckUtils]: 10: Hoare triple {170#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {170#false} is VALID [2022-04-27 16:00:22,602 INFO L290 TraceCheckUtils]: 9: Hoare triple {170#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {170#false} is VALID [2022-04-27 16:00:22,603 INFO L290 TraceCheckUtils]: 8: Hoare triple {235#(< main_~i~0 1024)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {170#false} is VALID [2022-04-27 16:00:22,604 INFO L290 TraceCheckUtils]: 7: Hoare triple {239#(< main_~i~0 1023)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {235#(< main_~i~0 1024)} is VALID [2022-04-27 16:00:22,605 INFO L290 TraceCheckUtils]: 6: Hoare triple {239#(< main_~i~0 1023)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {239#(< main_~i~0 1023)} is VALID [2022-04-27 16:00:22,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {169#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {239#(< main_~i~0 1023)} is VALID [2022-04-27 16:00:22,606 INFO L272 TraceCheckUtils]: 4: Hoare triple {169#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,606 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {169#true} {169#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {169#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {169#true} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {169#true} is VALID [2022-04-27 16:00:22,607 INFO L272 TraceCheckUtils]: 0: Hoare triple {169#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {169#true} is VALID [2022-04-27 16:00:22,608 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:22,611 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2078408823] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:00:22,612 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:00:22,612 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-27 16:00:22,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017884813] [2022-04-27 16:00:22,612 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:00:22,614 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:00:22,615 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:00:22,615 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,636 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:22,636 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:00:22,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:00:22,638 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:00:22,638 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2022-04-27 16:00:22,639 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:22,758 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-27 16:00:22,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 16:00:22,759 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:00:22,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:00:22,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 24 transitions. [2022-04-27 16:00:22,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 24 transitions. [2022-04-27 16:00:22,771 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 24 transitions. [2022-04-27 16:00:22,795 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:22,796 INFO L225 Difference]: With dead ends: 21 [2022-04-27 16:00:22,796 INFO L226 Difference]: Without dead ends: 21 [2022-04-27 16:00:22,797 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=80, Unknown=0, NotChecked=0, Total=132 [2022-04-27 16:00:22,798 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 17 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:00:22,798 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 19 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:00:22,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-27 16:00:22,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2022-04-27 16:00:22,801 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:00:22,801 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,801 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,802 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:22,803 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-27 16:00:22,803 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-27 16:00:22,803 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:22,804 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:22,804 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-27 16:00:22,804 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-27 16:00:22,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:22,806 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-27 16:00:22,806 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-27 16:00:22,806 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:22,806 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:22,807 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:00:22,807 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:00:22,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2022-04-27 16:00:22,808 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 14 [2022-04-27 16:00:22,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:00:22,809 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2022-04-27 16:00:22,809 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.25) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:22,809 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-27 16:00:22,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 16:00:22,810 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:00:22,810 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:00:22,839 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 16:00:23,036 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:00:23,036 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:00:23,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:00:23,037 INFO L85 PathProgramCache]: Analyzing trace with hash -1847565117, now seen corresponding path program 2 times [2022-04-27 16:00:23,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:00:23,037 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129457428] [2022-04-27 16:00:23,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:00:23,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:00:23,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:23,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:00:23,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:23,195 INFO L290 TraceCheckUtils]: 0: Hoare triple {365#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {355#true} is VALID [2022-04-27 16:00:23,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {355#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,195 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {355#true} {355#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,198 INFO L272 TraceCheckUtils]: 0: Hoare triple {355#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:00:23,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {365#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {355#true} is VALID [2022-04-27 16:00:23,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {355#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,198 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {355#true} {355#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,199 INFO L272 TraceCheckUtils]: 4: Hoare triple {355#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,201 INFO L290 TraceCheckUtils]: 5: Hoare triple {355#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {360#(= main_~i~0 0)} is VALID [2022-04-27 16:00:23,201 INFO L290 TraceCheckUtils]: 6: Hoare triple {360#(= main_~i~0 0)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {360#(= main_~i~0 0)} is VALID [2022-04-27 16:00:23,202 INFO L290 TraceCheckUtils]: 7: Hoare triple {360#(= main_~i~0 0)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {361#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:23,202 INFO L290 TraceCheckUtils]: 8: Hoare triple {361#(<= main_~i~0 1)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {361#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:23,203 INFO L290 TraceCheckUtils]: 9: Hoare triple {361#(<= main_~i~0 1)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {362#(<= main_~i~0 2)} is VALID [2022-04-27 16:00:23,204 INFO L290 TraceCheckUtils]: 10: Hoare triple {362#(<= main_~i~0 2)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {362#(<= main_~i~0 2)} is VALID [2022-04-27 16:00:23,205 INFO L290 TraceCheckUtils]: 11: Hoare triple {362#(<= main_~i~0 2)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {363#(<= main_~i~0 3)} is VALID [2022-04-27 16:00:23,206 INFO L290 TraceCheckUtils]: 12: Hoare triple {363#(<= main_~i~0 3)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {363#(<= main_~i~0 3)} is VALID [2022-04-27 16:00:23,207 INFO L290 TraceCheckUtils]: 13: Hoare triple {363#(<= main_~i~0 3)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {364#(<= main_~i~0 4)} is VALID [2022-04-27 16:00:23,207 INFO L290 TraceCheckUtils]: 14: Hoare triple {364#(<= main_~i~0 4)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,208 INFO L290 TraceCheckUtils]: 15: Hoare triple {356#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {356#false} is VALID [2022-04-27 16:00:23,208 INFO L272 TraceCheckUtils]: 16: Hoare triple {356#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {356#false} is VALID [2022-04-27 16:00:23,209 INFO L290 TraceCheckUtils]: 17: Hoare triple {356#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {356#false} is VALID [2022-04-27 16:00:23,209 INFO L290 TraceCheckUtils]: 18: Hoare triple {356#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,209 INFO L290 TraceCheckUtils]: 19: Hoare triple {356#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,209 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:23,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:00:23,210 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129457428] [2022-04-27 16:00:23,210 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [129457428] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:00:23,210 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1910621175] [2022-04-27 16:00:23,210 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:00:23,210 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:00:23,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:00:23,212 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:00:23,213 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:00:23,259 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:00:23,259 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:00:23,260 INFO L263 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 16:00:23,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:23,270 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:00:23,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {355#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {355#true} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {355#true} is VALID [2022-04-27 16:00:23,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {355#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,386 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {355#true} {355#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,389 INFO L272 TraceCheckUtils]: 4: Hoare triple {355#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,390 INFO L290 TraceCheckUtils]: 5: Hoare triple {355#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {384#(<= main_~i~0 0)} is VALID [2022-04-27 16:00:23,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {384#(<= main_~i~0 0)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {384#(<= main_~i~0 0)} is VALID [2022-04-27 16:00:23,392 INFO L290 TraceCheckUtils]: 7: Hoare triple {384#(<= main_~i~0 0)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {361#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:23,392 INFO L290 TraceCheckUtils]: 8: Hoare triple {361#(<= main_~i~0 1)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {361#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:23,393 INFO L290 TraceCheckUtils]: 9: Hoare triple {361#(<= main_~i~0 1)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {362#(<= main_~i~0 2)} is VALID [2022-04-27 16:00:23,394 INFO L290 TraceCheckUtils]: 10: Hoare triple {362#(<= main_~i~0 2)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {362#(<= main_~i~0 2)} is VALID [2022-04-27 16:00:23,395 INFO L290 TraceCheckUtils]: 11: Hoare triple {362#(<= main_~i~0 2)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {363#(<= main_~i~0 3)} is VALID [2022-04-27 16:00:23,395 INFO L290 TraceCheckUtils]: 12: Hoare triple {363#(<= main_~i~0 3)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {363#(<= main_~i~0 3)} is VALID [2022-04-27 16:00:23,397 INFO L290 TraceCheckUtils]: 13: Hoare triple {363#(<= main_~i~0 3)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {364#(<= main_~i~0 4)} is VALID [2022-04-27 16:00:23,398 INFO L290 TraceCheckUtils]: 14: Hoare triple {364#(<= main_~i~0 4)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,398 INFO L290 TraceCheckUtils]: 15: Hoare triple {356#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {356#false} is VALID [2022-04-27 16:00:23,399 INFO L272 TraceCheckUtils]: 16: Hoare triple {356#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {356#false} is VALID [2022-04-27 16:00:23,399 INFO L290 TraceCheckUtils]: 17: Hoare triple {356#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {356#false} is VALID [2022-04-27 16:00:23,399 INFO L290 TraceCheckUtils]: 18: Hoare triple {356#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,399 INFO L290 TraceCheckUtils]: 19: Hoare triple {356#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,399 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:23,400 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:00:23,552 INFO L290 TraceCheckUtils]: 19: Hoare triple {356#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,553 INFO L290 TraceCheckUtils]: 18: Hoare triple {356#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,553 INFO L290 TraceCheckUtils]: 17: Hoare triple {356#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {356#false} is VALID [2022-04-27 16:00:23,553 INFO L272 TraceCheckUtils]: 16: Hoare triple {356#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {356#false} is VALID [2022-04-27 16:00:23,554 INFO L290 TraceCheckUtils]: 15: Hoare triple {356#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {356#false} is VALID [2022-04-27 16:00:23,555 INFO L290 TraceCheckUtils]: 14: Hoare triple {442#(< main_~i~0 1024)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 16:00:23,555 INFO L290 TraceCheckUtils]: 13: Hoare triple {446#(< main_~i~0 1023)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {442#(< main_~i~0 1024)} is VALID [2022-04-27 16:00:23,556 INFO L290 TraceCheckUtils]: 12: Hoare triple {446#(< main_~i~0 1023)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {446#(< main_~i~0 1023)} is VALID [2022-04-27 16:00:23,556 INFO L290 TraceCheckUtils]: 11: Hoare triple {453#(< main_~i~0 1022)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {446#(< main_~i~0 1023)} is VALID [2022-04-27 16:00:23,557 INFO L290 TraceCheckUtils]: 10: Hoare triple {453#(< main_~i~0 1022)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {453#(< main_~i~0 1022)} is VALID [2022-04-27 16:00:23,557 INFO L290 TraceCheckUtils]: 9: Hoare triple {460#(< main_~i~0 1021)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {453#(< main_~i~0 1022)} is VALID [2022-04-27 16:00:23,558 INFO L290 TraceCheckUtils]: 8: Hoare triple {460#(< main_~i~0 1021)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {460#(< main_~i~0 1021)} is VALID [2022-04-27 16:00:23,558 INFO L290 TraceCheckUtils]: 7: Hoare triple {467#(< main_~i~0 1020)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {460#(< main_~i~0 1021)} is VALID [2022-04-27 16:00:23,559 INFO L290 TraceCheckUtils]: 6: Hoare triple {467#(< main_~i~0 1020)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {467#(< main_~i~0 1020)} is VALID [2022-04-27 16:00:23,559 INFO L290 TraceCheckUtils]: 5: Hoare triple {355#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {467#(< main_~i~0 1020)} is VALID [2022-04-27 16:00:23,560 INFO L272 TraceCheckUtils]: 4: Hoare triple {355#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,560 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {355#true} {355#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,560 INFO L290 TraceCheckUtils]: 2: Hoare triple {355#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,560 INFO L290 TraceCheckUtils]: 1: Hoare triple {355#true} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {355#true} is VALID [2022-04-27 16:00:23,560 INFO L272 TraceCheckUtils]: 0: Hoare triple {355#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 16:00:23,561 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:23,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1910621175] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:00:23,561 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:00:23,561 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-27 16:00:23,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329093048] [2022-04-27 16:00:23,561 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:00:23,562 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 16:00:23,562 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:00:23,563 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,591 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:23,591 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 16:00:23,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:00:23,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 16:00:23,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2022-04-27 16:00:23,592 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:23,856 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2022-04-27 16:00:23,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 16:00:23,858 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 16:00:23,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:00:23,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 39 transitions. [2022-04-27 16:00:23,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 39 transitions. [2022-04-27 16:00:23,862 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 39 transitions. [2022-04-27 16:00:23,901 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:23,902 INFO L225 Difference]: With dead ends: 33 [2022-04-27 16:00:23,902 INFO L226 Difference]: Without dead ends: 33 [2022-04-27 16:00:23,903 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=211, Invalid=341, Unknown=0, NotChecked=0, Total=552 [2022-04-27 16:00:23,904 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 32 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:00:23,904 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 24 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:00:23,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-27 16:00:23,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2022-04-27 16:00:23,907 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:00:23,907 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,907 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,908 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:23,909 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2022-04-27 16:00:23,909 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2022-04-27 16:00:23,910 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:23,910 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:23,910 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-27 16:00:23,910 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-27 16:00:23,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:23,912 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2022-04-27 16:00:23,912 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2022-04-27 16:00:23,912 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:23,912 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:23,912 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:00:23,913 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:00:23,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2022-04-27 16:00:23,914 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 20 [2022-04-27 16:00:23,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:00:23,914 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2022-04-27 16:00:23,915 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.142857142857143) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:23,915 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2022-04-27 16:00:23,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 16:00:23,915 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:00:23,915 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:00:23,936 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 16:00:24,127 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 16:00:24,128 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:00:24,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:00:24,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1093643855, now seen corresponding path program 3 times [2022-04-27 16:00:24,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:00:24,129 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264469038] [2022-04-27 16:00:24,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:00:24,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:00:24,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:24,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:00:24,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:24,303 INFO L290 TraceCheckUtils]: 0: Hoare triple {659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {643#true} is VALID [2022-04-27 16:00:24,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {643#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,303 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {643#true} {643#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {643#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:00:24,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {643#true} is VALID [2022-04-27 16:00:24,305 INFO L290 TraceCheckUtils]: 2: Hoare triple {643#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {643#true} {643#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,305 INFO L272 TraceCheckUtils]: 4: Hoare triple {643#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,306 INFO L290 TraceCheckUtils]: 5: Hoare triple {643#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {648#(= main_~i~0 0)} is VALID [2022-04-27 16:00:24,306 INFO L290 TraceCheckUtils]: 6: Hoare triple {648#(= main_~i~0 0)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {648#(= main_~i~0 0)} is VALID [2022-04-27 16:00:24,306 INFO L290 TraceCheckUtils]: 7: Hoare triple {648#(= main_~i~0 0)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {649#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:24,307 INFO L290 TraceCheckUtils]: 8: Hoare triple {649#(<= main_~i~0 1)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {649#(<= main_~i~0 1)} is VALID [2022-04-27 16:00:24,307 INFO L290 TraceCheckUtils]: 9: Hoare triple {649#(<= main_~i~0 1)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {650#(<= main_~i~0 2)} is VALID [2022-04-27 16:00:24,308 INFO L290 TraceCheckUtils]: 10: Hoare triple {650#(<= main_~i~0 2)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {650#(<= main_~i~0 2)} is VALID [2022-04-27 16:00:24,308 INFO L290 TraceCheckUtils]: 11: Hoare triple {650#(<= main_~i~0 2)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {651#(<= main_~i~0 3)} is VALID [2022-04-27 16:00:24,309 INFO L290 TraceCheckUtils]: 12: Hoare triple {651#(<= main_~i~0 3)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {651#(<= main_~i~0 3)} is VALID [2022-04-27 16:00:24,309 INFO L290 TraceCheckUtils]: 13: Hoare triple {651#(<= main_~i~0 3)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {652#(<= main_~i~0 4)} is VALID [2022-04-27 16:00:24,310 INFO L290 TraceCheckUtils]: 14: Hoare triple {652#(<= main_~i~0 4)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {652#(<= main_~i~0 4)} is VALID [2022-04-27 16:00:24,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {652#(<= main_~i~0 4)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {653#(<= main_~i~0 5)} is VALID [2022-04-27 16:00:24,311 INFO L290 TraceCheckUtils]: 16: Hoare triple {653#(<= main_~i~0 5)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {653#(<= main_~i~0 5)} is VALID [2022-04-27 16:00:24,311 INFO L290 TraceCheckUtils]: 17: Hoare triple {653#(<= main_~i~0 5)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {654#(<= main_~i~0 6)} is VALID [2022-04-27 16:00:24,312 INFO L290 TraceCheckUtils]: 18: Hoare triple {654#(<= main_~i~0 6)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {654#(<= main_~i~0 6)} is VALID [2022-04-27 16:00:24,312 INFO L290 TraceCheckUtils]: 19: Hoare triple {654#(<= main_~i~0 6)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {655#(<= main_~i~0 7)} is VALID [2022-04-27 16:00:24,313 INFO L290 TraceCheckUtils]: 20: Hoare triple {655#(<= main_~i~0 7)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {655#(<= main_~i~0 7)} is VALID [2022-04-27 16:00:24,313 INFO L290 TraceCheckUtils]: 21: Hoare triple {655#(<= main_~i~0 7)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {656#(<= main_~i~0 8)} is VALID [2022-04-27 16:00:24,314 INFO L290 TraceCheckUtils]: 22: Hoare triple {656#(<= main_~i~0 8)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {656#(<= main_~i~0 8)} is VALID [2022-04-27 16:00:24,314 INFO L290 TraceCheckUtils]: 23: Hoare triple {656#(<= main_~i~0 8)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {657#(<= main_~i~0 9)} is VALID [2022-04-27 16:00:24,314 INFO L290 TraceCheckUtils]: 24: Hoare triple {657#(<= main_~i~0 9)} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {657#(<= main_~i~0 9)} is VALID [2022-04-27 16:00:24,315 INFO L290 TraceCheckUtils]: 25: Hoare triple {657#(<= main_~i~0 9)} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {658#(<= main_~i~0 10)} is VALID [2022-04-27 16:00:24,316 INFO L290 TraceCheckUtils]: 26: Hoare triple {658#(<= main_~i~0 10)} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {644#false} is VALID [2022-04-27 16:00:24,316 INFO L290 TraceCheckUtils]: 27: Hoare triple {644#false} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {644#false} is VALID [2022-04-27 16:00:24,316 INFO L272 TraceCheckUtils]: 28: Hoare triple {644#false} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {644#false} is VALID [2022-04-27 16:00:24,316 INFO L290 TraceCheckUtils]: 29: Hoare triple {644#false} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {644#false} is VALID [2022-04-27 16:00:24,316 INFO L290 TraceCheckUtils]: 30: Hoare triple {644#false} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {644#false} is VALID [2022-04-27 16:00:24,316 INFO L290 TraceCheckUtils]: 31: Hoare triple {644#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {644#false} is VALID [2022-04-27 16:00:24,317 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:00:24,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:00:24,317 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264469038] [2022-04-27 16:00:24,317 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264469038] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:00:24,317 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [661954412] [2022-04-27 16:00:24,317 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:00:24,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:00:24,318 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:00:24,319 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:00:24,323 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:00:24,384 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 16:00:24,384 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:00:24,385 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 16:00:24,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:00:24,400 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:00:24,496 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:00:24,799 INFO L356 Elim1Store]: treesize reduction 12, result has 20.0 percent of original size [2022-04-27 16:00:24,799 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 12 [2022-04-27 16:00:24,973 INFO L272 TraceCheckUtils]: 0: Hoare triple {643#true} [42] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {643#true} [44] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= (select |v_#valid_5| 1) 1) (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= (select |v_#valid_5| 2) 1) (= 48 (select .cse0 0)) (= 1 (select |v_#valid_5| 3)) (= 12 (select |v_#length_3| 2)) (= (select |v_#valid_5| 0) 0) (= |v_#NULL.offset_1| 0) (= 12 (select |v_#length_3| 3)))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {643#true} is VALID [2022-04-27 16:00:24,973 INFO L290 TraceCheckUtils]: 2: Hoare triple {643#true} [47] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {643#true} {643#true} [62] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L272 TraceCheckUtils]: 4: Hoare triple {643#true} [43] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L290 TraceCheckUtils]: 5: Hoare triple {643#true} [46] mainENTRY-->L16-3: Formula: (and (= v_main_~i~0_1 0) (= 0 |v_main_~#A~0.offset_2|) (< |v_#StackHeapBarrier_1| |v_main_~#A~0.base_2|) (= |v_#valid_1| (store |v_#valid_2| |v_main_~#A~0.base_2| 1)) (= 0 (select |v_#valid_2| |v_main_~#A~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_main_~#A~0.base_2| 8192)) (not (= |v_main_~#A~0.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#A~0.offset=|v_main_~#A~0.offset_2|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, #length=|v_#length_1|, main_~#A~0.base=|v_main_~#A~0.base_2|} AuxVars[] AssignedVars[main_~#A~0.offset, #valid, main_~i~0, #length, main_~#A~0.base] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L290 TraceCheckUtils]: 6: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L290 TraceCheckUtils]: 7: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L290 TraceCheckUtils]: 8: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,974 INFO L290 TraceCheckUtils]: 9: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,975 INFO L290 TraceCheckUtils]: 10: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,975 INFO L290 TraceCheckUtils]: 11: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,975 INFO L290 TraceCheckUtils]: 12: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,975 INFO L290 TraceCheckUtils]: 13: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,975 INFO L290 TraceCheckUtils]: 14: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,975 INFO L290 TraceCheckUtils]: 15: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,976 INFO L290 TraceCheckUtils]: 16: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,976 INFO L290 TraceCheckUtils]: 17: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,976 INFO L290 TraceCheckUtils]: 18: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,976 INFO L290 TraceCheckUtils]: 19: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,976 INFO L290 TraceCheckUtils]: 20: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,976 INFO L290 TraceCheckUtils]: 21: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,977 INFO L290 TraceCheckUtils]: 22: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {643#true} is VALID [2022-04-27 16:00:24,977 INFO L290 TraceCheckUtils]: 23: Hoare triple {643#true} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {643#true} is VALID [2022-04-27 16:00:24,978 INFO L290 TraceCheckUtils]: 24: Hoare triple {643#true} [50] L16-3-->L16-2: Formula: (and (< v_main_~i~0_4 1024) (= (store |v_#memory_int_3| |v_main_~#A~0.base_5| (store (select |v_#memory_int_3| |v_main_~#A~0.base_5|) (+ (* v_main_~i~0_4 4) |v_main_~#A~0.offset_5|) v_main_~i~0_4)) |v_#memory_int_2|)) InVars {#memory_int=|v_#memory_int_3|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} OutVars{#memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_4, main_~#A~0.offset=|v_main_~#A~0.offset_5|, main_~#A~0.base=|v_main_~#A~0.base_5|} AuxVars[] AssignedVars[#memory_int] {735#(and (< main_~i~0 1024) (= main_~i~0 (select (select |#memory_int| |main_~#A~0.base|) (+ |main_~#A~0.offset| (* main_~i~0 4)))))} is VALID [2022-04-27 16:00:24,979 INFO L290 TraceCheckUtils]: 25: Hoare triple {735#(and (< main_~i~0 1024) (= main_~i~0 (select (select |#memory_int| |main_~#A~0.base|) (+ |main_~#A~0.offset| (* main_~i~0 4)))))} [52] L16-2-->L16-3: Formula: (= v_main_~i~0_5 (+ v_main_~i~0_6 1)) InVars {main_~i~0=v_main_~i~0_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_5} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {739#(and (< main_~i~0 1025) (= (+ (- 1) main_~i~0) (select (select |#memory_int| |main_~#A~0.base|) (+ (- 4) |main_~#A~0.offset| (* main_~i~0 4)))))} is VALID [2022-04-27 16:00:24,980 INFO L290 TraceCheckUtils]: 26: Hoare triple {739#(and (< main_~i~0 1025) (= (+ (- 1) main_~i~0) (select (select |#memory_int| |main_~#A~0.base|) (+ (- 4) |main_~#A~0.offset| (* main_~i~0 4)))))} [49] L16-3-->L16-4: Formula: (not (< v_main_~i~0_3 1024)) InVars {main_~i~0=v_main_~i~0_3} OutVars{main_~i~0=v_main_~i~0_3} AuxVars[] AssignedVars[] {743#(exists ((main_~i~0 Int)) (and (< main_~i~0 1025) (not (< main_~i~0 1024)) (= (+ (- 1) main_~i~0) (select (select |#memory_int| |main_~#A~0.base|) (+ (- 4) |main_~#A~0.offset| (* main_~i~0 4))))))} is VALID [2022-04-27 16:00:24,981 INFO L290 TraceCheckUtils]: 27: Hoare triple {743#(exists ((main_~i~0 Int)) (and (< main_~i~0 1025) (not (< main_~i~0 1024)) (= (+ (- 1) main_~i~0) (select (select |#memory_int| |main_~#A~0.base|) (+ (- 4) |main_~#A~0.offset| (* main_~i~0 4))))))} [51] L16-4-->L20: Formula: (= |v_main_#t~mem5_1| (select (select |v_#memory_int_1| |v_main_~#A~0.base_1|) (+ 4092 |v_main_~#A~0.offset_1|))) InVars {#memory_int=|v_#memory_int_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} OutVars{#memory_int=|v_#memory_int_1|, main_#t~mem5=|v_main_#t~mem5_1|, main_~#A~0.offset=|v_main_~#A~0.offset_1|, main_~#A~0.base=|v_main_~#A~0.base_1|} AuxVars[] AssignedVars[main_#t~mem5] {747#(and (< |main_#t~mem5| 1024) (not (< |main_#t~mem5| 1023)))} is VALID [2022-04-27 16:00:24,988 INFO L272 TraceCheckUtils]: 28: Hoare triple {747#(and (< |main_#t~mem5| 1024) (not (< |main_#t~mem5| 1023)))} [53] L20-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= 1023 |v_main_#t~mem5_4|) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {751#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:00:24,989 INFO L290 TraceCheckUtils]: 29: Hoare triple {751#(<= 1 |__VERIFIER_assert_#in~cond|)} [55] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {755#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:00:24,989 INFO L290 TraceCheckUtils]: 30: Hoare triple {755#(<= 1 __VERIFIER_assert_~cond)} [57] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {644#false} is VALID [2022-04-27 16:00:24,989 INFO L290 TraceCheckUtils]: 31: Hoare triple {644#false} [59] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {644#false} is VALID [2022-04-27 16:00:24,990 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2022-04-27 16:00:24,990 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:00:24,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [661954412] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:00:24,990 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:00:24,990 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [14] total 20 [2022-04-27 16:00:24,990 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757309546] [2022-04-27 16:00:24,990 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:00:24,991 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 16:00:24,991 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:00:24,992 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:25,005 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:25,005 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:00:25,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:00:25,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:00:25,006 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=288, Unknown=0, NotChecked=0, Total=380 [2022-04-27 16:00:25,006 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:25,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:25,164 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2022-04-27 16:00:25,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:00:25,164 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 16:00:25,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:00:25,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:25,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 15 transitions. [2022-04-27 16:00:25,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:25,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 15 transitions. [2022-04-27 16:00:25,167 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 15 transitions. [2022-04-27 16:00:25,185 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:00:25,185 INFO L225 Difference]: With dead ends: 31 [2022-04-27 16:00:25,185 INFO L226 Difference]: Without dead ends: 0 [2022-04-27 16:00:25,186 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=104, Invalid=402, Unknown=0, NotChecked=0, Total=506 [2022-04-27 16:00:25,186 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 2 mSDsluCounter, 33 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 9 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:00:25,187 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 41 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 32 Invalid, 0 Unknown, 9 Unchecked, 0.0s Time] [2022-04-27 16:00:25,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-04-27 16:00:25,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-04-27 16:00:25,187 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:00:25,188 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:00:25,188 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:00:25,188 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:00:25,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:25,188 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:00:25,188 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:00:25,188 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:25,188 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:25,188 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:00:25,188 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:00:25,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:00:25,189 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:00:25,189 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:00:25,189 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:25,189 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:00:25,189 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:00:25,189 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:00:25,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:00:25,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-04-27 16:00:25,189 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 32 [2022-04-27 16:00:25,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:00:25,189 INFO L495 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-04-27 16:00:25,190 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:00:25,190 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:00:25,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:00:25,192 INFO L805 garLoopResultBuilder]: Registering result SAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 16:00:25,219 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 16:00:25,411 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:00:25,414 INFO L356 BasicCegarLoop]: Path program histogram: [3, 1, 1] [2022-04-27 16:00:25,416 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 16:00:25,419 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:00:25 BasicIcfg [2022-04-27 16:00:25,419 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 16:00:25,423 INFO L158 Benchmark]: Toolchain (without parser) took 4600.12ms. Allocated memory was 169.9MB in the beginning and 229.6MB in the end (delta: 59.8MB). Free memory was 112.4MB in the beginning and 177.5MB in the end (delta: -65.1MB). There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:00:25,424 INFO L158 Benchmark]: CDTParser took 0.16ms. Allocated memory is still 169.9MB. Free memory is still 128.9MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:00:25,424 INFO L158 Benchmark]: CACSL2BoogieTranslator took 213.60ms. Allocated memory was 169.9MB in the beginning and 229.6MB in the end (delta: 59.8MB). Free memory was 112.1MB in the beginning and 202.0MB in the end (delta: -89.8MB). Peak memory consumption was 12.9MB. Max. memory is 8.0GB. [2022-04-27 16:00:25,424 INFO L158 Benchmark]: Boogie Preprocessor took 46.52ms. Allocated memory is still 229.6MB. Free memory was 202.0MB in the beginning and 200.3MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-27 16:00:25,424 INFO L158 Benchmark]: RCFGBuilder took 264.37ms. Allocated memory is still 229.6MB. Free memory was 200.3MB in the beginning and 189.4MB in the end (delta: 11.0MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. [2022-04-27 16:00:25,425 INFO L158 Benchmark]: IcfgTransformer took 26.71ms. Allocated memory is still 229.6MB. Free memory was 188.9MB in the beginning and 187.8MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 16:00:25,425 INFO L158 Benchmark]: TraceAbstraction took 4040.85ms. Allocated memory is still 229.6MB. Free memory was 187.3MB in the beginning and 177.5MB in the end (delta: 9.8MB). Peak memory consumption was 11.2MB. Max. memory is 8.0GB. [2022-04-27 16:00:25,426 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16ms. Allocated memory is still 169.9MB. Free memory is still 128.9MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 213.60ms. Allocated memory was 169.9MB in the beginning and 229.6MB in the end (delta: 59.8MB). Free memory was 112.1MB in the beginning and 202.0MB in the end (delta: -89.8MB). Peak memory consumption was 12.9MB. Max. memory is 8.0GB. * Boogie Preprocessor took 46.52ms. Allocated memory is still 229.6MB. Free memory was 202.0MB in the beginning and 200.3MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 264.37ms. Allocated memory is still 229.6MB. Free memory was 200.3MB in the beginning and 189.4MB in the end (delta: 11.0MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. * IcfgTransformer took 26.71ms. Allocated memory is still 229.6MB. Free memory was 188.9MB in the beginning and 187.8MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 4040.85ms. Allocated memory is still 229.6MB. Free memory was 187.3MB in the beginning and 177.5MB in the end (delta: 9.8MB). Peak memory consumption was 11.2MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 7]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 21 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 4.0s, OverallIterations: 5, TraceHistogramMax: 10, PathProgramHistogramMax: 3, EmptinessCheckTime: 0.0s, AutomataDifference: 1.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 74 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 73 mSDsluCounter, 126 SdHoareTripleChecker+Invalid, 0.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 9 IncrementalHoareTripleChecker+Unchecked, 62 mSDsCounter, 37 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 98 IncrementalHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 37 mSolverCounterUnsat, 64 mSDtfsCounter, 98 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 154 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=33occurred in iteration=4, InterpolantAutomatonStates: 36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 5 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 156 NumberOfCodeBlocks, 140 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 180 ConstructedInterpolants, 1 QuantifiedInterpolants, 390 SizeOfPredicates, 5 NumberOfNonLiveVariables, 256 ConjunctsInSsa, 22 ConjunctsInUnsatCore, 10 InterpolantComputations, 3 PerfectInterpolantSequences, 100/251 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2022-04-27 16:00:25,463 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...