/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-lit/ddlm2013.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:18:09,185 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:18:09,187 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:18:09,243 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 16:18:09,243 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 16:18:09,244 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 16:18:09,245 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 16:18:09,246 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 16:18:09,247 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 16:18:09,250 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 16:18:09,251 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 16:18:09,254 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 16:18:09,254 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:18:09,260 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:18:09,261 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:18:09,263 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:18:09,263 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:18:09,265 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:18:09,269 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:18:09,269 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:18:09,270 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:18:09,279 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:18:09,280 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:18:09,280 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:18:09,281 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:18:09,282 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 16:18:09,290 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:18:09,290 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:18:09,291 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:18:09,292 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:18:09,298 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:18:09,298 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:18:09,299 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:18:09,299 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:18:09,299 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:18:09,299 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:18:09,299 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:18:09,299 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:18:09,299 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:18:09,300 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:18:09,300 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:18:09,301 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:18:09,301 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:18:09,301 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:18:09,301 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:18:09,301 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:18:09,302 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:18:09,480 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:18:09,494 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:18:09,496 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:18:09,497 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:18:09,498 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:18:09,499 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/ddlm2013.i [2022-04-27 16:18:09,540 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4fcc9b977/b70df1f77d98468a9bdb255367122cee/FLAGc7a11e0b0 [2022-04-27 16:18:09,880 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:18:09,880 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/ddlm2013.i [2022-04-27 16:18:09,885 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4fcc9b977/b70df1f77d98468a9bdb255367122cee/FLAGc7a11e0b0 [2022-04-27 16:18:10,310 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4fcc9b977/b70df1f77d98468a9bdb255367122cee [2022-04-27 16:18:10,311 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:18:10,312 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:18:10,313 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:18:10,314 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:18:10,316 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:18:10,317 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,318 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@150eddca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10, skipping insertion in model container [2022-04-27 16:18:10,318 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,323 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:18:10,332 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:18:10,474 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/ddlm2013.i[895,908] [2022-04-27 16:18:10,514 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:18:10,519 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:18:10,528 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/ddlm2013.i[895,908] [2022-04-27 16:18:10,531 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:18:10,540 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:18:10,540 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10 WrapperNode [2022-04-27 16:18:10,541 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:18:10,541 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:18:10,541 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:18:10,541 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:18:10,548 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,549 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,554 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,554 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,567 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,573 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,577 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,580 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:18:10,581 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:18:10,582 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:18:10,582 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:18:10,582 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,587 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:18:10,593 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:18:10,613 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:18:10,635 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:18:10,641 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:18:10,644 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:18:10,644 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:18:10,644 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-27 16:18:10,644 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:18:10,644 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:18:10,644 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:18:10,644 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:18:10,644 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-27 16:18:10,644 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-27 16:18:10,645 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:18:10,645 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:18:10,645 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-27 16:18:10,645 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:18:10,646 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:18:10,647 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:18:10,690 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:18:10,691 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:18:10,818 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:18:10,822 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:18:10,823 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 16:18:10,824 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:18:10 BoogieIcfgContainer [2022-04-27 16:18:10,824 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:18:10,824 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:18:10,825 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:18:10,825 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:18:10,827 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:18:10" (1/1) ... [2022-04-27 16:18:10,828 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:18:10,883 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:18:10 BasicIcfg [2022-04-27 16:18:10,883 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:18:10,884 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:18:10,885 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:18:10,886 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:18:10,887 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:18:10" (1/4) ... [2022-04-27 16:18:10,887 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14441d28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:18:10, skipping insertion in model container [2022-04-27 16:18:10,887 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:18:10" (2/4) ... [2022-04-27 16:18:10,887 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14441d28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:18:10, skipping insertion in model container [2022-04-27 16:18:10,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:18:10" (3/4) ... [2022-04-27 16:18:10,888 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14441d28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:18:10, skipping insertion in model container [2022-04-27 16:18:10,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:18:10" (4/4) ... [2022-04-27 16:18:10,889 INFO L111 eAbstractionObserver]: Analyzing ICFG ddlm2013.iJordan [2022-04-27 16:18:10,897 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:18:10,898 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:18:10,932 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:18:10,937 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@59970d0a, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@da5b871 [2022-04-27 16:18:10,937 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:18:10,943 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:18:10,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-27 16:18:10,947 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:18:10,948 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:18:10,948 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:18:10,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:18:10,951 INFO L85 PathProgramCache]: Analyzing trace with hash -1607486853, now seen corresponding path program 1 times [2022-04-27 16:18:10,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:18:10,962 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757096888] [2022-04-27 16:18:10,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:10,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:18:11,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:11,099 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:18:11,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:11,118 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-27 16:18:11,118 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 16:18:11,119 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 16:18:11,120 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:18:11,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-27 16:18:11,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 16:18:11,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 16:18:11,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 16:18:11,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {26#true} is VALID [2022-04-27 16:18:11,122 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {26#true} is VALID [2022-04-27 16:18:11,122 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#true} [79] L39-2-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 16:18:11,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 16:18:11,123 INFO L272 TraceCheckUtils]: 9: Hoare triple {27#false} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {27#false} is VALID [2022-04-27 16:18:11,123 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-27 16:18:11,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {27#false} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 16:18:11,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 16:18:11,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:11,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:18:11,124 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757096888] [2022-04-27 16:18:11,125 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [757096888] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:18:11,125 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:18:11,125 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:18:11,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238004160] [2022-04-27 16:18:11,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:18:11,130 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 16:18:11,131 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:18:11,133 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,149 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:11,150 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:18:11,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:18:11,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:18:11,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:18:11,170 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:11,240 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-27 16:18:11,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:18:11,241 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 16:18:11,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:18:11,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-04-27 16:18:11,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-04-27 16:18:11,256 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 28 transitions. [2022-04-27 16:18:11,299 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:11,305 INFO L225 Difference]: With dead ends: 23 [2022-04-27 16:18:11,305 INFO L226 Difference]: Without dead ends: 16 [2022-04-27 16:18:11,307 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:18:11,312 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:18:11,314 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:18:11,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-27 16:18:11,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-27 16:18:11,332 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:18:11,332 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,333 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,333 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:11,336 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2022-04-27 16:18:11,336 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-27 16:18:11,336 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:11,336 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:11,337 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 16:18:11,337 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 16:18:11,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:11,340 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2022-04-27 16:18:11,341 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-27 16:18:11,341 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:11,341 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:11,341 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:18:11,342 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:18:11,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2022-04-27 16:18:11,348 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 18 transitions. Word has length 13 [2022-04-27 16:18:11,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:18:11,349 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 18 transitions. [2022-04-27 16:18:11,350 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,353 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-27 16:18:11,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 16:18:11,359 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:18:11,359 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:18:11,360 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:18:11,360 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:18:11,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:18:11,361 INFO L85 PathProgramCache]: Analyzing trace with hash -1646505343, now seen corresponding path program 1 times [2022-04-27 16:18:11,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:18:11,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158805993] [2022-04-27 16:18:11,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:11,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:18:11,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:11,497 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:18:11,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:11,512 INFO L290 TraceCheckUtils]: 0: Hoare triple {113#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-27 16:18:11,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {105#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-27 16:18:11,513 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {105#true} {105#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-27 16:18:11,513 INFO L272 TraceCheckUtils]: 0: Hoare triple {105#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:18:11,514 INFO L290 TraceCheckUtils]: 1: Hoare triple {113#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-27 16:18:11,514 INFO L290 TraceCheckUtils]: 2: Hoare triple {105#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-27 16:18:11,514 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {105#true} {105#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-27 16:18:11,514 INFO L272 TraceCheckUtils]: 4: Hoare triple {105#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-27 16:18:11,515 INFO L290 TraceCheckUtils]: 5: Hoare triple {105#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {110#(and (= main_~a~0 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:11,515 INFO L290 TraceCheckUtils]: 6: Hoare triple {110#(and (= main_~a~0 0) (= main_~b~0 0))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {110#(and (= main_~a~0 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:11,516 INFO L290 TraceCheckUtils]: 7: Hoare triple {110#(and (= main_~a~0 0) (= main_~b~0 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {110#(and (= main_~a~0 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:11,516 INFO L290 TraceCheckUtils]: 8: Hoare triple {110#(and (= main_~a~0 0) (= main_~b~0 0))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {110#(and (= main_~a~0 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:11,517 INFO L290 TraceCheckUtils]: 9: Hoare triple {110#(and (= main_~a~0 0) (= main_~b~0 0))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {110#(and (= main_~a~0 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:11,517 INFO L272 TraceCheckUtils]: 10: Hoare triple {110#(and (= main_~a~0 0) (= main_~b~0 0))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {111#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:18:11,518 INFO L290 TraceCheckUtils]: 11: Hoare triple {111#(not (= |__VERIFIER_assert_#in~cond| 0))} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {112#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:18:11,518 INFO L290 TraceCheckUtils]: 12: Hoare triple {112#(not (= __VERIFIER_assert_~cond 0))} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-27 16:18:11,519 INFO L290 TraceCheckUtils]: 13: Hoare triple {106#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-27 16:18:11,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:11,519 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:18:11,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158805993] [2022-04-27 16:18:11,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1158805993] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:18:11,519 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:18:11,519 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 16:18:11,520 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201893478] [2022-04-27 16:18:11,520 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:18:11,521 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:18:11,521 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:18:11,521 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:11,539 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 16:18:11,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:18:11,540 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 16:18:11,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 16:18:11,540 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:11,670 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-27 16:18:11,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 16:18:11,671 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:18:11,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:18:11,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2022-04-27 16:18:11,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2022-04-27 16:18:11,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 25 transitions. [2022-04-27 16:18:11,704 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:11,705 INFO L225 Difference]: With dead ends: 22 [2022-04-27 16:18:11,705 INFO L226 Difference]: Without dead ends: 18 [2022-04-27 16:18:11,707 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-27 16:18:11,707 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 18 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:18:11,708 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 33 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:18:11,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-27 16:18:11,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-27 16:18:11,710 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:18:11,710 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,710 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,710 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:11,711 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-04-27 16:18:11,711 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-27 16:18:11,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:11,712 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:11,712 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 16:18:11,712 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 16:18:11,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:11,713 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-04-27 16:18:11,713 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-27 16:18:11,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:11,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:11,713 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:18:11,713 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:18:11,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2022-04-27 16:18:11,714 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 14 [2022-04-27 16:18:11,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:18:11,714 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2022-04-27 16:18:11,715 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:11,715 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-27 16:18:11,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 16:18:11,715 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:18:11,715 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:18:11,715 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:18:11,718 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:18:11,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:18:11,718 INFO L85 PathProgramCache]: Analyzing trace with hash 1516576148, now seen corresponding path program 1 times [2022-04-27 16:18:11,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:18:11,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043821821] [2022-04-27 16:18:11,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:11,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:18:11,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:11,983 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:18:11,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:12,003 INFO L290 TraceCheckUtils]: 0: Hoare triple {209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {198#true} is VALID [2022-04-27 16:18:12,003 INFO L290 TraceCheckUtils]: 1: Hoare triple {198#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,003 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {198#true} {198#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,004 INFO L272 TraceCheckUtils]: 0: Hoare triple {198#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:18:12,004 INFO L290 TraceCheckUtils]: 1: Hoare triple {209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {198#true} is VALID [2022-04-27 16:18:12,004 INFO L290 TraceCheckUtils]: 2: Hoare triple {198#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,005 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {198#true} {198#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,005 INFO L272 TraceCheckUtils]: 4: Hoare triple {198#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,005 INFO L290 TraceCheckUtils]: 5: Hoare triple {198#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {203#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:12,006 INFO L290 TraceCheckUtils]: 6: Hoare triple {203#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:12,007 INFO L290 TraceCheckUtils]: 7: Hoare triple {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:12,008 INFO L290 TraceCheckUtils]: 8: Hoare triple {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {205#(and (= (+ (- 1) main_~j~0) 0) (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:12,009 INFO L290 TraceCheckUtils]: 9: Hoare triple {205#(and (= (+ (- 1) main_~j~0) 0) (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:12,010 INFO L290 TraceCheckUtils]: 10: Hoare triple {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:12,012 INFO L290 TraceCheckUtils]: 11: Hoare triple {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:12,012 INFO L290 TraceCheckUtils]: 12: Hoare triple {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:12,016 INFO L272 TraceCheckUtils]: 13: Hoare triple {206#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {207#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:18:12,017 INFO L290 TraceCheckUtils]: 14: Hoare triple {207#(not (= |__VERIFIER_assert_#in~cond| 0))} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {208#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:18:12,017 INFO L290 TraceCheckUtils]: 15: Hoare triple {208#(not (= __VERIFIER_assert_~cond 0))} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {199#false} is VALID [2022-04-27 16:18:12,017 INFO L290 TraceCheckUtils]: 16: Hoare triple {199#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {199#false} is VALID [2022-04-27 16:18:12,018 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:12,018 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:18:12,018 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043821821] [2022-04-27 16:18:12,018 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1043821821] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:18:12,018 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1584989304] [2022-04-27 16:18:12,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:12,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:18:12,019 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:18:12,024 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:18:12,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:18:12,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:12,064 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-27 16:18:12,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:12,072 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:18:12,332 INFO L272 TraceCheckUtils]: 0: Hoare triple {198#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {198#true} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {198#true} is VALID [2022-04-27 16:18:12,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {198#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {198#true} {198#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,333 INFO L272 TraceCheckUtils]: 4: Hoare triple {198#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {198#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {203#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:12,334 INFO L290 TraceCheckUtils]: 6: Hoare triple {203#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:12,335 INFO L290 TraceCheckUtils]: 7: Hoare triple {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:12,335 INFO L290 TraceCheckUtils]: 8: Hoare triple {204#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:12,336 INFO L290 TraceCheckUtils]: 9: Hoare triple {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:12,336 INFO L290 TraceCheckUtils]: 10: Hoare triple {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:12,337 INFO L290 TraceCheckUtils]: 11: Hoare triple {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:12,337 INFO L290 TraceCheckUtils]: 12: Hoare triple {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:12,338 INFO L272 TraceCheckUtils]: 13: Hoare triple {237#(and (= main_~a~0 1) (= (+ (- 1) main_~b~0) 0))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {253#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:18:12,339 INFO L290 TraceCheckUtils]: 14: Hoare triple {253#(<= 1 |__VERIFIER_assert_#in~cond|)} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {257#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:18:12,339 INFO L290 TraceCheckUtils]: 15: Hoare triple {257#(<= 1 __VERIFIER_assert_~cond)} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {199#false} is VALID [2022-04-27 16:18:12,339 INFO L290 TraceCheckUtils]: 16: Hoare triple {199#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {199#false} is VALID [2022-04-27 16:18:12,340 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:12,340 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:18:12,527 INFO L290 TraceCheckUtils]: 16: Hoare triple {199#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {199#false} is VALID [2022-04-27 16:18:12,527 INFO L290 TraceCheckUtils]: 15: Hoare triple {257#(<= 1 __VERIFIER_assert_~cond)} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {199#false} is VALID [2022-04-27 16:18:12,528 INFO L290 TraceCheckUtils]: 14: Hoare triple {253#(<= 1 |__VERIFIER_assert_#in~cond|)} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {257#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:18:12,529 INFO L272 TraceCheckUtils]: 13: Hoare triple {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {253#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:18:12,529 INFO L290 TraceCheckUtils]: 12: Hoare triple {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:12,529 INFO L290 TraceCheckUtils]: 11: Hoare triple {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:12,530 INFO L290 TraceCheckUtils]: 10: Hoare triple {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:12,530 INFO L290 TraceCheckUtils]: 9: Hoare triple {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:12,534 INFO L290 TraceCheckUtils]: 8: Hoare triple {289#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {273#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:12,534 INFO L290 TraceCheckUtils]: 7: Hoare triple {289#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {289#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} is VALID [2022-04-27 16:18:12,535 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0) 4294967296))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {289#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} is VALID [2022-04-27 16:18:12,535 INFO L290 TraceCheckUtils]: 5: Hoare triple {198#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {296#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0) 4294967296))} is VALID [2022-04-27 16:18:12,536 INFO L272 TraceCheckUtils]: 4: Hoare triple {198#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,536 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {198#true} {198#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,536 INFO L290 TraceCheckUtils]: 2: Hoare triple {198#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,537 INFO L290 TraceCheckUtils]: 1: Hoare triple {198#true} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {198#true} is VALID [2022-04-27 16:18:12,537 INFO L272 TraceCheckUtils]: 0: Hoare triple {198#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {198#true} is VALID [2022-04-27 16:18:12,537 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:12,540 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1584989304] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:18:12,540 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:18:12,540 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 15 [2022-04-27 16:18:12,540 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215763287] [2022-04-27 16:18:12,541 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:18:12,541 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:18:12,541 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:18:12,542 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:12,576 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 16:18:12,576 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:18:12,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 16:18:12,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=165, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:18:12,579 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:12,927 INFO L93 Difference]: Finished difference Result 27 states and 30 transitions. [2022-04-27 16:18:12,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:18:12,928 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:18:12,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:18:12,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2022-04-27 16:18:12,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2022-04-27 16:18:12,933 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 31 transitions. [2022-04-27 16:18:12,959 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:12,961 INFO L225 Difference]: With dead ends: 27 [2022-04-27 16:18:12,961 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 16:18:12,962 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=328, Unknown=0, NotChecked=0, Total=420 [2022-04-27 16:18:12,964 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 27 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 103 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 103 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:18:12,965 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 52 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 103 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:18:12,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 16:18:12,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 21. [2022-04-27 16:18:12,968 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:18:12,969 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,969 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,969 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:12,971 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-27 16:18:12,971 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 26 transitions. [2022-04-27 16:18:12,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:12,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:12,973 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 16:18:12,973 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 16:18:12,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:12,978 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-27 16:18:12,978 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 26 transitions. [2022-04-27 16:18:12,978 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:12,978 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:12,978 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:18:12,978 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:18:12,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.25) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2022-04-27 16:18:12,980 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 17 [2022-04-27 16:18:12,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:18:12,981 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2022-04-27 16:18:12,981 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 12 states have internal predecessors, (29), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:12,981 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-27 16:18:12,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 16:18:12,981 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:18:12,981 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:18:13,000 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 16:18:13,183 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:18:13,184 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:18:13,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:18:13,184 INFO L85 PathProgramCache]: Analyzing trace with hash -280375211, now seen corresponding path program 1 times [2022-04-27 16:18:13,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:18:13,184 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747927573] [2022-04-27 16:18:13,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:13,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:18:13,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:13,209 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:18:13,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:13,213 INFO L290 TraceCheckUtils]: 0: Hoare triple {429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {423#true} is VALID [2022-04-27 16:18:13,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {423#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {423#true} is VALID [2022-04-27 16:18:13,213 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {423#true} {423#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {423#true} is VALID [2022-04-27 16:18:13,214 INFO L272 TraceCheckUtils]: 0: Hoare triple {423#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:18:13,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {423#true} is VALID [2022-04-27 16:18:13,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {423#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {423#true} is VALID [2022-04-27 16:18:13,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {423#true} {423#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {423#true} is VALID [2022-04-27 16:18:13,214 INFO L272 TraceCheckUtils]: 4: Hoare triple {423#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {423#true} is VALID [2022-04-27 16:18:13,214 INFO L290 TraceCheckUtils]: 5: Hoare triple {423#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {423#true} is VALID [2022-04-27 16:18:13,215 INFO L290 TraceCheckUtils]: 6: Hoare triple {423#true} [78] L30-->L39-2: Formula: (and (= v_main_~flag~0_5 0) (= v_main_~i~0_5 1)) InVars {main_~flag~0=v_main_~flag~0_5} OutVars{main_~i~0=v_main_~i~0_5, main_~flag~0=v_main_~flag~0_5} AuxVars[] AssignedVars[main_~i~0] {428#(= main_~flag~0 0)} is VALID [2022-04-27 16:18:13,215 INFO L290 TraceCheckUtils]: 7: Hoare triple {428#(= main_~flag~0 0)} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {428#(= main_~flag~0 0)} is VALID [2022-04-27 16:18:13,216 INFO L290 TraceCheckUtils]: 8: Hoare triple {428#(= main_~flag~0 0)} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {428#(= main_~flag~0 0)} is VALID [2022-04-27 16:18:13,216 INFO L290 TraceCheckUtils]: 9: Hoare triple {428#(= main_~flag~0 0)} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {428#(= main_~flag~0 0)} is VALID [2022-04-27 16:18:13,216 INFO L290 TraceCheckUtils]: 10: Hoare triple {428#(= main_~flag~0 0)} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {428#(= main_~flag~0 0)} is VALID [2022-04-27 16:18:13,217 INFO L290 TraceCheckUtils]: 11: Hoare triple {428#(= main_~flag~0 0)} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {428#(= main_~flag~0 0)} is VALID [2022-04-27 16:18:13,217 INFO L290 TraceCheckUtils]: 12: Hoare triple {428#(= main_~flag~0 0)} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {424#false} is VALID [2022-04-27 16:18:13,217 INFO L272 TraceCheckUtils]: 13: Hoare triple {424#false} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {424#false} is VALID [2022-04-27 16:18:13,217 INFO L290 TraceCheckUtils]: 14: Hoare triple {424#false} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {424#false} is VALID [2022-04-27 16:18:13,217 INFO L290 TraceCheckUtils]: 15: Hoare triple {424#false} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {424#false} is VALID [2022-04-27 16:18:13,218 INFO L290 TraceCheckUtils]: 16: Hoare triple {424#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424#false} is VALID [2022-04-27 16:18:13,218 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:18:13,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:18:13,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747927573] [2022-04-27 16:18:13,218 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747927573] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:18:13,218 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:18:13,218 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:18:13,218 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548391282] [2022-04-27 16:18:13,218 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:18:13,219 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:18:13,219 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:18:13,219 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,235 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:13,235 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:18:13,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:18:13,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:18:13,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:18:13,236 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:13,275 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-04-27 16:18:13,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 16:18:13,276 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:18:13,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:18:13,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 24 transitions. [2022-04-27 16:18:13,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 24 transitions. [2022-04-27 16:18:13,277 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 24 transitions. [2022-04-27 16:18:13,293 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:13,294 INFO L225 Difference]: With dead ends: 27 [2022-04-27 16:18:13,294 INFO L226 Difference]: Without dead ends: 21 [2022-04-27 16:18:13,294 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:18:13,295 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 14 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:18:13,295 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 29 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:18:13,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-27 16:18:13,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2022-04-27 16:18:13,296 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:18:13,297 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,297 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,297 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:13,298 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2022-04-27 16:18:13,298 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 23 transitions. [2022-04-27 16:18:13,298 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:13,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:13,299 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-27 16:18:13,299 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-27 16:18:13,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:13,300 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2022-04-27 16:18:13,300 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 23 transitions. [2022-04-27 16:18:13,300 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:13,300 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:13,300 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:18:13,300 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:18:13,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 23 transitions. [2022-04-27 16:18:13,301 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 23 transitions. Word has length 17 [2022-04-27 16:18:13,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:18:13,302 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 23 transitions. [2022-04-27 16:18:13,302 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:13,302 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 23 transitions. [2022-04-27 16:18:13,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 16:18:13,302 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:18:13,302 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:18:13,303 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 16:18:13,303 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:18:13,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:18:13,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1294800289, now seen corresponding path program 2 times [2022-04-27 16:18:13,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:18:13,303 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922054681] [2022-04-27 16:18:13,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:13,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:18:13,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:13,500 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:18:13,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:13,514 INFO L290 TraceCheckUtils]: 0: Hoare triple {536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {524#true} is VALID [2022-04-27 16:18:13,514 INFO L290 TraceCheckUtils]: 1: Hoare triple {524#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,514 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {524#true} {524#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,515 INFO L272 TraceCheckUtils]: 0: Hoare triple {524#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:18:13,515 INFO L290 TraceCheckUtils]: 1: Hoare triple {536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {524#true} is VALID [2022-04-27 16:18:13,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {524#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,516 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {524#true} {524#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,516 INFO L272 TraceCheckUtils]: 4: Hoare triple {524#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,516 INFO L290 TraceCheckUtils]: 5: Hoare triple {524#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {529#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:13,517 INFO L290 TraceCheckUtils]: 6: Hoare triple {529#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:13,517 INFO L290 TraceCheckUtils]: 7: Hoare triple {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:13,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {531#(and (<= (+ main_~b~0 3) (+ main_~i~0 main_~a~0 main_~j~0)) (<= (+ main_~i~0 main_~a~0 main_~j~0) (+ main_~b~0 3)) (= (+ (- 1) main_~j~0) 0))} is VALID [2022-04-27 16:18:13,519 INFO L290 TraceCheckUtils]: 9: Hoare triple {531#(and (<= (+ main_~b~0 3) (+ main_~i~0 main_~a~0 main_~j~0)) (<= (+ main_~i~0 main_~a~0 main_~j~0) (+ main_~b~0 3)) (= (+ (- 1) main_~j~0) 0))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {532#(and (<= (+ main_~i~0 main_~a~0 1) (+ main_~b~0 main_~j~0)) (<= (+ main_~b~0 main_~j~0) (+ main_~i~0 main_~a~0 1)))} is VALID [2022-04-27 16:18:13,532 INFO L290 TraceCheckUtils]: 10: Hoare triple {532#(and (<= (+ main_~i~0 main_~a~0 1) (+ main_~b~0 main_~j~0)) (<= (+ main_~b~0 main_~j~0) (+ main_~i~0 main_~a~0 1)))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {532#(and (<= (+ main_~i~0 main_~a~0 1) (+ main_~b~0 main_~j~0)) (<= (+ main_~b~0 main_~j~0) (+ main_~i~0 main_~a~0 1)))} is VALID [2022-04-27 16:18:13,533 INFO L290 TraceCheckUtils]: 11: Hoare triple {532#(and (<= (+ main_~i~0 main_~a~0 1) (+ main_~b~0 main_~j~0)) (<= (+ main_~b~0 main_~j~0) (+ main_~i~0 main_~a~0 1)))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:13,534 INFO L290 TraceCheckUtils]: 12: Hoare triple {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:13,535 INFO L290 TraceCheckUtils]: 13: Hoare triple {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:13,536 INFO L290 TraceCheckUtils]: 14: Hoare triple {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:13,539 INFO L290 TraceCheckUtils]: 15: Hoare triple {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:18:13,540 INFO L272 TraceCheckUtils]: 16: Hoare triple {533#(and (<= (div main_~a~0 4294967296) (div main_~b~0 4294967296)) (<= (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296)) (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296))) (< (+ main_~b~0 (* (div main_~a~0 4294967296) 4294967296)) (+ main_~a~0 (* (div main_~b~0 4294967296) 4294967296) 1)))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {534#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:18:13,540 INFO L290 TraceCheckUtils]: 17: Hoare triple {534#(not (= |__VERIFIER_assert_#in~cond| 0))} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {535#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:18:13,540 INFO L290 TraceCheckUtils]: 18: Hoare triple {535#(not (= __VERIFIER_assert_~cond 0))} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {525#false} is VALID [2022-04-27 16:18:13,541 INFO L290 TraceCheckUtils]: 19: Hoare triple {525#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {525#false} is VALID [2022-04-27 16:18:13,541 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:13,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:18:13,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922054681] [2022-04-27 16:18:13,541 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [922054681] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:18:13,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2136097457] [2022-04-27 16:18:13,541 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:18:13,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:18:13,542 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:18:13,544 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:18:13,545 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:18:13,582 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:18:13,583 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:18:13,583 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-27 16:18:13,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:13,599 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:18:13,773 INFO L272 TraceCheckUtils]: 0: Hoare triple {524#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {524#true} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {524#true} is VALID [2022-04-27 16:18:13,774 INFO L290 TraceCheckUtils]: 2: Hoare triple {524#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,774 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {524#true} {524#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,774 INFO L272 TraceCheckUtils]: 4: Hoare triple {524#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,778 INFO L290 TraceCheckUtils]: 5: Hoare triple {524#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {529#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} is VALID [2022-04-27 16:18:13,779 INFO L290 TraceCheckUtils]: 6: Hoare triple {529#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:13,779 INFO L290 TraceCheckUtils]: 7: Hoare triple {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} is VALID [2022-04-27 16:18:13,779 INFO L290 TraceCheckUtils]: 8: Hoare triple {530#(and (= main_~a~0 0) (= (+ (- 1) main_~j~0) 0) (= main_~b~0 0) (= main_~i~0 0))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {564#(and (= (+ (- 1) main_~j~0) 0) (= main_~b~0 main_~j~0) (= (+ (- 1) main_~a~0) 0) (= main_~i~0 2))} is VALID [2022-04-27 16:18:13,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {564#(and (= (+ (- 1) main_~j~0) 0) (= main_~b~0 main_~j~0) (= (+ (- 1) main_~a~0) 0) (= main_~i~0 2))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {568#(and (= (+ (- 1) main_~a~0) 0) (= main_~i~0 2) (= (+ main_~b~0 2) main_~j~0) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:13,781 INFO L290 TraceCheckUtils]: 10: Hoare triple {568#(and (= (+ (- 1) main_~a~0) 0) (= main_~i~0 2) (= (+ main_~b~0 2) main_~j~0) (= (+ (- 1) main_~b~0) 0))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {568#(and (= (+ (- 1) main_~a~0) 0) (= main_~i~0 2) (= (+ main_~b~0 2) main_~j~0) (= (+ (- 1) main_~b~0) 0))} is VALID [2022-04-27 16:18:13,781 INFO L290 TraceCheckUtils]: 11: Hoare triple {568#(and (= (+ (- 1) main_~a~0) 0) (= main_~i~0 2) (= (+ main_~b~0 2) main_~j~0) (= (+ (- 1) main_~b~0) 0))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} is VALID [2022-04-27 16:18:13,782 INFO L290 TraceCheckUtils]: 12: Hoare triple {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} is VALID [2022-04-27 16:18:13,782 INFO L290 TraceCheckUtils]: 13: Hoare triple {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} is VALID [2022-04-27 16:18:13,783 INFO L290 TraceCheckUtils]: 14: Hoare triple {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} is VALID [2022-04-27 16:18:13,783 INFO L290 TraceCheckUtils]: 15: Hoare triple {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} is VALID [2022-04-27 16:18:13,784 INFO L272 TraceCheckUtils]: 16: Hoare triple {575#(and (= (+ (* (- 1) main_~b~0) 4) 2) (= main_~a~0 2))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {591#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:18:13,784 INFO L290 TraceCheckUtils]: 17: Hoare triple {591#(<= 1 |__VERIFIER_assert_#in~cond|)} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {595#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:18:13,784 INFO L290 TraceCheckUtils]: 18: Hoare triple {595#(<= 1 __VERIFIER_assert_~cond)} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {525#false} is VALID [2022-04-27 16:18:13,784 INFO L290 TraceCheckUtils]: 19: Hoare triple {525#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {525#false} is VALID [2022-04-27 16:18:13,785 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:13,785 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:18:13,955 INFO L290 TraceCheckUtils]: 19: Hoare triple {525#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {525#false} is VALID [2022-04-27 16:18:13,956 INFO L290 TraceCheckUtils]: 18: Hoare triple {595#(<= 1 __VERIFIER_assert_~cond)} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {525#false} is VALID [2022-04-27 16:18:13,956 INFO L290 TraceCheckUtils]: 17: Hoare triple {591#(<= 1 |__VERIFIER_assert_#in~cond|)} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {595#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:18:13,957 INFO L272 TraceCheckUtils]: 16: Hoare triple {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {591#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:18:13,957 INFO L290 TraceCheckUtils]: 15: Hoare triple {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:13,958 INFO L290 TraceCheckUtils]: 14: Hoare triple {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:13,958 INFO L290 TraceCheckUtils]: 13: Hoare triple {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:13,958 INFO L290 TraceCheckUtils]: 12: Hoare triple {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:13,960 INFO L290 TraceCheckUtils]: 11: Hoare triple {627#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {611#(= (mod main_~a~0 4294967296) (mod main_~b~0 4294967296))} is VALID [2022-04-27 16:18:13,960 INFO L290 TraceCheckUtils]: 10: Hoare triple {627#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {627#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} is VALID [2022-04-27 16:18:13,961 INFO L290 TraceCheckUtils]: 9: Hoare triple {634#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 2 (* main_~i~0 4294967295)) 4294967296))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {627#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 (* main_~i~0 4294967295)) 4294967296))} is VALID [2022-04-27 16:18:13,965 INFO L290 TraceCheckUtils]: 8: Hoare triple {638#(= (mod (+ (* main_~j~0 2) main_~b~0 (* main_~i~0 4294967294)) 4294967296) (mod (+ main_~a~0 2) 4294967296))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {634#(= (mod (+ main_~a~0 1) 4294967296) (mod (+ main_~b~0 main_~j~0 2 (* main_~i~0 4294967295)) 4294967296))} is VALID [2022-04-27 16:18:13,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {638#(= (mod (+ (* main_~j~0 2) main_~b~0 (* main_~i~0 4294967294)) 4294967296) (mod (+ main_~a~0 2) 4294967296))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {638#(= (mod (+ (* main_~j~0 2) main_~b~0 (* main_~i~0 4294967294)) 4294967296) (mod (+ main_~a~0 2) 4294967296))} is VALID [2022-04-27 16:18:13,966 INFO L290 TraceCheckUtils]: 6: Hoare triple {645#(= (mod (+ (* main_~j~0 2) main_~b~0) 4294967296) (mod (+ main_~a~0 2) 4294967296))} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {638#(= (mod (+ (* main_~j~0 2) main_~b~0 (* main_~i~0 4294967294)) 4294967296) (mod (+ main_~a~0 2) 4294967296))} is VALID [2022-04-27 16:18:13,966 INFO L290 TraceCheckUtils]: 5: Hoare triple {524#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {645#(= (mod (+ (* main_~j~0 2) main_~b~0) 4294967296) (mod (+ main_~a~0 2) 4294967296))} is VALID [2022-04-27 16:18:13,966 INFO L272 TraceCheckUtils]: 4: Hoare triple {524#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,966 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {524#true} {524#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,966 INFO L290 TraceCheckUtils]: 2: Hoare triple {524#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,967 INFO L290 TraceCheckUtils]: 1: Hoare triple {524#true} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {524#true} is VALID [2022-04-27 16:18:13,967 INFO L272 TraceCheckUtils]: 0: Hoare triple {524#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#true} is VALID [2022-04-27 16:18:13,967 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:18:13,967 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2136097457] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:18:13,967 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:18:13,967 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 20 [2022-04-27 16:18:13,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014545439] [2022-04-27 16:18:13,967 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:18:13,968 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 16:18:13,968 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:18:13,968 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:14,006 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:14,006 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 16:18:14,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:18:14,007 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 16:18:14,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=316, Unknown=0, NotChecked=0, Total=380 [2022-04-27 16:18:14,007 INFO L87 Difference]: Start difference. First operand 21 states and 23 transitions. Second operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:17,555 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.61s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 16:18:21,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:21,829 INFO L93 Difference]: Finished difference Result 41 states and 47 transitions. [2022-04-27 16:18:21,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 16:18:21,830 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 16:18:21,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:18:21,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:21,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 49 transitions. [2022-04-27 16:18:21,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:21,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 49 transitions. [2022-04-27 16:18:21,832 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 49 transitions. [2022-04-27 16:18:22,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:22,507 INFO L225 Difference]: With dead ends: 41 [2022-04-27 16:18:22,507 INFO L226 Difference]: Without dead ends: 31 [2022-04-27 16:18:22,508 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=166, Invalid=826, Unknown=0, NotChecked=0, Total=992 [2022-04-27 16:18:22,508 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 37 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 67 SdHoareTripleChecker+Invalid, 211 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-04-27 16:18:22,509 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 67 Invalid, 211 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-04-27 16:18:22,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-27 16:18:22,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 24. [2022-04-27 16:18:22,510 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:18:22,510 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:22,511 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:22,511 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:22,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:22,512 INFO L93 Difference]: Finished difference Result 31 states and 34 transitions. [2022-04-27 16:18:22,512 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 34 transitions. [2022-04-27 16:18:22,512 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:22,512 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:22,512 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-27 16:18:22,512 INFO L87 Difference]: Start difference. First operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-27 16:18:22,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:22,513 INFO L93 Difference]: Finished difference Result 31 states and 34 transitions. [2022-04-27 16:18:22,513 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 34 transitions. [2022-04-27 16:18:22,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:22,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:22,514 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:18:22,514 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:18:22,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:22,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-27 16:18:22,514 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 20 [2022-04-27 16:18:22,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:18:22,515 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-27 16:18:22,515 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:22,515 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 16:18:22,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 16:18:22,515 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:18:22,515 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:18:22,532 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 16:18:22,728 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:18:22,728 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:18:22,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:18:22,728 INFO L85 PathProgramCache]: Analyzing trace with hash -1767065291, now seen corresponding path program 1 times [2022-04-27 16:18:22,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:18:22,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960051637] [2022-04-27 16:18:22,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:22,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:18:22,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:22,806 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:18:22,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:22,815 INFO L290 TraceCheckUtils]: 0: Hoare triple {825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {817#true} is VALID [2022-04-27 16:18:22,816 INFO L290 TraceCheckUtils]: 1: Hoare triple {817#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:22,816 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {817#true} {817#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:22,816 INFO L272 TraceCheckUtils]: 0: Hoare triple {817#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:18:22,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {817#true} is VALID [2022-04-27 16:18:22,818 INFO L290 TraceCheckUtils]: 2: Hoare triple {817#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:22,818 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {817#true} {817#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:22,818 INFO L272 TraceCheckUtils]: 4: Hoare triple {817#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:22,819 INFO L290 TraceCheckUtils]: 5: Hoare triple {817#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {817#true} is VALID [2022-04-27 16:18:22,820 INFO L290 TraceCheckUtils]: 6: Hoare triple {817#true} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {822#(= main_~i~0 0)} is VALID [2022-04-27 16:18:22,820 INFO L290 TraceCheckUtils]: 7: Hoare triple {822#(= main_~i~0 0)} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {822#(= main_~i~0 0)} is VALID [2022-04-27 16:18:22,820 INFO L290 TraceCheckUtils]: 8: Hoare triple {822#(= main_~i~0 0)} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:18:22,821 INFO L290 TraceCheckUtils]: 9: Hoare triple {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:18:22,822 INFO L290 TraceCheckUtils]: 10: Hoare triple {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:18:22,822 INFO L290 TraceCheckUtils]: 11: Hoare triple {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {824#(and (<= main_~i~0 (* (div main_~i~0 2) 2)) (<= 4 main_~i~0))} is VALID [2022-04-27 16:18:22,823 INFO L290 TraceCheckUtils]: 12: Hoare triple {824#(and (<= main_~i~0 (* (div main_~i~0 2) 2)) (<= 4 main_~i~0))} [88] L39-->L39-2: Formula: (and (= (+ v_main_~j~0_4 1) v_main_~j~0_3) (not (= (mod v_main_~i~0_2 2) 0))) InVars {main_~i~0=v_main_~i~0_2, main_~j~0=v_main_~j~0_4} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_2, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_~j~0, main_#t~post4] {818#false} is VALID [2022-04-27 16:18:22,823 INFO L290 TraceCheckUtils]: 13: Hoare triple {818#false} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:22,823 INFO L290 TraceCheckUtils]: 14: Hoare triple {818#false} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {818#false} is VALID [2022-04-27 16:18:22,823 INFO L290 TraceCheckUtils]: 15: Hoare triple {818#false} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L290 TraceCheckUtils]: 16: Hoare triple {818#false} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L290 TraceCheckUtils]: 17: Hoare triple {818#false} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L290 TraceCheckUtils]: 18: Hoare triple {818#false} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L272 TraceCheckUtils]: 19: Hoare triple {818#false} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L290 TraceCheckUtils]: 20: Hoare triple {818#false} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L290 TraceCheckUtils]: 21: Hoare triple {818#false} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:22,824 INFO L290 TraceCheckUtils]: 22: Hoare triple {818#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:22,825 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:18:22,825 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:18:22,825 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1960051637] [2022-04-27 16:18:22,825 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1960051637] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:18:22,825 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [122583631] [2022-04-27 16:18:22,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:18:22,825 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:18:22,825 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:18:22,826 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:18:22,827 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:18:22,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:22,859 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:18:22,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:18:22,865 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:18:23,092 INFO L272 TraceCheckUtils]: 0: Hoare triple {817#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,092 INFO L290 TraceCheckUtils]: 1: Hoare triple {817#true} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {817#true} is VALID [2022-04-27 16:18:23,093 INFO L290 TraceCheckUtils]: 2: Hoare triple {817#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,093 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {817#true} {817#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,093 INFO L272 TraceCheckUtils]: 4: Hoare triple {817#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,093 INFO L290 TraceCheckUtils]: 5: Hoare triple {817#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {817#true} is VALID [2022-04-27 16:18:23,093 INFO L290 TraceCheckUtils]: 6: Hoare triple {817#true} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {822#(= main_~i~0 0)} is VALID [2022-04-27 16:18:23,094 INFO L290 TraceCheckUtils]: 7: Hoare triple {822#(= main_~i~0 0)} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {822#(= main_~i~0 0)} is VALID [2022-04-27 16:18:23,094 INFO L290 TraceCheckUtils]: 8: Hoare triple {822#(= main_~i~0 0)} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:18:23,095 INFO L290 TraceCheckUtils]: 9: Hoare triple {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:18:23,095 INFO L290 TraceCheckUtils]: 10: Hoare triple {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:18:23,096 INFO L290 TraceCheckUtils]: 11: Hoare triple {823#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {862#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:18:23,096 INFO L290 TraceCheckUtils]: 12: Hoare triple {862#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [88] L39-->L39-2: Formula: (and (= (+ v_main_~j~0_4 1) v_main_~j~0_3) (not (= (mod v_main_~i~0_2 2) 0))) InVars {main_~i~0=v_main_~i~0_2, main_~j~0=v_main_~j~0_4} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_2, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_~j~0, main_#t~post4] {818#false} is VALID [2022-04-27 16:18:23,096 INFO L290 TraceCheckUtils]: 13: Hoare triple {818#false} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 14: Hoare triple {818#false} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 15: Hoare triple {818#false} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 16: Hoare triple {818#false} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 17: Hoare triple {818#false} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 18: Hoare triple {818#false} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L272 TraceCheckUtils]: 19: Hoare triple {818#false} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 20: Hoare triple {818#false} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 21: Hoare triple {818#false} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,097 INFO L290 TraceCheckUtils]: 22: Hoare triple {818#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,098 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:18:23,098 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:18:23,162 INFO L290 TraceCheckUtils]: 22: Hoare triple {818#false} [93] L19-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 21: Hoare triple {818#false} [91] L18-->L19: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 20: Hoare triple {818#false} [89] __VERIFIER_assertENTRY-->L18: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L272 TraceCheckUtils]: 19: Hoare triple {818#false} [85] L46-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~a~0_7 4294967296) (mod v_main_~b~0_7 4294967296)) 1 0)) InVars {main_~b~0=v_main_~b~0_7, main_~a~0=v_main_~a~0_7} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~b~0, main_~a~0] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 18: Hoare triple {818#false} [81] L35-2-->L46: Formula: (not (= v_main_~flag~0_1 0)) InVars {main_~flag~0=v_main_~flag~0_1} OutVars{main_~flag~0=v_main_~flag~0_1} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 17: Hoare triple {818#false} [83] L35-->L35-2: Formula: (= |v_main_#t~nondet2_3| 0) InVars {main_#t~nondet2=|v_main_#t~nondet2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~nondet2] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 16: Hoare triple {818#false} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 15: Hoare triple {818#false} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 14: Hoare triple {818#false} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {818#false} is VALID [2022-04-27 16:18:23,163 INFO L290 TraceCheckUtils]: 13: Hoare triple {818#false} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {818#false} is VALID [2022-04-27 16:18:23,164 INFO L290 TraceCheckUtils]: 12: Hoare triple {926#(= 0 (mod main_~i~0 2))} [88] L39-->L39-2: Formula: (and (= (+ v_main_~j~0_4 1) v_main_~j~0_3) (not (= (mod v_main_~i~0_2 2) 0))) InVars {main_~i~0=v_main_~i~0_2, main_~j~0=v_main_~j~0_4} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_2, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_~j~0, main_#t~post4] {818#false} is VALID [2022-04-27 16:18:23,165 INFO L290 TraceCheckUtils]: 11: Hoare triple {926#(= 0 (mod main_~i~0 2))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {926#(= 0 (mod main_~i~0 2))} is VALID [2022-04-27 16:18:23,165 INFO L290 TraceCheckUtils]: 10: Hoare triple {926#(= 0 (mod main_~i~0 2))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {926#(= 0 (mod main_~i~0 2))} is VALID [2022-04-27 16:18:23,165 INFO L290 TraceCheckUtils]: 9: Hoare triple {926#(= 0 (mod main_~i~0 2))} [87] L39-->L39-2: Formula: (and (= (mod v_main_~i~0_1 2) 0) (= v_main_~j~0_1 (+ v_main_~j~0_2 2))) InVars {main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0] {926#(= 0 (mod main_~i~0 2))} is VALID [2022-04-27 16:18:23,166 INFO L290 TraceCheckUtils]: 8: Hoare triple {926#(= 0 (mod main_~i~0 2))} [84] L35-->L39: Formula: (and (not (= |v_main_#t~nondet2_5| 0)) (= v_main_~b~0_5 (+ v_main_~b~0_6 v_main_~j~0_8 (* (- 1) v_main_~i~0_7))) (= v_main_~i~0_6 (+ v_main_~i~0_7 2)) (= v_main_~a~0_5 (+ v_main_~a~0_6 1))) InVars {main_~i~0=v_main_~i~0_7, main_~b~0=v_main_~b~0_6, main_~j~0=v_main_~j~0_8, main_#t~nondet2=|v_main_#t~nondet2_5|, main_~a~0=v_main_~a~0_6} OutVars{main_~i~0=v_main_~i~0_6, main_#t~post3=|v_main_#t~post3_1|, main_~b~0=v_main_~b~0_5, main_~j~0=v_main_~j~0_8, main_~a~0=v_main_~a~0_5} AuxVars[] AssignedVars[main_#t~nondet2, main_~i~0, main_#t~post3, main_~b~0, main_~a~0] {926#(= 0 (mod main_~i~0 2))} is VALID [2022-04-27 16:18:23,166 INFO L290 TraceCheckUtils]: 7: Hoare triple {926#(= 0 (mod main_~i~0 2))} [80] L39-2-->L35: Formula: (and (<= 0 (+ |v_main_#t~nondet2_1| 2147483648)) (<= |v_main_#t~nondet2_1| 2147483647)) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] {926#(= 0 (mod main_~i~0 2))} is VALID [2022-04-27 16:18:23,167 INFO L290 TraceCheckUtils]: 6: Hoare triple {817#true} [77] L30-->L39-2: Formula: (and (not (= v_main_~flag~0_4 0)) (= v_main_~i~0_4 0)) InVars {main_~flag~0=v_main_~flag~0_4} OutVars{main_~i~0=v_main_~i~0_4, main_~flag~0=v_main_~flag~0_4} AuxVars[] AssignedVars[main_~i~0] {926#(= 0 (mod main_~i~0 2))} is VALID [2022-04-27 16:18:23,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {817#true} [75] mainENTRY-->L30: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~b~0_2 0) (= v_main_~j~0_5 1) (= v_main_~a~0_2 0) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648)) (= |v_main_#t~nondet1_2| v_main_~flag~0_3)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~flag~0=v_main_~flag~0_3, main_~i~0=v_main_~i~0_3, main_~b~0=v_main_~b~0_2, main_~j~0=v_main_~j~0_5, main_~a~0=v_main_~a~0_2} AuxVars[] AssignedVars[main_#t~nondet1, main_~j~0, main_~flag~0, main_~i~0, main_~b~0, main_~a~0] {817#true} is VALID [2022-04-27 16:18:23,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {817#true} [72] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {817#true} {817#true} [96] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {817#true} [76] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {817#true} [73] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 9) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {817#true} is VALID [2022-04-27 16:18:23,167 INFO L272 TraceCheckUtils]: 0: Hoare triple {817#true} [71] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {817#true} is VALID [2022-04-27 16:18:23,168 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-27 16:18:23,168 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [122583631] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-27 16:18:23,168 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-27 16:18:23,168 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6, 5] total 8 [2022-04-27 16:18:23,168 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801118840] [2022-04-27 16:18:23,168 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:18:23,168 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 16:18:23,169 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:18:23,169 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:23,182 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:23,182 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:18:23,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:18:23,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:18:23,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-04-27 16:18:23,183 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:23,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:23,205 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2022-04-27 16:18:23,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:18:23,205 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 16:18:23,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:18:23,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:23,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11 transitions. [2022-04-27 16:18:23,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:23,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11 transitions. [2022-04-27 16:18:23,206 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 11 transitions. [2022-04-27 16:18:23,215 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:18:23,215 INFO L225 Difference]: With dead ends: 13 [2022-04-27 16:18:23,215 INFO L226 Difference]: Without dead ends: 0 [2022-04-27 16:18:23,215 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-04-27 16:18:23,216 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 0 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 3 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:18:23,216 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 13 Invalid, 3 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:18:23,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-04-27 16:18:23,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-04-27 16:18:23,216 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:18:23,217 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:18:23,217 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:18:23,217 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:18:23,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:23,217 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:18:23,217 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:18:23,217 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:23,217 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:23,217 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:18:23,217 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:18:23,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:18:23,217 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:18:23,217 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:18:23,217 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:23,217 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:18:23,217 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:18:23,217 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:18:23,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:18:23,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-04-27 16:18:23,218 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 23 [2022-04-27 16:18:23,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:18:23,218 INFO L495 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-04-27 16:18:23,218 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:18:23,218 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:18:23,218 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:18:23,220 INFO L805 garLoopResultBuilder]: Registering result SAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 16:18:23,236 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 16:18:23,427 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:18:23,429 INFO L356 BasicCegarLoop]: Path program histogram: [2, 1, 1, 1, 1] [2022-04-27 16:18:23,431 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 16:18:23,433 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:18:23 BasicIcfg [2022-04-27 16:18:23,433 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 16:18:23,434 INFO L158 Benchmark]: Toolchain (without parser) took 13121.57ms. Allocated memory was 212.9MB in the beginning and 348.1MB in the end (delta: 135.3MB). Free memory was 159.0MB in the beginning and 290.8MB in the end (delta: -131.8MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2022-04-27 16:18:23,434 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 212.9MB. Free memory is still 175.6MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:18:23,434 INFO L158 Benchmark]: CACSL2BoogieTranslator took 227.34ms. Allocated memory was 212.9MB in the beginning and 348.1MB in the end (delta: 135.3MB). Free memory was 158.9MB in the beginning and 320.4MB in the end (delta: -161.5MB). Peak memory consumption was 7.4MB. Max. memory is 8.0GB. [2022-04-27 16:18:23,434 INFO L158 Benchmark]: Boogie Preprocessor took 39.17ms. Allocated memory is still 348.1MB. Free memory was 320.4MB in the beginning and 318.8MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-27 16:18:23,434 INFO L158 Benchmark]: RCFGBuilder took 242.58ms. Allocated memory is still 348.1MB. Free memory was 318.8MB in the beginning and 306.7MB in the end (delta: 12.1MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2022-04-27 16:18:23,434 INFO L158 Benchmark]: IcfgTransformer took 58.95ms. Allocated memory is still 348.1MB. Free memory was 306.7MB in the beginning and 305.7MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 16:18:23,435 INFO L158 Benchmark]: TraceAbstraction took 12548.59ms. Allocated memory is still 348.1MB. Free memory was 305.2MB in the beginning and 290.8MB in the end (delta: 14.4MB). Peak memory consumption was 14.9MB. Max. memory is 8.0GB. [2022-04-27 16:18:23,435 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 212.9MB. Free memory is still 175.6MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 227.34ms. Allocated memory was 212.9MB in the beginning and 348.1MB in the end (delta: 135.3MB). Free memory was 158.9MB in the beginning and 320.4MB in the end (delta: -161.5MB). Peak memory consumption was 7.4MB. Max. memory is 8.0GB. * Boogie Preprocessor took 39.17ms. Allocated memory is still 348.1MB. Free memory was 320.4MB in the beginning and 318.8MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 242.58ms. Allocated memory is still 348.1MB. Free memory was 318.8MB in the beginning and 306.7MB in the end (delta: 12.1MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * IcfgTransformer took 58.95ms. Allocated memory is still 348.1MB. Free memory was 306.7MB in the beginning and 305.7MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 12548.59ms. Allocated memory is still 348.1MB. Free memory was 305.2MB in the beginning and 290.8MB in the end (delta: 14.4MB). Peak memory consumption was 14.9MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 19]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 23 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 12.5s, OverallIterations: 6, TraceHistogramMax: 4, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.0s, AutomataDifference: 9.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 114 SdHoareTripleChecker+Valid, 2.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 113 mSDsluCounter, 222 SdHoareTripleChecker+Invalid, 2.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 121 mSDsCounter, 51 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 342 IncrementalHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 51 mSolverCounterUnsat, 101 mSDtfsCounter, 342 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 184 GetRequests, 113 SyntacticMatches, 5 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 304 ImplicationChecksByTransitivity, 4.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24occurred in iteration=5, InterpolantAutomatonStates: 40, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 6 MinimizatonAttempts, 9 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 164 NumberOfCodeBlocks, 164 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 212 ConstructedInterpolants, 0 QuantifiedInterpolants, 1322 SizeOfPredicates, 5 NumberOfNonLiveVariables, 263 ConjunctsInSsa, 45 ConjunctsInUnsatCore, 12 InterpolantComputations, 4 PerfectInterpolantSequences, 41/74 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2022-04-27 16:18:23,449 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...