/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-acceleration/diamond_1-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:10:45,577 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:10:45,587 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:10:45,633 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 16:10:45,633 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 16:10:45,635 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 16:10:45,638 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 16:10:45,640 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 16:10:45,641 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 16:10:45,646 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 16:10:45,647 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 16:10:45,648 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 16:10:45,648 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:10:45,651 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:10:45,651 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:10:45,654 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:10:45,655 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:10:45,655 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:10:45,657 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:10:45,662 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:10:45,663 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:10:45,665 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:10:45,665 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:10:45,666 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:10:45,667 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:10:45,673 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 16:10:45,681 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:10:45,681 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:10:45,683 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:10:45,683 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:10:45,693 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:10:45,694 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:10:45,696 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:10:45,696 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:10:45,696 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:10:45,696 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:10:45,696 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:10:45,696 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:10:45,696 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:10:45,697 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:10:45,697 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:10:45,697 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:10:45,698 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:10:45,698 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:10:45,698 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:10:45,698 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:10:45,698 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:10:45,698 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:10:45,698 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:10:45,698 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:10:45,699 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:10:45,699 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:10:45,699 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:10:45,917 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:10:45,935 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:10:45,937 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:10:45,938 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:10:45,941 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:10:45,942 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/diamond_1-2.c [2022-04-27 16:10:46,007 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7e465bf9a/f243d154077c4af6877a6e3232c245c0/FLAGd65e36e43 [2022-04-27 16:10:46,316 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:10:46,317 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-2.c [2022-04-27 16:10:46,322 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7e465bf9a/f243d154077c4af6877a6e3232c245c0/FLAGd65e36e43 [2022-04-27 16:10:46,729 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7e465bf9a/f243d154077c4af6877a6e3232c245c0 [2022-04-27 16:10:46,731 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:10:46,732 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:10:46,735 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:10:46,736 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:10:46,739 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:10:46,741 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:46,742 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c0d50f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46, skipping insertion in model container [2022-04-27 16:10:46,742 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:46,748 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:10:46,759 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:10:46,876 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-2.c[373,386] [2022-04-27 16:10:46,906 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:10:46,912 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:10:46,941 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-2.c[373,386] [2022-04-27 16:10:46,944 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:10:46,962 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:10:46,962 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46 WrapperNode [2022-04-27 16:10:46,963 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:10:46,964 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:10:46,964 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:10:46,964 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:10:46,973 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:46,973 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:46,980 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:46,980 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:46,996 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:47,002 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:47,003 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:47,005 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:10:47,005 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:10:47,006 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:10:47,006 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:10:47,007 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (1/1) ... [2022-04-27 16:10:47,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:10:47,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:47,042 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:10:47,043 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:10:47,068 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:10:47,068 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:10:47,068 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:10:47,069 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:10:47,069 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:10:47,069 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:10:47,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:10:47,070 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:10:47,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:10:47,070 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:10:47,070 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:10:47,070 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:10:47,116 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:10:47,117 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:10:47,205 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:10:47,210 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:10:47,211 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 16:10:47,212 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:10:47 BoogieIcfgContainer [2022-04-27 16:10:47,212 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:10:47,213 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:10:47,213 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:10:47,214 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:10:47,217 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:10:47" (1/1) ... [2022-04-27 16:10:47,219 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:10:47,234 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:10:47 BasicIcfg [2022-04-27 16:10:47,234 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:10:47,235 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:10:47,236 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:10:47,238 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:10:47,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:10:46" (1/4) ... [2022-04-27 16:10:47,239 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74f45990 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:10:47, skipping insertion in model container [2022-04-27 16:10:47,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:10:46" (2/4) ... [2022-04-27 16:10:47,240 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74f45990 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:10:47, skipping insertion in model container [2022-04-27 16:10:47,240 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:10:47" (3/4) ... [2022-04-27 16:10:47,240 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74f45990 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:10:47, skipping insertion in model container [2022-04-27 16:10:47,240 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:10:47" (4/4) ... [2022-04-27 16:10:47,241 INFO L111 eAbstractionObserver]: Analyzing ICFG diamond_1-2.cJordan [2022-04-27 16:10:47,254 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:10:47,254 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:10:47,290 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:10:47,305 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5c06fde9, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2f312a9f [2022-04-27 16:10:47,305 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:10:47,313 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:10:47,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 16:10:47,319 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:47,319 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:47,320 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:47,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:47,324 INFO L85 PathProgramCache]: Analyzing trace with hash -756157467, now seen corresponding path program 1 times [2022-04-27 16:10:47,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:47,337 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413050406] [2022-04-27 16:10:47,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:47,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:47,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:47,460 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:47,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:47,478 INFO L290 TraceCheckUtils]: 0: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-27 16:10:47,479 INFO L290 TraceCheckUtils]: 1: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:10:47,479 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:10:47,481 INFO L272 TraceCheckUtils]: 0: Hoare triple {22#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:47,481 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-27 16:10:47,482 INFO L290 TraceCheckUtils]: 2: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:10:47,482 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:10:47,482 INFO L272 TraceCheckUtils]: 4: Hoare triple {22#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:10:47,483 INFO L290 TraceCheckUtils]: 5: Hoare triple {22#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {22#true} is VALID [2022-04-27 16:10:47,484 INFO L290 TraceCheckUtils]: 6: Hoare triple {22#true} [51] L18-2-->L17-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-27 16:10:47,484 INFO L272 TraceCheckUtils]: 7: Hoare triple {23#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {23#false} is VALID [2022-04-27 16:10:47,484 INFO L290 TraceCheckUtils]: 8: Hoare triple {23#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23#false} is VALID [2022-04-27 16:10:47,484 INFO L290 TraceCheckUtils]: 9: Hoare triple {23#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-27 16:10:47,485 INFO L290 TraceCheckUtils]: 10: Hoare triple {23#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-27 16:10:47,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:47,486 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:47,486 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [413050406] [2022-04-27 16:10:47,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [413050406] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:10:47,487 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:10:47,487 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:10:47,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190428322] [2022-04-27 16:10:47,489 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:10:47,494 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:10:47,496 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:47,507 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,533 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:47,533 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:10:47,534 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:47,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:10:47,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:10:47,564 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:47,660 INFO L93 Difference]: Finished difference Result 19 states and 20 transitions. [2022-04-27 16:10:47,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:10:47,661 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:10:47,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:47,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 22 transitions. [2022-04-27 16:10:47,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 22 transitions. [2022-04-27 16:10:47,685 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 22 transitions. [2022-04-27 16:10:47,721 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:47,728 INFO L225 Difference]: With dead ends: 19 [2022-04-27 16:10:47,728 INFO L226 Difference]: Without dead ends: 13 [2022-04-27 16:10:47,731 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:10:47,738 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 11 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:47,739 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 22 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:10:47,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-27 16:10:47,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-27 16:10:47,765 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:47,766 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,767 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,768 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:47,772 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-27 16:10:47,772 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-27 16:10:47,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:47,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:47,775 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 16:10:47,775 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 16:10:47,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:47,781 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-27 16:10:47,781 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-27 16:10:47,782 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:47,782 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:47,782 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:47,782 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:47,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2022-04-27 16:10:47,785 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 11 [2022-04-27 16:10:47,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:47,785 INFO L495 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-04-27 16:10:47,786 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,786 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-27 16:10:47,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 16:10:47,787 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:47,787 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:47,788 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:10:47,789 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:47,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:47,796 INFO L85 PathProgramCache]: Analyzing trace with hash -755233946, now seen corresponding path program 1 times [2022-04-27 16:10:47,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:47,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995017636] [2022-04-27 16:10:47,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:47,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:47,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:47,919 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:47,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:47,931 INFO L290 TraceCheckUtils]: 0: Hoare triple {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88#true} is VALID [2022-04-27 16:10:47,932 INFO L290 TraceCheckUtils]: 1: Hoare triple {88#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:10:47,932 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {88#true} {88#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:10:47,933 INFO L272 TraceCheckUtils]: 0: Hoare triple {88#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:47,933 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88#true} is VALID [2022-04-27 16:10:47,933 INFO L290 TraceCheckUtils]: 2: Hoare triple {88#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:10:47,934 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {88#true} {88#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:10:47,934 INFO L272 TraceCheckUtils]: 4: Hoare triple {88#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:10:47,935 INFO L290 TraceCheckUtils]: 5: Hoare triple {88#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {93#(= main_~x~0 0)} is VALID [2022-04-27 16:10:47,935 INFO L290 TraceCheckUtils]: 6: Hoare triple {93#(= main_~x~0 0)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-27 16:10:47,936 INFO L272 TraceCheckUtils]: 7: Hoare triple {89#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {89#false} is VALID [2022-04-27 16:10:47,936 INFO L290 TraceCheckUtils]: 8: Hoare triple {89#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {89#false} is VALID [2022-04-27 16:10:47,936 INFO L290 TraceCheckUtils]: 9: Hoare triple {89#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-27 16:10:47,936 INFO L290 TraceCheckUtils]: 10: Hoare triple {89#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-27 16:10:47,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:47,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:47,937 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995017636] [2022-04-27 16:10:47,937 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [995017636] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:10:47,937 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:10:47,937 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:10:47,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956344408] [2022-04-27 16:10:47,938 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:10:47,939 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:10:47,939 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:47,940 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:47,951 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:47,951 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:10:47,951 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:47,952 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:10:47,952 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:10:47,952 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:48,021 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 16:10:48,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 16:10:48,022 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:10:48,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:48,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-27 16:10:48,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-27 16:10:48,027 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 18 transitions. [2022-04-27 16:10:48,049 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:48,051 INFO L225 Difference]: With dead ends: 15 [2022-04-27 16:10:48,051 INFO L226 Difference]: Without dead ends: 15 [2022-04-27 16:10:48,052 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:10:48,053 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:48,053 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 18 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:10:48,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-27 16:10:48,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 14. [2022-04-27 16:10:48,055 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:48,055 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,056 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,056 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:48,057 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 16:10:48,057 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 16:10:48,058 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:48,058 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:48,058 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 16:10:48,058 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 16:10:48,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:48,059 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 16:10:48,059 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 16:10:48,060 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:48,060 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:48,060 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:48,060 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:48,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-27 16:10:48,061 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 11 [2022-04-27 16:10:48,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:48,062 INFO L495 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-27 16:10:48,062 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,062 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-27 16:10:48,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-27 16:10:48,062 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:48,063 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:48,063 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:10:48,063 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:48,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:48,064 INFO L85 PathProgramCache]: Analyzing trace with hash 980092676, now seen corresponding path program 1 times [2022-04-27 16:10:48,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:48,064 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352234836] [2022-04-27 16:10:48,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:48,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:48,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:48,132 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:48,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:48,139 INFO L290 TraceCheckUtils]: 0: Hoare triple {165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-27 16:10:48,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,140 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,140 INFO L272 TraceCheckUtils]: 0: Hoare triple {158#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:48,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-27 16:10:48,141 INFO L290 TraceCheckUtils]: 2: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,141 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,141 INFO L272 TraceCheckUtils]: 4: Hoare triple {158#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,142 INFO L290 TraceCheckUtils]: 5: Hoare triple {158#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {163#(= main_~x~0 0)} is VALID [2022-04-27 16:10:48,142 INFO L290 TraceCheckUtils]: 6: Hoare triple {163#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {163#(= main_~x~0 0)} is VALID [2022-04-27 16:10:48,143 INFO L290 TraceCheckUtils]: 7: Hoare triple {163#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {164#(and (<= main_~x~0 1) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:10:48,144 INFO L290 TraceCheckUtils]: 8: Hoare triple {164#(and (<= main_~x~0 1) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,144 INFO L272 TraceCheckUtils]: 9: Hoare triple {159#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {159#false} is VALID [2022-04-27 16:10:48,144 INFO L290 TraceCheckUtils]: 10: Hoare triple {159#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {159#false} is VALID [2022-04-27 16:10:48,144 INFO L290 TraceCheckUtils]: 11: Hoare triple {159#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,145 INFO L290 TraceCheckUtils]: 12: Hoare triple {159#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,145 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:48,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:48,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352234836] [2022-04-27 16:10:48,145 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [352234836] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:10:48,146 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1177622223] [2022-04-27 16:10:48,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:48,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:48,146 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:48,155 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:10:48,167 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:10:48,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:48,196 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-27 16:10:48,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:48,218 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:10:48,294 INFO L272 TraceCheckUtils]: 0: Hoare triple {158#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {158#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-27 16:10:48,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,298 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,298 INFO L272 TraceCheckUtils]: 4: Hoare triple {158#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {158#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {163#(= main_~x~0 0)} is VALID [2022-04-27 16:10:48,303 INFO L290 TraceCheckUtils]: 6: Hoare triple {163#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {163#(= main_~x~0 0)} is VALID [2022-04-27 16:10:48,304 INFO L290 TraceCheckUtils]: 7: Hoare triple {163#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {190#(= main_~x~0 1)} is VALID [2022-04-27 16:10:48,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {190#(= main_~x~0 1)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,308 INFO L272 TraceCheckUtils]: 9: Hoare triple {159#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {159#false} is VALID [2022-04-27 16:10:48,308 INFO L290 TraceCheckUtils]: 10: Hoare triple {159#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {159#false} is VALID [2022-04-27 16:10:48,308 INFO L290 TraceCheckUtils]: 11: Hoare triple {159#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,309 INFO L290 TraceCheckUtils]: 12: Hoare triple {159#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,309 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:48,309 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:10:48,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {159#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,405 INFO L290 TraceCheckUtils]: 11: Hoare triple {159#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,406 INFO L290 TraceCheckUtils]: 10: Hoare triple {159#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {159#false} is VALID [2022-04-27 16:10:48,406 INFO L272 TraceCheckUtils]: 9: Hoare triple {159#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {159#false} is VALID [2022-04-27 16:10:48,407 INFO L290 TraceCheckUtils]: 8: Hoare triple {218#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-27 16:10:48,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {222#(< (mod (+ main_~x~0 1) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {218#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:10:48,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {222#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {222#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:10:48,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {158#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {222#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:10:48,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {158#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,410 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,410 INFO L290 TraceCheckUtils]: 2: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {158#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-27 16:10:48,410 INFO L272 TraceCheckUtils]: 0: Hoare triple {158#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-27 16:10:48,411 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:48,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1177622223] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:10:48,414 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:10:48,414 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-27 16:10:48,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1529611272] [2022-04-27 16:10:48,415 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:10:48,417 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 16:10:48,418 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:48,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,436 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:48,436 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:10:48,436 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:48,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:10:48,438 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-04-27 16:10:48,439 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:48,608 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2022-04-27 16:10:48,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 16:10:48,609 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 16:10:48,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:48,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2022-04-27 16:10:48,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2022-04-27 16:10:48,613 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 27 transitions. [2022-04-27 16:10:48,642 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:48,643 INFO L225 Difference]: With dead ends: 20 [2022-04-27 16:10:48,643 INFO L226 Difference]: Without dead ends: 20 [2022-04-27 16:10:48,644 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2022-04-27 16:10:48,645 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 15 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:48,645 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 28 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:10:48,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-27 16:10:48,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-27 16:10:48,647 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:48,648 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,648 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,648 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:48,650 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2022-04-27 16:10:48,650 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-04-27 16:10:48,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:48,650 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:48,650 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-27 16:10:48,650 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-27 16:10:48,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:48,652 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2022-04-27 16:10:48,652 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-04-27 16:10:48,652 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:48,652 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:48,652 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:48,652 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:48,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2022-04-27 16:10:48,654 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 13 [2022-04-27 16:10:48,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:48,654 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2022-04-27 16:10:48,654 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:48,654 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-04-27 16:10:48,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 16:10:48,655 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:48,655 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:48,686 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 16:10:48,869 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:48,870 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:48,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:48,870 INFO L85 PathProgramCache]: Analyzing trace with hash -341862240, now seen corresponding path program 1 times [2022-04-27 16:10:48,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:48,871 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487003197] [2022-04-27 16:10:48,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:48,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:48,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:48,988 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:48,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:49,000 INFO L290 TraceCheckUtils]: 0: Hoare triple {342#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {334#true} is VALID [2022-04-27 16:10:49,000 INFO L290 TraceCheckUtils]: 1: Hoare triple {334#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,000 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {334#true} {334#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,001 INFO L272 TraceCheckUtils]: 0: Hoare triple {334#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {342#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:49,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {342#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {334#true} is VALID [2022-04-27 16:10:49,002 INFO L290 TraceCheckUtils]: 2: Hoare triple {334#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {334#true} {334#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {334#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,002 INFO L290 TraceCheckUtils]: 5: Hoare triple {334#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {339#(= main_~x~0 0)} is VALID [2022-04-27 16:10:49,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {339#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {339#(= main_~x~0 0)} is VALID [2022-04-27 16:10:49,003 INFO L290 TraceCheckUtils]: 7: Hoare triple {339#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:49,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:49,005 INFO L290 TraceCheckUtils]: 9: Hoare triple {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {341#(and (<= main_~x~0 4) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:10:49,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {341#(and (<= main_~x~0 4) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,006 INFO L272 TraceCheckUtils]: 11: Hoare triple {335#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {335#false} is VALID [2022-04-27 16:10:49,006 INFO L290 TraceCheckUtils]: 12: Hoare triple {335#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {335#false} is VALID [2022-04-27 16:10:49,006 INFO L290 TraceCheckUtils]: 13: Hoare triple {335#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,006 INFO L290 TraceCheckUtils]: 14: Hoare triple {335#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,006 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:49,007 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:49,007 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487003197] [2022-04-27 16:10:49,007 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [487003197] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:10:49,007 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [725408598] [2022-04-27 16:10:49,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:49,007 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:49,007 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:49,008 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:10:49,010 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:10:49,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:49,043 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:10:49,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:49,049 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:10:49,275 INFO L272 TraceCheckUtils]: 0: Hoare triple {334#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,276 INFO L290 TraceCheckUtils]: 1: Hoare triple {334#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {334#true} is VALID [2022-04-27 16:10:49,276 INFO L290 TraceCheckUtils]: 2: Hoare triple {334#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,276 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {334#true} {334#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,276 INFO L272 TraceCheckUtils]: 4: Hoare triple {334#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,277 INFO L290 TraceCheckUtils]: 5: Hoare triple {334#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {339#(= main_~x~0 0)} is VALID [2022-04-27 16:10:49,277 INFO L290 TraceCheckUtils]: 6: Hoare triple {339#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {339#(= main_~x~0 0)} is VALID [2022-04-27 16:10:49,278 INFO L290 TraceCheckUtils]: 7: Hoare triple {339#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:49,278 INFO L290 TraceCheckUtils]: 8: Hoare triple {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:49,279 INFO L290 TraceCheckUtils]: 9: Hoare triple {340#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {373#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:49,280 INFO L290 TraceCheckUtils]: 10: Hoare triple {373#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,280 INFO L272 TraceCheckUtils]: 11: Hoare triple {335#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {335#false} is VALID [2022-04-27 16:10:49,280 INFO L290 TraceCheckUtils]: 12: Hoare triple {335#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {335#false} is VALID [2022-04-27 16:10:49,280 INFO L290 TraceCheckUtils]: 13: Hoare triple {335#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,281 INFO L290 TraceCheckUtils]: 14: Hoare triple {335#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,281 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:49,281 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:10:49,361 INFO L290 TraceCheckUtils]: 14: Hoare triple {335#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,362 INFO L290 TraceCheckUtils]: 13: Hoare triple {335#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,362 INFO L290 TraceCheckUtils]: 12: Hoare triple {335#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {335#false} is VALID [2022-04-27 16:10:49,362 INFO L272 TraceCheckUtils]: 11: Hoare triple {335#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {335#false} is VALID [2022-04-27 16:10:49,363 INFO L290 TraceCheckUtils]: 10: Hoare triple {401#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {335#false} is VALID [2022-04-27 16:10:49,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {405#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {401#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:10:49,365 INFO L290 TraceCheckUtils]: 8: Hoare triple {405#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {405#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:49,366 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {405#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:49,367 INFO L290 TraceCheckUtils]: 6: Hoare triple {412#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {412#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:49,368 INFO L290 TraceCheckUtils]: 5: Hoare triple {334#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {412#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:49,368 INFO L272 TraceCheckUtils]: 4: Hoare triple {334#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,369 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {334#true} {334#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,369 INFO L290 TraceCheckUtils]: 2: Hoare triple {334#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,369 INFO L290 TraceCheckUtils]: 1: Hoare triple {334#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {334#true} is VALID [2022-04-27 16:10:49,370 INFO L272 TraceCheckUtils]: 0: Hoare triple {334#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {334#true} is VALID [2022-04-27 16:10:49,370 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:49,370 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [725408598] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:10:49,372 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:10:49,372 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-27 16:10:49,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822590389] [2022-04-27 16:10:49,375 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:10:49,376 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 16:10:49,376 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:49,376 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,395 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:49,396 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 16:10:49,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:49,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 16:10:49,397 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2022-04-27 16:10:49,397 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:49,754 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2022-04-27 16:10:49,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 16:10:49,754 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 16:10:49,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:49,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 37 transitions. [2022-04-27 16:10:49,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 37 transitions. [2022-04-27 16:10:49,757 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 37 transitions. [2022-04-27 16:10:49,815 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:49,817 INFO L225 Difference]: With dead ends: 31 [2022-04-27 16:10:49,817 INFO L226 Difference]: Without dead ends: 31 [2022-04-27 16:10:49,817 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=176, Unknown=0, NotChecked=0, Total=272 [2022-04-27 16:10:49,818 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 17 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:49,818 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 28 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:10:49,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-27 16:10:49,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 24. [2022-04-27 16:10:49,821 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:49,821 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 24 states, 19 states have (on average 1.368421052631579) internal successors, (26), 19 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,821 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 24 states, 19 states have (on average 1.368421052631579) internal successors, (26), 19 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,821 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 24 states, 19 states have (on average 1.368421052631579) internal successors, (26), 19 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:49,823 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2022-04-27 16:10:49,823 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 40 transitions. [2022-04-27 16:10:49,824 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:49,824 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:49,824 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 19 states have (on average 1.368421052631579) internal successors, (26), 19 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-27 16:10:49,824 INFO L87 Difference]: Start difference. First operand has 24 states, 19 states have (on average 1.368421052631579) internal successors, (26), 19 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-27 16:10:49,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:49,826 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2022-04-27 16:10:49,826 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 40 transitions. [2022-04-27 16:10:49,826 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:49,827 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:49,827 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:49,827 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:49,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.368421052631579) internal successors, (26), 19 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 30 transitions. [2022-04-27 16:10:49,828 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 30 transitions. Word has length 15 [2022-04-27 16:10:49,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:49,828 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 30 transitions. [2022-04-27 16:10:49,828 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:49,829 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 30 transitions. [2022-04-27 16:10:49,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 16:10:49,829 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:49,829 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:49,849 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-27 16:10:50,043 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 16:10:50,044 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:50,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:50,044 INFO L85 PathProgramCache]: Analyzing trace with hash 265640572, now seen corresponding path program 2 times [2022-04-27 16:10:50,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:50,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924761903] [2022-04-27 16:10:50,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:50,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:50,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:50,175 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:50,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:50,182 INFO L290 TraceCheckUtils]: 0: Hoare triple {578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {567#true} is VALID [2022-04-27 16:10:50,182 INFO L290 TraceCheckUtils]: 1: Hoare triple {567#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,182 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {567#true} {567#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,183 INFO L272 TraceCheckUtils]: 0: Hoare triple {567#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:50,183 INFO L290 TraceCheckUtils]: 1: Hoare triple {578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {567#true} is VALID [2022-04-27 16:10:50,183 INFO L290 TraceCheckUtils]: 2: Hoare triple {567#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,183 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {567#true} {567#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,183 INFO L272 TraceCheckUtils]: 4: Hoare triple {567#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,184 INFO L290 TraceCheckUtils]: 5: Hoare triple {567#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {572#(= main_~x~0 0)} is VALID [2022-04-27 16:10:50,184 INFO L290 TraceCheckUtils]: 6: Hoare triple {572#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {572#(= main_~x~0 0)} is VALID [2022-04-27 16:10:50,184 INFO L290 TraceCheckUtils]: 7: Hoare triple {572#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:50,185 INFO L290 TraceCheckUtils]: 8: Hoare triple {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:50,186 INFO L290 TraceCheckUtils]: 9: Hoare triple {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:50,186 INFO L290 TraceCheckUtils]: 10: Hoare triple {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:50,187 INFO L290 TraceCheckUtils]: 11: Hoare triple {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:50,187 INFO L290 TraceCheckUtils]: 12: Hoare triple {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:50,188 INFO L290 TraceCheckUtils]: 13: Hoare triple {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:50,188 INFO L290 TraceCheckUtils]: 14: Hoare triple {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:50,189 INFO L290 TraceCheckUtils]: 15: Hoare triple {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {577#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:50,189 INFO L290 TraceCheckUtils]: 16: Hoare triple {577#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 5))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,190 INFO L272 TraceCheckUtils]: 17: Hoare triple {568#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {568#false} is VALID [2022-04-27 16:10:50,190 INFO L290 TraceCheckUtils]: 18: Hoare triple {568#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {568#false} is VALID [2022-04-27 16:10:50,190 INFO L290 TraceCheckUtils]: 19: Hoare triple {568#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,190 INFO L290 TraceCheckUtils]: 20: Hoare triple {568#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,190 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:50,190 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:50,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924761903] [2022-04-27 16:10:50,191 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [924761903] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:10:50,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [852191588] [2022-04-27 16:10:50,191 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:10:50,191 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:50,191 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:50,192 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:10:50,193 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:10:50,237 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:10:50,237 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:10:50,238 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 16:10:50,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:50,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:10:50,513 INFO L272 TraceCheckUtils]: 0: Hoare triple {567#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {567#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {567#true} is VALID [2022-04-27 16:10:50,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {567#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,514 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {567#true} {567#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,514 INFO L272 TraceCheckUtils]: 4: Hoare triple {567#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,514 INFO L290 TraceCheckUtils]: 5: Hoare triple {567#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {572#(= main_~x~0 0)} is VALID [2022-04-27 16:10:50,515 INFO L290 TraceCheckUtils]: 6: Hoare triple {572#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {572#(= main_~x~0 0)} is VALID [2022-04-27 16:10:50,516 INFO L290 TraceCheckUtils]: 7: Hoare triple {572#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:50,516 INFO L290 TraceCheckUtils]: 8: Hoare triple {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:50,517 INFO L290 TraceCheckUtils]: 9: Hoare triple {573#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:50,517 INFO L290 TraceCheckUtils]: 10: Hoare triple {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:50,518 INFO L290 TraceCheckUtils]: 11: Hoare triple {574#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:50,518 INFO L290 TraceCheckUtils]: 12: Hoare triple {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:50,519 INFO L290 TraceCheckUtils]: 13: Hoare triple {575#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:50,520 INFO L290 TraceCheckUtils]: 14: Hoare triple {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:50,520 INFO L290 TraceCheckUtils]: 15: Hoare triple {576#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {627#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:50,521 INFO L290 TraceCheckUtils]: 16: Hoare triple {627#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,521 INFO L272 TraceCheckUtils]: 17: Hoare triple {568#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {568#false} is VALID [2022-04-27 16:10:50,521 INFO L290 TraceCheckUtils]: 18: Hoare triple {568#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {568#false} is VALID [2022-04-27 16:10:50,521 INFO L290 TraceCheckUtils]: 19: Hoare triple {568#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,521 INFO L290 TraceCheckUtils]: 20: Hoare triple {568#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,522 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:50,522 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:10:50,705 INFO L290 TraceCheckUtils]: 20: Hoare triple {568#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,706 INFO L290 TraceCheckUtils]: 19: Hoare triple {568#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,706 INFO L290 TraceCheckUtils]: 18: Hoare triple {568#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {568#false} is VALID [2022-04-27 16:10:50,706 INFO L272 TraceCheckUtils]: 17: Hoare triple {568#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {568#false} is VALID [2022-04-27 16:10:50,706 INFO L290 TraceCheckUtils]: 16: Hoare triple {655#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {568#false} is VALID [2022-04-27 16:10:50,707 INFO L290 TraceCheckUtils]: 15: Hoare triple {659#(< (mod (+ main_~x~0 1) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {655#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:10:50,709 INFO L290 TraceCheckUtils]: 14: Hoare triple {659#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {659#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:10:50,710 INFO L290 TraceCheckUtils]: 13: Hoare triple {666#(< (mod (+ main_~x~0 2) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {659#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:10:50,710 INFO L290 TraceCheckUtils]: 12: Hoare triple {666#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {666#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:50,711 INFO L290 TraceCheckUtils]: 11: Hoare triple {673#(< (mod (+ main_~x~0 3) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {666#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:50,714 INFO L290 TraceCheckUtils]: 10: Hoare triple {673#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {673#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-27 16:10:50,724 INFO L290 TraceCheckUtils]: 9: Hoare triple {680#(< (mod (+ main_~x~0 4) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {673#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-27 16:10:50,725 INFO L290 TraceCheckUtils]: 8: Hoare triple {680#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {680#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:50,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {687#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {680#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:50,726 INFO L290 TraceCheckUtils]: 6: Hoare triple {687#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {687#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:10:50,727 INFO L290 TraceCheckUtils]: 5: Hoare triple {567#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {687#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:10:50,727 INFO L272 TraceCheckUtils]: 4: Hoare triple {567#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,727 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {567#true} {567#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,727 INFO L290 TraceCheckUtils]: 2: Hoare triple {567#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,727 INFO L290 TraceCheckUtils]: 1: Hoare triple {567#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {567#true} is VALID [2022-04-27 16:10:50,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {567#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#true} is VALID [2022-04-27 16:10:50,728 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:50,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [852191588] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:10:50,728 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:10:50,728 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-27 16:10:50,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224212498] [2022-04-27 16:10:50,729 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:10:50,729 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 16:10:50,729 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:50,730 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:50,760 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:50,760 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 16:10:50,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:50,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 16:10:50,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=163, Unknown=0, NotChecked=0, Total=240 [2022-04-27 16:10:50,762 INFO L87 Difference]: Start difference. First operand 24 states and 30 transitions. Second operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:51,697 INFO L93 Difference]: Finished difference Result 66 states and 90 transitions. [2022-04-27 16:10:51,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 16:10:51,697 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 16:10:51,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:51,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 55 transitions. [2022-04-27 16:10:51,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 55 transitions. [2022-04-27 16:10:51,701 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 55 transitions. [2022-04-27 16:10:51,798 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:51,800 INFO L225 Difference]: With dead ends: 66 [2022-04-27 16:10:51,800 INFO L226 Difference]: Without dead ends: 66 [2022-04-27 16:10:51,800 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=233, Invalid=523, Unknown=0, NotChecked=0, Total=756 [2022-04-27 16:10:51,801 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 31 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 68 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 48 SdHoareTripleChecker+Invalid, 229 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 68 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:51,801 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 48 Invalid, 229 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [68 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 16:10:51,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-04-27 16:10:51,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 36. [2022-04-27 16:10:51,805 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:51,805 INFO L82 GeneralOperation]: Start isEquivalent. First operand 66 states. Second operand has 36 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 31 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,805 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand has 36 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 31 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,805 INFO L87 Difference]: Start difference. First operand 66 states. Second operand has 36 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 31 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:51,808 INFO L93 Difference]: Finished difference Result 66 states and 90 transitions. [2022-04-27 16:10:51,808 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 90 transitions. [2022-04-27 16:10:51,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:51,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:51,809 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 31 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 66 states. [2022-04-27 16:10:51,809 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 31 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 66 states. [2022-04-27 16:10:51,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:51,812 INFO L93 Difference]: Finished difference Result 66 states and 90 transitions. [2022-04-27 16:10:51,812 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 90 transitions. [2022-04-27 16:10:51,812 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:51,812 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:51,813 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:51,813 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:51,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.4193548387096775) internal successors, (44), 31 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 48 transitions. [2022-04-27 16:10:51,814 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 48 transitions. Word has length 21 [2022-04-27 16:10:51,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:51,814 INFO L495 AbstractCegarLoop]: Abstraction has 36 states and 48 transitions. [2022-04-27 16:10:51,814 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 15 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:51,814 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 48 transitions. [2022-04-27 16:10:51,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 16:10:51,815 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:51,815 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:51,838 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 16:10:52,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:52,036 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:52,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:52,036 INFO L85 PathProgramCache]: Analyzing trace with hash -819090412, now seen corresponding path program 2 times [2022-04-27 16:10:52,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:52,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623486049] [2022-04-27 16:10:52,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:52,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:52,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:52,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:52,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:52,176 INFO L290 TraceCheckUtils]: 0: Hoare triple {981#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {969#true} is VALID [2022-04-27 16:10:52,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {969#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,177 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {969#true} {969#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,177 INFO L272 TraceCheckUtils]: 0: Hoare triple {969#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {981#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:52,177 INFO L290 TraceCheckUtils]: 1: Hoare triple {981#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {969#true} is VALID [2022-04-27 16:10:52,177 INFO L290 TraceCheckUtils]: 2: Hoare triple {969#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,178 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {969#true} {969#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,178 INFO L272 TraceCheckUtils]: 4: Hoare triple {969#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,178 INFO L290 TraceCheckUtils]: 5: Hoare triple {969#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {974#(= main_~x~0 0)} is VALID [2022-04-27 16:10:52,178 INFO L290 TraceCheckUtils]: 6: Hoare triple {974#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {974#(= main_~x~0 0)} is VALID [2022-04-27 16:10:52,179 INFO L290 TraceCheckUtils]: 7: Hoare triple {974#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:52,179 INFO L290 TraceCheckUtils]: 8: Hoare triple {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:52,180 INFO L290 TraceCheckUtils]: 9: Hoare triple {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:52,180 INFO L290 TraceCheckUtils]: 10: Hoare triple {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:52,181 INFO L290 TraceCheckUtils]: 11: Hoare triple {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:52,181 INFO L290 TraceCheckUtils]: 12: Hoare triple {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:52,182 INFO L290 TraceCheckUtils]: 13: Hoare triple {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:52,182 INFO L290 TraceCheckUtils]: 14: Hoare triple {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:52,183 INFO L290 TraceCheckUtils]: 15: Hoare triple {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:52,183 INFO L290 TraceCheckUtils]: 16: Hoare triple {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:52,184 INFO L290 TraceCheckUtils]: 17: Hoare triple {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {980#(and (<= main_~x~0 12) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:10:52,184 INFO L290 TraceCheckUtils]: 18: Hoare triple {980#(and (<= main_~x~0 12) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,185 INFO L272 TraceCheckUtils]: 19: Hoare triple {970#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {970#false} is VALID [2022-04-27 16:10:52,185 INFO L290 TraceCheckUtils]: 20: Hoare triple {970#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {970#false} is VALID [2022-04-27 16:10:52,185 INFO L290 TraceCheckUtils]: 21: Hoare triple {970#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,185 INFO L290 TraceCheckUtils]: 22: Hoare triple {970#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,185 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:52,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:52,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623486049] [2022-04-27 16:10:52,186 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1623486049] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:10:52,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1418618930] [2022-04-27 16:10:52,186 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:10:52,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:52,186 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:52,187 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:10:52,188 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 16:10:52,222 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:10:52,222 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:10:52,223 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-27 16:10:52,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:52,231 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:10:52,496 INFO L272 TraceCheckUtils]: 0: Hoare triple {969#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,497 INFO L290 TraceCheckUtils]: 1: Hoare triple {969#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {969#true} is VALID [2022-04-27 16:10:52,497 INFO L290 TraceCheckUtils]: 2: Hoare triple {969#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,498 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {969#true} {969#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,498 INFO L272 TraceCheckUtils]: 4: Hoare triple {969#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,499 INFO L290 TraceCheckUtils]: 5: Hoare triple {969#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {974#(= main_~x~0 0)} is VALID [2022-04-27 16:10:52,499 INFO L290 TraceCheckUtils]: 6: Hoare triple {974#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {974#(= main_~x~0 0)} is VALID [2022-04-27 16:10:52,499 INFO L290 TraceCheckUtils]: 7: Hoare triple {974#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:52,500 INFO L290 TraceCheckUtils]: 8: Hoare triple {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:52,500 INFO L290 TraceCheckUtils]: 9: Hoare triple {975#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:52,501 INFO L290 TraceCheckUtils]: 10: Hoare triple {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:52,501 INFO L290 TraceCheckUtils]: 11: Hoare triple {976#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:52,502 INFO L290 TraceCheckUtils]: 12: Hoare triple {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:52,502 INFO L290 TraceCheckUtils]: 13: Hoare triple {977#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:52,503 INFO L290 TraceCheckUtils]: 14: Hoare triple {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:52,504 INFO L290 TraceCheckUtils]: 15: Hoare triple {978#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:52,505 INFO L290 TraceCheckUtils]: 16: Hoare triple {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:52,505 INFO L290 TraceCheckUtils]: 17: Hoare triple {979#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1036#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:10:52,506 INFO L290 TraceCheckUtils]: 18: Hoare triple {1036#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,506 INFO L272 TraceCheckUtils]: 19: Hoare triple {970#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {970#false} is VALID [2022-04-27 16:10:52,506 INFO L290 TraceCheckUtils]: 20: Hoare triple {970#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {970#false} is VALID [2022-04-27 16:10:52,506 INFO L290 TraceCheckUtils]: 21: Hoare triple {970#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,507 INFO L290 TraceCheckUtils]: 22: Hoare triple {970#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,507 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:52,507 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:10:52,708 INFO L290 TraceCheckUtils]: 22: Hoare triple {970#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,708 INFO L290 TraceCheckUtils]: 21: Hoare triple {970#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,708 INFO L290 TraceCheckUtils]: 20: Hoare triple {970#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {970#false} is VALID [2022-04-27 16:10:52,708 INFO L272 TraceCheckUtils]: 19: Hoare triple {970#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {970#false} is VALID [2022-04-27 16:10:52,711 INFO L290 TraceCheckUtils]: 18: Hoare triple {1064#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {970#false} is VALID [2022-04-27 16:10:52,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {1068#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1064#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:10:52,712 INFO L290 TraceCheckUtils]: 16: Hoare triple {1068#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1068#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:52,713 INFO L290 TraceCheckUtils]: 15: Hoare triple {1075#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1068#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:52,713 INFO L290 TraceCheckUtils]: 14: Hoare triple {1075#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1075#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:52,714 INFO L290 TraceCheckUtils]: 13: Hoare triple {1082#(< (mod (+ main_~x~0 6) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1075#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:52,714 INFO L290 TraceCheckUtils]: 12: Hoare triple {1082#(< (mod (+ main_~x~0 6) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1082#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:10:52,715 INFO L290 TraceCheckUtils]: 11: Hoare triple {1089#(< (mod (+ main_~x~0 8) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1082#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:10:52,716 INFO L290 TraceCheckUtils]: 10: Hoare triple {1089#(< (mod (+ main_~x~0 8) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1089#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:10:52,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {1096#(< (mod (+ main_~x~0 10) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1089#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:10:52,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {1096#(< (mod (+ main_~x~0 10) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1096#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:10:52,719 INFO L290 TraceCheckUtils]: 7: Hoare triple {1103#(< (mod (+ main_~x~0 12) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1096#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:10:52,720 INFO L290 TraceCheckUtils]: 6: Hoare triple {1103#(< (mod (+ main_~x~0 12) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1103#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:10:52,721 INFO L290 TraceCheckUtils]: 5: Hoare triple {969#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {1103#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:10:52,721 INFO L272 TraceCheckUtils]: 4: Hoare triple {969#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {969#true} {969#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {969#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,721 INFO L290 TraceCheckUtils]: 1: Hoare triple {969#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {969#true} is VALID [2022-04-27 16:10:52,722 INFO L272 TraceCheckUtils]: 0: Hoare triple {969#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#true} is VALID [2022-04-27 16:10:52,722 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:52,722 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1418618930] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:10:52,722 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:10:52,722 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 18 [2022-04-27 16:10:52,722 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189243410] [2022-04-27 16:10:52,722 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:10:52,723 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 16:10:52,723 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:52,723 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:52,754 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:52,754 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 16:10:52,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:52,755 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 16:10:52,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:10:52,755 INFO L87 Difference]: Start difference. First operand 36 states and 48 transitions. Second operand has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,068 INFO L93 Difference]: Finished difference Result 144 states and 205 transitions. [2022-04-27 16:10:54,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 16:10:54,068 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 16:10:54,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:54,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 65 transitions. [2022-04-27 16:10:54,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 65 transitions. [2022-04-27 16:10:54,072 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 65 transitions. [2022-04-27 16:10:54,207 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:54,211 INFO L225 Difference]: With dead ends: 144 [2022-04-27 16:10:54,211 INFO L226 Difference]: Without dead ends: 144 [2022-04-27 16:10:54,212 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=324, Invalid=732, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 16:10:54,212 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 25 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 221 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 283 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 221 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:54,213 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 58 Invalid, 283 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 221 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 16:10:54,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-04-27 16:10:54,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 80. [2022-04-27 16:10:54,218 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:54,219 INFO L82 GeneralOperation]: Start isEquivalent. First operand 144 states. Second operand has 80 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 75 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,219 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand has 80 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 75 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,219 INFO L87 Difference]: Start difference. First operand 144 states. Second operand has 80 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 75 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,224 INFO L93 Difference]: Finished difference Result 144 states and 205 transitions. [2022-04-27 16:10:54,224 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 205 transitions. [2022-04-27 16:10:54,225 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:54,226 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:54,226 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 75 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-27 16:10:54,226 INFO L87 Difference]: Start difference. First operand has 80 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 75 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-27 16:10:54,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,232 INFO L93 Difference]: Finished difference Result 144 states and 205 transitions. [2022-04-27 16:10:54,232 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 205 transitions. [2022-04-27 16:10:54,233 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:54,233 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:54,233 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:54,233 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:54,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 75 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 114 transitions. [2022-04-27 16:10:54,236 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 114 transitions. Word has length 23 [2022-04-27 16:10:54,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:54,236 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 114 transitions. [2022-04-27 16:10:54,236 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.0) internal successors, (36), 17 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,237 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 114 transitions. [2022-04-27 16:10:54,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 16:10:54,237 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:54,237 INFO L195 NwaCegarLoop]: trace histogram [9, 6, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:54,264 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-27 16:10:54,461 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:54,461 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:54,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:54,462 INFO L85 PathProgramCache]: Analyzing trace with hash -382718831, now seen corresponding path program 1 times [2022-04-27 16:10:54,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:54,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750308337] [2022-04-27 16:10:54,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:54,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:54,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:54,500 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:54,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:54,505 INFO L290 TraceCheckUtils]: 0: Hoare triple {1675#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1669#true} is VALID [2022-04-27 16:10:54,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {1669#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1669#true} is VALID [2022-04-27 16:10:54,505 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1669#true} {1669#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1669#true} is VALID [2022-04-27 16:10:54,506 INFO L272 TraceCheckUtils]: 0: Hoare triple {1669#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1675#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:54,506 INFO L290 TraceCheckUtils]: 1: Hoare triple {1675#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1669#true} is VALID [2022-04-27 16:10:54,506 INFO L290 TraceCheckUtils]: 2: Hoare triple {1669#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1669#true} is VALID [2022-04-27 16:10:54,506 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1669#true} {1669#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1669#true} is VALID [2022-04-27 16:10:54,507 INFO L272 TraceCheckUtils]: 4: Hoare triple {1669#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1669#true} is VALID [2022-04-27 16:10:54,507 INFO L290 TraceCheckUtils]: 5: Hoare triple {1669#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {1669#true} is VALID [2022-04-27 16:10:54,507 INFO L290 TraceCheckUtils]: 6: Hoare triple {1669#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1669#true} is VALID [2022-04-27 16:10:54,507 INFO L290 TraceCheckUtils]: 7: Hoare triple {1669#true} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,508 INFO L290 TraceCheckUtils]: 8: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,508 INFO L290 TraceCheckUtils]: 9: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,509 INFO L290 TraceCheckUtils]: 10: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,509 INFO L290 TraceCheckUtils]: 11: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,509 INFO L290 TraceCheckUtils]: 12: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,510 INFO L290 TraceCheckUtils]: 13: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,510 INFO L290 TraceCheckUtils]: 14: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,510 INFO L290 TraceCheckUtils]: 15: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,511 INFO L290 TraceCheckUtils]: 16: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,511 INFO L290 TraceCheckUtils]: 17: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,514 INFO L290 TraceCheckUtils]: 18: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} is VALID [2022-04-27 16:10:54,515 INFO L290 TraceCheckUtils]: 19: Hoare triple {1674#(= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1670#false} is VALID [2022-04-27 16:10:54,515 INFO L290 TraceCheckUtils]: 20: Hoare triple {1670#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1670#false} is VALID [2022-04-27 16:10:54,515 INFO L290 TraceCheckUtils]: 21: Hoare triple {1670#false} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L290 TraceCheckUtils]: 22: Hoare triple {1670#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L290 TraceCheckUtils]: 23: Hoare triple {1670#false} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L290 TraceCheckUtils]: 24: Hoare triple {1670#false} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L272 TraceCheckUtils]: 25: Hoare triple {1670#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L290 TraceCheckUtils]: 26: Hoare triple {1670#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L290 TraceCheckUtils]: 27: Hoare triple {1670#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1670#false} is VALID [2022-04-27 16:10:54,516 INFO L290 TraceCheckUtils]: 28: Hoare triple {1670#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1670#false} is VALID [2022-04-27 16:10:54,517 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-27 16:10:54,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:54,517 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750308337] [2022-04-27 16:10:54,517 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [750308337] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:10:54,517 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:10:54,517 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:10:54,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430241118] [2022-04-27 16:10:54,517 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:10:54,518 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 16:10:54,518 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:54,518 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,532 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:54,532 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:10:54,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:54,532 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:10:54,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:10:54,533 INFO L87 Difference]: Start difference. First operand 80 states and 114 transitions. Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,569 INFO L93 Difference]: Finished difference Result 90 states and 105 transitions. [2022-04-27 16:10:54,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 16:10:54,569 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 16:10:54,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:54,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2022-04-27 16:10:54,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2022-04-27 16:10:54,571 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 19 transitions. [2022-04-27 16:10:54,589 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:54,591 INFO L225 Difference]: With dead ends: 90 [2022-04-27 16:10:54,591 INFO L226 Difference]: Without dead ends: 90 [2022-04-27 16:10:54,591 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:10:54,592 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:54,592 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 22 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:10:54,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-27 16:10:54,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 63. [2022-04-27 16:10:54,597 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:54,597 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 63 states, 58 states have (on average 1.2758620689655173) internal successors, (74), 58 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,597 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 63 states, 58 states have (on average 1.2758620689655173) internal successors, (74), 58 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,597 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 63 states, 58 states have (on average 1.2758620689655173) internal successors, (74), 58 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,601 INFO L93 Difference]: Finished difference Result 90 states and 105 transitions. [2022-04-27 16:10:54,601 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 105 transitions. [2022-04-27 16:10:54,601 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:54,601 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:54,602 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.2758620689655173) internal successors, (74), 58 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 90 states. [2022-04-27 16:10:54,602 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.2758620689655173) internal successors, (74), 58 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 90 states. [2022-04-27 16:10:54,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,605 INFO L93 Difference]: Finished difference Result 90 states and 105 transitions. [2022-04-27 16:10:54,605 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 105 transitions. [2022-04-27 16:10:54,606 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:54,606 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:54,606 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:54,606 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:54,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.2758620689655173) internal successors, (74), 58 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 78 transitions. [2022-04-27 16:10:54,608 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 78 transitions. Word has length 29 [2022-04-27 16:10:54,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:54,608 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 78 transitions. [2022-04-27 16:10:54,609 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.5) internal successors, (14), 3 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,609 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 78 transitions. [2022-04-27 16:10:54,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 16:10:54,609 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:54,609 INFO L195 NwaCegarLoop]: trace histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:54,609 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-27 16:10:54,609 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:54,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:54,610 INFO L85 PathProgramCache]: Analyzing trace with hash 1436785103, now seen corresponding path program 2 times [2022-04-27 16:10:54,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:54,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061009708] [2022-04-27 16:10:54,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:54,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:54,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:54,637 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:54,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:54,642 INFO L290 TraceCheckUtils]: 0: Hoare triple {2020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2014#true} is VALID [2022-04-27 16:10:54,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {2014#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2014#true} is VALID [2022-04-27 16:10:54,642 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2014#true} {2014#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2014#true} is VALID [2022-04-27 16:10:54,642 INFO L272 TraceCheckUtils]: 0: Hoare triple {2014#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:54,643 INFO L290 TraceCheckUtils]: 1: Hoare triple {2020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2014#true} is VALID [2022-04-27 16:10:54,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {2014#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2014#true} is VALID [2022-04-27 16:10:54,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2014#true} {2014#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2014#true} is VALID [2022-04-27 16:10:54,643 INFO L272 TraceCheckUtils]: 4: Hoare triple {2014#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2014#true} is VALID [2022-04-27 16:10:54,643 INFO L290 TraceCheckUtils]: 5: Hoare triple {2014#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {2014#true} is VALID [2022-04-27 16:10:54,643 INFO L290 TraceCheckUtils]: 6: Hoare triple {2014#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2014#true} is VALID [2022-04-27 16:10:54,644 INFO L290 TraceCheckUtils]: 7: Hoare triple {2014#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {2019#(not (= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0))} is VALID [2022-04-27 16:10:54,644 INFO L290 TraceCheckUtils]: 8: Hoare triple {2019#(not (= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2019#(not (= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0))} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 9: Hoare triple {2019#(not (= (+ (* (- 2) (div main_~y~0 2)) main_~y~0) 0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 10: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 11: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 12: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 13: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 14: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 16: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 17: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 18: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 19: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 20: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 21: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 22: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,646 INFO L290 TraceCheckUtils]: 23: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 24: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 25: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 26: Hoare triple {2015#false} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 27: Hoare triple {2015#false} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 28: Hoare triple {2015#false} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L272 TraceCheckUtils]: 29: Hoare triple {2015#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 30: Hoare triple {2015#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 31: Hoare triple {2015#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,647 INFO L290 TraceCheckUtils]: 32: Hoare triple {2015#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2015#false} is VALID [2022-04-27 16:10:54,648 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2022-04-27 16:10:54,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:54,648 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061009708] [2022-04-27 16:10:54,648 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2061009708] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:10:54,648 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:10:54,648 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:10:54,648 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099572308] [2022-04-27 16:10:54,648 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:10:54,649 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 16:10:54,649 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:54,649 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,660 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:54,660 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:10:54,660 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:54,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:10:54,661 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:10:54,661 INFO L87 Difference]: Start difference. First operand 63 states and 78 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,706 INFO L93 Difference]: Finished difference Result 64 states and 66 transitions. [2022-04-27 16:10:54,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 16:10:54,706 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 16:10:54,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:54,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2022-04-27 16:10:54,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2022-04-27 16:10:54,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 19 transitions. [2022-04-27 16:10:54,724 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:54,725 INFO L225 Difference]: With dead ends: 64 [2022-04-27 16:10:54,725 INFO L226 Difference]: Without dead ends: 64 [2022-04-27 16:10:54,726 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:10:54,726 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 9 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:54,726 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 24 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:10:54,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-04-27 16:10:54,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2022-04-27 16:10:54,730 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:54,730 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand has 63 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 58 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,730 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand has 63 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 58 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,730 INFO L87 Difference]: Start difference. First operand 64 states. Second operand has 63 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 58 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,733 INFO L93 Difference]: Finished difference Result 64 states and 66 transitions. [2022-04-27 16:10:54,733 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 66 transitions. [2022-04-27 16:10:54,733 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:54,733 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:54,733 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 58 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-27 16:10:54,733 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 58 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-27 16:10:54,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:54,735 INFO L93 Difference]: Finished difference Result 64 states and 66 transitions. [2022-04-27 16:10:54,736 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 66 transitions. [2022-04-27 16:10:54,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:54,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:54,736 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:54,736 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:54,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 58 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 65 transitions. [2022-04-27 16:10:54,738 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 65 transitions. Word has length 33 [2022-04-27 16:10:54,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:54,738 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 65 transitions. [2022-04-27 16:10:54,738 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:54,738 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 65 transitions. [2022-04-27 16:10:54,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 16:10:54,739 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:54,739 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:54,739 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-27 16:10:54,739 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:54,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:54,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1063807026, now seen corresponding path program 3 times [2022-04-27 16:10:54,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:54,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741106270] [2022-04-27 16:10:54,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:54,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:54,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:55,000 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:55,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:55,005 INFO L290 TraceCheckUtils]: 0: Hoare triple {2299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2281#true} is VALID [2022-04-27 16:10:55,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {2281#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,005 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2281#true} {2281#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,006 INFO L272 TraceCheckUtils]: 0: Hoare triple {2281#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:55,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {2299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2281#true} is VALID [2022-04-27 16:10:55,006 INFO L290 TraceCheckUtils]: 2: Hoare triple {2281#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,007 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2281#true} {2281#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,007 INFO L272 TraceCheckUtils]: 4: Hoare triple {2281#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {2281#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {2286#(= main_~x~0 0)} is VALID [2022-04-27 16:10:55,007 INFO L290 TraceCheckUtils]: 6: Hoare triple {2286#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2286#(= main_~x~0 0)} is VALID [2022-04-27 16:10:55,008 INFO L290 TraceCheckUtils]: 7: Hoare triple {2286#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:55,008 INFO L290 TraceCheckUtils]: 8: Hoare triple {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:55,009 INFO L290 TraceCheckUtils]: 9: Hoare triple {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:55,009 INFO L290 TraceCheckUtils]: 10: Hoare triple {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:55,010 INFO L290 TraceCheckUtils]: 11: Hoare triple {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:55,010 INFO L290 TraceCheckUtils]: 12: Hoare triple {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:55,011 INFO L290 TraceCheckUtils]: 13: Hoare triple {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:55,011 INFO L290 TraceCheckUtils]: 14: Hoare triple {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:55,012 INFO L290 TraceCheckUtils]: 15: Hoare triple {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:55,012 INFO L290 TraceCheckUtils]: 16: Hoare triple {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:55,013 INFO L290 TraceCheckUtils]: 17: Hoare triple {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:55,013 INFO L290 TraceCheckUtils]: 18: Hoare triple {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:55,014 INFO L290 TraceCheckUtils]: 19: Hoare triple {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:55,014 INFO L290 TraceCheckUtils]: 20: Hoare triple {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:55,015 INFO L290 TraceCheckUtils]: 21: Hoare triple {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:55,015 INFO L290 TraceCheckUtils]: 22: Hoare triple {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:55,016 INFO L290 TraceCheckUtils]: 23: Hoare triple {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:55,016 INFO L290 TraceCheckUtils]: 24: Hoare triple {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:55,017 INFO L290 TraceCheckUtils]: 25: Hoare triple {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:55,017 INFO L290 TraceCheckUtils]: 26: Hoare triple {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:55,018 INFO L290 TraceCheckUtils]: 27: Hoare triple {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:55,018 INFO L290 TraceCheckUtils]: 28: Hoare triple {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:55,019 INFO L290 TraceCheckUtils]: 29: Hoare triple {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2298#(and (<= main_~x~0 12) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:10:55,019 INFO L290 TraceCheckUtils]: 30: Hoare triple {2298#(and (<= main_~x~0 12) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:55,019 INFO L272 TraceCheckUtils]: 31: Hoare triple {2282#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2282#false} is VALID [2022-04-27 16:10:55,020 INFO L290 TraceCheckUtils]: 32: Hoare triple {2282#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2282#false} is VALID [2022-04-27 16:10:55,020 INFO L290 TraceCheckUtils]: 33: Hoare triple {2282#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:55,020 INFO L290 TraceCheckUtils]: 34: Hoare triple {2282#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:55,020 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:55,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:55,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741106270] [2022-04-27 16:10:55,020 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [741106270] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:10:55,021 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1068240230] [2022-04-27 16:10:55,021 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:10:55,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:55,021 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:55,022 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:10:55,033 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 16:10:55,110 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2022-04-27 16:10:55,110 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:10:55,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-27 16:10:55,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:55,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:10:55,899 INFO L272 TraceCheckUtils]: 0: Hoare triple {2281#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {2281#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2281#true} is VALID [2022-04-27 16:10:55,900 INFO L290 TraceCheckUtils]: 2: Hoare triple {2281#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,900 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2281#true} {2281#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,900 INFO L272 TraceCheckUtils]: 4: Hoare triple {2281#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:55,900 INFO L290 TraceCheckUtils]: 5: Hoare triple {2281#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {2286#(= main_~x~0 0)} is VALID [2022-04-27 16:10:55,901 INFO L290 TraceCheckUtils]: 6: Hoare triple {2286#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2286#(= main_~x~0 0)} is VALID [2022-04-27 16:10:55,901 INFO L290 TraceCheckUtils]: 7: Hoare triple {2286#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:55,902 INFO L290 TraceCheckUtils]: 8: Hoare triple {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:55,902 INFO L290 TraceCheckUtils]: 9: Hoare triple {2287#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:55,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:55,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {2288#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:55,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:55,905 INFO L290 TraceCheckUtils]: 13: Hoare triple {2289#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:55,905 INFO L290 TraceCheckUtils]: 14: Hoare triple {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:55,906 INFO L290 TraceCheckUtils]: 15: Hoare triple {2290#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:55,911 INFO L290 TraceCheckUtils]: 16: Hoare triple {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:55,913 INFO L290 TraceCheckUtils]: 17: Hoare triple {2291#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:55,920 INFO L290 TraceCheckUtils]: 18: Hoare triple {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:55,921 INFO L290 TraceCheckUtils]: 19: Hoare triple {2292#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:55,921 INFO L290 TraceCheckUtils]: 20: Hoare triple {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:55,922 INFO L290 TraceCheckUtils]: 21: Hoare triple {2293#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:55,922 INFO L290 TraceCheckUtils]: 22: Hoare triple {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:55,923 INFO L290 TraceCheckUtils]: 23: Hoare triple {2294#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:55,923 INFO L290 TraceCheckUtils]: 24: Hoare triple {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:55,924 INFO L290 TraceCheckUtils]: 25: Hoare triple {2295#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:55,924 INFO L290 TraceCheckUtils]: 26: Hoare triple {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:55,925 INFO L290 TraceCheckUtils]: 27: Hoare triple {2296#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:55,925 INFO L290 TraceCheckUtils]: 28: Hoare triple {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:55,926 INFO L290 TraceCheckUtils]: 29: Hoare triple {2297#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2390#(and (<= main_~x~0 12) (<= 12 main_~x~0) (<= (mod main_~y~0 2) 0))} is VALID [2022-04-27 16:10:55,927 INFO L290 TraceCheckUtils]: 30: Hoare triple {2390#(and (<= main_~x~0 12) (<= 12 main_~x~0) (<= (mod main_~y~0 2) 0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2390#(and (<= main_~x~0 12) (<= 12 main_~x~0) (<= (mod main_~y~0 2) 0))} is VALID [2022-04-27 16:10:55,927 INFO L272 TraceCheckUtils]: 31: Hoare triple {2390#(and (<= main_~x~0 12) (<= 12 main_~x~0) (<= (mod main_~y~0 2) 0))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2397#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:10:55,928 INFO L290 TraceCheckUtils]: 32: Hoare triple {2397#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2401#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:10:55,928 INFO L290 TraceCheckUtils]: 33: Hoare triple {2401#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:55,928 INFO L290 TraceCheckUtils]: 34: Hoare triple {2282#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:55,929 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:55,929 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:10:56,434 INFO L290 TraceCheckUtils]: 34: Hoare triple {2282#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:56,435 INFO L290 TraceCheckUtils]: 33: Hoare triple {2401#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2282#false} is VALID [2022-04-27 16:10:56,435 INFO L290 TraceCheckUtils]: 32: Hoare triple {2397#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2401#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:10:56,436 INFO L272 TraceCheckUtils]: 31: Hoare triple {2417#(= (mod main_~x~0 2) (mod main_~y~0 2))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2397#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:10:56,437 INFO L290 TraceCheckUtils]: 30: Hoare triple {2417#(= (mod main_~x~0 2) (mod main_~y~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2417#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-27 16:10:56,437 INFO L290 TraceCheckUtils]: 29: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2417#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-27 16:10:56,438 INFO L290 TraceCheckUtils]: 28: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,438 INFO L290 TraceCheckUtils]: 27: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,439 INFO L290 TraceCheckUtils]: 26: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,439 INFO L290 TraceCheckUtils]: 25: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,440 INFO L290 TraceCheckUtils]: 24: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,440 INFO L290 TraceCheckUtils]: 23: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,441 INFO L290 TraceCheckUtils]: 22: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,441 INFO L290 TraceCheckUtils]: 21: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,442 INFO L290 TraceCheckUtils]: 20: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,442 INFO L290 TraceCheckUtils]: 19: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,443 INFO L290 TraceCheckUtils]: 18: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,443 INFO L290 TraceCheckUtils]: 17: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,444 INFO L290 TraceCheckUtils]: 16: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,444 INFO L290 TraceCheckUtils]: 15: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,444 INFO L290 TraceCheckUtils]: 14: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,445 INFO L290 TraceCheckUtils]: 13: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,445 INFO L290 TraceCheckUtils]: 12: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,446 INFO L290 TraceCheckUtils]: 11: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,446 INFO L290 TraceCheckUtils]: 10: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,447 INFO L290 TraceCheckUtils]: 8: Hoare triple {2424#(<= (mod (+ main_~x~0 1) 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,448 INFO L290 TraceCheckUtils]: 7: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2424#(<= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:10:56,448 INFO L290 TraceCheckUtils]: 6: Hoare triple {2431#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,449 INFO L290 TraceCheckUtils]: 5: Hoare triple {2281#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {2431#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:10:56,449 INFO L272 TraceCheckUtils]: 4: Hoare triple {2281#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:56,450 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2281#true} {2281#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:56,452 INFO L290 TraceCheckUtils]: 2: Hoare triple {2281#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:56,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {2281#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2281#true} is VALID [2022-04-27 16:10:56,452 INFO L272 TraceCheckUtils]: 0: Hoare triple {2281#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2281#true} is VALID [2022-04-27 16:10:56,453 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:10:56,453 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1068240230] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:10:56,453 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:10:56,453 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 7] total 22 [2022-04-27 16:10:56,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349990152] [2022-04-27 16:10:56,453 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:10:56,456 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 16:10:56,456 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:56,456 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:56,490 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:56,490 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 16:10:56,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:56,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 16:10:56,491 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2022-04-27 16:10:56,491 INFO L87 Difference]: Start difference. First operand 63 states and 65 transitions. Second operand has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:57,819 INFO L93 Difference]: Finished difference Result 72 states and 74 transitions. [2022-04-27 16:10:57,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 16:10:57,819 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 16:10:57,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:10:57,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 63 transitions. [2022-04-27 16:10:57,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 63 transitions. [2022-04-27 16:10:57,823 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 63 transitions. [2022-04-27 16:10:57,884 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:57,885 INFO L225 Difference]: With dead ends: 72 [2022-04-27 16:10:57,885 INFO L226 Difference]: Without dead ends: 69 [2022-04-27 16:10:57,886 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 65 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 297 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=253, Invalid=1817, Unknown=0, NotChecked=0, Total=2070 [2022-04-27 16:10:57,886 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 46 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 520 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 572 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 520 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 16:10:57,886 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 58 Invalid, 572 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 520 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 16:10:57,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-27 16:10:57,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 65. [2022-04-27 16:10:57,889 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:10:57,890 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 65 states, 60 states have (on average 1.05) internal successors, (63), 60 states have internal predecessors, (63), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,890 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 65 states, 60 states have (on average 1.05) internal successors, (63), 60 states have internal predecessors, (63), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,890 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 65 states, 60 states have (on average 1.05) internal successors, (63), 60 states have internal predecessors, (63), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:57,892 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 16:10:57,892 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-27 16:10:57,892 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:57,892 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:57,892 INFO L74 IsIncluded]: Start isIncluded. First operand has 65 states, 60 states have (on average 1.05) internal successors, (63), 60 states have internal predecessors, (63), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-27 16:10:57,893 INFO L87 Difference]: Start difference. First operand has 65 states, 60 states have (on average 1.05) internal successors, (63), 60 states have internal predecessors, (63), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-27 16:10:57,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:10:57,895 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 16:10:57,895 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-27 16:10:57,895 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:10:57,895 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:10:57,895 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:10:57,895 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:10:57,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.05) internal successors, (63), 60 states have internal predecessors, (63), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 67 transitions. [2022-04-27 16:10:57,897 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 67 transitions. Word has length 35 [2022-04-27 16:10:57,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:10:57,897 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 67 transitions. [2022-04-27 16:10:57,897 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 20 states have internal predecessors, (43), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:57,898 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 67 transitions. [2022-04-27 16:10:57,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-27 16:10:57,898 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:10:57,898 INFO L195 NwaCegarLoop]: trace histogram [13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:10:57,907 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 16:10:58,103 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:58,104 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:10:58,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:10:58,104 INFO L85 PathProgramCache]: Analyzing trace with hash 794106220, now seen corresponding path program 4 times [2022-04-27 16:10:58,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:10:58,104 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642835798] [2022-04-27 16:10:58,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:10:58,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:10:58,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:58,382 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:10:58,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:58,387 INFO L290 TraceCheckUtils]: 0: Hoare triple {2857#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2838#true} is VALID [2022-04-27 16:10:58,387 INFO L290 TraceCheckUtils]: 1: Hoare triple {2838#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,387 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2838#true} {2838#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,388 INFO L272 TraceCheckUtils]: 0: Hoare triple {2838#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2857#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:10:58,388 INFO L290 TraceCheckUtils]: 1: Hoare triple {2857#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2838#true} is VALID [2022-04-27 16:10:58,388 INFO L290 TraceCheckUtils]: 2: Hoare triple {2838#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,388 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2838#true} {2838#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,388 INFO L272 TraceCheckUtils]: 4: Hoare triple {2838#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,389 INFO L290 TraceCheckUtils]: 5: Hoare triple {2838#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {2843#(= main_~x~0 0)} is VALID [2022-04-27 16:10:58,389 INFO L290 TraceCheckUtils]: 6: Hoare triple {2843#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2843#(= main_~x~0 0)} is VALID [2022-04-27 16:10:58,390 INFO L290 TraceCheckUtils]: 7: Hoare triple {2843#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:58,390 INFO L290 TraceCheckUtils]: 8: Hoare triple {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:58,391 INFO L290 TraceCheckUtils]: 9: Hoare triple {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:58,391 INFO L290 TraceCheckUtils]: 10: Hoare triple {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:58,392 INFO L290 TraceCheckUtils]: 11: Hoare triple {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:58,392 INFO L290 TraceCheckUtils]: 12: Hoare triple {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:58,393 INFO L290 TraceCheckUtils]: 13: Hoare triple {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:58,393 INFO L290 TraceCheckUtils]: 14: Hoare triple {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:58,394 INFO L290 TraceCheckUtils]: 15: Hoare triple {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:58,394 INFO L290 TraceCheckUtils]: 16: Hoare triple {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:58,394 INFO L290 TraceCheckUtils]: 17: Hoare triple {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:58,395 INFO L290 TraceCheckUtils]: 18: Hoare triple {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:58,396 INFO L290 TraceCheckUtils]: 19: Hoare triple {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:58,396 INFO L290 TraceCheckUtils]: 20: Hoare triple {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:58,397 INFO L290 TraceCheckUtils]: 21: Hoare triple {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:58,397 INFO L290 TraceCheckUtils]: 22: Hoare triple {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:58,398 INFO L290 TraceCheckUtils]: 23: Hoare triple {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:58,398 INFO L290 TraceCheckUtils]: 24: Hoare triple {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:58,399 INFO L290 TraceCheckUtils]: 25: Hoare triple {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:58,399 INFO L290 TraceCheckUtils]: 26: Hoare triple {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:58,400 INFO L290 TraceCheckUtils]: 27: Hoare triple {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:58,400 INFO L290 TraceCheckUtils]: 28: Hoare triple {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:58,400 INFO L290 TraceCheckUtils]: 29: Hoare triple {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:10:58,401 INFO L290 TraceCheckUtils]: 30: Hoare triple {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:10:58,402 INFO L290 TraceCheckUtils]: 31: Hoare triple {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2856#(and (<= main_~x~0 13) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:10:58,402 INFO L290 TraceCheckUtils]: 32: Hoare triple {2856#(and (<= main_~x~0 13) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:58,402 INFO L272 TraceCheckUtils]: 33: Hoare triple {2839#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2839#false} is VALID [2022-04-27 16:10:58,402 INFO L290 TraceCheckUtils]: 34: Hoare triple {2839#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2839#false} is VALID [2022-04-27 16:10:58,402 INFO L290 TraceCheckUtils]: 35: Hoare triple {2839#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:58,403 INFO L290 TraceCheckUtils]: 36: Hoare triple {2839#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:58,403 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:58,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:10:58,403 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642835798] [2022-04-27 16:10:58,403 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [642835798] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:10:58,403 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [214488317] [2022-04-27 16:10:58,403 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:10:58,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:10:58,404 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:10:58,408 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:10:58,409 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 16:10:58,465 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:10:58,465 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:10:58,466 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 16:10:58,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:10:58,475 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:10:58,834 INFO L272 TraceCheckUtils]: 0: Hoare triple {2838#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,834 INFO L290 TraceCheckUtils]: 1: Hoare triple {2838#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2838#true} is VALID [2022-04-27 16:10:58,835 INFO L290 TraceCheckUtils]: 2: Hoare triple {2838#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,835 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2838#true} {2838#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,835 INFO L272 TraceCheckUtils]: 4: Hoare triple {2838#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:58,835 INFO L290 TraceCheckUtils]: 5: Hoare triple {2838#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {2843#(= main_~x~0 0)} is VALID [2022-04-27 16:10:58,836 INFO L290 TraceCheckUtils]: 6: Hoare triple {2843#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2843#(= main_~x~0 0)} is VALID [2022-04-27 16:10:58,836 INFO L290 TraceCheckUtils]: 7: Hoare triple {2843#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:58,837 INFO L290 TraceCheckUtils]: 8: Hoare triple {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:10:58,837 INFO L290 TraceCheckUtils]: 9: Hoare triple {2844#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:58,838 INFO L290 TraceCheckUtils]: 10: Hoare triple {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:10:58,839 INFO L290 TraceCheckUtils]: 11: Hoare triple {2845#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:58,839 INFO L290 TraceCheckUtils]: 12: Hoare triple {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:10:58,840 INFO L290 TraceCheckUtils]: 13: Hoare triple {2846#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:58,840 INFO L290 TraceCheckUtils]: 14: Hoare triple {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:10:58,841 INFO L290 TraceCheckUtils]: 15: Hoare triple {2847#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:58,841 INFO L290 TraceCheckUtils]: 16: Hoare triple {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:10:58,842 INFO L290 TraceCheckUtils]: 17: Hoare triple {2848#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:58,842 INFO L290 TraceCheckUtils]: 18: Hoare triple {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:10:58,843 INFO L290 TraceCheckUtils]: 19: Hoare triple {2849#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:58,843 INFO L290 TraceCheckUtils]: 20: Hoare triple {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:10:58,844 INFO L290 TraceCheckUtils]: 21: Hoare triple {2850#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:58,844 INFO L290 TraceCheckUtils]: 22: Hoare triple {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:10:58,845 INFO L290 TraceCheckUtils]: 23: Hoare triple {2851#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:58,845 INFO L290 TraceCheckUtils]: 24: Hoare triple {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:10:58,846 INFO L290 TraceCheckUtils]: 25: Hoare triple {2852#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:58,846 INFO L290 TraceCheckUtils]: 26: Hoare triple {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:10:58,847 INFO L290 TraceCheckUtils]: 27: Hoare triple {2853#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:58,847 INFO L290 TraceCheckUtils]: 28: Hoare triple {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:10:58,848 INFO L290 TraceCheckUtils]: 29: Hoare triple {2854#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:10:58,848 INFO L290 TraceCheckUtils]: 30: Hoare triple {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:10:58,849 INFO L290 TraceCheckUtils]: 31: Hoare triple {2855#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2954#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:10:58,849 INFO L290 TraceCheckUtils]: 32: Hoare triple {2954#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:58,849 INFO L272 TraceCheckUtils]: 33: Hoare triple {2839#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2839#false} is VALID [2022-04-27 16:10:58,850 INFO L290 TraceCheckUtils]: 34: Hoare triple {2839#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2839#false} is VALID [2022-04-27 16:10:58,850 INFO L290 TraceCheckUtils]: 35: Hoare triple {2839#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:58,851 INFO L290 TraceCheckUtils]: 36: Hoare triple {2839#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:58,851 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:58,851 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:10:59,387 INFO L290 TraceCheckUtils]: 36: Hoare triple {2839#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:59,387 INFO L290 TraceCheckUtils]: 35: Hoare triple {2839#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:59,387 INFO L290 TraceCheckUtils]: 34: Hoare triple {2839#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2839#false} is VALID [2022-04-27 16:10:59,387 INFO L272 TraceCheckUtils]: 33: Hoare triple {2839#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {2839#false} is VALID [2022-04-27 16:10:59,388 INFO L290 TraceCheckUtils]: 32: Hoare triple {2982#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2839#false} is VALID [2022-04-27 16:10:59,388 INFO L290 TraceCheckUtils]: 31: Hoare triple {2986#(< (mod (+ main_~x~0 1) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2982#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:10:59,389 INFO L290 TraceCheckUtils]: 30: Hoare triple {2986#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2986#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:10:59,390 INFO L290 TraceCheckUtils]: 29: Hoare triple {2993#(< (mod (+ main_~x~0 2) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2986#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:10:59,390 INFO L290 TraceCheckUtils]: 28: Hoare triple {2993#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {2993#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:59,391 INFO L290 TraceCheckUtils]: 27: Hoare triple {3000#(< (mod (+ main_~x~0 3) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {2993#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:10:59,391 INFO L290 TraceCheckUtils]: 26: Hoare triple {3000#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3000#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-27 16:10:59,392 INFO L290 TraceCheckUtils]: 25: Hoare triple {3007#(< (mod (+ main_~x~0 4) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3000#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-27 16:10:59,392 INFO L290 TraceCheckUtils]: 24: Hoare triple {3007#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3007#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:59,393 INFO L290 TraceCheckUtils]: 23: Hoare triple {3014#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3007#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:10:59,393 INFO L290 TraceCheckUtils]: 22: Hoare triple {3014#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3014#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:10:59,394 INFO L290 TraceCheckUtils]: 21: Hoare triple {3021#(< (mod (+ main_~x~0 6) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3014#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:10:59,394 INFO L290 TraceCheckUtils]: 20: Hoare triple {3021#(< (mod (+ main_~x~0 6) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3021#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:10:59,395 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3021#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:10:59,396 INFO L290 TraceCheckUtils]: 18: Hoare triple {3028#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3028#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:10:59,396 INFO L290 TraceCheckUtils]: 17: Hoare triple {3035#(< (mod (+ main_~x~0 8) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3028#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:10:59,397 INFO L290 TraceCheckUtils]: 16: Hoare triple {3035#(< (mod (+ main_~x~0 8) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3035#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:10:59,397 INFO L290 TraceCheckUtils]: 15: Hoare triple {3042#(< (mod (+ main_~x~0 9) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3035#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:10:59,398 INFO L290 TraceCheckUtils]: 14: Hoare triple {3042#(< (mod (+ main_~x~0 9) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3042#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-27 16:10:59,398 INFO L290 TraceCheckUtils]: 13: Hoare triple {3049#(< (mod (+ main_~x~0 10) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3042#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-27 16:10:59,399 INFO L290 TraceCheckUtils]: 12: Hoare triple {3049#(< (mod (+ main_~x~0 10) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3049#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:10:59,400 INFO L290 TraceCheckUtils]: 11: Hoare triple {3056#(< (mod (+ main_~x~0 11) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3049#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:10:59,400 INFO L290 TraceCheckUtils]: 10: Hoare triple {3056#(< (mod (+ main_~x~0 11) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3056#(< (mod (+ main_~x~0 11) 4294967296) 99)} is VALID [2022-04-27 16:10:59,401 INFO L290 TraceCheckUtils]: 9: Hoare triple {3063#(< (mod (+ main_~x~0 12) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3056#(< (mod (+ main_~x~0 11) 4294967296) 99)} is VALID [2022-04-27 16:10:59,401 INFO L290 TraceCheckUtils]: 8: Hoare triple {3063#(< (mod (+ main_~x~0 12) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3063#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:10:59,402 INFO L290 TraceCheckUtils]: 7: Hoare triple {3070#(< (mod (+ main_~x~0 13) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {3063#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:10:59,402 INFO L290 TraceCheckUtils]: 6: Hoare triple {3070#(< (mod (+ main_~x~0 13) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3070#(< (mod (+ main_~x~0 13) 4294967296) 99)} is VALID [2022-04-27 16:10:59,403 INFO L290 TraceCheckUtils]: 5: Hoare triple {2838#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {3070#(< (mod (+ main_~x~0 13) 4294967296) 99)} is VALID [2022-04-27 16:10:59,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {2838#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:59,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2838#true} {2838#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:59,403 INFO L290 TraceCheckUtils]: 2: Hoare triple {2838#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:59,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {2838#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2838#true} is VALID [2022-04-27 16:10:59,403 INFO L272 TraceCheckUtils]: 0: Hoare triple {2838#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2838#true} is VALID [2022-04-27 16:10:59,404 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:10:59,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [214488317] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:10:59,404 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:10:59,404 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 32 [2022-04-27 16:10:59,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1686432399] [2022-04-27 16:10:59,404 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:10:59,405 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 16:10:59,405 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:10:59,405 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:10:59,475 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:10:59,475 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 16:10:59,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:10:59,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 16:10:59,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=285, Invalid=707, Unknown=0, NotChecked=0, Total=992 [2022-04-27 16:10:59,476 INFO L87 Difference]: Start difference. First operand 65 states and 67 transitions. Second operand has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:07,910 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-27 16:11:07,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-27 16:11:07,910 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 16:11:07,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:07,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 91 transitions. [2022-04-27 16:11:07,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 91 transitions. [2022-04-27 16:11:07,913 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 91 transitions. [2022-04-27 16:11:08,067 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:08,071 INFO L225 Difference]: With dead ends: 98 [2022-04-27 16:11:08,071 INFO L226 Difference]: Without dead ends: 98 [2022-04-27 16:11:08,073 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=985, Invalid=2555, Unknown=0, NotChecked=0, Total=3540 [2022-04-27 16:11:08,074 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 57 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 621 mSolverCounterSat, 162 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 783 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 162 IncrementalHoareTripleChecker+Valid, 621 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:08,075 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 93 Invalid, 783 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [162 Valid, 621 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-27 16:11:08,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-27 16:11:08,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 97. [2022-04-27 16:11:08,083 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:08,085 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,085 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,086 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:08,088 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-27 16:11:08,088 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2022-04-27 16:11:08,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:08,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:08,088 INFO L74 IsIncluded]: Start isIncluded. First operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-27 16:11:08,089 INFO L87 Difference]: Start difference. First operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-27 16:11:08,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:08,090 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-27 16:11:08,091 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2022-04-27 16:11:08,091 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:08,091 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:08,091 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:08,091 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:08,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 99 transitions. [2022-04-27 16:11:08,093 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 99 transitions. Word has length 37 [2022-04-27 16:11:08,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:08,093 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 99 transitions. [2022-04-27 16:11:08,093 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 2.0) internal successors, (64), 31 states have internal predecessors, (64), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,093 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 99 transitions. [2022-04-27 16:11:08,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-27 16:11:08,094 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:08,094 INFO L195 NwaCegarLoop]: trace histogram [14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:08,120 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 16:11:08,307 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:08,308 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:08,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:08,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1208240388, now seen corresponding path program 3 times [2022-04-27 16:11:08,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:08,308 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040118073] [2022-04-27 16:11:08,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:08,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:08,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:08,628 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:08,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:08,633 INFO L290 TraceCheckUtils]: 0: Hoare triple {3561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3541#true} is VALID [2022-04-27 16:11:08,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {3541#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:08,634 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3541#true} {3541#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:08,634 INFO L272 TraceCheckUtils]: 0: Hoare triple {3541#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:08,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {3561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3541#true} is VALID [2022-04-27 16:11:08,635 INFO L290 TraceCheckUtils]: 2: Hoare triple {3541#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:08,635 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3541#true} {3541#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:08,635 INFO L272 TraceCheckUtils]: 4: Hoare triple {3541#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:08,635 INFO L290 TraceCheckUtils]: 5: Hoare triple {3541#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {3546#(= main_~x~0 0)} is VALID [2022-04-27 16:11:08,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {3546#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3546#(= main_~x~0 0)} is VALID [2022-04-27 16:11:08,636 INFO L290 TraceCheckUtils]: 7: Hoare triple {3546#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:08,636 INFO L290 TraceCheckUtils]: 8: Hoare triple {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:08,637 INFO L290 TraceCheckUtils]: 9: Hoare triple {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:08,637 INFO L290 TraceCheckUtils]: 10: Hoare triple {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:08,638 INFO L290 TraceCheckUtils]: 11: Hoare triple {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:08,638 INFO L290 TraceCheckUtils]: 12: Hoare triple {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:08,639 INFO L290 TraceCheckUtils]: 13: Hoare triple {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:08,639 INFO L290 TraceCheckUtils]: 14: Hoare triple {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:08,640 INFO L290 TraceCheckUtils]: 15: Hoare triple {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:08,640 INFO L290 TraceCheckUtils]: 16: Hoare triple {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:08,641 INFO L290 TraceCheckUtils]: 17: Hoare triple {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:08,641 INFO L290 TraceCheckUtils]: 18: Hoare triple {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:08,642 INFO L290 TraceCheckUtils]: 19: Hoare triple {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:08,642 INFO L290 TraceCheckUtils]: 20: Hoare triple {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:08,643 INFO L290 TraceCheckUtils]: 21: Hoare triple {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:08,643 INFO L290 TraceCheckUtils]: 22: Hoare triple {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:08,644 INFO L290 TraceCheckUtils]: 23: Hoare triple {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:08,644 INFO L290 TraceCheckUtils]: 24: Hoare triple {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:08,645 INFO L290 TraceCheckUtils]: 25: Hoare triple {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:08,645 INFO L290 TraceCheckUtils]: 26: Hoare triple {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:08,646 INFO L290 TraceCheckUtils]: 27: Hoare triple {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:08,646 INFO L290 TraceCheckUtils]: 28: Hoare triple {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:08,647 INFO L290 TraceCheckUtils]: 29: Hoare triple {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:08,647 INFO L290 TraceCheckUtils]: 30: Hoare triple {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:08,648 INFO L290 TraceCheckUtils]: 31: Hoare triple {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:08,648 INFO L290 TraceCheckUtils]: 32: Hoare triple {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:08,649 INFO L290 TraceCheckUtils]: 33: Hoare triple {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3560#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 28))} is VALID [2022-04-27 16:11:08,650 INFO L290 TraceCheckUtils]: 34: Hoare triple {3560#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 28))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:08,650 INFO L272 TraceCheckUtils]: 35: Hoare triple {3542#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {3542#false} is VALID [2022-04-27 16:11:08,650 INFO L290 TraceCheckUtils]: 36: Hoare triple {3542#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3542#false} is VALID [2022-04-27 16:11:08,650 INFO L290 TraceCheckUtils]: 37: Hoare triple {3542#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:08,650 INFO L290 TraceCheckUtils]: 38: Hoare triple {3542#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:08,650 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:08,651 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:08,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040118073] [2022-04-27 16:11:08,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1040118073] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:08,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [44629735] [2022-04-27 16:11:08,651 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:11:08,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:08,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:08,656 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:08,657 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 16:11:08,782 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2022-04-27 16:11:08,782 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:11:08,783 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-27 16:11:08,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:08,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:09,104 INFO L272 TraceCheckUtils]: 0: Hoare triple {3541#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:09,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {3541#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3541#true} is VALID [2022-04-27 16:11:09,105 INFO L290 TraceCheckUtils]: 2: Hoare triple {3541#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:09,105 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3541#true} {3541#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:09,105 INFO L272 TraceCheckUtils]: 4: Hoare triple {3541#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:09,105 INFO L290 TraceCheckUtils]: 5: Hoare triple {3541#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {3546#(= main_~x~0 0)} is VALID [2022-04-27 16:11:09,106 INFO L290 TraceCheckUtils]: 6: Hoare triple {3546#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3546#(= main_~x~0 0)} is VALID [2022-04-27 16:11:09,106 INFO L290 TraceCheckUtils]: 7: Hoare triple {3546#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:09,107 INFO L290 TraceCheckUtils]: 8: Hoare triple {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:09,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {3547#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:09,108 INFO L290 TraceCheckUtils]: 10: Hoare triple {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:09,108 INFO L290 TraceCheckUtils]: 11: Hoare triple {3548#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:09,109 INFO L290 TraceCheckUtils]: 12: Hoare triple {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:09,109 INFO L290 TraceCheckUtils]: 13: Hoare triple {3549#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:09,110 INFO L290 TraceCheckUtils]: 14: Hoare triple {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:09,110 INFO L290 TraceCheckUtils]: 15: Hoare triple {3550#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:09,111 INFO L290 TraceCheckUtils]: 16: Hoare triple {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:09,111 INFO L290 TraceCheckUtils]: 17: Hoare triple {3551#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:09,112 INFO L290 TraceCheckUtils]: 18: Hoare triple {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:09,112 INFO L290 TraceCheckUtils]: 19: Hoare triple {3552#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:09,113 INFO L290 TraceCheckUtils]: 20: Hoare triple {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:09,113 INFO L290 TraceCheckUtils]: 21: Hoare triple {3553#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:09,114 INFO L290 TraceCheckUtils]: 22: Hoare triple {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:09,114 INFO L290 TraceCheckUtils]: 23: Hoare triple {3554#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:09,115 INFO L290 TraceCheckUtils]: 24: Hoare triple {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:09,115 INFO L290 TraceCheckUtils]: 25: Hoare triple {3555#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:09,116 INFO L290 TraceCheckUtils]: 26: Hoare triple {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:09,117 INFO L290 TraceCheckUtils]: 27: Hoare triple {3556#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:09,117 INFO L290 TraceCheckUtils]: 28: Hoare triple {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:09,118 INFO L290 TraceCheckUtils]: 29: Hoare triple {3557#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:09,118 INFO L290 TraceCheckUtils]: 30: Hoare triple {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:09,119 INFO L290 TraceCheckUtils]: 31: Hoare triple {3558#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:09,119 INFO L290 TraceCheckUtils]: 32: Hoare triple {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:09,120 INFO L290 TraceCheckUtils]: 33: Hoare triple {3559#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3664#(and (<= 28 main_~x~0) (not (= (mod main_~y~0 2) 0)) (<= main_~x~0 28))} is VALID [2022-04-27 16:11:09,121 INFO L290 TraceCheckUtils]: 34: Hoare triple {3664#(and (<= 28 main_~x~0) (not (= (mod main_~y~0 2) 0)) (<= main_~x~0 28))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:09,121 INFO L272 TraceCheckUtils]: 35: Hoare triple {3542#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {3542#false} is VALID [2022-04-27 16:11:09,121 INFO L290 TraceCheckUtils]: 36: Hoare triple {3542#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3542#false} is VALID [2022-04-27 16:11:09,121 INFO L290 TraceCheckUtils]: 37: Hoare triple {3542#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:09,121 INFO L290 TraceCheckUtils]: 38: Hoare triple {3542#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:09,122 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:09,122 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:10,386 INFO L290 TraceCheckUtils]: 38: Hoare triple {3542#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:10,387 INFO L290 TraceCheckUtils]: 37: Hoare triple {3683#(not (<= __VERIFIER_assert_~cond 0))} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3542#false} is VALID [2022-04-27 16:11:10,387 INFO L290 TraceCheckUtils]: 36: Hoare triple {3687#(< 0 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3683#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:11:10,388 INFO L272 TraceCheckUtils]: 35: Hoare triple {3691#(= (mod main_~x~0 2) (mod main_~y~0 2))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {3687#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:11:10,388 INFO L290 TraceCheckUtils]: 34: Hoare triple {3695#(or (< (mod main_~x~0 4294967296) 99) (= (mod main_~x~0 2) (mod main_~y~0 2)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3691#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-27 16:11:10,390 INFO L290 TraceCheckUtils]: 33: Hoare triple {3699#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 2) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3695#(or (< (mod main_~x~0 4294967296) 99) (= (mod main_~x~0 2) (mod main_~y~0 2)))} is VALID [2022-04-27 16:11:10,390 INFO L290 TraceCheckUtils]: 32: Hoare triple {3699#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 2) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3699#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 2) 4294967296) 99))} is VALID [2022-04-27 16:11:10,391 INFO L290 TraceCheckUtils]: 31: Hoare triple {3706#(or (< (mod (+ main_~x~0 4) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3699#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 2) 4294967296) 99))} is VALID [2022-04-27 16:11:10,391 INFO L290 TraceCheckUtils]: 30: Hoare triple {3706#(or (< (mod (+ main_~x~0 4) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3706#(or (< (mod (+ main_~x~0 4) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,392 INFO L290 TraceCheckUtils]: 29: Hoare triple {3713#(or (< (mod (+ main_~x~0 6) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3706#(or (< (mod (+ main_~x~0 4) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,392 INFO L290 TraceCheckUtils]: 28: Hoare triple {3713#(or (< (mod (+ main_~x~0 6) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3713#(or (< (mod (+ main_~x~0 6) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,393 INFO L290 TraceCheckUtils]: 27: Hoare triple {3720#(or (< (mod (+ main_~x~0 8) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3713#(or (< (mod (+ main_~x~0 6) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,393 INFO L290 TraceCheckUtils]: 26: Hoare triple {3720#(or (< (mod (+ main_~x~0 8) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3720#(or (< (mod (+ main_~x~0 8) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,394 INFO L290 TraceCheckUtils]: 25: Hoare triple {3727#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 10) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3720#(or (< (mod (+ main_~x~0 8) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,394 INFO L290 TraceCheckUtils]: 24: Hoare triple {3727#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 10) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3727#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 10) 4294967296) 99))} is VALID [2022-04-27 16:11:10,395 INFO L290 TraceCheckUtils]: 23: Hoare triple {3734#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 12) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3727#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 10) 4294967296) 99))} is VALID [2022-04-27 16:11:10,395 INFO L290 TraceCheckUtils]: 22: Hoare triple {3734#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 12) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3734#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 12) 4294967296) 99))} is VALID [2022-04-27 16:11:10,396 INFO L290 TraceCheckUtils]: 21: Hoare triple {3741#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 14) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3734#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 12) 4294967296) 99))} is VALID [2022-04-27 16:11:10,396 INFO L290 TraceCheckUtils]: 20: Hoare triple {3741#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 14) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3741#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 14) 4294967296) 99))} is VALID [2022-04-27 16:11:10,397 INFO L290 TraceCheckUtils]: 19: Hoare triple {3748#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 16) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3741#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 14) 4294967296) 99))} is VALID [2022-04-27 16:11:10,398 INFO L290 TraceCheckUtils]: 18: Hoare triple {3748#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 16) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3748#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 16) 4294967296) 99))} is VALID [2022-04-27 16:11:10,398 INFO L290 TraceCheckUtils]: 17: Hoare triple {3755#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 18) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3748#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 16) 4294967296) 99))} is VALID [2022-04-27 16:11:10,399 INFO L290 TraceCheckUtils]: 16: Hoare triple {3755#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 18) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3755#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 18) 4294967296) 99))} is VALID [2022-04-27 16:11:10,399 INFO L290 TraceCheckUtils]: 15: Hoare triple {3762#(or (< (mod (+ main_~x~0 20) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3755#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 18) 4294967296) 99))} is VALID [2022-04-27 16:11:10,400 INFO L290 TraceCheckUtils]: 14: Hoare triple {3762#(or (< (mod (+ main_~x~0 20) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3762#(or (< (mod (+ main_~x~0 20) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,400 INFO L290 TraceCheckUtils]: 13: Hoare triple {3769#(or (< (mod (+ main_~x~0 22) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3762#(or (< (mod (+ main_~x~0 20) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,401 INFO L290 TraceCheckUtils]: 12: Hoare triple {3769#(or (< (mod (+ main_~x~0 22) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3769#(or (< (mod (+ main_~x~0 22) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,401 INFO L290 TraceCheckUtils]: 11: Hoare triple {3776#(or (< (mod (+ main_~x~0 24) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3769#(or (< (mod (+ main_~x~0 22) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,402 INFO L290 TraceCheckUtils]: 10: Hoare triple {3776#(or (< (mod (+ main_~x~0 24) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3776#(or (< (mod (+ main_~x~0 24) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,402 INFO L290 TraceCheckUtils]: 9: Hoare triple {3783#(or (< (mod (+ main_~x~0 26) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3776#(or (< (mod (+ main_~x~0 24) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,403 INFO L290 TraceCheckUtils]: 8: Hoare triple {3783#(or (< (mod (+ main_~x~0 26) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3783#(or (< (mod (+ main_~x~0 26) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,404 INFO L290 TraceCheckUtils]: 7: Hoare triple {3790#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 28) 4294967296) 99))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {3783#(or (< (mod (+ main_~x~0 26) 4294967296) 99) (<= 1 (mod main_~x~0 2)))} is VALID [2022-04-27 16:11:10,404 INFO L290 TraceCheckUtils]: 6: Hoare triple {3790#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 28) 4294967296) 99))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {3790#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 28) 4294967296) 99))} is VALID [2022-04-27 16:11:10,405 INFO L290 TraceCheckUtils]: 5: Hoare triple {3541#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {3790#(or (<= 1 (mod main_~x~0 2)) (< (mod (+ main_~x~0 28) 4294967296) 99))} is VALID [2022-04-27 16:11:10,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {3541#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:10,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3541#true} {3541#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:10,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {3541#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:10,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {3541#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3541#true} is VALID [2022-04-27 16:11:10,405 INFO L272 TraceCheckUtils]: 0: Hoare triple {3541#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3541#true} is VALID [2022-04-27 16:11:10,406 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:10,406 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [44629735] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:10,406 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:10,406 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 20] total 37 [2022-04-27 16:11:10,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967609963] [2022-04-27 16:11:10,406 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:10,407 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2022-04-27 16:11:10,407 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:10,407 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,471 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:10,472 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-27 16:11:10,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:10,472 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-27 16:11:10,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=1005, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 16:11:10,473 INFO L87 Difference]: Start difference. First operand 97 states and 99 transitions. Second operand has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:43,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:43,799 INFO L93 Difference]: Finished difference Result 133 states and 149 transitions. [2022-04-27 16:11:43,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-27 16:11:43,799 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2022-04-27 16:11:43,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:43,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:43,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 97 transitions. [2022-04-27 16:11:43,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:43,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 97 transitions. [2022-04-27 16:11:43,802 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 97 transitions. [2022-04-27 16:11:44,214 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 97 edges. 97 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:44,216 INFO L225 Difference]: With dead ends: 133 [2022-04-27 16:11:44,216 INFO L226 Difference]: Without dead ends: 129 [2022-04-27 16:11:44,217 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 837 ImplicationChecksByTransitivity, 29.2s TimeCoverageRelationStatistics Valid=1222, Invalid=3890, Unknown=0, NotChecked=0, Total=5112 [2022-04-27 16:11:44,218 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 151 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 741 mSolverCounterSat, 171 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 912 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 171 IncrementalHoareTripleChecker+Valid, 741 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:44,218 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 101 Invalid, 912 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [171 Valid, 741 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-27 16:11:44,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2022-04-27 16:11:44,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2022-04-27 16:11:44,222 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:44,222 INFO L82 GeneralOperation]: Start isEquivalent. First operand 129 states. Second operand has 129 states, 124 states have (on average 1.0241935483870968) internal successors, (127), 124 states have internal predecessors, (127), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:44,223 INFO L74 IsIncluded]: Start isIncluded. First operand 129 states. Second operand has 129 states, 124 states have (on average 1.0241935483870968) internal successors, (127), 124 states have internal predecessors, (127), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:44,223 INFO L87 Difference]: Start difference. First operand 129 states. Second operand has 129 states, 124 states have (on average 1.0241935483870968) internal successors, (127), 124 states have internal predecessors, (127), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:44,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:44,225 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2022-04-27 16:11:44,225 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 131 transitions. [2022-04-27 16:11:44,225 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:44,225 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:44,226 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 124 states have (on average 1.0241935483870968) internal successors, (127), 124 states have internal predecessors, (127), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 129 states. [2022-04-27 16:11:44,226 INFO L87 Difference]: Start difference. First operand has 129 states, 124 states have (on average 1.0241935483870968) internal successors, (127), 124 states have internal predecessors, (127), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 129 states. [2022-04-27 16:11:44,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:44,231 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2022-04-27 16:11:44,231 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 131 transitions. [2022-04-27 16:11:44,231 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:44,231 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:44,232 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:44,232 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:44,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 124 states have (on average 1.0241935483870968) internal successors, (127), 124 states have internal predecessors, (127), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:44,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 131 transitions. [2022-04-27 16:11:44,234 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 131 transitions. Word has length 39 [2022-04-27 16:11:44,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:44,234 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 131 transitions. [2022-04-27 16:11:44,234 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 35 states have internal predecessors, (70), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:44,234 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 131 transitions. [2022-04-27 16:11:44,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-27 16:11:44,235 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:44,236 INFO L195 NwaCegarLoop]: trace histogram [29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:44,241 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 16:11:44,441 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:44,441 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:44,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:44,441 INFO L85 PathProgramCache]: Analyzing trace with hash -1642006708, now seen corresponding path program 5 times [2022-04-27 16:11:44,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:44,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077857645] [2022-04-27 16:11:44,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:44,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:44,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:45,226 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:45,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:45,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {4439#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4404#true} is VALID [2022-04-27 16:11:45,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {4404#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:45,231 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4404#true} {4404#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:45,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {4404#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4439#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:45,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {4439#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4404#true} is VALID [2022-04-27 16:11:45,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {4404#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:45,232 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4404#true} {4404#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:45,232 INFO L272 TraceCheckUtils]: 4: Hoare triple {4404#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:45,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {4404#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {4409#(= main_~x~0 0)} is VALID [2022-04-27 16:11:45,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {4409#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4409#(= main_~x~0 0)} is VALID [2022-04-27 16:11:45,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {4409#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:45,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:45,234 INFO L290 TraceCheckUtils]: 9: Hoare triple {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:45,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:45,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:45,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:45,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:45,236 INFO L290 TraceCheckUtils]: 14: Hoare triple {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:45,237 INFO L290 TraceCheckUtils]: 15: Hoare triple {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:45,237 INFO L290 TraceCheckUtils]: 16: Hoare triple {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:45,238 INFO L290 TraceCheckUtils]: 17: Hoare triple {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:45,238 INFO L290 TraceCheckUtils]: 18: Hoare triple {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:45,239 INFO L290 TraceCheckUtils]: 19: Hoare triple {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:45,239 INFO L290 TraceCheckUtils]: 20: Hoare triple {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:45,240 INFO L290 TraceCheckUtils]: 21: Hoare triple {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:45,240 INFO L290 TraceCheckUtils]: 22: Hoare triple {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:45,241 INFO L290 TraceCheckUtils]: 23: Hoare triple {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:45,242 INFO L290 TraceCheckUtils]: 24: Hoare triple {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:45,242 INFO L290 TraceCheckUtils]: 25: Hoare triple {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:45,243 INFO L290 TraceCheckUtils]: 26: Hoare triple {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:45,243 INFO L290 TraceCheckUtils]: 27: Hoare triple {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:45,244 INFO L290 TraceCheckUtils]: 28: Hoare triple {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:45,244 INFO L290 TraceCheckUtils]: 29: Hoare triple {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:45,245 INFO L290 TraceCheckUtils]: 30: Hoare triple {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:45,245 INFO L290 TraceCheckUtils]: 31: Hoare triple {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:45,246 INFO L290 TraceCheckUtils]: 32: Hoare triple {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:45,246 INFO L290 TraceCheckUtils]: 33: Hoare triple {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:45,247 INFO L290 TraceCheckUtils]: 34: Hoare triple {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:45,247 INFO L290 TraceCheckUtils]: 35: Hoare triple {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:45,248 INFO L290 TraceCheckUtils]: 36: Hoare triple {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:45,248 INFO L290 TraceCheckUtils]: 37: Hoare triple {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:45,249 INFO L290 TraceCheckUtils]: 38: Hoare triple {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:45,249 INFO L290 TraceCheckUtils]: 39: Hoare triple {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:45,250 INFO L290 TraceCheckUtils]: 40: Hoare triple {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:45,250 INFO L290 TraceCheckUtils]: 41: Hoare triple {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:45,251 INFO L290 TraceCheckUtils]: 42: Hoare triple {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:45,251 INFO L290 TraceCheckUtils]: 43: Hoare triple {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:45,252 INFO L290 TraceCheckUtils]: 44: Hoare triple {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:45,252 INFO L290 TraceCheckUtils]: 45: Hoare triple {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:45,253 INFO L290 TraceCheckUtils]: 46: Hoare triple {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:45,253 INFO L290 TraceCheckUtils]: 47: Hoare triple {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:11:45,254 INFO L290 TraceCheckUtils]: 48: Hoare triple {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:11:45,254 INFO L290 TraceCheckUtils]: 49: Hoare triple {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:45,255 INFO L290 TraceCheckUtils]: 50: Hoare triple {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:45,255 INFO L290 TraceCheckUtils]: 51: Hoare triple {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:11:45,256 INFO L290 TraceCheckUtils]: 52: Hoare triple {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:11:45,256 INFO L290 TraceCheckUtils]: 53: Hoare triple {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:45,257 INFO L290 TraceCheckUtils]: 54: Hoare triple {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:45,257 INFO L290 TraceCheckUtils]: 55: Hoare triple {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:11:45,258 INFO L290 TraceCheckUtils]: 56: Hoare triple {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:11:45,258 INFO L290 TraceCheckUtils]: 57: Hoare triple {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:45,259 INFO L290 TraceCheckUtils]: 58: Hoare triple {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:45,259 INFO L290 TraceCheckUtils]: 59: Hoare triple {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} is VALID [2022-04-27 16:11:45,260 INFO L290 TraceCheckUtils]: 60: Hoare triple {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} is VALID [2022-04-27 16:11:45,260 INFO L290 TraceCheckUtils]: 61: Hoare triple {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:11:45,261 INFO L290 TraceCheckUtils]: 62: Hoare triple {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:11:45,261 INFO L290 TraceCheckUtils]: 63: Hoare triple {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4438#(and (<= main_~x~0 29) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:45,262 INFO L290 TraceCheckUtils]: 64: Hoare triple {4438#(and (<= main_~x~0 29) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:45,262 INFO L272 TraceCheckUtils]: 65: Hoare triple {4405#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {4405#false} is VALID [2022-04-27 16:11:45,262 INFO L290 TraceCheckUtils]: 66: Hoare triple {4405#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4405#false} is VALID [2022-04-27 16:11:45,262 INFO L290 TraceCheckUtils]: 67: Hoare triple {4405#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:45,262 INFO L290 TraceCheckUtils]: 68: Hoare triple {4405#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:45,263 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:45,263 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:45,263 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077857645] [2022-04-27 16:11:45,264 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077857645] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:45,264 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2044402368] [2022-04-27 16:11:45,264 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 16:11:45,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:45,264 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:45,265 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:45,266 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 16:11:56,222 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2022-04-27 16:11:56,222 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:11:56,234 INFO L263 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 61 conjunts are in the unsatisfiable core [2022-04-27 16:11:56,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:56,252 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:56,952 INFO L272 TraceCheckUtils]: 0: Hoare triple {4404#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:56,953 INFO L290 TraceCheckUtils]: 1: Hoare triple {4404#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4404#true} is VALID [2022-04-27 16:11:56,953 INFO L290 TraceCheckUtils]: 2: Hoare triple {4404#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:56,953 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4404#true} {4404#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:56,953 INFO L272 TraceCheckUtils]: 4: Hoare triple {4404#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:56,954 INFO L290 TraceCheckUtils]: 5: Hoare triple {4404#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {4409#(= main_~x~0 0)} is VALID [2022-04-27 16:11:56,954 INFO L290 TraceCheckUtils]: 6: Hoare triple {4409#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4409#(= main_~x~0 0)} is VALID [2022-04-27 16:11:56,955 INFO L290 TraceCheckUtils]: 7: Hoare triple {4409#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:56,955 INFO L290 TraceCheckUtils]: 8: Hoare triple {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:56,956 INFO L290 TraceCheckUtils]: 9: Hoare triple {4410#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:56,956 INFO L290 TraceCheckUtils]: 10: Hoare triple {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:56,956 INFO L290 TraceCheckUtils]: 11: Hoare triple {4411#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:56,957 INFO L290 TraceCheckUtils]: 12: Hoare triple {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:56,957 INFO L290 TraceCheckUtils]: 13: Hoare triple {4412#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:56,958 INFO L290 TraceCheckUtils]: 14: Hoare triple {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:56,958 INFO L290 TraceCheckUtils]: 15: Hoare triple {4413#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:56,958 INFO L290 TraceCheckUtils]: 16: Hoare triple {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:56,959 INFO L290 TraceCheckUtils]: 17: Hoare triple {4414#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:56,959 INFO L290 TraceCheckUtils]: 18: Hoare triple {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:56,960 INFO L290 TraceCheckUtils]: 19: Hoare triple {4415#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:56,960 INFO L290 TraceCheckUtils]: 20: Hoare triple {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:56,960 INFO L290 TraceCheckUtils]: 21: Hoare triple {4416#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:56,961 INFO L290 TraceCheckUtils]: 22: Hoare triple {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:56,961 INFO L290 TraceCheckUtils]: 23: Hoare triple {4417#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:56,962 INFO L290 TraceCheckUtils]: 24: Hoare triple {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:56,962 INFO L290 TraceCheckUtils]: 25: Hoare triple {4418#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:56,962 INFO L290 TraceCheckUtils]: 26: Hoare triple {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:56,963 INFO L290 TraceCheckUtils]: 27: Hoare triple {4419#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:56,963 INFO L290 TraceCheckUtils]: 28: Hoare triple {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:56,964 INFO L290 TraceCheckUtils]: 29: Hoare triple {4420#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:56,964 INFO L290 TraceCheckUtils]: 30: Hoare triple {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:56,964 INFO L290 TraceCheckUtils]: 31: Hoare triple {4421#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:56,965 INFO L290 TraceCheckUtils]: 32: Hoare triple {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:56,965 INFO L290 TraceCheckUtils]: 33: Hoare triple {4422#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:56,965 INFO L290 TraceCheckUtils]: 34: Hoare triple {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:11:56,966 INFO L290 TraceCheckUtils]: 35: Hoare triple {4423#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:56,966 INFO L290 TraceCheckUtils]: 36: Hoare triple {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:56,967 INFO L290 TraceCheckUtils]: 37: Hoare triple {4424#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:56,967 INFO L290 TraceCheckUtils]: 38: Hoare triple {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:11:56,968 INFO L290 TraceCheckUtils]: 39: Hoare triple {4425#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:56,968 INFO L290 TraceCheckUtils]: 40: Hoare triple {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:56,968 INFO L290 TraceCheckUtils]: 41: Hoare triple {4426#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:56,969 INFO L290 TraceCheckUtils]: 42: Hoare triple {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:11:56,969 INFO L290 TraceCheckUtils]: 43: Hoare triple {4427#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:56,969 INFO L290 TraceCheckUtils]: 44: Hoare triple {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:56,970 INFO L290 TraceCheckUtils]: 45: Hoare triple {4428#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:56,970 INFO L290 TraceCheckUtils]: 46: Hoare triple {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:11:56,971 INFO L290 TraceCheckUtils]: 47: Hoare triple {4429#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:11:56,971 INFO L290 TraceCheckUtils]: 48: Hoare triple {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:11:56,971 INFO L290 TraceCheckUtils]: 49: Hoare triple {4430#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:56,972 INFO L290 TraceCheckUtils]: 50: Hoare triple {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:11:56,972 INFO L290 TraceCheckUtils]: 51: Hoare triple {4431#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:11:56,973 INFO L290 TraceCheckUtils]: 52: Hoare triple {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:11:56,973 INFO L290 TraceCheckUtils]: 53: Hoare triple {4432#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:56,973 INFO L290 TraceCheckUtils]: 54: Hoare triple {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:11:56,974 INFO L290 TraceCheckUtils]: 55: Hoare triple {4433#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:11:56,974 INFO L290 TraceCheckUtils]: 56: Hoare triple {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:11:56,975 INFO L290 TraceCheckUtils]: 57: Hoare triple {4434#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:56,975 INFO L290 TraceCheckUtils]: 58: Hoare triple {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:11:56,975 INFO L290 TraceCheckUtils]: 59: Hoare triple {4435#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} is VALID [2022-04-27 16:11:56,976 INFO L290 TraceCheckUtils]: 60: Hoare triple {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} is VALID [2022-04-27 16:11:56,976 INFO L290 TraceCheckUtils]: 61: Hoare triple {4436#(and (<= 27 main_~x~0) (<= main_~x~0 27))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:11:56,977 INFO L290 TraceCheckUtils]: 62: Hoare triple {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:11:56,977 INFO L290 TraceCheckUtils]: 63: Hoare triple {4437#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4632#(and (<= main_~x~0 29) (<= 29 main_~x~0))} is VALID [2022-04-27 16:11:56,978 INFO L290 TraceCheckUtils]: 64: Hoare triple {4632#(and (<= main_~x~0 29) (<= 29 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:56,978 INFO L272 TraceCheckUtils]: 65: Hoare triple {4405#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {4405#false} is VALID [2022-04-27 16:11:56,978 INFO L290 TraceCheckUtils]: 66: Hoare triple {4405#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4405#false} is VALID [2022-04-27 16:11:56,978 INFO L290 TraceCheckUtils]: 67: Hoare triple {4405#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:56,978 INFO L290 TraceCheckUtils]: 68: Hoare triple {4405#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:56,979 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:56,979 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:58,630 INFO L290 TraceCheckUtils]: 68: Hoare triple {4405#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:58,630 INFO L290 TraceCheckUtils]: 67: Hoare triple {4405#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:58,630 INFO L290 TraceCheckUtils]: 66: Hoare triple {4405#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4405#false} is VALID [2022-04-27 16:11:58,630 INFO L272 TraceCheckUtils]: 65: Hoare triple {4405#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {4405#false} is VALID [2022-04-27 16:11:58,630 INFO L290 TraceCheckUtils]: 64: Hoare triple {4660#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4405#false} is VALID [2022-04-27 16:11:58,631 INFO L290 TraceCheckUtils]: 63: Hoare triple {4664#(< (mod (+ main_~x~0 1) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4660#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:11:58,631 INFO L290 TraceCheckUtils]: 62: Hoare triple {4664#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4664#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:11:58,632 INFO L290 TraceCheckUtils]: 61: Hoare triple {4671#(< (mod (+ main_~x~0 2) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4664#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-27 16:11:58,632 INFO L290 TraceCheckUtils]: 60: Hoare triple {4671#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4671#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:11:58,633 INFO L290 TraceCheckUtils]: 59: Hoare triple {4678#(< (mod (+ main_~x~0 3) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4671#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:11:58,633 INFO L290 TraceCheckUtils]: 58: Hoare triple {4678#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4678#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-27 16:11:58,634 INFO L290 TraceCheckUtils]: 57: Hoare triple {4685#(< (mod (+ main_~x~0 4) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4678#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-27 16:11:58,634 INFO L290 TraceCheckUtils]: 56: Hoare triple {4685#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4685#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:11:58,635 INFO L290 TraceCheckUtils]: 55: Hoare triple {4692#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4685#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:11:58,635 INFO L290 TraceCheckUtils]: 54: Hoare triple {4692#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4692#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,636 INFO L290 TraceCheckUtils]: 53: Hoare triple {4699#(< (mod (+ main_~x~0 6) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4692#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,638 INFO L290 TraceCheckUtils]: 52: Hoare triple {4699#(< (mod (+ main_~x~0 6) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4699#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:11:58,640 INFO L290 TraceCheckUtils]: 51: Hoare triple {4706#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4699#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:11:58,640 INFO L290 TraceCheckUtils]: 50: Hoare triple {4706#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4706#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,641 INFO L290 TraceCheckUtils]: 49: Hoare triple {4713#(< (mod (+ main_~x~0 8) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4706#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,641 INFO L290 TraceCheckUtils]: 48: Hoare triple {4713#(< (mod (+ main_~x~0 8) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4713#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:11:58,642 INFO L290 TraceCheckUtils]: 47: Hoare triple {4720#(< (mod (+ main_~x~0 9) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4713#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:11:58,642 INFO L290 TraceCheckUtils]: 46: Hoare triple {4720#(< (mod (+ main_~x~0 9) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4720#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-27 16:11:58,643 INFO L290 TraceCheckUtils]: 45: Hoare triple {4727#(< (mod (+ main_~x~0 10) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4720#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-27 16:11:58,643 INFO L290 TraceCheckUtils]: 44: Hoare triple {4727#(< (mod (+ main_~x~0 10) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4727#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:11:58,644 INFO L290 TraceCheckUtils]: 43: Hoare triple {4734#(< (mod (+ main_~x~0 11) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4727#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:11:58,644 INFO L290 TraceCheckUtils]: 42: Hoare triple {4734#(< (mod (+ main_~x~0 11) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4734#(< (mod (+ main_~x~0 11) 4294967296) 99)} is VALID [2022-04-27 16:11:58,645 INFO L290 TraceCheckUtils]: 41: Hoare triple {4741#(< (mod (+ main_~x~0 12) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4734#(< (mod (+ main_~x~0 11) 4294967296) 99)} is VALID [2022-04-27 16:11:58,645 INFO L290 TraceCheckUtils]: 40: Hoare triple {4741#(< (mod (+ main_~x~0 12) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4741#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:11:58,645 INFO L290 TraceCheckUtils]: 39: Hoare triple {4748#(< (mod (+ main_~x~0 13) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4741#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:11:58,646 INFO L290 TraceCheckUtils]: 38: Hoare triple {4748#(< (mod (+ main_~x~0 13) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4748#(< (mod (+ main_~x~0 13) 4294967296) 99)} is VALID [2022-04-27 16:11:58,646 INFO L290 TraceCheckUtils]: 37: Hoare triple {4755#(< (mod (+ main_~x~0 14) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4748#(< (mod (+ main_~x~0 13) 4294967296) 99)} is VALID [2022-04-27 16:11:58,647 INFO L290 TraceCheckUtils]: 36: Hoare triple {4755#(< (mod (+ main_~x~0 14) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4755#(< (mod (+ main_~x~0 14) 4294967296) 99)} is VALID [2022-04-27 16:11:58,647 INFO L290 TraceCheckUtils]: 35: Hoare triple {4762#(< (mod (+ main_~x~0 15) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4755#(< (mod (+ main_~x~0 14) 4294967296) 99)} is VALID [2022-04-27 16:11:58,648 INFO L290 TraceCheckUtils]: 34: Hoare triple {4762#(< (mod (+ main_~x~0 15) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4762#(< (mod (+ main_~x~0 15) 4294967296) 99)} is VALID [2022-04-27 16:11:58,648 INFO L290 TraceCheckUtils]: 33: Hoare triple {4769#(< (mod (+ main_~x~0 16) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4762#(< (mod (+ main_~x~0 15) 4294967296) 99)} is VALID [2022-04-27 16:11:58,649 INFO L290 TraceCheckUtils]: 32: Hoare triple {4769#(< (mod (+ main_~x~0 16) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4769#(< (mod (+ main_~x~0 16) 4294967296) 99)} is VALID [2022-04-27 16:11:58,649 INFO L290 TraceCheckUtils]: 31: Hoare triple {4776#(< (mod (+ main_~x~0 17) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4769#(< (mod (+ main_~x~0 16) 4294967296) 99)} is VALID [2022-04-27 16:11:58,649 INFO L290 TraceCheckUtils]: 30: Hoare triple {4776#(< (mod (+ main_~x~0 17) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4776#(< (mod (+ main_~x~0 17) 4294967296) 99)} is VALID [2022-04-27 16:11:58,650 INFO L290 TraceCheckUtils]: 29: Hoare triple {4783#(< (mod (+ main_~x~0 18) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4776#(< (mod (+ main_~x~0 17) 4294967296) 99)} is VALID [2022-04-27 16:11:58,650 INFO L290 TraceCheckUtils]: 28: Hoare triple {4783#(< (mod (+ main_~x~0 18) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4783#(< (mod (+ main_~x~0 18) 4294967296) 99)} is VALID [2022-04-27 16:11:58,651 INFO L290 TraceCheckUtils]: 27: Hoare triple {4790#(< (mod (+ 19 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4783#(< (mod (+ main_~x~0 18) 4294967296) 99)} is VALID [2022-04-27 16:11:58,651 INFO L290 TraceCheckUtils]: 26: Hoare triple {4790#(< (mod (+ 19 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4790#(< (mod (+ 19 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,652 INFO L290 TraceCheckUtils]: 25: Hoare triple {4797#(< (mod (+ main_~x~0 20) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4790#(< (mod (+ 19 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,652 INFO L290 TraceCheckUtils]: 24: Hoare triple {4797#(< (mod (+ main_~x~0 20) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4797#(< (mod (+ main_~x~0 20) 4294967296) 99)} is VALID [2022-04-27 16:11:58,653 INFO L290 TraceCheckUtils]: 23: Hoare triple {4804#(< (mod (+ main_~x~0 21) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4797#(< (mod (+ main_~x~0 20) 4294967296) 99)} is VALID [2022-04-27 16:11:58,653 INFO L290 TraceCheckUtils]: 22: Hoare triple {4804#(< (mod (+ main_~x~0 21) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4804#(< (mod (+ main_~x~0 21) 4294967296) 99)} is VALID [2022-04-27 16:11:58,654 INFO L290 TraceCheckUtils]: 21: Hoare triple {4811#(< (mod (+ main_~x~0 22) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4804#(< (mod (+ main_~x~0 21) 4294967296) 99)} is VALID [2022-04-27 16:11:58,654 INFO L290 TraceCheckUtils]: 20: Hoare triple {4811#(< (mod (+ main_~x~0 22) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4811#(< (mod (+ main_~x~0 22) 4294967296) 99)} is VALID [2022-04-27 16:11:58,655 INFO L290 TraceCheckUtils]: 19: Hoare triple {4818#(< (mod (+ 23 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4811#(< (mod (+ main_~x~0 22) 4294967296) 99)} is VALID [2022-04-27 16:11:58,655 INFO L290 TraceCheckUtils]: 18: Hoare triple {4818#(< (mod (+ 23 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4818#(< (mod (+ 23 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,655 INFO L290 TraceCheckUtils]: 17: Hoare triple {4825#(< (mod (+ main_~x~0 24) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4818#(< (mod (+ 23 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,656 INFO L290 TraceCheckUtils]: 16: Hoare triple {4825#(< (mod (+ main_~x~0 24) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4825#(< (mod (+ main_~x~0 24) 4294967296) 99)} is VALID [2022-04-27 16:11:58,656 INFO L290 TraceCheckUtils]: 15: Hoare triple {4832#(< (mod (+ main_~x~0 25) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4825#(< (mod (+ main_~x~0 24) 4294967296) 99)} is VALID [2022-04-27 16:11:58,657 INFO L290 TraceCheckUtils]: 14: Hoare triple {4832#(< (mod (+ main_~x~0 25) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4832#(< (mod (+ main_~x~0 25) 4294967296) 99)} is VALID [2022-04-27 16:11:58,657 INFO L290 TraceCheckUtils]: 13: Hoare triple {4839#(< (mod (+ main_~x~0 26) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4832#(< (mod (+ main_~x~0 25) 4294967296) 99)} is VALID [2022-04-27 16:11:58,658 INFO L290 TraceCheckUtils]: 12: Hoare triple {4839#(< (mod (+ main_~x~0 26) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4839#(< (mod (+ main_~x~0 26) 4294967296) 99)} is VALID [2022-04-27 16:11:58,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {4846#(< (mod (+ main_~x~0 27) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4839#(< (mod (+ main_~x~0 26) 4294967296) 99)} is VALID [2022-04-27 16:11:58,658 INFO L290 TraceCheckUtils]: 10: Hoare triple {4846#(< (mod (+ main_~x~0 27) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4846#(< (mod (+ main_~x~0 27) 4294967296) 99)} is VALID [2022-04-27 16:11:58,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {4853#(< (mod (+ main_~x~0 28) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4846#(< (mod (+ main_~x~0 27) 4294967296) 99)} is VALID [2022-04-27 16:11:58,659 INFO L290 TraceCheckUtils]: 8: Hoare triple {4853#(< (mod (+ main_~x~0 28) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4853#(< (mod (+ main_~x~0 28) 4294967296) 99)} is VALID [2022-04-27 16:11:58,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {4860#(< (mod (+ 29 main_~x~0) 4294967296) 99)} [55] L18-->L18-2: Formula: (and (= (mod v_main_~y~0_4 2) 0) (= v_main_~x~0_7 (+ v_main_~x~0_8 1))) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_4, main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {4853#(< (mod (+ main_~x~0 28) 4294967296) 99)} is VALID [2022-04-27 16:11:58,660 INFO L290 TraceCheckUtils]: 6: Hoare triple {4860#(< (mod (+ 29 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {4860#(< (mod (+ 29 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,661 INFO L290 TraceCheckUtils]: 5: Hoare triple {4404#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {4860#(< (mod (+ 29 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:11:58,661 INFO L272 TraceCheckUtils]: 4: Hoare triple {4404#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:58,661 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4404#true} {4404#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:58,661 INFO L290 TraceCheckUtils]: 2: Hoare triple {4404#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:58,661 INFO L290 TraceCheckUtils]: 1: Hoare triple {4404#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4404#true} is VALID [2022-04-27 16:11:58,661 INFO L272 TraceCheckUtils]: 0: Hoare triple {4404#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4404#true} is VALID [2022-04-27 16:11:58,662 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:58,662 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2044402368] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:58,662 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:58,662 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32] total 64 [2022-04-27 16:11:58,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [908123847] [2022-04-27 16:11:58,663 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:58,663 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 69 [2022-04-27 16:11:58,664 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:58,664 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:58,778 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:58,778 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2022-04-27 16:11:58,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:58,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2022-04-27 16:11:58,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1085, Invalid=2947, Unknown=0, NotChecked=0, Total=4032 [2022-04-27 16:11:58,780 INFO L87 Difference]: Start difference. First operand 129 states and 131 transitions. Second operand has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:15:06,566 INFO L93 Difference]: Finished difference Result 194 states and 196 transitions. [2022-04-27 16:15:06,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2022-04-27 16:15:06,567 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 69 [2022-04-27 16:15:06,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:15:06,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 179 transitions. [2022-04-27 16:15:06,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 179 transitions. [2022-04-27 16:15:06,571 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 63 states and 179 transitions. [2022-04-27 16:15:06,891 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 179 edges. 179 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:15:06,895 INFO L225 Difference]: With dead ends: 194 [2022-04-27 16:15:06,895 INFO L226 Difference]: Without dead ends: 194 [2022-04-27 16:15:06,898 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 109 SyntacticMatches, 1 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2079 ImplicationChecksByTransitivity, 183.9s TimeCoverageRelationStatistics Valid=4022, Invalid=11226, Unknown=4, NotChecked=0, Total=15252 [2022-04-27 16:15:06,899 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 113 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 2537 mSolverCounterSat, 698 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 113 SdHoareTripleChecker+Valid, 163 SdHoareTripleChecker+Invalid, 3235 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 698 IncrementalHoareTripleChecker+Valid, 2537 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-04-27 16:15:06,899 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [113 Valid, 163 Invalid, 3235 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [698 Valid, 2537 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2022-04-27 16:15:06,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2022-04-27 16:15:06,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 193. [2022-04-27 16:15:06,903 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:15:06,903 INFO L82 GeneralOperation]: Start isEquivalent. First operand 194 states. Second operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,904 INFO L74 IsIncluded]: Start isIncluded. First operand 194 states. Second operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,904 INFO L87 Difference]: Start difference. First operand 194 states. Second operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:15:06,907 INFO L93 Difference]: Finished difference Result 194 states and 196 transitions. [2022-04-27 16:15:06,907 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2022-04-27 16:15:06,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:15:06,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:15:06,908 INFO L74 IsIncluded]: Start isIncluded. First operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 194 states. [2022-04-27 16:15:06,909 INFO L87 Difference]: Start difference. First operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 194 states. [2022-04-27 16:15:06,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:15:06,912 INFO L93 Difference]: Finished difference Result 194 states and 196 transitions. [2022-04-27 16:15:06,912 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2022-04-27 16:15:06,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:15:06,913 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:15:06,913 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:15:06,913 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:15:06,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 195 transitions. [2022-04-27 16:15:06,916 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 195 transitions. Word has length 69 [2022-04-27 16:15:06,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:15:06,917 INFO L495 AbstractCegarLoop]: Abstraction has 193 states and 195 transitions. [2022-04-27 16:15:06,917 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 2.0) internal successors, (128), 63 states have internal predecessors, (128), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:06,917 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 195 transitions. [2022-04-27 16:15:06,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-04-27 16:15:06,918 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:15:06,918 INFO L195 NwaCegarLoop]: trace histogram [30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:15:06,927 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-27 16:15:07,125 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-27 16:15:07,126 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:15:07,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:15:07,126 INFO L85 PathProgramCache]: Analyzing trace with hash -1425056564, now seen corresponding path program 4 times [2022-04-27 16:15:07,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:15:07,126 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121001829] [2022-04-27 16:15:07,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:15:07,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:15:07,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:15:07,797 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:15:07,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:15:07,812 INFO L290 TraceCheckUtils]: 0: Hoare triple {5815#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5779#true} is VALID [2022-04-27 16:15:07,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {5779#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:07,813 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5779#true} {5779#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:07,813 INFO L272 TraceCheckUtils]: 0: Hoare triple {5779#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5815#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:15:07,814 INFO L290 TraceCheckUtils]: 1: Hoare triple {5815#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5779#true} is VALID [2022-04-27 16:15:07,814 INFO L290 TraceCheckUtils]: 2: Hoare triple {5779#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:07,814 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5779#true} {5779#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:07,814 INFO L272 TraceCheckUtils]: 4: Hoare triple {5779#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:07,814 INFO L290 TraceCheckUtils]: 5: Hoare triple {5779#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {5784#(= main_~x~0 0)} is VALID [2022-04-27 16:15:07,815 INFO L290 TraceCheckUtils]: 6: Hoare triple {5784#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5784#(= main_~x~0 0)} is VALID [2022-04-27 16:15:07,815 INFO L290 TraceCheckUtils]: 7: Hoare triple {5784#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:15:07,815 INFO L290 TraceCheckUtils]: 8: Hoare triple {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:15:07,816 INFO L290 TraceCheckUtils]: 9: Hoare triple {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:15:07,817 INFO L290 TraceCheckUtils]: 10: Hoare triple {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:15:07,817 INFO L290 TraceCheckUtils]: 11: Hoare triple {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:15:07,818 INFO L290 TraceCheckUtils]: 12: Hoare triple {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:15:07,818 INFO L290 TraceCheckUtils]: 13: Hoare triple {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:15:07,818 INFO L290 TraceCheckUtils]: 14: Hoare triple {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:15:07,819 INFO L290 TraceCheckUtils]: 15: Hoare triple {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:15:07,819 INFO L290 TraceCheckUtils]: 16: Hoare triple {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:15:07,820 INFO L290 TraceCheckUtils]: 17: Hoare triple {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:15:07,820 INFO L290 TraceCheckUtils]: 18: Hoare triple {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:15:07,821 INFO L290 TraceCheckUtils]: 19: Hoare triple {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:15:07,821 INFO L290 TraceCheckUtils]: 20: Hoare triple {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:15:07,822 INFO L290 TraceCheckUtils]: 21: Hoare triple {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:15:07,822 INFO L290 TraceCheckUtils]: 22: Hoare triple {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:15:07,823 INFO L290 TraceCheckUtils]: 23: Hoare triple {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:15:07,823 INFO L290 TraceCheckUtils]: 24: Hoare triple {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:15:07,824 INFO L290 TraceCheckUtils]: 25: Hoare triple {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:15:07,824 INFO L290 TraceCheckUtils]: 26: Hoare triple {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:15:07,825 INFO L290 TraceCheckUtils]: 27: Hoare triple {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:15:07,825 INFO L290 TraceCheckUtils]: 28: Hoare triple {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:15:07,826 INFO L290 TraceCheckUtils]: 29: Hoare triple {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:15:07,826 INFO L290 TraceCheckUtils]: 30: Hoare triple {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:15:07,827 INFO L290 TraceCheckUtils]: 31: Hoare triple {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:15:07,827 INFO L290 TraceCheckUtils]: 32: Hoare triple {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:15:07,828 INFO L290 TraceCheckUtils]: 33: Hoare triple {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:15:07,828 INFO L290 TraceCheckUtils]: 34: Hoare triple {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:15:07,829 INFO L290 TraceCheckUtils]: 35: Hoare triple {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 16:15:07,829 INFO L290 TraceCheckUtils]: 36: Hoare triple {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 16:15:07,830 INFO L290 TraceCheckUtils]: 37: Hoare triple {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 16:15:07,830 INFO L290 TraceCheckUtils]: 38: Hoare triple {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 16:15:07,831 INFO L290 TraceCheckUtils]: 39: Hoare triple {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 16:15:07,831 INFO L290 TraceCheckUtils]: 40: Hoare triple {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 16:15:07,832 INFO L290 TraceCheckUtils]: 41: Hoare triple {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 16:15:07,832 INFO L290 TraceCheckUtils]: 42: Hoare triple {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 16:15:07,833 INFO L290 TraceCheckUtils]: 43: Hoare triple {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 16:15:07,833 INFO L290 TraceCheckUtils]: 44: Hoare triple {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 16:15:07,834 INFO L290 TraceCheckUtils]: 45: Hoare triple {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 16:15:07,834 INFO L290 TraceCheckUtils]: 46: Hoare triple {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 16:15:07,835 INFO L290 TraceCheckUtils]: 47: Hoare triple {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 16:15:07,835 INFO L290 TraceCheckUtils]: 48: Hoare triple {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 16:15:07,836 INFO L290 TraceCheckUtils]: 49: Hoare triple {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 16:15:07,836 INFO L290 TraceCheckUtils]: 50: Hoare triple {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 16:15:07,837 INFO L290 TraceCheckUtils]: 51: Hoare triple {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} is VALID [2022-04-27 16:15:07,837 INFO L290 TraceCheckUtils]: 52: Hoare triple {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} is VALID [2022-04-27 16:15:07,838 INFO L290 TraceCheckUtils]: 53: Hoare triple {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} is VALID [2022-04-27 16:15:07,838 INFO L290 TraceCheckUtils]: 54: Hoare triple {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} is VALID [2022-04-27 16:15:07,839 INFO L290 TraceCheckUtils]: 55: Hoare triple {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} is VALID [2022-04-27 16:15:07,839 INFO L290 TraceCheckUtils]: 56: Hoare triple {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} is VALID [2022-04-27 16:15:07,840 INFO L290 TraceCheckUtils]: 57: Hoare triple {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} is VALID [2022-04-27 16:15:07,840 INFO L290 TraceCheckUtils]: 58: Hoare triple {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} is VALID [2022-04-27 16:15:07,841 INFO L290 TraceCheckUtils]: 59: Hoare triple {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} is VALID [2022-04-27 16:15:07,841 INFO L290 TraceCheckUtils]: 60: Hoare triple {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} is VALID [2022-04-27 16:15:07,842 INFO L290 TraceCheckUtils]: 61: Hoare triple {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} is VALID [2022-04-27 16:15:07,842 INFO L290 TraceCheckUtils]: 62: Hoare triple {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} is VALID [2022-04-27 16:15:07,843 INFO L290 TraceCheckUtils]: 63: Hoare triple {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} is VALID [2022-04-27 16:15:07,844 INFO L290 TraceCheckUtils]: 64: Hoare triple {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} is VALID [2022-04-27 16:15:07,844 INFO L290 TraceCheckUtils]: 65: Hoare triple {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5814#(and (<= main_~x~0 60) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:15:07,845 INFO L290 TraceCheckUtils]: 66: Hoare triple {5814#(and (<= main_~x~0 60) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:07,845 INFO L272 TraceCheckUtils]: 67: Hoare triple {5780#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {5780#false} is VALID [2022-04-27 16:15:07,845 INFO L290 TraceCheckUtils]: 68: Hoare triple {5780#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5780#false} is VALID [2022-04-27 16:15:07,845 INFO L290 TraceCheckUtils]: 69: Hoare triple {5780#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:07,845 INFO L290 TraceCheckUtils]: 70: Hoare triple {5780#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:07,846 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:15:07,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:15:07,846 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121001829] [2022-04-27 16:15:07,846 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2121001829] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:15:07,846 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [923680516] [2022-04-27 16:15:07,846 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:15:07,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:15:07,847 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:15:07,852 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:15:07,852 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 16:15:07,955 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:15:07,955 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:15:07,957 INFO L263 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 63 conjunts are in the unsatisfiable core [2022-04-27 16:15:07,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:15:07,967 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:15:08,640 INFO L272 TraceCheckUtils]: 0: Hoare triple {5779#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:08,640 INFO L290 TraceCheckUtils]: 1: Hoare triple {5779#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5779#true} is VALID [2022-04-27 16:15:08,640 INFO L290 TraceCheckUtils]: 2: Hoare triple {5779#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:08,640 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5779#true} {5779#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:08,640 INFO L272 TraceCheckUtils]: 4: Hoare triple {5779#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:08,641 INFO L290 TraceCheckUtils]: 5: Hoare triple {5779#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {5784#(= main_~x~0 0)} is VALID [2022-04-27 16:15:08,641 INFO L290 TraceCheckUtils]: 6: Hoare triple {5784#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5784#(= main_~x~0 0)} is VALID [2022-04-27 16:15:08,642 INFO L290 TraceCheckUtils]: 7: Hoare triple {5784#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:15:08,642 INFO L290 TraceCheckUtils]: 8: Hoare triple {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:15:08,643 INFO L290 TraceCheckUtils]: 9: Hoare triple {5785#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:15:08,643 INFO L290 TraceCheckUtils]: 10: Hoare triple {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:15:08,643 INFO L290 TraceCheckUtils]: 11: Hoare triple {5786#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:15:08,644 INFO L290 TraceCheckUtils]: 12: Hoare triple {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:15:08,644 INFO L290 TraceCheckUtils]: 13: Hoare triple {5787#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:15:08,645 INFO L290 TraceCheckUtils]: 14: Hoare triple {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:15:08,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {5788#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:15:08,645 INFO L290 TraceCheckUtils]: 16: Hoare triple {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:15:08,646 INFO L290 TraceCheckUtils]: 17: Hoare triple {5789#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:15:08,646 INFO L290 TraceCheckUtils]: 18: Hoare triple {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:15:08,647 INFO L290 TraceCheckUtils]: 19: Hoare triple {5790#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:15:08,648 INFO L290 TraceCheckUtils]: 20: Hoare triple {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:15:08,648 INFO L290 TraceCheckUtils]: 21: Hoare triple {5791#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:15:08,649 INFO L290 TraceCheckUtils]: 22: Hoare triple {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:15:08,649 INFO L290 TraceCheckUtils]: 23: Hoare triple {5792#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:15:08,649 INFO L290 TraceCheckUtils]: 24: Hoare triple {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:15:08,651 INFO L290 TraceCheckUtils]: 25: Hoare triple {5793#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:15:08,651 INFO L290 TraceCheckUtils]: 26: Hoare triple {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:15:08,651 INFO L290 TraceCheckUtils]: 27: Hoare triple {5794#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:15:08,652 INFO L290 TraceCheckUtils]: 28: Hoare triple {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:15:08,652 INFO L290 TraceCheckUtils]: 29: Hoare triple {5795#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:15:08,652 INFO L290 TraceCheckUtils]: 30: Hoare triple {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:15:08,653 INFO L290 TraceCheckUtils]: 31: Hoare triple {5796#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:15:08,653 INFO L290 TraceCheckUtils]: 32: Hoare triple {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:15:08,654 INFO L290 TraceCheckUtils]: 33: Hoare triple {5797#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:15:08,655 INFO L290 TraceCheckUtils]: 34: Hoare triple {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:15:08,655 INFO L290 TraceCheckUtils]: 35: Hoare triple {5798#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 16:15:08,655 INFO L290 TraceCheckUtils]: 36: Hoare triple {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 16:15:08,656 INFO L290 TraceCheckUtils]: 37: Hoare triple {5799#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 16:15:08,656 INFO L290 TraceCheckUtils]: 38: Hoare triple {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 16:15:08,657 INFO L290 TraceCheckUtils]: 39: Hoare triple {5800#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 16:15:08,657 INFO L290 TraceCheckUtils]: 40: Hoare triple {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 16:15:08,657 INFO L290 TraceCheckUtils]: 41: Hoare triple {5801#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 16:15:08,658 INFO L290 TraceCheckUtils]: 42: Hoare triple {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 16:15:08,658 INFO L290 TraceCheckUtils]: 43: Hoare triple {5802#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 16:15:08,659 INFO L290 TraceCheckUtils]: 44: Hoare triple {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 16:15:08,659 INFO L290 TraceCheckUtils]: 45: Hoare triple {5803#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 16:15:08,659 INFO L290 TraceCheckUtils]: 46: Hoare triple {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 16:15:08,660 INFO L290 TraceCheckUtils]: 47: Hoare triple {5804#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 16:15:08,660 INFO L290 TraceCheckUtils]: 48: Hoare triple {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 16:15:08,662 INFO L290 TraceCheckUtils]: 49: Hoare triple {5805#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 16:15:08,663 INFO L290 TraceCheckUtils]: 50: Hoare triple {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 16:15:08,663 INFO L290 TraceCheckUtils]: 51: Hoare triple {5806#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} is VALID [2022-04-27 16:15:08,663 INFO L290 TraceCheckUtils]: 52: Hoare triple {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} is VALID [2022-04-27 16:15:08,664 INFO L290 TraceCheckUtils]: 53: Hoare triple {5807#(and (<= 46 main_~x~0) (<= main_~x~0 46))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} is VALID [2022-04-27 16:15:08,664 INFO L290 TraceCheckUtils]: 54: Hoare triple {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} is VALID [2022-04-27 16:15:08,665 INFO L290 TraceCheckUtils]: 55: Hoare triple {5808#(and (<= main_~x~0 48) (<= 48 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} is VALID [2022-04-27 16:15:08,665 INFO L290 TraceCheckUtils]: 56: Hoare triple {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} is VALID [2022-04-27 16:15:08,665 INFO L290 TraceCheckUtils]: 57: Hoare triple {5809#(and (<= main_~x~0 50) (<= 50 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} is VALID [2022-04-27 16:15:08,666 INFO L290 TraceCheckUtils]: 58: Hoare triple {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} is VALID [2022-04-27 16:15:08,666 INFO L290 TraceCheckUtils]: 59: Hoare triple {5810#(and (<= main_~x~0 52) (<= 52 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} is VALID [2022-04-27 16:15:08,667 INFO L290 TraceCheckUtils]: 60: Hoare triple {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} is VALID [2022-04-27 16:15:08,667 INFO L290 TraceCheckUtils]: 61: Hoare triple {5811#(and (<= main_~x~0 54) (<= 54 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} is VALID [2022-04-27 16:15:08,668 INFO L290 TraceCheckUtils]: 62: Hoare triple {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} is VALID [2022-04-27 16:15:08,668 INFO L290 TraceCheckUtils]: 63: Hoare triple {5812#(and (<= main_~x~0 56) (<= 56 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} is VALID [2022-04-27 16:15:08,669 INFO L290 TraceCheckUtils]: 64: Hoare triple {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} is VALID [2022-04-27 16:15:08,669 INFO L290 TraceCheckUtils]: 65: Hoare triple {5813#(and (<= 58 main_~x~0) (<= main_~x~0 58))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6014#(and (<= main_~x~0 60) (<= 60 main_~x~0))} is VALID [2022-04-27 16:15:08,670 INFO L290 TraceCheckUtils]: 66: Hoare triple {6014#(and (<= main_~x~0 60) (<= 60 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:08,670 INFO L272 TraceCheckUtils]: 67: Hoare triple {5780#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {5780#false} is VALID [2022-04-27 16:15:08,670 INFO L290 TraceCheckUtils]: 68: Hoare triple {5780#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5780#false} is VALID [2022-04-27 16:15:08,670 INFO L290 TraceCheckUtils]: 69: Hoare triple {5780#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:08,670 INFO L290 TraceCheckUtils]: 70: Hoare triple {5780#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:08,671 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:15:08,671 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:15:10,244 INFO L290 TraceCheckUtils]: 70: Hoare triple {5780#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:10,244 INFO L290 TraceCheckUtils]: 69: Hoare triple {5780#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:10,245 INFO L290 TraceCheckUtils]: 68: Hoare triple {5780#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5780#false} is VALID [2022-04-27 16:15:10,245 INFO L272 TraceCheckUtils]: 67: Hoare triple {5780#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {5780#false} is VALID [2022-04-27 16:15:10,249 INFO L290 TraceCheckUtils]: 66: Hoare triple {6042#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5780#false} is VALID [2022-04-27 16:15:10,250 INFO L290 TraceCheckUtils]: 65: Hoare triple {6046#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6042#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-27 16:15:10,251 INFO L290 TraceCheckUtils]: 64: Hoare triple {6046#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6046#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:15:10,251 INFO L290 TraceCheckUtils]: 63: Hoare triple {6053#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6046#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-27 16:15:10,252 INFO L290 TraceCheckUtils]: 62: Hoare triple {6053#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6053#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:15:10,252 INFO L290 TraceCheckUtils]: 61: Hoare triple {6060#(< (mod (+ main_~x~0 6) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6053#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-27 16:15:10,252 INFO L290 TraceCheckUtils]: 60: Hoare triple {6060#(< (mod (+ main_~x~0 6) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6060#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:15:10,253 INFO L290 TraceCheckUtils]: 59: Hoare triple {6067#(< (mod (+ main_~x~0 8) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6060#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-27 16:15:10,253 INFO L290 TraceCheckUtils]: 58: Hoare triple {6067#(< (mod (+ main_~x~0 8) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6067#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:15:10,254 INFO L290 TraceCheckUtils]: 57: Hoare triple {6074#(< (mod (+ main_~x~0 10) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6067#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-27 16:15:10,254 INFO L290 TraceCheckUtils]: 56: Hoare triple {6074#(< (mod (+ main_~x~0 10) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6074#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:15:10,255 INFO L290 TraceCheckUtils]: 55: Hoare triple {6081#(< (mod (+ main_~x~0 12) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6074#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-27 16:15:10,258 INFO L290 TraceCheckUtils]: 54: Hoare triple {6081#(< (mod (+ main_~x~0 12) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6081#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:15:10,259 INFO L290 TraceCheckUtils]: 53: Hoare triple {6088#(< (mod (+ main_~x~0 14) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6081#(< (mod (+ main_~x~0 12) 4294967296) 99)} is VALID [2022-04-27 16:15:10,259 INFO L290 TraceCheckUtils]: 52: Hoare triple {6088#(< (mod (+ main_~x~0 14) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6088#(< (mod (+ main_~x~0 14) 4294967296) 99)} is VALID [2022-04-27 16:15:10,260 INFO L290 TraceCheckUtils]: 51: Hoare triple {6095#(< (mod (+ main_~x~0 16) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6088#(< (mod (+ main_~x~0 14) 4294967296) 99)} is VALID [2022-04-27 16:15:10,260 INFO L290 TraceCheckUtils]: 50: Hoare triple {6095#(< (mod (+ main_~x~0 16) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6095#(< (mod (+ main_~x~0 16) 4294967296) 99)} is VALID [2022-04-27 16:15:10,261 INFO L290 TraceCheckUtils]: 49: Hoare triple {6102#(< (mod (+ main_~x~0 18) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6095#(< (mod (+ main_~x~0 16) 4294967296) 99)} is VALID [2022-04-27 16:15:10,261 INFO L290 TraceCheckUtils]: 48: Hoare triple {6102#(< (mod (+ main_~x~0 18) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6102#(< (mod (+ main_~x~0 18) 4294967296) 99)} is VALID [2022-04-27 16:15:10,262 INFO L290 TraceCheckUtils]: 47: Hoare triple {6109#(< (mod (+ main_~x~0 20) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6102#(< (mod (+ main_~x~0 18) 4294967296) 99)} is VALID [2022-04-27 16:15:10,262 INFO L290 TraceCheckUtils]: 46: Hoare triple {6109#(< (mod (+ main_~x~0 20) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6109#(< (mod (+ main_~x~0 20) 4294967296) 99)} is VALID [2022-04-27 16:15:10,263 INFO L290 TraceCheckUtils]: 45: Hoare triple {6116#(< (mod (+ main_~x~0 22) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6109#(< (mod (+ main_~x~0 20) 4294967296) 99)} is VALID [2022-04-27 16:15:10,267 INFO L290 TraceCheckUtils]: 44: Hoare triple {6116#(< (mod (+ main_~x~0 22) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6116#(< (mod (+ main_~x~0 22) 4294967296) 99)} is VALID [2022-04-27 16:15:10,268 INFO L290 TraceCheckUtils]: 43: Hoare triple {6123#(< (mod (+ main_~x~0 24) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6116#(< (mod (+ main_~x~0 22) 4294967296) 99)} is VALID [2022-04-27 16:15:10,269 INFO L290 TraceCheckUtils]: 42: Hoare triple {6123#(< (mod (+ main_~x~0 24) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6123#(< (mod (+ main_~x~0 24) 4294967296) 99)} is VALID [2022-04-27 16:15:10,269 INFO L290 TraceCheckUtils]: 41: Hoare triple {6130#(< (mod (+ main_~x~0 26) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6123#(< (mod (+ main_~x~0 24) 4294967296) 99)} is VALID [2022-04-27 16:15:10,270 INFO L290 TraceCheckUtils]: 40: Hoare triple {6130#(< (mod (+ main_~x~0 26) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6130#(< (mod (+ main_~x~0 26) 4294967296) 99)} is VALID [2022-04-27 16:15:10,271 INFO L290 TraceCheckUtils]: 39: Hoare triple {6137#(< (mod (+ main_~x~0 28) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6130#(< (mod (+ main_~x~0 26) 4294967296) 99)} is VALID [2022-04-27 16:15:10,271 INFO L290 TraceCheckUtils]: 38: Hoare triple {6137#(< (mod (+ main_~x~0 28) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6137#(< (mod (+ main_~x~0 28) 4294967296) 99)} is VALID [2022-04-27 16:15:10,272 INFO L290 TraceCheckUtils]: 37: Hoare triple {6144#(< (mod (+ 30 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6137#(< (mod (+ main_~x~0 28) 4294967296) 99)} is VALID [2022-04-27 16:15:10,272 INFO L290 TraceCheckUtils]: 36: Hoare triple {6144#(< (mod (+ 30 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6144#(< (mod (+ 30 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,272 INFO L290 TraceCheckUtils]: 35: Hoare triple {6151#(< (mod (+ 32 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6144#(< (mod (+ 30 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,273 INFO L290 TraceCheckUtils]: 34: Hoare triple {6151#(< (mod (+ 32 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6151#(< (mod (+ 32 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,273 INFO L290 TraceCheckUtils]: 33: Hoare triple {6158#(< (mod (+ main_~x~0 34) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6151#(< (mod (+ 32 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,274 INFO L290 TraceCheckUtils]: 32: Hoare triple {6158#(< (mod (+ main_~x~0 34) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6158#(< (mod (+ main_~x~0 34) 4294967296) 99)} is VALID [2022-04-27 16:15:10,274 INFO L290 TraceCheckUtils]: 31: Hoare triple {6165#(< (mod (+ main_~x~0 36) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6158#(< (mod (+ main_~x~0 34) 4294967296) 99)} is VALID [2022-04-27 16:15:10,275 INFO L290 TraceCheckUtils]: 30: Hoare triple {6165#(< (mod (+ main_~x~0 36) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6165#(< (mod (+ main_~x~0 36) 4294967296) 99)} is VALID [2022-04-27 16:15:10,275 INFO L290 TraceCheckUtils]: 29: Hoare triple {6172#(< (mod (+ main_~x~0 38) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6165#(< (mod (+ main_~x~0 36) 4294967296) 99)} is VALID [2022-04-27 16:15:10,276 INFO L290 TraceCheckUtils]: 28: Hoare triple {6172#(< (mod (+ main_~x~0 38) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6172#(< (mod (+ main_~x~0 38) 4294967296) 99)} is VALID [2022-04-27 16:15:10,276 INFO L290 TraceCheckUtils]: 27: Hoare triple {6179#(< (mod (+ 40 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6172#(< (mod (+ main_~x~0 38) 4294967296) 99)} is VALID [2022-04-27 16:15:10,276 INFO L290 TraceCheckUtils]: 26: Hoare triple {6179#(< (mod (+ 40 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6179#(< (mod (+ 40 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,277 INFO L290 TraceCheckUtils]: 25: Hoare triple {6186#(< (mod (+ 42 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6179#(< (mod (+ 40 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,278 INFO L290 TraceCheckUtils]: 24: Hoare triple {6186#(< (mod (+ 42 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6186#(< (mod (+ 42 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,278 INFO L290 TraceCheckUtils]: 23: Hoare triple {6193#(< (mod (+ 44 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6186#(< (mod (+ 42 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,278 INFO L290 TraceCheckUtils]: 22: Hoare triple {6193#(< (mod (+ 44 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6193#(< (mod (+ 44 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,279 INFO L290 TraceCheckUtils]: 21: Hoare triple {6200#(< (mod (+ main_~x~0 46) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6193#(< (mod (+ 44 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,279 INFO L290 TraceCheckUtils]: 20: Hoare triple {6200#(< (mod (+ main_~x~0 46) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6200#(< (mod (+ main_~x~0 46) 4294967296) 99)} is VALID [2022-04-27 16:15:10,280 INFO L290 TraceCheckUtils]: 19: Hoare triple {6207#(< (mod (+ main_~x~0 48) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6200#(< (mod (+ main_~x~0 46) 4294967296) 99)} is VALID [2022-04-27 16:15:10,280 INFO L290 TraceCheckUtils]: 18: Hoare triple {6207#(< (mod (+ main_~x~0 48) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6207#(< (mod (+ main_~x~0 48) 4294967296) 99)} is VALID [2022-04-27 16:15:10,281 INFO L290 TraceCheckUtils]: 17: Hoare triple {6214#(< (mod (+ main_~x~0 50) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6207#(< (mod (+ main_~x~0 48) 4294967296) 99)} is VALID [2022-04-27 16:15:10,281 INFO L290 TraceCheckUtils]: 16: Hoare triple {6214#(< (mod (+ main_~x~0 50) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6214#(< (mod (+ main_~x~0 50) 4294967296) 99)} is VALID [2022-04-27 16:15:10,282 INFO L290 TraceCheckUtils]: 15: Hoare triple {6221#(< (mod (+ main_~x~0 52) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6214#(< (mod (+ main_~x~0 50) 4294967296) 99)} is VALID [2022-04-27 16:15:10,282 INFO L290 TraceCheckUtils]: 14: Hoare triple {6221#(< (mod (+ main_~x~0 52) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6221#(< (mod (+ main_~x~0 52) 4294967296) 99)} is VALID [2022-04-27 16:15:10,283 INFO L290 TraceCheckUtils]: 13: Hoare triple {6228#(< (mod (+ main_~x~0 54) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6221#(< (mod (+ main_~x~0 52) 4294967296) 99)} is VALID [2022-04-27 16:15:10,283 INFO L290 TraceCheckUtils]: 12: Hoare triple {6228#(< (mod (+ main_~x~0 54) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6228#(< (mod (+ main_~x~0 54) 4294967296) 99)} is VALID [2022-04-27 16:15:10,284 INFO L290 TraceCheckUtils]: 11: Hoare triple {6235#(< (mod (+ 56 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6228#(< (mod (+ main_~x~0 54) 4294967296) 99)} is VALID [2022-04-27 16:15:10,284 INFO L290 TraceCheckUtils]: 10: Hoare triple {6235#(< (mod (+ 56 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6235#(< (mod (+ 56 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,285 INFO L290 TraceCheckUtils]: 9: Hoare triple {6242#(< (mod (+ main_~x~0 58) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6235#(< (mod (+ 56 main_~x~0) 4294967296) 99)} is VALID [2022-04-27 16:15:10,285 INFO L290 TraceCheckUtils]: 8: Hoare triple {6242#(< (mod (+ main_~x~0 58) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6242#(< (mod (+ main_~x~0 58) 4294967296) 99)} is VALID [2022-04-27 16:15:10,286 INFO L290 TraceCheckUtils]: 7: Hoare triple {6249#(< (mod (+ main_~x~0 60) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_~x~0=v_main_~x~0_1, main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[main_~x~0] {6242#(< (mod (+ main_~x~0 58) 4294967296) 99)} is VALID [2022-04-27 16:15:10,286 INFO L290 TraceCheckUtils]: 6: Hoare triple {6249#(< (mod (+ main_~x~0 60) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {6249#(< (mod (+ main_~x~0 60) 4294967296) 99)} is VALID [2022-04-27 16:15:10,286 INFO L290 TraceCheckUtils]: 5: Hoare triple {5779#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {6249#(< (mod (+ main_~x~0 60) 4294967296) 99)} is VALID [2022-04-27 16:15:10,286 INFO L272 TraceCheckUtils]: 4: Hoare triple {5779#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:10,286 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5779#true} {5779#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:10,286 INFO L290 TraceCheckUtils]: 2: Hoare triple {5779#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:10,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {5779#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5779#true} is VALID [2022-04-27 16:15:10,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {5779#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5779#true} is VALID [2022-04-27 16:15:10,287 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:15:10,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [923680516] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:15:10,288 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:15:10,288 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 33, 33] total 66 [2022-04-27 16:15:10,288 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075378892] [2022-04-27 16:15:10,288 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:15:10,289 INFO L78 Accepts]: Start accepts. Automaton has has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 71 [2022-04-27 16:15:10,289 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:15:10,289 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:15:10,400 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 137 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:15:10,400 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 66 states [2022-04-27 16:15:10,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:15:10,402 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2022-04-27 16:15:10,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1075, Invalid=3215, Unknown=0, NotChecked=0, Total=4290 [2022-04-27 16:15:10,403 INFO L87 Difference]: Start difference. First operand 193 states and 195 transitions. Second operand has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:16:16,261 INFO L93 Difference]: Finished difference Result 233 states and 235 transitions. [2022-04-27 16:16:16,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2022-04-27 16:16:16,261 INFO L78 Accepts]: Start accepts. Automaton has has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 71 [2022-04-27 16:16:16,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:16:16,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 176 transitions. [2022-04-27 16:16:16,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 176 transitions. [2022-04-27 16:16:16,266 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 65 states and 176 transitions. [2022-04-27 16:16:16,558 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:16:16,565 INFO L225 Difference]: With dead ends: 233 [2022-04-27 16:16:16,566 INFO L226 Difference]: Without dead ends: 233 [2022-04-27 16:16:16,570 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 239 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2685 ImplicationChecksByTransitivity, 63.3s TimeCoverageRelationStatistics Valid=4085, Invalid=12170, Unknown=1, NotChecked=0, Total=16256 [2022-04-27 16:16:16,570 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 71 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 1931 mSolverCounterSat, 425 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 178 SdHoareTripleChecker+Invalid, 2356 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 425 IncrementalHoareTripleChecker+Valid, 1931 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:16:16,571 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 178 Invalid, 2356 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [425 Valid, 1931 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-27 16:16:16,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2022-04-27 16:16:16,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 233. [2022-04-27 16:16:16,574 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:16:16,575 INFO L82 GeneralOperation]: Start isEquivalent. First operand 233 states. Second operand has 233 states, 228 states have (on average 1.013157894736842) internal successors, (231), 228 states have internal predecessors, (231), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,575 INFO L74 IsIncluded]: Start isIncluded. First operand 233 states. Second operand has 233 states, 228 states have (on average 1.013157894736842) internal successors, (231), 228 states have internal predecessors, (231), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,576 INFO L87 Difference]: Start difference. First operand 233 states. Second operand has 233 states, 228 states have (on average 1.013157894736842) internal successors, (231), 228 states have internal predecessors, (231), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:16:16,580 INFO L93 Difference]: Finished difference Result 233 states and 235 transitions. [2022-04-27 16:16:16,580 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 235 transitions. [2022-04-27 16:16:16,580 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:16:16,580 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:16:16,581 INFO L74 IsIncluded]: Start isIncluded. First operand has 233 states, 228 states have (on average 1.013157894736842) internal successors, (231), 228 states have internal predecessors, (231), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 233 states. [2022-04-27 16:16:16,581 INFO L87 Difference]: Start difference. First operand has 233 states, 228 states have (on average 1.013157894736842) internal successors, (231), 228 states have internal predecessors, (231), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 233 states. [2022-04-27 16:16:16,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:16:16,585 INFO L93 Difference]: Finished difference Result 233 states and 235 transitions. [2022-04-27 16:16:16,585 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 235 transitions. [2022-04-27 16:16:16,586 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:16:16,586 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:16:16,586 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:16:16,586 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:16:16,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 233 states, 228 states have (on average 1.013157894736842) internal successors, (231), 228 states have internal predecessors, (231), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 235 transitions. [2022-04-27 16:16:16,591 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 235 transitions. Word has length 71 [2022-04-27 16:16:16,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:16:16,592 INFO L495 AbstractCegarLoop]: Abstraction has 233 states and 235 transitions. [2022-04-27 16:16:16,592 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 66 states, 66 states have (on average 2.0) internal successors, (132), 65 states have internal predecessors, (132), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:16:16,592 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 235 transitions. [2022-04-27 16:16:16,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2022-04-27 16:16:16,594 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:16:16,594 INFO L195 NwaCegarLoop]: trace histogram [50, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:16:16,623 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 16:16:16,815 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 16:16:16,816 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:16:16,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:16:16,816 INFO L85 PathProgramCache]: Analyzing trace with hash 843717136, now seen corresponding path program 5 times [2022-04-27 16:16:16,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:16:16,817 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921782903] [2022-04-27 16:16:16,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:16:16,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:16:16,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-27 16:16:16,893 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-04-27 16:16:16,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-27 16:16:16,975 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-04-27 16:16:16,975 INFO L271 BasicCegarLoop]: Counterexample is feasible [2022-04-27 16:16:16,976 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 16:16:16,977 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-27 16:16:16,980 INFO L356 BasicCegarLoop]: Path program histogram: [5, 5, 2, 1, 1] [2022-04-27 16:16:16,983 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 16:16:17,041 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:16:17 BasicIcfg [2022-04-27 16:16:17,041 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 16:16:17,042 INFO L158 Benchmark]: Toolchain (without parser) took 330309.42ms. Allocated memory was 184.5MB in the beginning and 241.2MB in the end (delta: 56.6MB). Free memory was 128.0MB in the beginning and 105.2MB in the end (delta: 22.7MB). Peak memory consumption was 78.9MB. Max. memory is 8.0GB. [2022-04-27 16:16:17,042 INFO L158 Benchmark]: CDTParser took 0.95ms. Allocated memory is still 184.5MB. Free memory is still 143.9MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:16:17,042 INFO L158 Benchmark]: CACSL2BoogieTranslator took 227.48ms. Allocated memory was 184.5MB in the beginning and 241.2MB in the end (delta: 56.6MB). Free memory was 127.7MB in the beginning and 212.4MB in the end (delta: -84.6MB). Peak memory consumption was 11.1MB. Max. memory is 8.0GB. [2022-04-27 16:16:17,042 INFO L158 Benchmark]: Boogie Preprocessor took 41.19ms. Allocated memory is still 241.2MB. Free memory was 212.4MB in the beginning and 210.6MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-27 16:16:17,043 INFO L158 Benchmark]: RCFGBuilder took 207.01ms. Allocated memory is still 241.2MB. Free memory was 210.6MB in the beginning and 199.3MB in the end (delta: 11.4MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2022-04-27 16:16:17,043 INFO L158 Benchmark]: IcfgTransformer took 20.83ms. Allocated memory is still 241.2MB. Free memory was 199.3MB in the beginning and 198.2MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 16:16:17,043 INFO L158 Benchmark]: TraceAbstraction took 329805.37ms. Allocated memory is still 241.2MB. Free memory was 197.2MB in the beginning and 105.2MB in the end (delta: 91.9MB). Peak memory consumption was 92.5MB. Max. memory is 8.0GB. [2022-04-27 16:16:17,044 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.95ms. Allocated memory is still 184.5MB. Free memory is still 143.9MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 227.48ms. Allocated memory was 184.5MB in the beginning and 241.2MB in the end (delta: 56.6MB). Free memory was 127.7MB in the beginning and 212.4MB in the end (delta: -84.6MB). Peak memory consumption was 11.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 41.19ms. Allocated memory is still 241.2MB. Free memory was 212.4MB in the beginning and 210.6MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 207.01ms. Allocated memory is still 241.2MB. Free memory was 210.6MB in the beginning and 199.3MB in the end (delta: 11.4MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * IcfgTransformer took 20.83ms. Allocated memory is still 241.2MB. Free memory was 199.3MB in the beginning and 198.2MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 329805.37ms. Allocated memory is still 241.2MB. Free memory was 197.2MB in the beginning and 105.2MB in the end (delta: 91.9MB). Peak memory consumption was 92.5MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 8]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L14] unsigned int x = 0; [L15] unsigned int y = __VERIFIER_nondet_uint(); [L17] COND TRUE x < 99 VAL [x=0, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=2, y=4294967295] [L17] COND TRUE x < 99 VAL [x=2, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=4, y=4294967295] [L17] COND TRUE x < 99 VAL [x=4, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=6, y=4294967295] [L17] COND TRUE x < 99 VAL [x=6, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=8, y=4294967295] [L17] COND TRUE x < 99 VAL [x=8, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=10, y=4294967295] [L17] COND TRUE x < 99 VAL [x=10, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=12, y=4294967295] [L17] COND TRUE x < 99 VAL [x=12, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=14, y=4294967295] [L17] COND TRUE x < 99 VAL [x=14, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=16, y=4294967295] [L17] COND TRUE x < 99 VAL [x=16, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=18, y=4294967295] [L17] COND TRUE x < 99 VAL [x=18, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=20, y=4294967295] [L17] COND TRUE x < 99 VAL [x=20, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=22, y=4294967295] [L17] COND TRUE x < 99 VAL [x=22, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=24, y=4294967295] [L17] COND TRUE x < 99 VAL [x=24, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=26, y=4294967295] [L17] COND TRUE x < 99 VAL [x=26, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=28, y=4294967295] [L17] COND TRUE x < 99 VAL [x=28, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=30, y=4294967295] [L17] COND TRUE x < 99 VAL [x=30, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=32, y=4294967295] [L17] COND TRUE x < 99 VAL [x=32, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=34, y=4294967295] [L17] COND TRUE x < 99 VAL [x=34, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=36, y=4294967295] [L17] COND TRUE x < 99 VAL [x=36, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=38, y=4294967295] [L17] COND TRUE x < 99 VAL [x=38, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=40, y=4294967295] [L17] COND TRUE x < 99 VAL [x=40, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=42, y=4294967295] [L17] COND TRUE x < 99 VAL [x=42, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=44, y=4294967295] [L17] COND TRUE x < 99 VAL [x=44, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=46, y=4294967295] [L17] COND TRUE x < 99 VAL [x=46, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=48, y=4294967295] [L17] COND TRUE x < 99 VAL [x=48, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=50, y=4294967295] [L17] COND TRUE x < 99 VAL [x=50, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=52, y=4294967295] [L17] COND TRUE x < 99 VAL [x=52, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=54, y=4294967295] [L17] COND TRUE x < 99 VAL [x=54, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=56, y=4294967295] [L17] COND TRUE x < 99 VAL [x=56, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=58, y=4294967295] [L17] COND TRUE x < 99 VAL [x=58, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=60, y=4294967295] [L17] COND TRUE x < 99 VAL [x=60, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=62, y=4294967295] [L17] COND TRUE x < 99 VAL [x=62, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=64, y=4294967295] [L17] COND TRUE x < 99 VAL [x=64, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=66, y=4294967295] [L17] COND TRUE x < 99 VAL [x=66, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=68, y=4294967295] [L17] COND TRUE x < 99 VAL [x=68, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=70, y=4294967295] [L17] COND TRUE x < 99 VAL [x=70, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=72, y=4294967295] [L17] COND TRUE x < 99 VAL [x=72, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=74, y=4294967295] [L17] COND TRUE x < 99 VAL [x=74, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=76, y=4294967295] [L17] COND TRUE x < 99 VAL [x=76, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=78, y=4294967295] [L17] COND TRUE x < 99 VAL [x=78, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=80, y=4294967295] [L17] COND TRUE x < 99 VAL [x=80, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=82, y=4294967295] [L17] COND TRUE x < 99 VAL [x=82, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=84, y=4294967295] [L17] COND TRUE x < 99 VAL [x=84, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=86, y=4294967295] [L17] COND TRUE x < 99 VAL [x=86, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=88, y=4294967295] [L17] COND TRUE x < 99 VAL [x=88, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=90, y=4294967295] [L17] COND TRUE x < 99 VAL [x=90, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=92, y=4294967295] [L17] COND TRUE x < 99 VAL [x=92, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=94, y=4294967295] [L17] COND TRUE x < 99 VAL [x=94, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=96, y=4294967295] [L17] COND TRUE x < 99 VAL [x=96, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=98, y=4294967295] [L17] COND TRUE x < 99 VAL [x=98, y=4294967295] [L18] COND FALSE !(y % 2 == 0) [L21] x += 2 VAL [x=100, y=4294967295] [L17] COND FALSE !(x < 99) VAL [x=100, y=4294967295] [L25] CALL __VERIFIER_assert((x % 2) == (y % 2)) VAL [\old(cond)=0] [L7] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L8] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 329.7s, OverallIterations: 14, TraceHistogramMax: 50, PathProgramHistogramMax: 5, EmptinessCheckTime: 0.0s, AutomataDifference: 301.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 567 SdHoareTripleChecker+Valid, 9.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 566 mSDsluCounter, 841 SdHoareTripleChecker+Invalid, 9.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 682 mSDsCounter, 1695 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6867 IncrementalHoareTripleChecker+Invalid, 8562 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1695 mSolverCounterUnsat, 159 mSDtfsCounter, 6867 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1075 GetRequests, 554 SyntacticMatches, 9 SemanticMatches, 512 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6648 ImplicationChecksByTransitivity, 286.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=233occurred in iteration=13, InterpolantAutomatonStates: 289, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 13 MinimizatonAttempts, 136 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 11.5s SatisfiabilityAnalysisTime, 13.1s InterpolantComputationTime, 841 NumberOfCodeBlocks, 841 NumberOfCodeBlocksAsserted, 82 NumberOfCheckSat, 1022 ConstructedInterpolants, 0 QuantifiedInterpolants, 5490 SizeOfPredicates, 10 NumberOfNonLiveVariables, 985 ConjunctsInSsa, 258 ConjunctsInUnsatCore, 31 InterpolantComputations, 4 PerfectInterpolantSequences, 262/7150 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-04-27 16:16:17,072 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...