/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de32.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:36:17,368 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:36:17,379 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:36:17,415 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-27 16:36:17,465 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:36:17,466 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:36:17,467 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:36:17,468 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:36:17,478 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:36:17,479 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:36:17,480 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:36:17,480 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:36:17,480 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:36:17,480 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:36:17,480 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:36:17,480 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:36:17,481 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:36:17,481 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:36:17,482 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:36:17,482 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:36:17,482 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:36:17,482 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:36:17,482 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:36:17,482 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:36:17,482 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:36:17,483 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:36:17,483 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:36:17,483 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:36:17,483 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:36:17,484 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:36:17,484 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:36:17,704 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:36:17,725 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:36:17,727 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:36:17,728 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:36:17,729 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:36:17,730 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de32.c [2022-04-27 16:36:17,785 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/68a201a75/ebbfe7a970574fde97cd906909f6c99b/FLAGa76691de1 [2022-04-27 16:36:18,143 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:36:18,143 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c [2022-04-27 16:36:18,147 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/68a201a75/ebbfe7a970574fde97cd906909f6c99b/FLAGa76691de1 [2022-04-27 16:36:18,567 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/68a201a75/ebbfe7a970574fde97cd906909f6c99b [2022-04-27 16:36:18,570 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:36:18,571 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:36:18,573 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:36:18,574 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:36:18,576 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:36:18,577 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,578 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cacbf17 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18, skipping insertion in model container [2022-04-27 16:36:18,578 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,584 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:36:18,595 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:36:18,775 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c[368,381] [2022-04-27 16:36:18,789 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:36:18,798 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:36:18,808 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c[368,381] [2022-04-27 16:36:18,811 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:36:18,822 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:36:18,822 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18 WrapperNode [2022-04-27 16:36:18,823 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:36:18,823 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:36:18,824 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:36:18,824 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:36:18,833 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,834 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,839 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,840 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,853 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,858 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,863 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,866 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:36:18,867 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:36:18,867 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:36:18,867 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:36:18,868 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (1/1) ... [2022-04-27 16:36:18,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:36:18,882 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:36:18,896 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:36:18,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:36:18,943 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:36:18,944 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:36:18,944 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:36:18,944 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:36:18,945 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:36:18,945 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:36:18,945 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:36:18,945 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:36:18,945 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:36:18,945 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 16:36:18,945 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:36:18,946 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:36:18,946 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:36:18,946 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:36:18,947 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:36:18,947 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:36:18,947 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:36:18,948 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:36:19,005 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:36:19,007 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:36:19,155 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:36:19,160 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:36:19,161 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-27 16:36:19,162 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:36:19 BoogieIcfgContainer [2022-04-27 16:36:19,162 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:36:19,163 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:36:19,163 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:36:19,164 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:36:19,167 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:36:19" (1/1) ... [2022-04-27 16:36:19,168 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:36:19,671 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:36:19,672 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~x~0_7 v_main_~x~0_6) (= v_main_~y~0_6 v_main_~y~0_5)) (and (< 0 .cse0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_7 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (= v_main_~x~0_6 (+ v_main_~x~0_7 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_7, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-27 16:36:20,025 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:36:20,025 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_4, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_5 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (< 0 .cse0) (= v_main_~x~0_8 (+ (* (- 1) v_main_~z~0_4) v_main_~x~0_9 v_main_~z~0_5)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_4 v_it_2 1) v_main_~z~0_5)) (< 0 (mod (+ v_main_~z~0_5 (* v_it_2 4294967295)) 4294967296)))) (< v_main_~z~0_4 v_main_~z~0_5)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_5, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-27 16:36:20,349 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:36:20,350 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] [2022-04-27 16:36:20,356 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:36:20 BasicIcfg [2022-04-27 16:36:20,356 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:36:20,359 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:36:20,359 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:36:20,361 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:36:20,361 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:36:18" (1/4) ... [2022-04-27 16:36:20,362 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d8ef0ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:36:20, skipping insertion in model container [2022-04-27 16:36:20,362 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:36:18" (2/4) ... [2022-04-27 16:36:20,363 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d8ef0ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:36:20, skipping insertion in model container [2022-04-27 16:36:20,363 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:36:19" (3/4) ... [2022-04-27 16:36:20,365 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d8ef0ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:36:20, skipping insertion in model container [2022-04-27 16:36:20,365 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:36:20" (4/4) ... [2022-04-27 16:36:20,366 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de32.cJordan [2022-04-27 16:36:20,378 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:36:20,378 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:36:20,418 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:36:20,425 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@75a8e121, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@1cba1c96 [2022-04-27 16:36:20,425 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:36:20,434 INFO L276 IsEmpty]: Start isEmpty. Operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:36:20,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 16:36:20,440 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:36:20,441 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:36:20,441 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:36:20,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:36:20,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1909530012, now seen corresponding path program 1 times [2022-04-27 16:36:20,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:36:20,455 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444533487] [2022-04-27 16:36:20,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:20,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:36:20,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:20,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:36:20,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:20,590 INFO L290 TraceCheckUtils]: 0: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-27 16:36:20,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 16:36:20,590 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 16:36:20,592 INFO L272 TraceCheckUtils]: 0: Hoare triple {25#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:36:20,592 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-27 16:36:20,593 INFO L290 TraceCheckUtils]: 2: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 16:36:20,593 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 16:36:20,593 INFO L272 TraceCheckUtils]: 4: Hoare triple {25#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 16:36:20,593 INFO L290 TraceCheckUtils]: 5: Hoare triple {25#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25#true} is VALID [2022-04-27 16:36:20,594 INFO L290 TraceCheckUtils]: 6: Hoare triple {25#true} [70] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 16:36:20,594 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#false} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {26#false} is VALID [2022-04-27 16:36:20,594 INFO L290 TraceCheckUtils]: 8: Hoare triple {26#false} [74] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 16:36:20,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {26#false} [77] L29-1-->L29-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 16:36:20,595 INFO L272 TraceCheckUtils]: 10: Hoare triple {26#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {26#false} is VALID [2022-04-27 16:36:20,595 INFO L290 TraceCheckUtils]: 11: Hoare triple {26#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26#false} is VALID [2022-04-27 16:36:20,595 INFO L290 TraceCheckUtils]: 12: Hoare triple {26#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 16:36:20,595 INFO L290 TraceCheckUtils]: 13: Hoare triple {26#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 16:36:20,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:20,596 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:36:20,596 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444533487] [2022-04-27 16:36:20,597 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [444533487] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:36:20,597 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:36:20,597 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:36:20,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427829778] [2022-04-27 16:36:20,600 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:36:20,609 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:36:20,610 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:36:20,613 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,631 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:20,631 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:36:20,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:36:20,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:36:20,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:36:20,661 INFO L87 Difference]: Start difference. First operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:20,712 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-27 16:36:20,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:36:20,713 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:36:20,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:36:20,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-04-27 16:36:20,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-04-27 16:36:20,733 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 28 transitions. [2022-04-27 16:36:20,775 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:20,782 INFO L225 Difference]: With dead ends: 22 [2022-04-27 16:36:20,782 INFO L226 Difference]: Without dead ends: 15 [2022-04-27 16:36:20,784 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:36:20,788 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:36:20,789 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 26 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:36:20,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-27 16:36:20,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-27 16:36:20,811 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:36:20,812 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,813 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,814 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:20,820 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 16:36:20,820 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 16:36:20,820 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:20,821 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:20,821 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 16:36:20,821 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 16:36:20,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:20,824 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 16:36:20,824 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 16:36:20,824 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:20,824 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:20,825 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:36:20,825 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:36:20,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-04-27 16:36:20,829 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 14 [2022-04-27 16:36:20,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:36:20,832 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-04-27 16:36:20,837 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,837 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 16:36:20,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 16:36:20,838 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:36:20,838 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:36:20,838 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:36:20,838 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:36:20,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:36:20,839 INFO L85 PathProgramCache]: Analyzing trace with hash -137167005, now seen corresponding path program 1 times [2022-04-27 16:36:20,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:36:20,840 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737540138] [2022-04-27 16:36:20,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:20,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:36:20,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:20,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:36:20,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:20,972 INFO L290 TraceCheckUtils]: 0: Hoare triple {108#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {100#true} is VALID [2022-04-27 16:36:20,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {100#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-27 16:36:20,974 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {100#true} {100#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-27 16:36:20,974 INFO L272 TraceCheckUtils]: 0: Hoare triple {100#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:36:20,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {108#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {100#true} is VALID [2022-04-27 16:36:20,975 INFO L290 TraceCheckUtils]: 2: Hoare triple {100#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-27 16:36:20,975 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {100#true} {100#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-27 16:36:20,975 INFO L272 TraceCheckUtils]: 4: Hoare triple {100#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-27 16:36:20,975 INFO L290 TraceCheckUtils]: 5: Hoare triple {100#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {100#true} is VALID [2022-04-27 16:36:20,976 INFO L290 TraceCheckUtils]: 6: Hoare triple {100#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 16:36:20,977 INFO L290 TraceCheckUtils]: 7: Hoare triple {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 16:36:20,977 INFO L290 TraceCheckUtils]: 8: Hoare triple {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 16:36:20,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 16:36:20,979 INFO L272 TraceCheckUtils]: 10: Hoare triple {105#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {106#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:36:20,979 INFO L290 TraceCheckUtils]: 11: Hoare triple {106#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {107#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:36:20,980 INFO L290 TraceCheckUtils]: 12: Hoare triple {107#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {101#false} is VALID [2022-04-27 16:36:20,980 INFO L290 TraceCheckUtils]: 13: Hoare triple {101#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101#false} is VALID [2022-04-27 16:36:20,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:20,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:36:20,981 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737540138] [2022-04-27 16:36:20,981 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737540138] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:36:20,981 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:36:20,981 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 16:36:20,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965082406] [2022-04-27 16:36:20,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:36:20,983 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:36:20,983 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:36:20,983 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:20,997 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:20,998 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 16:36:20,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:36:20,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 16:36:20,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 16:36:20,999 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:21,114 INFO L93 Difference]: Finished difference Result 21 states and 25 transitions. [2022-04-27 16:36:21,114 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 16:36:21,114 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:36:21,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:36:21,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-27 16:36:21,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-27 16:36:21,118 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 26 transitions. [2022-04-27 16:36:21,144 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:21,145 INFO L225 Difference]: With dead ends: 21 [2022-04-27 16:36:21,145 INFO L226 Difference]: Without dead ends: 18 [2022-04-27 16:36:21,145 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-27 16:36:21,146 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 11 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 5 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:36:21,147 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 33 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 26 Invalid, 0 Unknown, 5 Unchecked, 0.0s Time] [2022-04-27 16:36:21,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-27 16:36:21,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2022-04-27 16:36:21,149 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:36:21,149 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,149 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,150 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:21,151 INFO L93 Difference]: Finished difference Result 18 states and 22 transitions. [2022-04-27 16:36:21,151 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 22 transitions. [2022-04-27 16:36:21,152 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:21,152 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:21,152 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 16:36:21,152 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 16:36:21,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:21,154 INFO L93 Difference]: Finished difference Result 18 states and 22 transitions. [2022-04-27 16:36:21,154 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 22 transitions. [2022-04-27 16:36:21,154 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:21,154 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:21,154 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:36:21,154 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:36:21,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2022-04-27 16:36:21,155 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 14 [2022-04-27 16:36:21,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:36:21,156 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2022-04-27 16:36:21,156 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:21,156 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-27 16:36:21,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 16:36:21,157 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:36:21,157 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:36:21,157 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:36:21,157 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:36:21,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:36:21,158 INFO L85 PathProgramCache]: Analyzing trace with hash 69510770, now seen corresponding path program 1 times [2022-04-27 16:36:21,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:36:21,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521645513] [2022-04-27 16:36:21,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:21,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:36:21,171 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:21,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:21,215 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:21,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:36:21,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:21,311 INFO L290 TraceCheckUtils]: 0: Hoare triple {201#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {191#true} is VALID [2022-04-27 16:36:21,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {191#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,311 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {191#true} {191#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {191#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {201#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:36:21,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {201#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {191#true} is VALID [2022-04-27 16:36:21,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {191#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,313 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {191#true} {191#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,313 INFO L272 TraceCheckUtils]: 4: Hoare triple {191#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,314 INFO L290 TraceCheckUtils]: 5: Hoare triple {191#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {196#(= main_~y~0 0)} is VALID [2022-04-27 16:36:21,315 INFO L290 TraceCheckUtils]: 6: Hoare triple {196#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:21,316 INFO L290 TraceCheckUtils]: 7: Hoare triple {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:21,316 INFO L290 TraceCheckUtils]: 8: Hoare triple {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:21,318 INFO L290 TraceCheckUtils]: 9: Hoare triple {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:21,318 INFO L290 TraceCheckUtils]: 10: Hoare triple {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:21,322 INFO L272 TraceCheckUtils]: 11: Hoare triple {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {199#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:36:21,322 INFO L290 TraceCheckUtils]: 12: Hoare triple {199#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {200#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:36:21,325 INFO L290 TraceCheckUtils]: 13: Hoare triple {200#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {192#false} is VALID [2022-04-27 16:36:21,326 INFO L290 TraceCheckUtils]: 14: Hoare triple {192#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {192#false} is VALID [2022-04-27 16:36:21,326 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:21,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:36:21,326 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521645513] [2022-04-27 16:36:21,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521645513] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:36:21,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [404051704] [2022-04-27 16:36:21,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:21,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:36:21,327 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:36:21,335 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:36:21,375 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:36:21,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:21,384 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 16:36:21,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:21,400 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:36:21,753 INFO L272 TraceCheckUtils]: 0: Hoare triple {191#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {191#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {191#true} is VALID [2022-04-27 16:36:21,754 INFO L290 TraceCheckUtils]: 2: Hoare triple {191#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {191#true} {191#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {191#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:21,757 INFO L290 TraceCheckUtils]: 5: Hoare triple {191#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {196#(= main_~y~0 0)} is VALID [2022-04-27 16:36:21,758 INFO L290 TraceCheckUtils]: 6: Hoare triple {196#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:21,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {226#(and (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:21,759 INFO L290 TraceCheckUtils]: 8: Hoare triple {226#(and (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:21,760 INFO L290 TraceCheckUtils]: 9: Hoare triple {197#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:21,761 INFO L290 TraceCheckUtils]: 10: Hoare triple {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:21,762 INFO L272 TraceCheckUtils]: 11: Hoare triple {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {239#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:36:21,762 INFO L290 TraceCheckUtils]: 12: Hoare triple {239#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {243#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:36:21,763 INFO L290 TraceCheckUtils]: 13: Hoare triple {243#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {192#false} is VALID [2022-04-27 16:36:21,767 INFO L290 TraceCheckUtils]: 14: Hoare triple {192#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {192#false} is VALID [2022-04-27 16:36:21,767 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:21,767 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:36:23,725 INFO L290 TraceCheckUtils]: 14: Hoare triple {192#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {192#false} is VALID [2022-04-27 16:36:23,726 INFO L290 TraceCheckUtils]: 13: Hoare triple {243#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {192#false} is VALID [2022-04-27 16:36:23,726 INFO L290 TraceCheckUtils]: 12: Hoare triple {239#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {243#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:36:23,727 INFO L272 TraceCheckUtils]: 11: Hoare triple {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {239#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:36:23,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:23,737 INFO L290 TraceCheckUtils]: 9: Hoare triple {265#(forall ((aux_div_v_main_~x~0_21_31 Int) (aux_mod_v_main_~x~0_21_31 Int)) (or (<= 4294967296 aux_mod_v_main_~x~0_21_31) (and (or (not (= main_~x~0 (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_21_31 v_it_3 (* aux_div_v_main_~x~0_21_31 4294967296) 1) main_~x~0) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)) main_~x~0)))) (<= aux_mod_v_main_~x~0_21_31 0)))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {198#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:25,748 WARN L290 TraceCheckUtils]: 8: Hoare triple {269#(or (forall ((aux_div_v_main_~x~0_21_31 Int) (aux_mod_v_main_~x~0_21_31 Int)) (or (<= 4294967296 aux_mod_v_main_~x~0_21_31) (and (or (not (= main_~x~0 (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_21_31 v_it_3 (* aux_div_v_main_~x~0_21_31 4294967296) 1) main_~x~0) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)) main_~x~0)))) (<= aux_mod_v_main_~x~0_21_31 0))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {265#(forall ((aux_div_v_main_~x~0_21_31 Int) (aux_mod_v_main_~x~0_21_31 Int)) (or (<= 4294967296 aux_mod_v_main_~x~0_21_31) (and (or (not (= main_~x~0 (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_21_31 v_it_3 (* aux_div_v_main_~x~0_21_31 4294967296) 1) main_~x~0) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)) main_~x~0)))) (<= aux_mod_v_main_~x~0_21_31 0)))} is UNKNOWN [2022-04-27 16:36:25,750 INFO L290 TraceCheckUtils]: 7: Hoare triple {273#(or (<= (div (- main_~x~0) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {269#(or (forall ((aux_div_v_main_~x~0_21_31 Int) (aux_mod_v_main_~x~0_21_31 Int)) (or (<= 4294967296 aux_mod_v_main_~x~0_21_31) (and (or (not (= main_~x~0 (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_21_31 v_it_3 (* aux_div_v_main_~x~0_21_31 4294967296) 1) main_~x~0) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_21_31 (* aux_div_v_main_~x~0_21_31 4294967296)) main_~x~0)))) (<= aux_mod_v_main_~x~0_21_31 0))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 16:36:25,751 INFO L290 TraceCheckUtils]: 6: Hoare triple {191#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {273#(or (<= (div (- main_~x~0) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:36:25,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {191#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {191#true} is VALID [2022-04-27 16:36:25,752 INFO L272 TraceCheckUtils]: 4: Hoare triple {191#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:25,752 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {191#true} {191#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:25,752 INFO L290 TraceCheckUtils]: 2: Hoare triple {191#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:25,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {191#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {191#true} is VALID [2022-04-27 16:36:25,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {191#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191#true} is VALID [2022-04-27 16:36:25,753 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:25,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [404051704] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:36:25,753 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:36:25,753 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2022-04-27 16:36:25,753 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684299191] [2022-04-27 16:36:25,753 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:36:25,754 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 16:36:25,754 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:36:25,755 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:27,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 26 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:27,809 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 16:36:27,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:36:27,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 16:36:27,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2022-04-27 16:36:27,811 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:33,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:33,819 INFO L93 Difference]: Finished difference Result 26 states and 32 transitions. [2022-04-27 16:36:33,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 16:36:33,820 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 16:36:33,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:36:33,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:33,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 33 transitions. [2022-04-27 16:36:33,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:33,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 33 transitions. [2022-04-27 16:36:33,823 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 33 transitions. [2022-04-27 16:36:34,845 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:34,846 INFO L225 Difference]: With dead ends: 26 [2022-04-27 16:36:34,846 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 16:36:34,847 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 24 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=107, Invalid=354, Unknown=1, NotChecked=0, Total=462 [2022-04-27 16:36:34,848 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 22 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 56 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 28 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:36:34,848 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 56 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 42 Invalid, 0 Unknown, 28 Unchecked, 0.1s Time] [2022-04-27 16:36:34,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 16:36:34,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 18. [2022-04-27 16:36:34,850 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:36:34,851 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:34,851 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:34,851 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:34,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:34,852 INFO L93 Difference]: Finished difference Result 23 states and 29 transitions. [2022-04-27 16:36:34,853 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 29 transitions. [2022-04-27 16:36:34,853 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:34,853 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:34,853 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 16:36:34,853 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 16:36:34,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:34,855 INFO L93 Difference]: Finished difference Result 23 states and 29 transitions. [2022-04-27 16:36:34,855 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 29 transitions. [2022-04-27 16:36:34,855 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:34,855 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:34,855 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:36:34,855 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:36:34,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:34,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 21 transitions. [2022-04-27 16:36:34,856 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 21 transitions. Word has length 15 [2022-04-27 16:36:34,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:36:34,857 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 21 transitions. [2022-04-27 16:36:34,857 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.5) internal successors, (21), 11 states have internal predecessors, (21), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:34,857 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-27 16:36:34,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 16:36:34,857 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:36:34,858 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:36:34,877 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 16:36:35,067 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:36:35,068 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:36:35,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:36:35,068 INFO L85 PathProgramCache]: Analyzing trace with hash 842497847, now seen corresponding path program 1 times [2022-04-27 16:36:35,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:36:35,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470722109] [2022-04-27 16:36:35,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:35,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:36:35,078 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:35,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:35,104 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:35,201 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:36:35,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:35,213 INFO L290 TraceCheckUtils]: 0: Hoare triple {415#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {404#true} is VALID [2022-04-27 16:36:35,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {404#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,213 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {404#true} {404#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,214 INFO L272 TraceCheckUtils]: 0: Hoare triple {404#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {415#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:36:35,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {415#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {404#true} is VALID [2022-04-27 16:36:35,215 INFO L290 TraceCheckUtils]: 2: Hoare triple {404#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,215 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {404#true} {404#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,215 INFO L272 TraceCheckUtils]: 4: Hoare triple {404#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,218 INFO L290 TraceCheckUtils]: 5: Hoare triple {404#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {409#(= main_~y~0 0)} is VALID [2022-04-27 16:36:35,219 INFO L290 TraceCheckUtils]: 6: Hoare triple {409#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:35,219 INFO L290 TraceCheckUtils]: 7: Hoare triple {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {411#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:36:35,220 INFO L290 TraceCheckUtils]: 8: Hoare triple {411#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_5 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (< 0 .cse0) (= v_main_~x~0_8 (+ (* (- 1) v_main_~z~0_4) v_main_~x~0_9 v_main_~z~0_5)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_4 v_it_2 1) v_main_~z~0_5)) (< 0 (mod (+ v_main_~z~0_5 (* v_it_2 4294967295)) 4294967296)))) (< v_main_~z~0_4 v_main_~z~0_5)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_5, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:35,221 INFO L290 TraceCheckUtils]: 9: Hoare triple {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:35,221 INFO L290 TraceCheckUtils]: 10: Hoare triple {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:35,222 INFO L272 TraceCheckUtils]: 11: Hoare triple {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {413#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:36:35,223 INFO L290 TraceCheckUtils]: 12: Hoare triple {413#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {414#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:36:35,224 INFO L290 TraceCheckUtils]: 13: Hoare triple {414#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {405#false} is VALID [2022-04-27 16:36:35,225 INFO L290 TraceCheckUtils]: 14: Hoare triple {405#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {405#false} is VALID [2022-04-27 16:36:35,225 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:35,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:36:35,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470722109] [2022-04-27 16:36:35,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470722109] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:36:35,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [587203052] [2022-04-27 16:36:35,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:35,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:36:35,228 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:36:35,229 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:36:35,233 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:36:35,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:35,272 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 16:36:35,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:35,284 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:36:35,969 INFO L272 TraceCheckUtils]: 0: Hoare triple {404#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {404#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {404#true} is VALID [2022-04-27 16:36:35,970 INFO L290 TraceCheckUtils]: 2: Hoare triple {404#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,970 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {404#true} {404#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,970 INFO L272 TraceCheckUtils]: 4: Hoare triple {404#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:35,972 INFO L290 TraceCheckUtils]: 5: Hoare triple {404#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {409#(= main_~y~0 0)} is VALID [2022-04-27 16:36:35,973 INFO L290 TraceCheckUtils]: 6: Hoare triple {409#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:35,973 INFO L290 TraceCheckUtils]: 7: Hoare triple {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {440#(and (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:35,975 INFO L290 TraceCheckUtils]: 8: Hoare triple {440#(and (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_5 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (< 0 .cse0) (= v_main_~x~0_8 (+ (* (- 1) v_main_~z~0_4) v_main_~x~0_9 v_main_~z~0_5)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_4 v_it_2 1) v_main_~z~0_5)) (< 0 (mod (+ v_main_~z~0_5 (* v_it_2 4294967295)) 4294967296)))) (< v_main_~z~0_4 v_main_~z~0_5)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_5, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:35,976 INFO L290 TraceCheckUtils]: 9: Hoare triple {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:35,976 INFO L290 TraceCheckUtils]: 10: Hoare triple {410#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:35,977 INFO L272 TraceCheckUtils]: 11: Hoare triple {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {453#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:36:35,978 INFO L290 TraceCheckUtils]: 12: Hoare triple {453#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {457#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:36:35,978 INFO L290 TraceCheckUtils]: 13: Hoare triple {457#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {405#false} is VALID [2022-04-27 16:36:35,978 INFO L290 TraceCheckUtils]: 14: Hoare triple {405#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {405#false} is VALID [2022-04-27 16:36:35,978 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:35,979 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:36:37,041 INFO L290 TraceCheckUtils]: 14: Hoare triple {405#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {405#false} is VALID [2022-04-27 16:36:37,042 INFO L290 TraceCheckUtils]: 13: Hoare triple {457#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {405#false} is VALID [2022-04-27 16:36:37,044 INFO L290 TraceCheckUtils]: 12: Hoare triple {453#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {457#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:36:37,045 INFO L272 TraceCheckUtils]: 11: Hoare triple {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {453#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:36:37,053 INFO L290 TraceCheckUtils]: 10: Hoare triple {476#(or (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {412#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:37,054 INFO L290 TraceCheckUtils]: 9: Hoare triple {476#(or (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {476#(or (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:36:37,066 INFO L290 TraceCheckUtils]: 8: Hoare triple {483#(or (forall ((aux_div_v_main_~x~0_23_31 Int) (aux_mod_v_main_~x~0_23_31 Int)) (or (and (or (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_23_31 (* aux_div_v_main_~x~0_23_31 4294967296))))) (not (< 0 (mod main_~z~0 4294967296))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_23_31 (* aux_div_v_main_~x~0_23_31 4294967296))))) (or (< 0 (mod main_~z~0 4294967296)) (not (= (+ aux_mod_v_main_~x~0_23_31 (* aux_div_v_main_~x~0_23_31 4294967296)) main_~x~0)))) (<= 4294967296 aux_mod_v_main_~x~0_23_31) (<= aux_mod_v_main_~x~0_23_31 0))) (< 0 (mod main_~y~0 4294967296)))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_5 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (< 0 .cse0) (= v_main_~x~0_8 (+ (* (- 1) v_main_~z~0_4) v_main_~x~0_9 v_main_~z~0_5)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_4 v_it_2 1) v_main_~z~0_5)) (< 0 (mod (+ v_main_~z~0_5 (* v_it_2 4294967295)) 4294967296)))) (< v_main_~z~0_4 v_main_~z~0_5)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_5, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {476#(or (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:36:37,070 INFO L290 TraceCheckUtils]: 7: Hoare triple {476#(or (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {483#(or (forall ((aux_div_v_main_~x~0_23_31 Int) (aux_mod_v_main_~x~0_23_31 Int)) (or (and (or (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_23_31 (* aux_div_v_main_~x~0_23_31 4294967296))))) (not (< 0 (mod main_~z~0 4294967296))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_23_31 (* aux_div_v_main_~x~0_23_31 4294967296))))) (or (< 0 (mod main_~z~0 4294967296)) (not (= (+ aux_mod_v_main_~x~0_23_31 (* aux_div_v_main_~x~0_23_31 4294967296)) main_~x~0)))) (<= 4294967296 aux_mod_v_main_~x~0_23_31) (<= aux_mod_v_main_~x~0_23_31 0))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:36:37,071 INFO L290 TraceCheckUtils]: 6: Hoare triple {404#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {476#(or (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:36:37,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {404#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {404#true} is VALID [2022-04-27 16:36:37,072 INFO L272 TraceCheckUtils]: 4: Hoare triple {404#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:37,072 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {404#true} {404#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:37,072 INFO L290 TraceCheckUtils]: 2: Hoare triple {404#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:37,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {404#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {404#true} is VALID [2022-04-27 16:36:37,072 INFO L272 TraceCheckUtils]: 0: Hoare triple {404#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {404#true} is VALID [2022-04-27 16:36:37,073 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:36:37,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [587203052] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:36:37,073 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:36:37,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 7] total 14 [2022-04-27 16:36:37,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78231222] [2022-04-27 16:36:37,073 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:36:37,074 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 16:36:37,074 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:36:37,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:37,129 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:37,129 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 16:36:37,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:36:37,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 16:36:37,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=142, Unknown=0, NotChecked=0, Total=182 [2022-04-27 16:36:37,130 INFO L87 Difference]: Start difference. First operand 18 states and 21 transitions. Second operand has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:37,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:37,511 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2022-04-27 16:36:37,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 16:36:37,511 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 16:36:37,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:36:37,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:37,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 40 transitions. [2022-04-27 16:36:37,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:37,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 40 transitions. [2022-04-27 16:36:37,515 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 40 transitions. [2022-04-27 16:36:39,566 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 39 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 16:36:39,567 INFO L225 Difference]: With dead ends: 31 [2022-04-27 16:36:39,567 INFO L226 Difference]: Without dead ends: 27 [2022-04-27 16:36:39,567 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 22 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2022-04-27 16:36:39,568 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 22 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:36:39,568 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 59 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 65 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-04-27 16:36:39,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-04-27 16:36:39,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 19. [2022-04-27 16:36:39,571 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:36:39,571 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:39,571 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:39,571 INFO L87 Difference]: Start difference. First operand 27 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:39,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:39,573 INFO L93 Difference]: Finished difference Result 27 states and 35 transitions. [2022-04-27 16:36:39,573 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 35 transitions. [2022-04-27 16:36:39,574 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:39,574 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:39,574 INFO L74 IsIncluded]: Start isIncluded. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 27 states. [2022-04-27 16:36:39,574 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 27 states. [2022-04-27 16:36:39,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:36:39,589 INFO L93 Difference]: Finished difference Result 27 states and 35 transitions. [2022-04-27 16:36:39,589 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 35 transitions. [2022-04-27 16:36:39,590 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:36:39,590 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:36:39,590 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:36:39,590 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:36:39,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:39,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 23 transitions. [2022-04-27 16:36:39,591 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 23 transitions. Word has length 15 [2022-04-27 16:36:39,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:36:39,591 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 23 transitions. [2022-04-27 16:36:39,591 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.7142857142857142) internal successors, (24), 11 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:36:39,591 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 23 transitions. [2022-04-27 16:36:39,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 16:36:39,591 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:36:39,592 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:36:39,609 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 16:36:39,799 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 16:36:39,799 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:36:39,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:36:39,800 INFO L85 PathProgramCache]: Analyzing trace with hash -2113412797, now seen corresponding path program 2 times [2022-04-27 16:36:39,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:36:39,801 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879062989] [2022-04-27 16:36:39,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:36:39,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:36:39,825 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:39,827 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:39,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:39,845 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:39,851 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:36:39,916 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:36:39,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:39,922 INFO L290 TraceCheckUtils]: 0: Hoare triple {640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {630#true} is VALID [2022-04-27 16:36:39,922 INFO L290 TraceCheckUtils]: 1: Hoare triple {630#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:39,922 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {630#true} {630#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:39,922 INFO L272 TraceCheckUtils]: 0: Hoare triple {630#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:36:39,923 INFO L290 TraceCheckUtils]: 1: Hoare triple {640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {630#true} is VALID [2022-04-27 16:36:39,923 INFO L290 TraceCheckUtils]: 2: Hoare triple {630#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:39,923 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {630#true} {630#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:39,923 INFO L272 TraceCheckUtils]: 4: Hoare triple {630#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:39,923 INFO L290 TraceCheckUtils]: 5: Hoare triple {630#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {635#(= main_~y~0 0)} is VALID [2022-04-27 16:36:39,924 INFO L290 TraceCheckUtils]: 6: Hoare triple {635#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:39,925 INFO L290 TraceCheckUtils]: 7: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:39,925 INFO L290 TraceCheckUtils]: 8: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:39,926 INFO L290 TraceCheckUtils]: 9: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:39,927 INFO L290 TraceCheckUtils]: 10: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:39,928 INFO L290 TraceCheckUtils]: 11: Hoare triple {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:39,929 INFO L272 TraceCheckUtils]: 12: Hoare triple {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {638#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:36:39,929 INFO L290 TraceCheckUtils]: 13: Hoare triple {638#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {639#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:36:39,929 INFO L290 TraceCheckUtils]: 14: Hoare triple {639#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {631#false} is VALID [2022-04-27 16:36:39,930 INFO L290 TraceCheckUtils]: 15: Hoare triple {631#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {631#false} is VALID [2022-04-27 16:36:39,930 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:36:39,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:36:39,930 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1879062989] [2022-04-27 16:36:39,930 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1879062989] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:36:39,930 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [282870017] [2022-04-27 16:36:39,930 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:36:39,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:36:39,931 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:36:39,932 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:36:39,955 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:36:39,973 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:36:39,973 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:36:39,974 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 16:36:39,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:36:39,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:36:40,280 INFO L272 TraceCheckUtils]: 0: Hoare triple {630#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:40,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {630#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {630#true} is VALID [2022-04-27 16:36:40,281 INFO L290 TraceCheckUtils]: 2: Hoare triple {630#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:40,281 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {630#true} {630#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:40,281 INFO L272 TraceCheckUtils]: 4: Hoare triple {630#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:36:40,281 INFO L290 TraceCheckUtils]: 5: Hoare triple {630#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {635#(= main_~y~0 0)} is VALID [2022-04-27 16:36:40,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {635#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:40,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {665#(and (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:40,283 INFO L290 TraceCheckUtils]: 8: Hoare triple {665#(and (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:40,284 INFO L290 TraceCheckUtils]: 9: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:36:40,285 INFO L290 TraceCheckUtils]: 10: Hoare triple {636#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:40,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:36:40,286 INFO L272 TraceCheckUtils]: 12: Hoare triple {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {681#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:36:40,287 INFO L290 TraceCheckUtils]: 13: Hoare triple {681#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {685#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:36:40,287 INFO L290 TraceCheckUtils]: 14: Hoare triple {685#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {631#false} is VALID [2022-04-27 16:36:40,288 INFO L290 TraceCheckUtils]: 15: Hoare triple {631#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {631#false} is VALID [2022-04-27 16:36:40,288 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:36:40,288 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:37:44,254 INFO L290 TraceCheckUtils]: 15: Hoare triple {631#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {631#false} is VALID [2022-04-27 16:37:44,255 INFO L290 TraceCheckUtils]: 14: Hoare triple {685#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {631#false} is VALID [2022-04-27 16:37:44,255 INFO L290 TraceCheckUtils]: 13: Hoare triple {681#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {685#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:37:44,256 INFO L272 TraceCheckUtils]: 12: Hoare triple {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {681#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:37:44,256 INFO L290 TraceCheckUtils]: 11: Hoare triple {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:37:45,142 INFO L290 TraceCheckUtils]: 10: Hoare triple {707#(forall ((aux_mod_v_main_~x~0_26_31 Int) (aux_div_v_main_~x~0_26_31 Int)) (or (<= aux_mod_v_main_~x~0_26_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 (* aux_div_v_main_~x~0_26_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))) (or (not (= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0)) (< 0 (mod main_~y~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_26_31)))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {637#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:37:47,164 WARN L290 TraceCheckUtils]: 9: Hoare triple {711#(forall ((aux_mod_v_main_~x~0_26_31 Int)) (or (<= aux_mod_v_main_~x~0_26_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~x~0_26_31 Int) (aux_mod_v_main_~x~0_27_70 Int) (aux_div_v_main_~x~0_27_70 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_27_70 v_it_3 (* aux_div_v_main_~x~0_27_70 4294967296) 1) (+ (* main_~x~0 4294967296) main_~y~0)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296)) (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295))) (<= 4294967296 aux_mod_v_main_~x~0_27_70) (<= aux_mod_v_main_~x~0_27_70 0) (<= (+ (* main_~x~0 4294967296) main_~y~0) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~x~0_27_70 (* v_it_3 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295) 1) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (<= 1 v_it_3))))) (or (< 0 (mod (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* main_~x~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~x~0_26_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 (* aux_div_v_main_~x~0_26_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))))))) (or (forall ((aux_div_v_main_~x~0_26_31 Int)) (not (= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))) (< 0 (mod main_~y~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_26_31)))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {707#(forall ((aux_mod_v_main_~x~0_26_31 Int) (aux_div_v_main_~x~0_26_31 Int)) (or (<= aux_mod_v_main_~x~0_26_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 (* aux_div_v_main_~x~0_26_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))) (or (not (= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0)) (< 0 (mod main_~y~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_26_31)))} is UNKNOWN [2022-04-27 16:37:49,176 WARN L290 TraceCheckUtils]: 8: Hoare triple {715#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_26_31 Int)) (or (<= aux_mod_v_main_~x~0_26_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~x~0_26_31 Int) (aux_mod_v_main_~x~0_27_70 Int) (aux_div_v_main_~x~0_27_70 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_27_70 v_it_3 (* aux_div_v_main_~x~0_27_70 4294967296) 1) (+ (* main_~x~0 4294967296) main_~y~0)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296)) (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295))) (<= 4294967296 aux_mod_v_main_~x~0_27_70) (<= aux_mod_v_main_~x~0_27_70 0) (<= (+ (* main_~x~0 4294967296) main_~y~0) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~x~0_27_70 (* v_it_3 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295) 1) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (<= 1 v_it_3))))) (or (< 0 (mod (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* main_~x~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~x~0_26_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 (* aux_div_v_main_~x~0_26_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))))))) (or (forall ((aux_div_v_main_~x~0_26_31 Int)) (not (= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))) (< 0 (mod main_~y~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_26_31))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {711#(forall ((aux_mod_v_main_~x~0_26_31 Int)) (or (<= aux_mod_v_main_~x~0_26_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~x~0_26_31 Int) (aux_mod_v_main_~x~0_27_70 Int) (aux_div_v_main_~x~0_27_70 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_27_70 v_it_3 (* aux_div_v_main_~x~0_27_70 4294967296) 1) (+ (* main_~x~0 4294967296) main_~y~0)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296)) (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295))) (<= 4294967296 aux_mod_v_main_~x~0_27_70) (<= aux_mod_v_main_~x~0_27_70 0) (<= (+ (* main_~x~0 4294967296) main_~y~0) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~x~0_27_70 (* v_it_3 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295) 1) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (<= 1 v_it_3))))) (or (< 0 (mod (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* main_~x~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~x~0_26_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 (* aux_div_v_main_~x~0_26_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))))))) (or (forall ((aux_div_v_main_~x~0_26_31 Int)) (not (= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))) (< 0 (mod main_~y~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_26_31)))} is UNKNOWN [2022-04-27 16:37:49,187 INFO L290 TraceCheckUtils]: 7: Hoare triple {719#(or (<= (div (- main_~x~0) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {715#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_26_31 Int)) (or (<= aux_mod_v_main_~x~0_26_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~x~0_26_31 Int) (aux_mod_v_main_~x~0_27_70 Int) (aux_div_v_main_~x~0_27_70 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ aux_mod_v_main_~x~0_27_70 v_it_3 (* aux_div_v_main_~x~0_27_70 4294967296) 1) (+ (* main_~x~0 4294967296) main_~y~0)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296)) (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295))) (<= 4294967296 aux_mod_v_main_~x~0_27_70) (<= aux_mod_v_main_~x~0_27_70 0) (<= (+ (* main_~x~0 4294967296) main_~y~0) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~x~0_27_70 (* v_it_3 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 main_~y~0 (* aux_div_v_main_~x~0_26_31 4294967296) (* main_~x~0 4294967295) 1) (+ aux_mod_v_main_~x~0_27_70 (* aux_div_v_main_~x~0_27_70 4294967296))) (<= 1 v_it_3))))) (or (< 0 (mod (+ aux_mod_v_main_~x~0_26_31 main_~y~0 (* main_~x~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~x~0_26_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ aux_mod_v_main_~x~0_26_31 v_it_3 (* aux_div_v_main_~x~0_26_31 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))))))) (or (forall ((aux_div_v_main_~x~0_26_31 Int)) (not (= (+ aux_mod_v_main_~x~0_26_31 (* aux_div_v_main_~x~0_26_31 4294967296)) main_~x~0))) (< 0 (mod main_~y~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_26_31))))} is VALID [2022-04-27 16:37:49,188 INFO L290 TraceCheckUtils]: 6: Hoare triple {630#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {719#(or (<= (div (- main_~x~0) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:37:49,188 INFO L290 TraceCheckUtils]: 5: Hoare triple {630#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {630#true} is VALID [2022-04-27 16:37:49,188 INFO L272 TraceCheckUtils]: 4: Hoare triple {630#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:37:49,189 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {630#true} {630#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:37:49,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {630#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:37:49,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {630#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {630#true} is VALID [2022-04-27 16:37:49,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {630#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {630#true} is VALID [2022-04-27 16:37:49,189 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:37:49,190 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [282870017] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:37:49,190 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:37:49,190 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 9] total 15 [2022-04-27 16:37:49,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452479284] [2022-04-27 16:37:49,190 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:37:49,190 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 16:37:49,191 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:37:49,191 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:37:53,314 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 27 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 16:37:53,314 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 16:37:53,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:37:53,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 16:37:53,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=152, Unknown=12, NotChecked=0, Total=210 [2022-04-27 16:37:53,315 INFO L87 Difference]: Start difference. First operand 19 states and 23 transitions. Second operand has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:26,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:38:26,709 INFO L93 Difference]: Finished difference Result 32 states and 40 transitions. [2022-04-27 16:38:26,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 16:38:26,709 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 16:38:26,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:38:26,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:26,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 37 transitions. [2022-04-27 16:38:26,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:26,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 37 transitions. [2022-04-27 16:38:26,714 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 37 transitions. [2022-04-27 16:38:32,847 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 34 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-27 16:38:32,848 INFO L225 Difference]: With dead ends: 32 [2022-04-27 16:38:32,848 INFO L226 Difference]: Without dead ends: 25 [2022-04-27 16:38:32,849 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 25 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 60.2s TimeCoverageRelationStatistics Valid=119, Invalid=410, Unknown=23, NotChecked=0, Total=552 [2022-04-27 16:38:32,850 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 25 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 44 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 44 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:38:32,850 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 45 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 44 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-04-27 16:38:32,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-27 16:38:32,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 23. [2022-04-27 16:38:32,853 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:38:32,853 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:32,854 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:32,854 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:32,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:38:32,855 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2022-04-27 16:38:32,855 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 31 transitions. [2022-04-27 16:38:32,855 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:38:32,855 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:38:32,856 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-27 16:38:32,856 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-27 16:38:32,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:38:32,857 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2022-04-27 16:38:32,857 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 31 transitions. [2022-04-27 16:38:32,857 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:38:32,858 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:38:32,858 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:38:32,858 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:38:32,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:32,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 28 transitions. [2022-04-27 16:38:32,859 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 28 transitions. Word has length 16 [2022-04-27 16:38:32,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:38:32,859 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-04-27 16:38:32,859 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:38:32,859 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-27 16:38:32,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 16:38:32,860 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:38:32,860 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:38:32,882 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 16:38:33,073 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:38:33,074 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:38:33,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:38:33,074 INFO L85 PathProgramCache]: Analyzing trace with hash 374350110, now seen corresponding path program 1 times [2022-04-27 16:38:33,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:38:33,074 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802191190] [2022-04-27 16:38:33,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:38:33,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:38:33,085 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:38:33,086 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:38:33,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:38:33,116 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:38:33,122 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:38:33,236 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:38:33,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:38:33,241 INFO L290 TraceCheckUtils]: 0: Hoare triple {878#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {867#true} is VALID [2022-04-27 16:38:33,241 INFO L290 TraceCheckUtils]: 1: Hoare triple {867#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {867#true} is VALID [2022-04-27 16:38:33,241 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {867#true} {867#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {867#true} is VALID [2022-04-27 16:38:33,242 INFO L272 TraceCheckUtils]: 0: Hoare triple {867#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {878#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:38:33,242 INFO L290 TraceCheckUtils]: 1: Hoare triple {878#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {867#true} is VALID [2022-04-27 16:38:33,242 INFO L290 TraceCheckUtils]: 2: Hoare triple {867#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {867#true} is VALID [2022-04-27 16:38:33,243 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {867#true} {867#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {867#true} is VALID [2022-04-27 16:38:33,243 INFO L272 TraceCheckUtils]: 4: Hoare triple {867#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {867#true} is VALID [2022-04-27 16:38:33,243 INFO L290 TraceCheckUtils]: 5: Hoare triple {867#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {872#(= main_~y~0 0)} is VALID [2022-04-27 16:38:33,244 INFO L290 TraceCheckUtils]: 6: Hoare triple {872#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {873#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:38:33,244 INFO L290 TraceCheckUtils]: 7: Hoare triple {873#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {874#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:38:33,246 INFO L290 TraceCheckUtils]: 8: Hoare triple {874#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_5 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (< 0 .cse0) (= v_main_~x~0_8 (+ (* (- 1) v_main_~z~0_4) v_main_~x~0_9 v_main_~z~0_5)) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_4 v_it_2 1) v_main_~z~0_5)) (< 0 (mod (+ v_main_~z~0_5 (* v_it_2 4294967295)) 4294967296)))) (< v_main_~z~0_4 v_main_~z~0_5)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_5, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {874#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:38:33,247 INFO L290 TraceCheckUtils]: 9: Hoare triple {874#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {873#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:38:33,248 INFO L290 TraceCheckUtils]: 10: Hoare triple {873#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (= (+ v_main_~x~0_3 v_main_~y~0_3 (* (- 1) v_main_~y~0_4)) v_main_~x~0_2) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= v_main_~x~0_3 v_main_~x~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_~x~0=v_main_~x~0_3, main_#t~post9=|v_main_#t~post9_3|} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {875#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:38:33,248 INFO L290 TraceCheckUtils]: 11: Hoare triple {875#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {875#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 16:38:33,249 INFO L272 TraceCheckUtils]: 12: Hoare triple {875#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {876#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:38:33,250 INFO L290 TraceCheckUtils]: 13: Hoare triple {876#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {877#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:38:33,250 INFO L290 TraceCheckUtils]: 14: Hoare triple {877#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {868#false} is VALID [2022-04-27 16:38:33,250 INFO L290 TraceCheckUtils]: 15: Hoare triple {868#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {868#false} is VALID [2022-04-27 16:38:33,251 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:38:33,251 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:38:33,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802191190] [2022-04-27 16:38:33,251 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802191190] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:38:33,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1479548390] [2022-04-27 16:38:33,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:38:33,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:38:33,252 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:38:33,252 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:38:33,256 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process