/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de61.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:43:40,402 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:43:40,404 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:43:40,466 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-27 16:43:40,477 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:43:40,479 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:43:40,480 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:43:40,482 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:43:40,482 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:43:40,482 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:43:40,484 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:43:40,488 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:43:40,489 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:43:40,490 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:43:40,491 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:43:40,491 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:43:40,492 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:43:40,497 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 16:43:40,502 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:43:40,502 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:43:40,504 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:43:40,505 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:43:40,513 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:43:40,513 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:43:40,514 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:43:40,514 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:43:40,514 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:43:40,514 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:43:40,514 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:43:40,515 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:43:40,515 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:43:40,515 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:43:40,515 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:43:40,516 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:43:40,516 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:43:40,516 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:43:40,517 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:43:40,517 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:43:40,696 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:43:40,710 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:43:40,711 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:43:40,712 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:43:40,712 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:43:40,713 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de61.c [2022-04-27 16:43:40,754 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b5f3e19cd/c1147bf10d614bc8a220012d996c3c8f/FLAG240b4ff17 [2022-04-27 16:43:41,096 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:43:41,097 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c [2022-04-27 16:43:41,102 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b5f3e19cd/c1147bf10d614bc8a220012d996c3c8f/FLAG240b4ff17 [2022-04-27 16:43:41,113 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b5f3e19cd/c1147bf10d614bc8a220012d996c3c8f [2022-04-27 16:43:41,115 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:43:41,116 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:43:41,118 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:43:41,118 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:43:41,121 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:43:41,122 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,123 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@87c4203 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41, skipping insertion in model container [2022-04-27 16:43:41,123 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,127 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:43:41,136 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:43:41,256 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c[368,381] [2022-04-27 16:43:41,276 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:43:41,285 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:43:41,323 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c[368,381] [2022-04-27 16:43:41,337 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:43:41,346 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:43:41,347 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41 WrapperNode [2022-04-27 16:43:41,347 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:43:41,348 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:43:41,348 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:43:41,348 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:43:41,355 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,356 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,361 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,361 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,374 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,381 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,384 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,387 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:43:41,388 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:43:41,389 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:43:41,389 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:43:41,389 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:43:41,401 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:43:41,416 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:43:41,463 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:43:41,472 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:43:41,473 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:43:41,473 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:43:41,473 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:43:41,473 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:43:41,473 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:43:41,473 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:43:41,473 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:43:41,473 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:43:41,473 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:43:41,474 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:43:41,514 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:43:41,515 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:43:41,649 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:43:41,653 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:43:41,653 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2022-04-27 16:43:41,654 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:43:41 BoogieIcfgContainer [2022-04-27 16:43:41,654 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:43:41,655 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:43:41,655 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:43:41,656 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:43:41,658 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:43:41" (1/1) ... [2022-04-27 16:43:41,659 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:43:42,105 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:43:42,105 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_8 (+ v_main_~y~0_9 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_9} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-27 16:43:42,371 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:43:42,372 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_11 4294967296)) (= v_main_~z~0_11 (+ v_main_~z~0_10 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_11} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_10, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-27 16:43:42,591 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:43:42,592 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_5 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_5 (+ v_main_~y~0_4 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_5} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_4, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-27 16:43:42,881 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:43:42,882 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_10 (+ v_main_~y~0_11 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_11} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_10, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-27 16:43:43,058 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:43:43,058 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_13 (+ v_main_~z~0_12 1)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1)) (< 0 (mod v_main_~z~0_13 4294967296))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] [2022-04-27 16:43:44,457 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-27 16:43:44,458 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_7 4294967296)) (= v_main_~y~0_7 (+ v_main_~y~0_6 1)) (= v_main_~z~0_4 (+ v_main_~z~0_5 1))) InVars {main_~z~0=v_main_~z~0_5, main_~y~0=v_main_~y~0_7} OutVars{main_~z~0=v_main_~z~0_4, main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] to Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] [2022-04-27 16:43:44,461 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:43:44 BasicIcfg [2022-04-27 16:43:44,461 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:43:44,462 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:43:44,462 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:43:44,464 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:43:44,464 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:43:41" (1/4) ... [2022-04-27 16:43:44,464 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ab5e9a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:43:44, skipping insertion in model container [2022-04-27 16:43:44,464 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:43:41" (2/4) ... [2022-04-27 16:43:44,464 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ab5e9a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:43:44, skipping insertion in model container [2022-04-27 16:43:44,464 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:43:41" (3/4) ... [2022-04-27 16:43:44,465 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ab5e9a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:43:44, skipping insertion in model container [2022-04-27 16:43:44,465 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:43:44" (4/4) ... [2022-04-27 16:43:44,465 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de61.cJordan [2022-04-27 16:43:44,473 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:43:44,474 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:43:44,495 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:43:44,499 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@311f130d, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4cb8f79b [2022-04-27 16:43:44,499 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:43:44,503 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.8235294117647058) internal successors, (31), 18 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:43:44,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 16:43:44,507 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:43:44,507 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:43:44,507 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:43:44,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:43:44,510 INFO L85 PathProgramCache]: Analyzing trace with hash 430051023, now seen corresponding path program 1 times [2022-04-27 16:43:44,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:43:44,516 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125934291] [2022-04-27 16:43:44,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:43:44,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:43:44,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:44,587 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:43:44,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:44,597 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-27 16:43:44,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:43:44,597 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:43:44,598 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:43:44,598 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-27 16:43:44,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:43:44,599 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:43:44,599 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:43:44,599 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28#true} is VALID [2022-04-27 16:43:44,599 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [103] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L290 TraceCheckUtils]: 7: Hoare triple {29#false} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [107] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [110] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L290 TraceCheckUtils]: 10: Hoare triple {29#false} [113] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [116] L41-1-->L47-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [119] L47-1-->L47-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,600 INFO L272 TraceCheckUtils]: 13: Hoare triple {29#false} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {29#false} is VALID [2022-04-27 16:43:44,601 INFO L290 TraceCheckUtils]: 14: Hoare triple {29#false} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-27 16:43:44,601 INFO L290 TraceCheckUtils]: 15: Hoare triple {29#false} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,601 INFO L290 TraceCheckUtils]: 16: Hoare triple {29#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:43:44,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:43:44,601 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:43:44,602 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125934291] [2022-04-27 16:43:44,602 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125934291] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:43:44,602 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:43:44,602 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:43:44,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241637818] [2022-04-27 16:43:44,603 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:43:44,606 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:43:44,607 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:43:44,609 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,623 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:43:44,623 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:43:44,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:43:44,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:43:44,635 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:43:44,636 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.8235294117647058) internal successors, (31), 18 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:44,679 INFO L93 Difference]: Finished difference Result 25 states and 30 transitions. [2022-04-27 16:43:44,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:43:44,679 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:43:44,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:43:44,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 37 transitions. [2022-04-27 16:43:44,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 37 transitions. [2022-04-27 16:43:44,687 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 37 transitions. [2022-04-27 16:43:44,717 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:43:44,723 INFO L225 Difference]: With dead ends: 25 [2022-04-27 16:43:44,724 INFO L226 Difference]: Without dead ends: 18 [2022-04-27 16:43:44,725 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:43:44,728 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 21 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:43:44,729 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 32 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:43:44,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-27 16:43:44,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-27 16:43:44,745 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:43:44,745 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,746 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,746 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:44,748 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2022-04-27 16:43:44,748 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-27 16:43:44,748 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:43:44,748 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:43:44,748 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 16:43:44,749 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 16:43:44,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:44,750 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2022-04-27 16:43:44,750 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-27 16:43:44,750 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:43:44,751 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:43:44,751 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:43:44,751 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:43:44,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 23 transitions. [2022-04-27 16:43:44,752 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 23 transitions. Word has length 17 [2022-04-27 16:43:44,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:43:44,753 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 23 transitions. [2022-04-27 16:43:44,753 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,753 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-27 16:43:44,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 16:43:44,753 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:43:44,753 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:43:44,754 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:43:44,754 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:43:44,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:43:44,754 INFO L85 PathProgramCache]: Analyzing trace with hash -514488111, now seen corresponding path program 1 times [2022-04-27 16:43:44,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:43:44,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484670756] [2022-04-27 16:43:44,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:43:44,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:43:44,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:44,949 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:43:44,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:44,969 INFO L290 TraceCheckUtils]: 0: Hoare triple {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-27 16:43:44,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {115#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-27 16:43:44,970 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {115#true} {115#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-27 16:43:44,970 INFO L272 TraceCheckUtils]: 0: Hoare triple {115#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:43:44,970 INFO L290 TraceCheckUtils]: 1: Hoare triple {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-27 16:43:44,971 INFO L290 TraceCheckUtils]: 2: Hoare triple {115#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-27 16:43:44,971 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {115#true} {115#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-27 16:43:44,971 INFO L272 TraceCheckUtils]: 4: Hoare triple {115#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-27 16:43:44,971 INFO L290 TraceCheckUtils]: 5: Hoare triple {115#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {120#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:44,972 INFO L290 TraceCheckUtils]: 6: Hoare triple {120#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {121#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:44,973 INFO L290 TraceCheckUtils]: 7: Hoare triple {121#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:44,974 INFO L290 TraceCheckUtils]: 8: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:44,974 INFO L290 TraceCheckUtils]: 9: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:44,975 INFO L290 TraceCheckUtils]: 10: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:44,975 INFO L290 TraceCheckUtils]: 11: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:44,976 INFO L290 TraceCheckUtils]: 12: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:44,976 INFO L272 TraceCheckUtils]: 13: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {124#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:43:44,977 INFO L290 TraceCheckUtils]: 14: Hoare triple {124#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {125#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:43:44,977 INFO L290 TraceCheckUtils]: 15: Hoare triple {125#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-27 16:43:44,978 INFO L290 TraceCheckUtils]: 16: Hoare triple {116#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-27 16:43:44,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:43:44,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:43:44,979 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484670756] [2022-04-27 16:43:44,979 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484670756] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:43:44,981 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:43:44,981 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-27 16:43:44,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [711852734] [2022-04-27 16:43:44,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:43:44,982 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:43:44,982 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:43:44,982 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:44,998 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:43:44,998 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-27 16:43:44,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:43:44,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-27 16:43:45,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-04-27 16:43:45,000 INFO L87 Difference]: Start difference. First operand 18 states and 23 transitions. Second operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:45,254 INFO L93 Difference]: Finished difference Result 33 states and 48 transitions. [2022-04-27 16:43:45,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 16:43:45,254 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:43:45,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:43:45,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2022-04-27 16:43:45,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2022-04-27 16:43:45,257 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 49 transitions. [2022-04-27 16:43:45,299 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:43:45,300 INFO L225 Difference]: With dead ends: 33 [2022-04-27 16:43:45,300 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 16:43:45,300 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2022-04-27 16:43:45,301 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 35 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:43:45,301 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 39 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 72 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-27 16:43:45,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 16:43:45,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-04-27 16:43:45,303 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:43:45,304 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,304 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,304 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:45,305 INFO L93 Difference]: Finished difference Result 30 states and 45 transitions. [2022-04-27 16:43:45,306 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 45 transitions. [2022-04-27 16:43:45,306 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:43:45,306 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:43:45,306 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-27 16:43:45,306 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-27 16:43:45,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:45,316 INFO L93 Difference]: Finished difference Result 30 states and 45 transitions. [2022-04-27 16:43:45,316 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 45 transitions. [2022-04-27 16:43:45,316 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:43:45,316 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:43:45,316 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:43:45,316 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:43:45,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-27 16:43:45,318 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 17 [2022-04-27 16:43:45,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:43:45,318 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-27 16:43:45,318 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:45,318 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-27 16:43:45,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 16:43:45,318 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:43:45,319 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:43:45,319 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:43:45,319 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:43:45,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:43:45,319 INFO L85 PathProgramCache]: Analyzing trace with hash 34479891, now seen corresponding path program 1 times [2022-04-27 16:43:45,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:43:45,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183361508] [2022-04-27 16:43:45,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:43:45,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:43:45,354 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:43:45,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:45,378 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:43:45,517 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:43:45,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:45,526 INFO L290 TraceCheckUtils]: 0: Hoare triple {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-27 16:43:45,527 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:45,527 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:45,528 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:43:45,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-27 16:43:45,530 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:45,530 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:45,534 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:45,534 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {262#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-27 16:43:45,537 INFO L290 TraceCheckUtils]: 6: Hoare triple {262#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {263#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:45,538 INFO L290 TraceCheckUtils]: 7: Hoare triple {263#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:45,538 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:45,539 INFO L290 TraceCheckUtils]: 9: Hoare triple {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:43:45,540 INFO L290 TraceCheckUtils]: 10: Hoare triple {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:43:45,540 INFO L290 TraceCheckUtils]: 11: Hoare triple {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:45,542 INFO L290 TraceCheckUtils]: 12: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:45,543 INFO L290 TraceCheckUtils]: 13: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:45,543 INFO L272 TraceCheckUtils]: 14: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {267#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:43:45,544 INFO L290 TraceCheckUtils]: 15: Hoare triple {267#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {268#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:43:45,544 INFO L290 TraceCheckUtils]: 16: Hoare triple {268#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-27 16:43:45,544 INFO L290 TraceCheckUtils]: 17: Hoare triple {258#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-27 16:43:45,545 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:43:45,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:43:45,545 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183361508] [2022-04-27 16:43:45,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [183361508] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:43:45,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1353013977] [2022-04-27 16:43:45,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:43:45,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:43:45,548 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:43:45,549 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:43:45,555 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:43:45,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:45,582 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:43:45,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:45,611 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:43:46,132 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:46,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-27 16:43:46,133 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:46,133 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:46,133 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-27 16:43:46,134 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {288#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:43:46,134 INFO L290 TraceCheckUtils]: 6: Hoare triple {288#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:46,135 INFO L290 TraceCheckUtils]: 7: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:46,135 INFO L290 TraceCheckUtils]: 8: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:46,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:46,136 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:46,136 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:46,137 INFO L290 TraceCheckUtils]: 12: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:46,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:46,138 INFO L272 TraceCheckUtils]: 14: Hoare triple {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {318#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:43:46,138 INFO L290 TraceCheckUtils]: 15: Hoare triple {318#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {322#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:43:46,139 INFO L290 TraceCheckUtils]: 16: Hoare triple {322#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-27 16:43:46,139 INFO L290 TraceCheckUtils]: 17: Hoare triple {258#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-27 16:43:46,139 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:43:46,139 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:43:46,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1353013977] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:43:46,140 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:43:46,140 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-27 16:43:46,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102897759] [2022-04-27 16:43:46,140 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:43:46,141 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:43:46,141 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:43:46,141 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,154 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:43:46,155 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:43:46,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:43:46,155 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:43:46,155 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:43:46,156 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:46,273 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-27 16:43:46,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:43:46,273 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:43:46,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:43:46,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-27 16:43:46,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-27 16:43:46,276 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-27 16:43:46,317 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:43:46,318 INFO L225 Difference]: With dead ends: 32 [2022-04-27 16:43:46,318 INFO L226 Difference]: Without dead ends: 29 [2022-04-27 16:43:46,318 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:43:46,319 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:43:46,319 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 64 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-27 16:43:46,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-27 16:43:46,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 25. [2022-04-27 16:43:46,322 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:43:46,322 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,322 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,323 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:46,324 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2022-04-27 16:43:46,324 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-27 16:43:46,324 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:43:46,324 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:43:46,324 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-27 16:43:46,325 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-27 16:43:46,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:43:46,326 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2022-04-27 16:43:46,326 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-27 16:43:46,326 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:43:46,326 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:43:46,326 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:43:46,326 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:43:46,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-27 16:43:46,327 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 18 [2022-04-27 16:43:46,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:43:46,327 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-27 16:43:46,327 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:43:46,328 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-27 16:43:46,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 16:43:46,328 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:43:46,328 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:43:46,347 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 16:43:46,528 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:43:46,529 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:43:46,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:43:46,529 INFO L85 PathProgramCache]: Analyzing trace with hash 1257458414, now seen corresponding path program 1 times [2022-04-27 16:43:46,529 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:43:46,529 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117849397] [2022-04-27 16:43:46,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:43:46,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:43:46,539 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:43:46,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:46,568 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:43:46,691 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:43:46,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:46,698 INFO L290 TraceCheckUtils]: 0: Hoare triple {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-27 16:43:46,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:46,699 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:46,701 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:43:46,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-27 16:43:46,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:46,701 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:46,702 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:46,703 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {454#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:46,704 INFO L290 TraceCheckUtils]: 6: Hoare triple {454#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {455#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:43:46,705 INFO L290 TraceCheckUtils]: 7: Hoare triple {455#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:43:46,705 INFO L290 TraceCheckUtils]: 8: Hoare triple {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:43:46,706 INFO L290 TraceCheckUtils]: 9: Hoare triple {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {457#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:43:46,706 INFO L290 TraceCheckUtils]: 10: Hoare triple {457#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:43:46,707 INFO L290 TraceCheckUtils]: 11: Hoare triple {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:43:46,708 INFO L290 TraceCheckUtils]: 12: Hoare triple {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:46,709 INFO L290 TraceCheckUtils]: 13: Hoare triple {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:43:46,709 INFO L272 TraceCheckUtils]: 14: Hoare triple {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {460#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:43:46,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {460#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {461#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:43:46,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {461#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-27 16:43:46,710 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-27 16:43:46,711 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:43:46,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:43:46,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117849397] [2022-04-27 16:43:46,711 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2117849397] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:43:46,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [269803041] [2022-04-27 16:43:46,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:43:46,711 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:43:46,711 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:43:46,712 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:43:46,713 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:43:46,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:46,742 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:43:46,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:43:46,756 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:43:47,334 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:47,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-27 16:43:47,335 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:47,335 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:47,335 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:47,337 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {481#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:43:47,337 INFO L290 TraceCheckUtils]: 6: Hoare triple {481#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:47,338 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:47,338 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:47,338 INFO L290 TraceCheckUtils]: 9: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:47,339 INFO L290 TraceCheckUtils]: 10: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:47,339 INFO L290 TraceCheckUtils]: 11: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:47,340 INFO L290 TraceCheckUtils]: 12: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:47,341 INFO L290 TraceCheckUtils]: 13: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:47,341 INFO L272 TraceCheckUtils]: 14: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:43:47,342 INFO L290 TraceCheckUtils]: 15: Hoare triple {512#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:43:47,343 INFO L290 TraceCheckUtils]: 16: Hoare triple {516#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-27 16:43:47,343 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-27 16:43:47,343 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:43:47,343 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:43:50,089 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= aux_mod_v_main_~z~0_28_31 (mod c_main_~n~0 4294967296)) (let ((.cse1 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296))))) (not .cse0) (not (< c_main_~z~0 .cse1))) (or (not (= .cse1 c_main_~z~0)) .cse0))))) is different from false [2022-04-27 16:43:52,222 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-27 16:43:52,222 INFO L290 TraceCheckUtils]: 16: Hoare triple {516#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-27 16:43:52,223 INFO L290 TraceCheckUtils]: 15: Hoare triple {512#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:43:52,223 INFO L272 TraceCheckUtils]: 14: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:43:52,224 INFO L290 TraceCheckUtils]: 13: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:43:54,254 WARN L290 TraceCheckUtils]: 12: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (and (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-27 16:43:56,266 WARN L290 TraceCheckUtils]: 11: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (and (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (and (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31)))} is UNKNOWN [2022-04-27 16:43:56,316 INFO L290 TraceCheckUtils]: 10: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (and (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (and (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31)))} is VALID [2022-04-27 16:43:56,319 INFO L290 TraceCheckUtils]: 9: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int) (aux_div_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (and (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31)))} is VALID [2022-04-27 16:43:56,320 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:43:56,321 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:56,321 INFO L290 TraceCheckUtils]: 6: Hoare triple {558#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:43:56,321 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {558#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:43:56,321 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:56,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:56,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:56,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-27 16:43:56,322 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-27 16:43:56,322 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-27 16:43:56,322 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [269803041] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:43:56,322 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:43:56,322 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 20 [2022-04-27 16:43:56,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441857848] [2022-04-27 16:43:56,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:43:56,323 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:43:56,324 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:43:56,324 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:02,600 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 38 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:02,601 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 16:44:02,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:44:02,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 16:44:02,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=266, Unknown=1, NotChecked=34, Total=380 [2022-04-27 16:44:02,602 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:03,341 INFO L93 Difference]: Finished difference Result 38 states and 56 transitions. [2022-04-27 16:44:03,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 16:44:03,342 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:03,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:44:03,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 16:44:03,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 16:44:03,348 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-27 16:44:03,395 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:03,396 INFO L225 Difference]: With dead ends: 38 [2022-04-27 16:44:03,396 INFO L226 Difference]: Without dead ends: 35 [2022-04-27 16:44:03,396 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 25 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=135, Invalid=468, Unknown=1, NotChecked=46, Total=650 [2022-04-27 16:44:03,397 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 40 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:44:03,397 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 66 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 93 Invalid, 0 Unknown, 21 Unchecked, 0.2s Time] [2022-04-27 16:44:03,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-04-27 16:44:03,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 29. [2022-04-27 16:44:03,399 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:44:03,399 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,399 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,399 INFO L87 Difference]: Start difference. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:03,401 INFO L93 Difference]: Finished difference Result 35 states and 53 transitions. [2022-04-27 16:44:03,401 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-27 16:44:03,401 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:03,401 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:03,401 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-27 16:44:03,401 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-27 16:44:03,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:03,402 INFO L93 Difference]: Finished difference Result 35 states and 53 transitions. [2022-04-27 16:44:03,402 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-27 16:44:03,403 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:03,403 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:03,403 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:44:03,403 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:44:03,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 42 transitions. [2022-04-27 16:44:03,404 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 42 transitions. Word has length 18 [2022-04-27 16:44:03,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:44:03,404 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 42 transitions. [2022-04-27 16:44:03,404 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:03,404 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-27 16:44:03,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 16:44:03,405 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:44:03,405 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:44:03,421 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 16:44:03,619 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 16:44:03,619 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:44:03,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:44:03,620 INFO L85 PathProgramCache]: Analyzing trace with hash 2030445491, now seen corresponding path program 1 times [2022-04-27 16:44:03,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:44:03,620 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842667843] [2022-04-27 16:44:03,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:03,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:44:03,639 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:03,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:03,656 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:03,935 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:44:03,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:03,939 INFO L290 TraceCheckUtils]: 0: Hoare triple {741#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {729#true} is VALID [2022-04-27 16:44:03,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {729#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:03,940 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {729#true} {729#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:03,940 INFO L272 TraceCheckUtils]: 0: Hoare triple {729#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {741#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:44:03,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {741#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {729#true} is VALID [2022-04-27 16:44:03,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {729#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:03,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {729#true} {729#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:03,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {729#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:03,941 INFO L290 TraceCheckUtils]: 5: Hoare triple {729#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {734#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:03,942 INFO L290 TraceCheckUtils]: 6: Hoare triple {734#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {735#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:03,942 INFO L290 TraceCheckUtils]: 7: Hoare triple {735#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:03,942 INFO L290 TraceCheckUtils]: 8: Hoare triple {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:03,943 INFO L290 TraceCheckUtils]: 9: Hoare triple {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:03,943 INFO L290 TraceCheckUtils]: 10: Hoare triple {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:03,944 INFO L290 TraceCheckUtils]: 11: Hoare triple {736#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {737#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:44:03,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {737#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {738#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:03,946 INFO L290 TraceCheckUtils]: 13: Hoare triple {738#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {738#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:03,946 INFO L272 TraceCheckUtils]: 14: Hoare triple {738#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {739#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:44:03,947 INFO L290 TraceCheckUtils]: 15: Hoare triple {739#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {740#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:44:03,947 INFO L290 TraceCheckUtils]: 16: Hoare triple {740#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {730#false} is VALID [2022-04-27 16:44:03,947 INFO L290 TraceCheckUtils]: 17: Hoare triple {730#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {730#false} is VALID [2022-04-27 16:44:03,947 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:03,947 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:44:03,948 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842667843] [2022-04-27 16:44:03,948 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1842667843] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:44:03,948 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [45584069] [2022-04-27 16:44:03,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:03,948 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:03,948 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:44:03,949 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:44:03,949 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:44:03,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:03,980 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:44:03,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:03,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:44:04,702 INFO L272 TraceCheckUtils]: 0: Hoare triple {729#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:04,702 INFO L290 TraceCheckUtils]: 1: Hoare triple {729#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {729#true} is VALID [2022-04-27 16:44:04,702 INFO L290 TraceCheckUtils]: 2: Hoare triple {729#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:04,702 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {729#true} {729#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:04,702 INFO L272 TraceCheckUtils]: 4: Hoare triple {729#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#true} is VALID [2022-04-27 16:44:04,703 INFO L290 TraceCheckUtils]: 5: Hoare triple {729#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {760#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:44:04,703 INFO L290 TraceCheckUtils]: 6: Hoare triple {760#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {764#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:04,703 INFO L290 TraceCheckUtils]: 7: Hoare triple {764#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {764#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:04,704 INFO L290 TraceCheckUtils]: 8: Hoare triple {764#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {764#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:04,704 INFO L290 TraceCheckUtils]: 9: Hoare triple {764#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {764#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:04,704 INFO L290 TraceCheckUtils]: 10: Hoare triple {764#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {764#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:04,705 INFO L290 TraceCheckUtils]: 11: Hoare triple {764#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {764#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:04,706 INFO L290 TraceCheckUtils]: 12: Hoare triple {764#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {783#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:04,706 INFO L290 TraceCheckUtils]: 13: Hoare triple {783#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {783#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:04,707 INFO L272 TraceCheckUtils]: 14: Hoare triple {783#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {790#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:04,707 INFO L290 TraceCheckUtils]: 15: Hoare triple {790#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {794#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:04,708 INFO L290 TraceCheckUtils]: 16: Hoare triple {794#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {730#false} is VALID [2022-04-27 16:44:04,708 INFO L290 TraceCheckUtils]: 17: Hoare triple {730#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {730#false} is VALID [2022-04-27 16:44:04,708 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:44:04,708 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:44:04,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [45584069] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:44:04,708 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:44:04,708 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-27 16:44:04,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [604073824] [2022-04-27 16:44:04,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:44:04,709 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:04,709 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:44:04,709 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:04,722 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:04,723 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:44:04,723 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:44:04,723 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:44:04,723 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:44:04,723 INFO L87 Difference]: Start difference. First operand 29 states and 42 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:05,039 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-27 16:44:05,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:44:05,039 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:05,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:44:05,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 42 transitions. [2022-04-27 16:44:05,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 42 transitions. [2022-04-27 16:44:05,041 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 42 transitions. [2022-04-27 16:44:05,080 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:05,081 INFO L225 Difference]: With dead ends: 34 [2022-04-27 16:44:05,081 INFO L226 Difference]: Without dead ends: 31 [2022-04-27 16:44:05,081 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:44:05,081 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:44:05,082 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 73 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-27 16:44:05,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-27 16:44:05,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2022-04-27 16:44:05,083 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:44:05,085 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,085 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,085 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:05,086 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-27 16:44:05,086 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-27 16:44:05,087 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:05,087 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:05,087 INFO L74 IsIncluded]: Start isIncluded. First operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-27 16:44:05,087 INFO L87 Difference]: Start difference. First operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-27 16:44:05,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:05,088 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-27 16:44:05,088 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-27 16:44:05,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:05,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:05,088 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:44:05,088 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:44:05,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 44 transitions. [2022-04-27 16:44:05,089 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 44 transitions. Word has length 18 [2022-04-27 16:44:05,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:44:05,089 INFO L495 AbstractCegarLoop]: Abstraction has 30 states and 44 transitions. [2022-04-27 16:44:05,089 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:05,089 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 44 transitions. [2022-04-27 16:44:05,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 16:44:05,090 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:44:05,090 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:44:05,106 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 16:44:05,303 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:05,303 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:44:05,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:44:05,304 INFO L85 PathProgramCache]: Analyzing trace with hash 223241102, now seen corresponding path program 1 times [2022-04-27 16:44:05,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:44:05,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218605234] [2022-04-27 16:44:05,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:05,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:44:05,311 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:44:05,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:05,341 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:44:05,617 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:44:05,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:05,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {932#true} is VALID [2022-04-27 16:44:05,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {932#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:05,623 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {932#true} {932#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:05,623 INFO L272 TraceCheckUtils]: 0: Hoare triple {932#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:44:05,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {932#true} is VALID [2022-04-27 16:44:05,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {932#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:05,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {932#true} {932#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:05,624 INFO L272 TraceCheckUtils]: 4: Hoare triple {932#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:05,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {932#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {937#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:05,625 INFO L290 TraceCheckUtils]: 6: Hoare triple {937#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {938#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:05,626 INFO L290 TraceCheckUtils]: 7: Hoare triple {938#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {939#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,626 INFO L290 TraceCheckUtils]: 8: Hoare triple {939#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,627 INFO L290 TraceCheckUtils]: 9: Hoare triple {939#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,627 INFO L290 TraceCheckUtils]: 10: Hoare triple {939#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,628 INFO L290 TraceCheckUtils]: 11: Hoare triple {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,628 INFO L290 TraceCheckUtils]: 12: Hoare triple {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,629 INFO L290 TraceCheckUtils]: 13: Hoare triple {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:05,629 INFO L272 TraceCheckUtils]: 14: Hoare triple {940#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {941#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:44:05,630 INFO L290 TraceCheckUtils]: 15: Hoare triple {941#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {942#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:44:05,630 INFO L290 TraceCheckUtils]: 16: Hoare triple {942#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {933#false} is VALID [2022-04-27 16:44:05,630 INFO L290 TraceCheckUtils]: 17: Hoare triple {933#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {933#false} is VALID [2022-04-27 16:44:05,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:05,631 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:44:05,632 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218605234] [2022-04-27 16:44:05,632 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [218605234] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:44:05,632 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [801761692] [2022-04-27 16:44:05,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:05,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:05,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:44:05,640 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:44:05,641 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 16:44:05,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:05,668 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:44:05,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:05,688 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:44:06,625 INFO L272 TraceCheckUtils]: 0: Hoare triple {932#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:06,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {932#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {932#true} is VALID [2022-04-27 16:44:06,626 INFO L290 TraceCheckUtils]: 2: Hoare triple {932#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:06,626 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {932#true} {932#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:06,626 INFO L272 TraceCheckUtils]: 4: Hoare triple {932#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#true} is VALID [2022-04-27 16:44:06,627 INFO L290 TraceCheckUtils]: 5: Hoare triple {932#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {962#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:44:06,628 INFO L290 TraceCheckUtils]: 6: Hoare triple {962#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {966#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:06,628 INFO L290 TraceCheckUtils]: 7: Hoare triple {966#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {966#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:06,628 INFO L290 TraceCheckUtils]: 8: Hoare triple {966#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {973#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:06,629 INFO L290 TraceCheckUtils]: 9: Hoare triple {973#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {973#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:06,630 INFO L290 TraceCheckUtils]: 10: Hoare triple {973#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {973#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:06,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {973#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {983#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:06,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {983#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {983#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:06,631 INFO L290 TraceCheckUtils]: 13: Hoare triple {983#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {983#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:06,632 INFO L272 TraceCheckUtils]: 14: Hoare triple {983#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {993#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:06,632 INFO L290 TraceCheckUtils]: 15: Hoare triple {993#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {997#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:06,633 INFO L290 TraceCheckUtils]: 16: Hoare triple {997#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {933#false} is VALID [2022-04-27 16:44:06,633 INFO L290 TraceCheckUtils]: 17: Hoare triple {933#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {933#false} is VALID [2022-04-27 16:44:06,633 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:44:06,633 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:44:06,633 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [801761692] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:44:06,633 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:44:06,633 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-27 16:44:06,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158423245] [2022-04-27 16:44:06,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:44:06,634 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:06,634 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:44:06,635 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,647 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:06,647 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:44:06,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:44:06,648 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:44:06,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:44:06,648 INFO L87 Difference]: Start difference. First operand 30 states and 44 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:06,860 INFO L93 Difference]: Finished difference Result 36 states and 52 transitions. [2022-04-27 16:44:06,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 16:44:06,860 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:06,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:44:06,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 39 transitions. [2022-04-27 16:44:06,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 39 transitions. [2022-04-27 16:44:06,862 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 39 transitions. [2022-04-27 16:44:06,896 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:06,896 INFO L225 Difference]: With dead ends: 36 [2022-04-27 16:44:06,896 INFO L226 Difference]: Without dead ends: 33 [2022-04-27 16:44:06,896 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2022-04-27 16:44:06,898 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:44:06,898 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 70 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 31 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-27 16:44:06,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-27 16:44:06,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 31. [2022-04-27 16:44:06,900 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:44:06,900 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,900 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,900 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:06,901 INFO L93 Difference]: Finished difference Result 33 states and 49 transitions. [2022-04-27 16:44:06,901 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-27 16:44:06,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:06,902 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:06,902 INFO L74 IsIncluded]: Start isIncluded. First operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-27 16:44:06,902 INFO L87 Difference]: Start difference. First operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-27 16:44:06,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:06,903 INFO L93 Difference]: Finished difference Result 33 states and 49 transitions. [2022-04-27 16:44:06,903 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-27 16:44:06,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:06,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:06,903 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:44:06,903 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:44:06,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 46 transitions. [2022-04-27 16:44:06,904 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 46 transitions. Word has length 18 [2022-04-27 16:44:06,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:44:06,904 INFO L495 AbstractCegarLoop]: Abstraction has 31 states and 46 transitions. [2022-04-27 16:44:06,904 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:06,905 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 46 transitions. [2022-04-27 16:44:06,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 16:44:06,905 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:44:06,905 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:44:06,923 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 16:44:07,117 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:07,117 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:44:07,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:44:07,118 INFO L85 PathProgramCache]: Analyzing trace with hash -1522150354, now seen corresponding path program 1 times [2022-04-27 16:44:07,118 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:44:07,118 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218553540] [2022-04-27 16:44:07,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:07,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:44:07,127 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:07,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:07,138 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:07,362 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:44:07,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:07,369 INFO L290 TraceCheckUtils]: 0: Hoare triple {1150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 16:44:07,369 INFO L290 TraceCheckUtils]: 1: Hoare triple {1138#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:07,369 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1138#true} {1138#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:07,370 INFO L272 TraceCheckUtils]: 0: Hoare triple {1138#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:44:07,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {1150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 16:44:07,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {1138#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:07,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1138#true} {1138#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:07,370 INFO L272 TraceCheckUtils]: 4: Hoare triple {1138#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:07,371 INFO L290 TraceCheckUtils]: 5: Hoare triple {1138#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1143#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:07,371 INFO L290 TraceCheckUtils]: 6: Hoare triple {1143#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1144#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:07,372 INFO L290 TraceCheckUtils]: 7: Hoare triple {1144#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1145#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:44:07,373 INFO L290 TraceCheckUtils]: 8: Hoare triple {1145#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1146#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:44:07,374 INFO L290 TraceCheckUtils]: 9: Hoare triple {1146#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:07,374 INFO L290 TraceCheckUtils]: 10: Hoare triple {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:07,375 INFO L290 TraceCheckUtils]: 11: Hoare triple {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:07,375 INFO L290 TraceCheckUtils]: 12: Hoare triple {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:07,376 INFO L290 TraceCheckUtils]: 13: Hoare triple {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:07,377 INFO L272 TraceCheckUtils]: 14: Hoare triple {1147#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1148#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:44:07,377 INFO L290 TraceCheckUtils]: 15: Hoare triple {1148#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1149#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:44:07,377 INFO L290 TraceCheckUtils]: 16: Hoare triple {1149#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 16:44:07,378 INFO L290 TraceCheckUtils]: 17: Hoare triple {1139#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 16:44:07,378 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:07,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:44:07,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218553540] [2022-04-27 16:44:07,378 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [218553540] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:44:07,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [627287472] [2022-04-27 16:44:07,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:07,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:07,378 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:44:07,379 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:44:07,380 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 16:44:07,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:07,405 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:44:07,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:07,410 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:44:08,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {1138#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:08,219 INFO L290 TraceCheckUtils]: 1: Hoare triple {1138#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 16:44:08,219 INFO L290 TraceCheckUtils]: 2: Hoare triple {1138#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:08,219 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1138#true} {1138#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:08,219 INFO L272 TraceCheckUtils]: 4: Hoare triple {1138#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 16:44:08,219 INFO L290 TraceCheckUtils]: 5: Hoare triple {1138#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1169#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:44:08,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {1169#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1173#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:08,220 INFO L290 TraceCheckUtils]: 7: Hoare triple {1173#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1173#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:08,225 INFO L290 TraceCheckUtils]: 8: Hoare triple {1173#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1173#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:08,225 INFO L290 TraceCheckUtils]: 9: Hoare triple {1173#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:08,225 INFO L290 TraceCheckUtils]: 10: Hoare triple {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:08,226 INFO L290 TraceCheckUtils]: 11: Hoare triple {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:08,226 INFO L290 TraceCheckUtils]: 12: Hoare triple {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:08,228 INFO L290 TraceCheckUtils]: 13: Hoare triple {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:08,229 INFO L272 TraceCheckUtils]: 14: Hoare triple {1183#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:08,229 INFO L290 TraceCheckUtils]: 15: Hoare triple {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1203#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:08,229 INFO L290 TraceCheckUtils]: 16: Hoare triple {1203#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 16:44:08,230 INFO L290 TraceCheckUtils]: 17: Hoare triple {1139#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 16:44:08,230 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:44:08,230 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:44:08,230 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [627287472] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:44:08,230 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:44:08,230 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-27 16:44:08,230 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1332825919] [2022-04-27 16:44:08,230 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:44:08,231 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:08,231 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:44:08,231 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,242 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:08,243 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:44:08,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:44:08,243 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:44:08,243 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:44:08,243 INFO L87 Difference]: Start difference. First operand 31 states and 46 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:08,499 INFO L93 Difference]: Finished difference Result 39 states and 58 transitions. [2022-04-27 16:44:08,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:44:08,500 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:08,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:44:08,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-27 16:44:08,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-27 16:44:08,502 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-27 16:44:08,538 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:08,547 INFO L225 Difference]: With dead ends: 39 [2022-04-27 16:44:08,547 INFO L226 Difference]: Without dead ends: 36 [2022-04-27 16:44:08,548 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:44:08,549 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 16 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:44:08,549 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 63 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-27 16:44:08,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-04-27 16:44:08,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2022-04-27 16:44:08,551 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:44:08,551 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,551 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,551 INFO L87 Difference]: Start difference. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:08,552 INFO L93 Difference]: Finished difference Result 36 states and 55 transitions. [2022-04-27 16:44:08,552 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-27 16:44:08,553 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:08,553 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:08,553 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-27 16:44:08,553 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-27 16:44:08,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:08,554 INFO L93 Difference]: Finished difference Result 36 states and 55 transitions. [2022-04-27 16:44:08,554 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-27 16:44:08,554 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:08,554 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:08,554 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:44:08,554 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:44:08,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 50 transitions. [2022-04-27 16:44:08,556 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 50 transitions. Word has length 18 [2022-04-27 16:44:08,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:44:08,556 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 50 transitions. [2022-04-27 16:44:08,556 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:08,556 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 50 transitions. [2022-04-27 16:44:08,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 16:44:08,556 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:44:08,556 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:44:08,573 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 16:44:08,763 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:08,763 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:44:08,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:44:08,764 INFO L85 PathProgramCache]: Analyzing trace with hash -1504591698, now seen corresponding path program 1 times [2022-04-27 16:44:08,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:44:08,764 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394688737] [2022-04-27 16:44:08,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:08,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:44:08,771 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:08,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:08,782 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:09,090 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:44:09,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:09,097 INFO L290 TraceCheckUtils]: 0: Hoare triple {1372#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1359#true} is VALID [2022-04-27 16:44:09,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {1359#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:09,098 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1359#true} {1359#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:09,098 INFO L272 TraceCheckUtils]: 0: Hoare triple {1359#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1372#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:44:09,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {1372#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1359#true} is VALID [2022-04-27 16:44:09,098 INFO L290 TraceCheckUtils]: 2: Hoare triple {1359#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:09,098 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1359#true} {1359#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:09,099 INFO L272 TraceCheckUtils]: 4: Hoare triple {1359#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:09,099 INFO L290 TraceCheckUtils]: 5: Hoare triple {1359#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1364#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:09,104 INFO L290 TraceCheckUtils]: 6: Hoare triple {1364#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1365#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:44:09,105 INFO L290 TraceCheckUtils]: 7: Hoare triple {1365#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1366#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:44:09,106 INFO L290 TraceCheckUtils]: 8: Hoare triple {1366#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1367#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:44:09,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {1367#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1368#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:44:09,108 INFO L290 TraceCheckUtils]: 10: Hoare triple {1368#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:09,108 INFO L290 TraceCheckUtils]: 11: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:09,109 INFO L290 TraceCheckUtils]: 12: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:09,109 INFO L290 TraceCheckUtils]: 13: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:09,110 INFO L272 TraceCheckUtils]: 14: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1370#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:44:09,110 INFO L290 TraceCheckUtils]: 15: Hoare triple {1370#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1371#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:44:09,110 INFO L290 TraceCheckUtils]: 16: Hoare triple {1371#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1360#false} is VALID [2022-04-27 16:44:09,111 INFO L290 TraceCheckUtils]: 17: Hoare triple {1360#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1360#false} is VALID [2022-04-27 16:44:09,111 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:09,111 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:44:09,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1394688737] [2022-04-27 16:44:09,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1394688737] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:44:09,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1369034950] [2022-04-27 16:44:09,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:09,111 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:09,111 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:44:09,112 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:44:09,113 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 16:44:09,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:09,171 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 16:44:09,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:09,198 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:44:10,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {1359#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:10,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {1359#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1359#true} is VALID [2022-04-27 16:44:10,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {1359#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:10,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1359#true} {1359#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:10,422 INFO L272 TraceCheckUtils]: 4: Hoare triple {1359#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:10,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {1359#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1364#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:10,432 INFO L290 TraceCheckUtils]: 6: Hoare triple {1364#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1394#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-27 16:44:10,433 INFO L290 TraceCheckUtils]: 7: Hoare triple {1394#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1394#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-27 16:44:10,434 INFO L290 TraceCheckUtils]: 8: Hoare triple {1394#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1401#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:10,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {1401#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:44:10,438 INFO L290 TraceCheckUtils]: 10: Hoare triple {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:44:10,439 INFO L290 TraceCheckUtils]: 11: Hoare triple {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:44:10,439 INFO L290 TraceCheckUtils]: 12: Hoare triple {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:44:10,439 INFO L290 TraceCheckUtils]: 13: Hoare triple {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:44:10,440 INFO L272 TraceCheckUtils]: 14: Hoare triple {1405#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1421#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:10,440 INFO L290 TraceCheckUtils]: 15: Hoare triple {1421#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1425#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:10,441 INFO L290 TraceCheckUtils]: 16: Hoare triple {1425#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1360#false} is VALID [2022-04-27 16:44:10,441 INFO L290 TraceCheckUtils]: 17: Hoare triple {1360#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1360#false} is VALID [2022-04-27 16:44:10,441 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:10,441 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:44:13,971 INFO L290 TraceCheckUtils]: 17: Hoare triple {1360#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1360#false} is VALID [2022-04-27 16:44:13,972 INFO L290 TraceCheckUtils]: 16: Hoare triple {1425#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1360#false} is VALID [2022-04-27 16:44:13,972 INFO L290 TraceCheckUtils]: 15: Hoare triple {1421#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1425#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:13,973 INFO L272 TraceCheckUtils]: 14: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1421#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:13,974 INFO L290 TraceCheckUtils]: 13: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:13,974 INFO L290 TraceCheckUtils]: 12: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:13,975 INFO L290 TraceCheckUtils]: 11: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:13,975 INFO L290 TraceCheckUtils]: 10: Hoare triple {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:13,976 INFO L290 TraceCheckUtils]: 9: Hoare triple {1456#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1369#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:44:13,977 INFO L290 TraceCheckUtils]: 8: Hoare triple {1366#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1456#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:44:13,977 INFO L290 TraceCheckUtils]: 7: Hoare triple {1366#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1366#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:44:14,057 INFO L290 TraceCheckUtils]: 6: Hoare triple {1466#(or (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (and (or (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< 0 (mod main_~x~0 4294967296))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (<= 1 v_it_1))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_30_31 0) (<= 1 aux_mod_v_main_~y~0_30_31))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1366#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:44:14,067 INFO L290 TraceCheckUtils]: 5: Hoare triple {1359#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1466#(or (forall ((aux_div_v_main_~y~0_30_31 Int) (aux_mod_v_main_~y~0_30_31 Int)) (or (and (or (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (< 0 (mod main_~x~0 4294967296))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (<= 1 v_it_1))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_30_31 0) (<= 1 aux_mod_v_main_~y~0_30_31))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:44:14,067 INFO L272 TraceCheckUtils]: 4: Hoare triple {1359#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:14,068 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1359#true} {1359#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:14,068 INFO L290 TraceCheckUtils]: 2: Hoare triple {1359#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:14,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {1359#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1359#true} is VALID [2022-04-27 16:44:14,068 INFO L272 TraceCheckUtils]: 0: Hoare triple {1359#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#true} is VALID [2022-04-27 16:44:14,068 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:14,068 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1369034950] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:44:14,068 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:44:14,068 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 18 [2022-04-27 16:44:14,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931750644] [2022-04-27 16:44:14,069 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:44:14,069 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:14,069 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:44:14,069 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:14,163 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:14,163 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 16:44:14,163 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:44:14,164 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 16:44:14,164 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=249, Unknown=1, NotChecked=0, Total=306 [2022-04-27 16:44:14,164 INFO L87 Difference]: Start difference. First operand 33 states and 50 transitions. Second operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:17,197 INFO L93 Difference]: Finished difference Result 49 states and 76 transitions. [2022-04-27 16:44:17,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 16:44:17,198 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 16:44:17,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:44:17,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-27 16:44:17,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-27 16:44:17,203 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 61 transitions. [2022-04-27 16:44:17,273 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:17,274 INFO L225 Difference]: With dead ends: 49 [2022-04-27 16:44:17,274 INFO L226 Difference]: Without dead ends: 46 [2022-04-27 16:44:17,275 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=127, Invalid=471, Unknown=2, NotChecked=0, Total=600 [2022-04-27 16:44:17,275 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 72 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 16 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:44:17,275 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [72 Valid, 63 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 113 Invalid, 0 Unknown, 16 Unchecked, 0.2s Time] [2022-04-27 16:44:17,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-04-27 16:44:17,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 36. [2022-04-27 16:44:17,277 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:44:17,277 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,277 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,277 INFO L87 Difference]: Start difference. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:17,278 INFO L93 Difference]: Finished difference Result 46 states and 73 transitions. [2022-04-27 16:44:17,278 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 73 transitions. [2022-04-27 16:44:17,279 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:17,279 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:17,279 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-27 16:44:17,279 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-27 16:44:17,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:44:17,280 INFO L93 Difference]: Finished difference Result 46 states and 73 transitions. [2022-04-27 16:44:17,280 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 73 transitions. [2022-04-27 16:44:17,280 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:44:17,280 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:44:17,280 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:44:17,280 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:44:17,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 55 transitions. [2022-04-27 16:44:17,281 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 55 transitions. Word has length 18 [2022-04-27 16:44:17,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:44:17,281 INFO L495 AbstractCegarLoop]: Abstraction has 36 states and 55 transitions. [2022-04-27 16:44:17,282 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:17,282 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-27 16:44:17,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:44:17,282 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:44:17,282 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:44:17,298 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 16:44:17,489 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:17,489 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:44:17,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:44:17,490 INFO L85 PathProgramCache]: Analyzing trace with hash 1095597292, now seen corresponding path program 1 times [2022-04-27 16:44:17,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:44:17,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825628960] [2022-04-27 16:44:17,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:17,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:44:17,497 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:17,502 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:17,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:17,521 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:17,536 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:44:17,854 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:44:17,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:17,868 INFO L290 TraceCheckUtils]: 0: Hoare triple {1693#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1679#true} is VALID [2022-04-27 16:44:17,868 INFO L290 TraceCheckUtils]: 1: Hoare triple {1679#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:17,868 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1679#true} {1679#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:17,869 INFO L272 TraceCheckUtils]: 0: Hoare triple {1679#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1693#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:44:17,869 INFO L290 TraceCheckUtils]: 1: Hoare triple {1693#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1679#true} is VALID [2022-04-27 16:44:17,869 INFO L290 TraceCheckUtils]: 2: Hoare triple {1679#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:17,869 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1679#true} {1679#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:17,869 INFO L272 TraceCheckUtils]: 4: Hoare triple {1679#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:17,869 INFO L290 TraceCheckUtils]: 5: Hoare triple {1679#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1684#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-27 16:44:17,870 INFO L290 TraceCheckUtils]: 6: Hoare triple {1684#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1685#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:17,871 INFO L290 TraceCheckUtils]: 7: Hoare triple {1685#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1686#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:17,871 INFO L290 TraceCheckUtils]: 8: Hoare triple {1686#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1686#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:44:17,872 INFO L290 TraceCheckUtils]: 9: Hoare triple {1686#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1687#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:17,873 INFO L290 TraceCheckUtils]: 10: Hoare triple {1687#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1688#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:44:17,873 INFO L290 TraceCheckUtils]: 11: Hoare triple {1688#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1689#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:44:17,874 INFO L290 TraceCheckUtils]: 12: Hoare triple {1689#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1689#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:44:17,876 INFO L290 TraceCheckUtils]: 13: Hoare triple {1689#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1690#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:44:17,876 INFO L290 TraceCheckUtils]: 14: Hoare triple {1690#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1690#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:44:17,877 INFO L272 TraceCheckUtils]: 15: Hoare triple {1690#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1691#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:44:17,877 INFO L290 TraceCheckUtils]: 16: Hoare triple {1691#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1692#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:44:17,878 INFO L290 TraceCheckUtils]: 17: Hoare triple {1692#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1680#false} is VALID [2022-04-27 16:44:17,878 INFO L290 TraceCheckUtils]: 18: Hoare triple {1680#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1680#false} is VALID [2022-04-27 16:44:17,878 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:44:17,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:44:17,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825628960] [2022-04-27 16:44:17,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1825628960] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:44:17,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [865447797] [2022-04-27 16:44:17,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:44:17,878 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:44:17,879 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:44:17,879 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:44:17,880 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 16:44:17,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:17,911 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:44:17,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:44:17,919 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:44:18,838 INFO L272 TraceCheckUtils]: 0: Hoare triple {1679#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:18,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {1679#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1679#true} is VALID [2022-04-27 16:44:18,838 INFO L290 TraceCheckUtils]: 2: Hoare triple {1679#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:18,838 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1679#true} {1679#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:18,838 INFO L272 TraceCheckUtils]: 4: Hoare triple {1679#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:18,839 INFO L290 TraceCheckUtils]: 5: Hoare triple {1679#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1712#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:44:18,839 INFO L290 TraceCheckUtils]: 6: Hoare triple {1712#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:18,840 INFO L290 TraceCheckUtils]: 7: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:18,840 INFO L290 TraceCheckUtils]: 8: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:18,840 INFO L290 TraceCheckUtils]: 9: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:18,841 INFO L290 TraceCheckUtils]: 10: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1729#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:18,841 INFO L290 TraceCheckUtils]: 11: Hoare triple {1729#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1729#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:18,841 INFO L290 TraceCheckUtils]: 12: Hoare triple {1729#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1736#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:18,843 INFO L290 TraceCheckUtils]: 13: Hoare triple {1736#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1740#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 16:44:18,843 INFO L290 TraceCheckUtils]: 14: Hoare triple {1740#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1740#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 16:44:18,844 INFO L272 TraceCheckUtils]: 15: Hoare triple {1740#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1747#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:18,844 INFO L290 TraceCheckUtils]: 16: Hoare triple {1747#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1751#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:18,844 INFO L290 TraceCheckUtils]: 17: Hoare triple {1751#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1680#false} is VALID [2022-04-27 16:44:18,845 INFO L290 TraceCheckUtils]: 18: Hoare triple {1680#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1680#false} is VALID [2022-04-27 16:44:18,845 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:44:18,845 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:44:21,626 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296))) (.cse1 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (and (or (not .cse0) (not (< c_main_~z~0 .cse1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296)))))) (or .cse0 (not (= .cse1 c_main_~z~0))))) (>= aux_mod_v_main_~z~0_34_31 4294967296) (= aux_mod_v_main_~z~0_34_31 (mod c_main_~n~0 4294967296)) (> 0 aux_mod_v_main_~z~0_34_31))) is different from false [2022-04-27 16:44:35,206 INFO L290 TraceCheckUtils]: 18: Hoare triple {1680#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1680#false} is VALID [2022-04-27 16:44:35,206 INFO L290 TraceCheckUtils]: 17: Hoare triple {1751#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1680#false} is VALID [2022-04-27 16:44:35,207 INFO L290 TraceCheckUtils]: 16: Hoare triple {1747#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1751#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:44:35,207 INFO L272 TraceCheckUtils]: 15: Hoare triple {1767#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1747#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:44:35,208 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1767#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:44:36,650 INFO L290 TraceCheckUtils]: 13: Hoare triple {1774#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (>= aux_mod_v_main_~z~0_34_31 4294967296) (> 0 aux_mod_v_main_~z~0_34_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (and (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0)) (< 0 (mod main_~y~0 4294967296))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1767#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:44:38,665 WARN L290 TraceCheckUtils]: 12: Hoare triple {1778#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)))))) (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1774#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (>= aux_mod_v_main_~z~0_34_31 4294967296) (> 0 aux_mod_v_main_~z~0_34_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (and (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))) (or (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0)) (< 0 (mod main_~y~0 4294967296))))))} is UNKNOWN [2022-04-27 16:44:39,054 INFO L290 TraceCheckUtils]: 11: Hoare triple {1778#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)))))) (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1778#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)))))) (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))))))} is VALID [2022-04-27 16:44:39,061 INFO L290 TraceCheckUtils]: 10: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1778#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)))))) (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))))))} is VALID [2022-04-27 16:44:39,061 INFO L290 TraceCheckUtils]: 9: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:39,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:39,062 INFO L290 TraceCheckUtils]: 7: Hoare triple {1716#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:39,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {1797#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1716#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:44:39,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {1679#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1797#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:44:39,063 INFO L272 TraceCheckUtils]: 4: Hoare triple {1679#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:39,063 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1679#true} {1679#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:39,063 INFO L290 TraceCheckUtils]: 2: Hoare triple {1679#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:39,063 INFO L290 TraceCheckUtils]: 1: Hoare triple {1679#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1679#true} is VALID [2022-04-27 16:44:39,063 INFO L272 TraceCheckUtils]: 0: Hoare triple {1679#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#true} is VALID [2022-04-27 16:44:39,063 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 1 not checked. [2022-04-27 16:44:39,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [865447797] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:44:39,063 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:44:39,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9] total 23 [2022-04-27 16:44:39,064 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389947701] [2022-04-27 16:44:39,064 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:44:39,064 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:44:39,064 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:44:39,064 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:44:45,233 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 39 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-27 16:44:45,233 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 16:44:45,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:44:45,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 16:44:45,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=355, Unknown=4, NotChecked=40, Total=506 [2022-04-27 16:44:45,234 INFO L87 Difference]: Start difference. First operand 36 states and 55 transitions. Second operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:05,671 WARN L232 SmtUtils]: Spent 19.66s on a formula simplification. DAG size of input: 50 DAG size of output: 50 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 16:45:08,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:08,191 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-27 16:45:08,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-27 16:45:08,191 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:45:08,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:45:08,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:08,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 67 transitions. [2022-04-27 16:45:08,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:08,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 67 transitions. [2022-04-27 16:45:08,194 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 67 transitions. [2022-04-27 16:45:10,365 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 66 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 16:45:10,371 INFO L225 Difference]: With dead ends: 55 [2022-04-27 16:45:10,371 INFO L226 Difference]: Without dead ends: 51 [2022-04-27 16:45:10,372 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 32 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 282 ImplicationChecksByTransitivity, 33.5s TimeCoverageRelationStatistics Valid=240, Invalid=815, Unknown=5, NotChecked=62, Total=1122 [2022-04-27 16:45:10,374 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 68 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 173 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 45 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:45:10,374 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [68 Valid, 77 Invalid, 173 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 106 Invalid, 0 Unknown, 45 Unchecked, 0.2s Time] [2022-04-27 16:45:10,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-27 16:45:10,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 38. [2022-04-27 16:45:10,379 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:45:10,379 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:10,379 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:10,379 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:10,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:10,380 INFO L93 Difference]: Finished difference Result 51 states and 80 transitions. [2022-04-27 16:45:10,380 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 80 transitions. [2022-04-27 16:45:10,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:45:10,381 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:45:10,381 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-27 16:45:10,381 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-27 16:45:10,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:10,382 INFO L93 Difference]: Finished difference Result 51 states and 80 transitions. [2022-04-27 16:45:10,382 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 80 transitions. [2022-04-27 16:45:10,382 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:45:10,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:45:10,382 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:45:10,382 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:45:10,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:10,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 59 transitions. [2022-04-27 16:45:10,383 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 59 transitions. Word has length 19 [2022-04-27 16:45:10,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:45:10,384 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 59 transitions. [2022-04-27 16:45:10,384 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:10,384 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 59 transitions. [2022-04-27 16:45:10,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:45:10,384 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:45:10,384 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:45:10,402 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 16:45:10,599 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:45:10,600 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:45:10,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:45:10,600 INFO L85 PathProgramCache]: Analyzing trace with hash 1868584369, now seen corresponding path program 1 times [2022-04-27 16:45:10,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:45:10,600 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753448736] [2022-04-27 16:45:10,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:45:10,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:45:10,608 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:10,609 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:10,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:10,621 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:10,623 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:10,901 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:45:10,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:10,904 INFO L290 TraceCheckUtils]: 0: Hoare triple {2050#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2037#true} is VALID [2022-04-27 16:45:10,905 INFO L290 TraceCheckUtils]: 1: Hoare triple {2037#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:10,905 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2037#true} {2037#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:10,905 INFO L272 TraceCheckUtils]: 0: Hoare triple {2037#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2050#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:45:10,905 INFO L290 TraceCheckUtils]: 1: Hoare triple {2050#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2037#true} is VALID [2022-04-27 16:45:10,905 INFO L290 TraceCheckUtils]: 2: Hoare triple {2037#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:10,905 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2037#true} {2037#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:10,906 INFO L272 TraceCheckUtils]: 4: Hoare triple {2037#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:10,906 INFO L290 TraceCheckUtils]: 5: Hoare triple {2037#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2042#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-27 16:45:10,907 INFO L290 TraceCheckUtils]: 6: Hoare triple {2042#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2043#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:10,907 INFO L290 TraceCheckUtils]: 7: Hoare triple {2043#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2044#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:10,908 INFO L290 TraceCheckUtils]: 8: Hoare triple {2044#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2044#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:10,909 INFO L290 TraceCheckUtils]: 9: Hoare triple {2044#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2045#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:10,909 INFO L290 TraceCheckUtils]: 10: Hoare triple {2045#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2045#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:10,909 INFO L290 TraceCheckUtils]: 11: Hoare triple {2045#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2045#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:10,911 INFO L290 TraceCheckUtils]: 12: Hoare triple {2045#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2046#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:45:10,911 INFO L290 TraceCheckUtils]: 13: Hoare triple {2046#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2047#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:45:10,912 INFO L290 TraceCheckUtils]: 14: Hoare triple {2047#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2047#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:45:10,913 INFO L272 TraceCheckUtils]: 15: Hoare triple {2047#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2048#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:45:10,913 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2049#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:45:10,913 INFO L290 TraceCheckUtils]: 17: Hoare triple {2049#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2038#false} is VALID [2022-04-27 16:45:10,914 INFO L290 TraceCheckUtils]: 18: Hoare triple {2038#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2038#false} is VALID [2022-04-27 16:45:10,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:45:10,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:45:10,914 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753448736] [2022-04-27 16:45:10,914 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [753448736] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:45:10,914 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1824522211] [2022-04-27 16:45:10,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:45:10,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:45:10,914 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:45:10,915 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:45:10,916 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 16:45:10,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:10,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:45:10,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:10,950 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:45:11,775 INFO L272 TraceCheckUtils]: 0: Hoare triple {2037#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:11,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {2037#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2037#true} is VALID [2022-04-27 16:45:11,776 INFO L290 TraceCheckUtils]: 2: Hoare triple {2037#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:11,776 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2037#true} {2037#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:11,776 INFO L272 TraceCheckUtils]: 4: Hoare triple {2037#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2037#true} is VALID [2022-04-27 16:45:11,776 INFO L290 TraceCheckUtils]: 5: Hoare triple {2037#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2069#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:45:11,776 INFO L290 TraceCheckUtils]: 6: Hoare triple {2069#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,777 INFO L290 TraceCheckUtils]: 7: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,777 INFO L290 TraceCheckUtils]: 9: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,779 INFO L290 TraceCheckUtils]: 11: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,779 INFO L290 TraceCheckUtils]: 12: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2073#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:11,780 INFO L290 TraceCheckUtils]: 13: Hoare triple {2073#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2095#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:45:11,780 INFO L290 TraceCheckUtils]: 14: Hoare triple {2095#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2095#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:45:11,781 INFO L272 TraceCheckUtils]: 15: Hoare triple {2095#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2102#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:45:11,782 INFO L290 TraceCheckUtils]: 16: Hoare triple {2102#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2106#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:45:11,782 INFO L290 TraceCheckUtils]: 17: Hoare triple {2106#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2038#false} is VALID [2022-04-27 16:45:11,782 INFO L290 TraceCheckUtils]: 18: Hoare triple {2038#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2038#false} is VALID [2022-04-27 16:45:11,782 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:45:11,782 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:45:11,782 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1824522211] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:45:11,782 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:45:11,782 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 16 [2022-04-27 16:45:11,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034468716] [2022-04-27 16:45:11,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:45:11,783 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:45:11,783 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:45:11,783 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:11,806 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:45:11,806 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:45:11,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:45:11,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:45:11,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-27 16:45:11,806 INFO L87 Difference]: Start difference. First operand 38 states and 59 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:12,068 INFO L93 Difference]: Finished difference Result 45 states and 67 transitions. [2022-04-27 16:45:12,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:45:12,068 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:45:12,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:45:12,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-27 16:45:12,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-27 16:45:12,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-27 16:45:12,114 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:45:12,115 INFO L225 Difference]: With dead ends: 45 [2022-04-27 16:45:12,115 INFO L226 Difference]: Without dead ends: 42 [2022-04-27 16:45:12,115 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=78, Invalid=264, Unknown=0, NotChecked=0, Total=342 [2022-04-27 16:45:12,115 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:45:12,116 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 64 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-27 16:45:12,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-27 16:45:12,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 37. [2022-04-27 16:45:12,117 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:45:12,117 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,118 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,118 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:12,120 INFO L93 Difference]: Finished difference Result 42 states and 64 transitions. [2022-04-27 16:45:12,120 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-27 16:45:12,120 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:45:12,120 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:45:12,120 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-27 16:45:12,120 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-27 16:45:12,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:12,121 INFO L93 Difference]: Finished difference Result 42 states and 64 transitions. [2022-04-27 16:45:12,121 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-27 16:45:12,121 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:45:12,121 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:45:12,121 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:45:12,121 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:45:12,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 57 transitions. [2022-04-27 16:45:12,122 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 57 transitions. Word has length 19 [2022-04-27 16:45:12,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:45:12,122 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 57 transitions. [2022-04-27 16:45:12,122 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:12,122 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 57 transitions. [2022-04-27 16:45:12,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:45:12,122 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:45:12,123 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:45:12,138 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 16:45:12,342 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-27 16:45:12,343 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:45:12,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:45:12,343 INFO L85 PathProgramCache]: Analyzing trace with hash 61379980, now seen corresponding path program 1 times [2022-04-27 16:45:12,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:45:12,343 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126997048] [2022-04-27 16:45:12,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:45:12,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:45:12,351 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:12,353 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:45:12,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:12,370 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:12,383 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:45:12,769 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:45:12,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:12,773 INFO L290 TraceCheckUtils]: 0: Hoare triple {2296#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2284#true} is VALID [2022-04-27 16:45:12,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {2284#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:12,773 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2284#true} {2284#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:12,774 INFO L272 TraceCheckUtils]: 0: Hoare triple {2284#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2296#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:45:12,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {2296#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2284#true} is VALID [2022-04-27 16:45:12,774 INFO L290 TraceCheckUtils]: 2: Hoare triple {2284#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:12,774 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2284#true} {2284#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:12,774 INFO L272 TraceCheckUtils]: 4: Hoare triple {2284#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:12,775 INFO L290 TraceCheckUtils]: 5: Hoare triple {2284#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2289#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-27 16:45:12,776 INFO L290 TraceCheckUtils]: 6: Hoare triple {2289#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2290#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:12,776 INFO L290 TraceCheckUtils]: 7: Hoare triple {2290#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2291#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:12,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {2291#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:12,778 INFO L290 TraceCheckUtils]: 9: Hoare triple {2291#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2292#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:45:12,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {2292#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2292#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:45:12,779 INFO L290 TraceCheckUtils]: 11: Hoare triple {2292#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:12,783 INFO L290 TraceCheckUtils]: 12: Hoare triple {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:12,784 INFO L290 TraceCheckUtils]: 13: Hoare triple {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:12,784 INFO L290 TraceCheckUtils]: 14: Hoare triple {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:12,785 INFO L272 TraceCheckUtils]: 15: Hoare triple {2293#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2294#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:45:12,786 INFO L290 TraceCheckUtils]: 16: Hoare triple {2294#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2295#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:45:12,787 INFO L290 TraceCheckUtils]: 17: Hoare triple {2295#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2285#false} is VALID [2022-04-27 16:45:12,787 INFO L290 TraceCheckUtils]: 18: Hoare triple {2285#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2285#false} is VALID [2022-04-27 16:45:12,787 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:45:12,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:45:12,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126997048] [2022-04-27 16:45:12,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1126997048] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:45:12,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1292676103] [2022-04-27 16:45:12,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:45:12,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:45:12,788 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:45:12,788 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:45:12,789 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 16:45:12,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:12,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:45:12,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:12,836 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:45:13,939 INFO L272 TraceCheckUtils]: 0: Hoare triple {2284#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:13,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {2284#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2284#true} is VALID [2022-04-27 16:45:13,939 INFO L290 TraceCheckUtils]: 2: Hoare triple {2284#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:13,939 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2284#true} {2284#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:13,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {2284#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2284#true} is VALID [2022-04-27 16:45:13,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {2284#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2315#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:45:13,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {2315#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:13,941 INFO L290 TraceCheckUtils]: 7: Hoare triple {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:13,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:13,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:13,942 INFO L290 TraceCheckUtils]: 10: Hoare triple {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:13,943 INFO L290 TraceCheckUtils]: 11: Hoare triple {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:45:13,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {2319#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2338#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:45:13,944 INFO L290 TraceCheckUtils]: 13: Hoare triple {2338#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2342#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:45:13,944 INFO L290 TraceCheckUtils]: 14: Hoare triple {2342#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2342#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:45:13,945 INFO L272 TraceCheckUtils]: 15: Hoare triple {2342#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2349#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:45:13,945 INFO L290 TraceCheckUtils]: 16: Hoare triple {2349#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2353#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:45:13,946 INFO L290 TraceCheckUtils]: 17: Hoare triple {2353#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2285#false} is VALID [2022-04-27 16:45:13,946 INFO L290 TraceCheckUtils]: 18: Hoare triple {2285#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2285#false} is VALID [2022-04-27 16:45:13,946 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:45:13,946 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:45:13,946 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1292676103] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:45:13,946 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:45:13,946 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 16 [2022-04-27 16:45:13,946 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106229707] [2022-04-27 16:45:13,946 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:45:13,947 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:45:13,947 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:45:13,948 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:13,969 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:45:13,970 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:45:13,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:45:13,970 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:45:13,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-27 16:45:13,970 INFO L87 Difference]: Start difference. First operand 37 states and 57 transitions. Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:14,244 INFO L93 Difference]: Finished difference Result 46 states and 70 transitions. [2022-04-27 16:45:14,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 16:45:14,245 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:45:14,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:45:14,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-27 16:45:14,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-27 16:45:14,246 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 45 transitions. [2022-04-27 16:45:14,295 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:45:14,295 INFO L225 Difference]: With dead ends: 46 [2022-04-27 16:45:14,295 INFO L226 Difference]: Without dead ends: 43 [2022-04-27 16:45:14,296 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:45:14,296 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 25 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:45:14,296 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 63 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 25 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-27 16:45:14,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-04-27 16:45:14,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 35. [2022-04-27 16:45:14,298 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:45:14,298 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,299 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,299 INFO L87 Difference]: Start difference. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:14,299 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2022-04-27 16:45:14,299 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 67 transitions. [2022-04-27 16:45:14,300 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:45:14,300 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:45:14,300 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-27 16:45:14,300 INFO L87 Difference]: Start difference. First operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-27 16:45:14,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:45:14,301 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2022-04-27 16:45:14,301 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 67 transitions. [2022-04-27 16:45:14,301 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:45:14,301 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:45:14,301 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:45:14,301 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:45:14,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 53 transitions. [2022-04-27 16:45:14,302 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 53 transitions. Word has length 19 [2022-04-27 16:45:14,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:45:14,302 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 53 transitions. [2022-04-27 16:45:14,302 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:45:14,302 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-27 16:45:14,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:45:14,302 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:45:14,302 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:45:14,318 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 16:45:14,518 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:45:14,519 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:45:14,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:45:14,519 INFO L85 PathProgramCache]: Analyzing trace with hash 353225841, now seen corresponding path program 2 times [2022-04-27 16:45:14,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:45:14,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489225161] [2022-04-27 16:45:14,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:45:14,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:45:14,526 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:14,527 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_12 .cse0 (* (- 4294967296) (div (+ main_~y~0_12 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:14,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:14,538 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:14,539 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_12 .cse0 (* (- 4294967296) (div (+ main_~y~0_12 .cse0) 4294967296)))) 0)) [2022-04-27 16:45:14,801 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:45:14,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:14,816 INFO L290 TraceCheckUtils]: 0: Hoare triple {2542#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2530#true} is VALID [2022-04-27 16:45:14,816 INFO L290 TraceCheckUtils]: 1: Hoare triple {2530#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:14,816 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2530#true} {2530#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:14,817 INFO L272 TraceCheckUtils]: 0: Hoare triple {2530#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2542#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:45:14,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {2542#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2530#true} is VALID [2022-04-27 16:45:14,817 INFO L290 TraceCheckUtils]: 2: Hoare triple {2530#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:14,817 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2530#true} {2530#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:14,817 INFO L272 TraceCheckUtils]: 4: Hoare triple {2530#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:14,817 INFO L290 TraceCheckUtils]: 5: Hoare triple {2530#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2535#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,818 INFO L290 TraceCheckUtils]: 6: Hoare triple {2535#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2536#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,818 INFO L290 TraceCheckUtils]: 7: Hoare triple {2536#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2537#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,819 INFO L290 TraceCheckUtils]: 8: Hoare triple {2537#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2537#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,819 INFO L290 TraceCheckUtils]: 9: Hoare triple {2537#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2537#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,820 INFO L290 TraceCheckUtils]: 10: Hoare triple {2537#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,821 INFO L290 TraceCheckUtils]: 11: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,822 INFO L290 TraceCheckUtils]: 12: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:14,823 INFO L290 TraceCheckUtils]: 13: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:14,824 INFO L290 TraceCheckUtils]: 14: Hoare triple {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:14,825 INFO L272 TraceCheckUtils]: 15: Hoare triple {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2540#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:45:14,826 INFO L290 TraceCheckUtils]: 16: Hoare triple {2540#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2541#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:45:14,826 INFO L290 TraceCheckUtils]: 17: Hoare triple {2541#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2531#false} is VALID [2022-04-27 16:45:14,826 INFO L290 TraceCheckUtils]: 18: Hoare triple {2531#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2531#false} is VALID [2022-04-27 16:45:14,826 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:45:14,826 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:45:14,826 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489225161] [2022-04-27 16:45:14,826 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [489225161] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:45:14,826 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1908533262] [2022-04-27 16:45:14,826 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:45:14,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:45:14,827 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:45:14,827 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:45:14,829 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 16:45:14,856 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:45:14,856 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:45:14,857 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 16:45:14,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:45:14,878 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:45:15,384 INFO L272 TraceCheckUtils]: 0: Hoare triple {2530#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:15,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {2530#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2530#true} is VALID [2022-04-27 16:45:15,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {2530#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:15,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2530#true} {2530#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:15,385 INFO L272 TraceCheckUtils]: 4: Hoare triple {2530#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:45:15,385 INFO L290 TraceCheckUtils]: 5: Hoare triple {2530#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2535#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,386 INFO L290 TraceCheckUtils]: 6: Hoare triple {2535#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2564#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,386 INFO L290 TraceCheckUtils]: 7: Hoare triple {2564#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,387 INFO L290 TraceCheckUtils]: 8: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,387 INFO L290 TraceCheckUtils]: 9: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,388 INFO L290 TraceCheckUtils]: 10: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,388 INFO L290 TraceCheckUtils]: 11: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,389 INFO L290 TraceCheckUtils]: 12: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:45:15,390 INFO L290 TraceCheckUtils]: 13: Hoare triple {2538#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:15,390 INFO L290 TraceCheckUtils]: 14: Hoare triple {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:45:15,391 INFO L272 TraceCheckUtils]: 15: Hoare triple {2539#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2592#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:45:15,392 INFO L290 TraceCheckUtils]: 16: Hoare triple {2592#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2596#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:45:15,392 INFO L290 TraceCheckUtils]: 17: Hoare triple {2596#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2531#false} is VALID [2022-04-27 16:45:15,392 INFO L290 TraceCheckUtils]: 18: Hoare triple {2531#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2531#false} is VALID [2022-04-27 16:45:15,392 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:45:15,392 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:45:18,230 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= aux_mod_v_main_~z~0_40_31 (mod c_main_~n~0 4294967296)) (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296))) (.cse1 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (and (or (not .cse0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296))))) (not (< c_main_~z~0 .cse1))) (or .cse0 (not (= .cse1 c_main_~z~0))))) (> 0 aux_mod_v_main_~z~0_40_31))) is different from false [2022-04-27 16:46:01,810 INFO L290 TraceCheckUtils]: 18: Hoare triple {2531#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2531#false} is VALID [2022-04-27 16:46:01,810 INFO L290 TraceCheckUtils]: 17: Hoare triple {2596#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2531#false} is VALID [2022-04-27 16:46:01,811 INFO L290 TraceCheckUtils]: 16: Hoare triple {2592#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2596#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:46:01,811 INFO L272 TraceCheckUtils]: 15: Hoare triple {2612#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2592#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:46:01,812 INFO L290 TraceCheckUtils]: 14: Hoare triple {2612#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2612#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:46:03,861 WARN L290 TraceCheckUtils]: 13: Hoare triple {2619#(forall ((aux_mod_v_main_~z~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2612#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-27 16:46:06,027 WARN L290 TraceCheckUtils]: 12: Hoare triple {2623#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2619#(forall ((aux_mod_v_main_~z~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-27 16:46:08,073 WARN L290 TraceCheckUtils]: 11: Hoare triple {2623#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2623#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-27 16:46:10,100 WARN L290 TraceCheckUtils]: 10: Hoare triple {2623#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2623#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-27 16:46:10,115 INFO L290 TraceCheckUtils]: 9: Hoare triple {2633#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2623#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is VALID [2022-04-27 16:46:10,119 INFO L290 TraceCheckUtils]: 8: Hoare triple {2633#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2633#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:46:10,121 INFO L290 TraceCheckUtils]: 7: Hoare triple {2640#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2633#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:46:10,122 INFO L290 TraceCheckUtils]: 6: Hoare triple {2644#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2640#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:46:10,123 INFO L290 TraceCheckUtils]: 5: Hoare triple {2530#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2644#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:46:10,123 INFO L272 TraceCheckUtils]: 4: Hoare triple {2530#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:46:10,123 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2530#true} {2530#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:46:10,123 INFO L290 TraceCheckUtils]: 2: Hoare triple {2530#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:46:10,123 INFO L290 TraceCheckUtils]: 1: Hoare triple {2530#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2530#true} is VALID [2022-04-27 16:46:10,123 INFO L272 TraceCheckUtils]: 0: Hoare triple {2530#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2530#true} is VALID [2022-04-27 16:46:10,124 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-04-27 16:46:10,124 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1908533262] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:46:10,124 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:46:10,124 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 10] total 19 [2022-04-27 16:46:10,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695573909] [2022-04-27 16:46:10,124 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:46:10,125 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:46:10,125 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:46:10,125 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:18,335 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 36 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-27 16:46:18,336 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 16:46:18,336 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:46:18,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 16:46:18,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=230, Unknown=12, NotChecked=32, Total=342 [2022-04-27 16:46:18,336 INFO L87 Difference]: Start difference. First operand 35 states and 53 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:46:23,610 INFO L93 Difference]: Finished difference Result 50 states and 76 transitions. [2022-04-27 16:46:23,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 16:46:23,610 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:46:23,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:46:23,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 16:46:23,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 16:46:23,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-27 16:46:23,657 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:46:23,657 INFO L225 Difference]: With dead ends: 50 [2022-04-27 16:46:23,657 INFO L226 Difference]: Without dead ends: 44 [2022-04-27 16:46:23,657 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 30 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 32.6s TimeCoverageRelationStatistics Valid=123, Invalid=419, Unknown=14, NotChecked=44, Total=600 [2022-04-27 16:46:23,658 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 41 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 39 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:46:23,658 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 55 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 95 Invalid, 0 Unknown, 39 Unchecked, 0.2s Time] [2022-04-27 16:46:23,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-27 16:46:23,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 38. [2022-04-27 16:46:23,659 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:46:23,660 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,660 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,660 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:46:23,661 INFO L93 Difference]: Finished difference Result 44 states and 69 transitions. [2022-04-27 16:46:23,661 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 69 transitions. [2022-04-27 16:46:23,661 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:46:23,661 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:46:23,661 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-27 16:46:23,661 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-27 16:46:23,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:46:23,662 INFO L93 Difference]: Finished difference Result 44 states and 69 transitions. [2022-04-27 16:46:23,662 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 69 transitions. [2022-04-27 16:46:23,662 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:46:23,662 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:46:23,662 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:46:23,662 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:46:23,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 58 transitions. [2022-04-27 16:46:23,663 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 58 transitions. Word has length 19 [2022-04-27 16:46:23,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:46:23,663 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 58 transitions. [2022-04-27 16:46:23,663 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:46:23,663 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 58 transitions. [2022-04-27 16:46:23,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:46:23,663 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:46:23,663 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:46:23,679 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 16:46:23,869 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-27 16:46:23,869 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:46:23,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:46:23,870 INFO L85 PathProgramCache]: Analyzing trace with hash -1453978548, now seen corresponding path program 1 times [2022-04-27 16:46:23,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:46:23,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342659438] [2022-04-27 16:46:23,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:46:23,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:46:23,878 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:46:23,878 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:46:23,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:46:23,888 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:46:23,890 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:46:24,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:46:24,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:46:24,305 INFO L290 TraceCheckUtils]: 0: Hoare triple {2869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2856#true} is VALID [2022-04-27 16:46:24,305 INFO L290 TraceCheckUtils]: 1: Hoare triple {2856#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:24,305 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2856#true} {2856#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:24,306 INFO L272 TraceCheckUtils]: 0: Hoare triple {2856#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:46:24,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {2869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2856#true} is VALID [2022-04-27 16:46:24,306 INFO L290 TraceCheckUtils]: 2: Hoare triple {2856#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:24,306 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2856#true} {2856#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:24,306 INFO L272 TraceCheckUtils]: 4: Hoare triple {2856#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:24,307 INFO L290 TraceCheckUtils]: 5: Hoare triple {2856#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2861#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:46:24,307 INFO L290 TraceCheckUtils]: 6: Hoare triple {2861#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2862#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:46:24,308 INFO L290 TraceCheckUtils]: 7: Hoare triple {2862#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2863#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:46:24,308 INFO L290 TraceCheckUtils]: 8: Hoare triple {2863#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2863#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:46:24,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {2863#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2864#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:46:24,309 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2864#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:46:24,311 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2865#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-27 16:46:24,311 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2865#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-27 16:46:24,313 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2866#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:46:24,314 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2866#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:46:24,315 INFO L272 TraceCheckUtils]: 15: Hoare triple {2866#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2867#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:46:24,315 INFO L290 TraceCheckUtils]: 16: Hoare triple {2867#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2868#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:46:24,316 INFO L290 TraceCheckUtils]: 17: Hoare triple {2868#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2857#false} is VALID [2022-04-27 16:46:24,316 INFO L290 TraceCheckUtils]: 18: Hoare triple {2857#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2857#false} is VALID [2022-04-27 16:46:24,316 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:46:24,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:46:24,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342659438] [2022-04-27 16:46:24,316 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1342659438] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:46:24,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [898062868] [2022-04-27 16:46:24,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:46:24,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:46:24,316 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:46:24,317 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:46:24,318 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 16:46:24,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:46:24,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:46:24,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:46:24,362 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:46:25,505 INFO L272 TraceCheckUtils]: 0: Hoare triple {2856#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:25,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {2856#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2856#true} is VALID [2022-04-27 16:46:25,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {2856#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:25,505 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2856#true} {2856#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:25,505 INFO L272 TraceCheckUtils]: 4: Hoare triple {2856#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:25,506 INFO L290 TraceCheckUtils]: 5: Hoare triple {2856#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2888#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:46:25,506 INFO L290 TraceCheckUtils]: 6: Hoare triple {2888#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2892#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:46:25,506 INFO L290 TraceCheckUtils]: 7: Hoare triple {2892#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2892#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:46:25,507 INFO L290 TraceCheckUtils]: 8: Hoare triple {2892#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2892#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:46:25,507 INFO L290 TraceCheckUtils]: 9: Hoare triple {2892#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2902#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:46:25,507 INFO L290 TraceCheckUtils]: 10: Hoare triple {2902#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2902#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:46:25,508 INFO L290 TraceCheckUtils]: 11: Hoare triple {2902#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2902#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:46:25,508 INFO L290 TraceCheckUtils]: 12: Hoare triple {2902#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2912#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:46:25,510 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2916#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 16:46:25,510 INFO L290 TraceCheckUtils]: 14: Hoare triple {2916#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2916#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 16:46:25,511 INFO L272 TraceCheckUtils]: 15: Hoare triple {2916#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2923#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:46:25,511 INFO L290 TraceCheckUtils]: 16: Hoare triple {2923#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2927#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:46:25,512 INFO L290 TraceCheckUtils]: 17: Hoare triple {2927#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2857#false} is VALID [2022-04-27 16:46:25,512 INFO L290 TraceCheckUtils]: 18: Hoare triple {2857#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2857#false} is VALID [2022-04-27 16:46:25,512 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:46:25,512 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:46:28,359 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_v_main_~z~0_45_31 Int)) (or (let ((.cse1 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse0 (not (= .cse1 c_main_~z~0))) (or (not (< c_main_~z~0 .cse1)) (not .cse0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296)))))))) (= aux_mod_v_main_~z~0_45_31 (mod c_main_~n~0 4294967296)) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296))) is different from false [2022-04-27 16:46:46,447 INFO L290 TraceCheckUtils]: 18: Hoare triple {2857#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2857#false} is VALID [2022-04-27 16:46:46,448 INFO L290 TraceCheckUtils]: 17: Hoare triple {2927#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2857#false} is VALID [2022-04-27 16:46:46,448 INFO L290 TraceCheckUtils]: 16: Hoare triple {2923#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2927#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:46:46,449 INFO L272 TraceCheckUtils]: 15: Hoare triple {2943#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2923#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:46:46,449 INFO L290 TraceCheckUtils]: 14: Hoare triple {2943#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2943#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:46:48,488 WARN L290 TraceCheckUtils]: 13: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_v_main_~z~0_45_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))) (or (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2943#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-27 16:46:50,503 WARN L290 TraceCheckUtils]: 12: Hoare triple {2954#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_v_main_~z~0_45_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))) (or (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296)))} is UNKNOWN [2022-04-27 16:46:52,544 WARN L290 TraceCheckUtils]: 11: Hoare triple {2954#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2954#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is UNKNOWN [2022-04-27 16:46:53,131 INFO L290 TraceCheckUtils]: 10: Hoare triple {2954#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2954#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is VALID [2022-04-27 16:46:53,142 INFO L290 TraceCheckUtils]: 9: Hoare triple {2892#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2954#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is VALID [2022-04-27 16:46:53,142 INFO L290 TraceCheckUtils]: 8: Hoare triple {2892#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2892#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:46:53,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {2892#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2892#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:46:53,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {2973#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2892#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:46:53,143 INFO L290 TraceCheckUtils]: 5: Hoare triple {2856#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2973#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:46:53,143 INFO L272 TraceCheckUtils]: 4: Hoare triple {2856#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:53,143 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2856#true} {2856#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:53,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {2856#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:53,144 INFO L290 TraceCheckUtils]: 1: Hoare triple {2856#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2856#true} is VALID [2022-04-27 16:46:53,144 INFO L272 TraceCheckUtils]: 0: Hoare triple {2856#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2856#true} is VALID [2022-04-27 16:46:53,144 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 1 not checked. [2022-04-27 16:46:53,144 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [898062868] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:46:53,144 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:46:53,144 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 22 [2022-04-27 16:46:53,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1699511870] [2022-04-27 16:46:53,144 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:46:53,145 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:46:53,145 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:46:53,145 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:01,183 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-27 16:47:01,183 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 16:47:01,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:47:01,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 16:47:01,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=329, Unknown=4, NotChecked=38, Total=462 [2022-04-27 16:47:01,184 INFO L87 Difference]: Start difference. First operand 38 states and 58 transitions. Second operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:25,885 WARN L232 SmtUtils]: Spent 19.42s on a formula simplification. DAG size of input: 50 DAG size of output: 50 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 16:47:29,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:47:29,587 INFO L93 Difference]: Finished difference Result 52 states and 79 transitions. [2022-04-27 16:47:29,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-27 16:47:29,587 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:47:29,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:47:29,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:29,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 55 transitions. [2022-04-27 16:47:29,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:29,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 55 transitions. [2022-04-27 16:47:29,590 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 55 transitions. [2022-04-27 16:47:31,742 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 54 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 16:47:31,742 INFO L225 Difference]: With dead ends: 52 [2022-04-27 16:47:31,742 INFO L226 Difference]: Without dead ends: 48 [2022-04-27 16:47:31,743 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 41.0s TimeCoverageRelationStatistics Valid=217, Invalid=774, Unknown=5, NotChecked=60, Total=1056 [2022-04-27 16:47:31,744 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 40 mSDsluCounter, 85 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 210 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 43 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 16:47:31,744 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 97 Invalid, 210 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 150 Invalid, 0 Unknown, 43 Unchecked, 0.5s Time] [2022-04-27 16:47:31,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-27 16:47:31,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 39. [2022-04-27 16:47:31,747 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:47:31,747 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:31,747 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:31,747 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:31,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:47:31,749 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-27 16:47:31,749 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-27 16:47:31,749 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:47:31,749 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:47:31,749 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-27 16:47:31,752 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-27 16:47:31,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:47:31,753 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-27 16:47:31,753 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-27 16:47:31,753 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:47:31,753 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:47:31,753 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:47:31,753 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:47:31,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:31,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 60 transitions. [2022-04-27 16:47:31,754 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 60 transitions. Word has length 19 [2022-04-27 16:47:31,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:47:31,754 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 60 transitions. [2022-04-27 16:47:31,754 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:47:31,754 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 60 transitions. [2022-04-27 16:47:31,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:47:31,756 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:47:31,756 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:47:31,772 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-27 16:47:31,963 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 16:47:31,963 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:47:31,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:47:31,964 INFO L85 PathProgramCache]: Analyzing trace with hash -1642739759, now seen corresponding path program 1 times [2022-04-27 16:47:31,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:47:31,964 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382508214] [2022-04-27 16:47:31,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:47:31,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:47:31,971 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:47:31,972 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_10 .cse0 (* (- 4294967296) (div (+ main_~y~0_10 .cse0) 4294967296)))) 0)) [2022-04-27 16:47:31,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:47:31,982 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:47:31,989 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_10 .cse0 (* (- 4294967296) (div (+ main_~y~0_10 .cse0) 4294967296)))) 0)) [2022-04-27 16:47:32,663 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:47:32,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:47:32,667 INFO L290 TraceCheckUtils]: 0: Hoare triple {3215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3203#true} is VALID [2022-04-27 16:47:32,667 INFO L290 TraceCheckUtils]: 1: Hoare triple {3203#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:32,667 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3203#true} {3203#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:32,668 INFO L272 TraceCheckUtils]: 0: Hoare triple {3203#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:47:32,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {3215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3203#true} is VALID [2022-04-27 16:47:32,668 INFO L290 TraceCheckUtils]: 2: Hoare triple {3203#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:32,668 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3203#true} {3203#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:32,668 INFO L272 TraceCheckUtils]: 4: Hoare triple {3203#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:32,669 INFO L290 TraceCheckUtils]: 5: Hoare triple {3203#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3208#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:32,670 INFO L290 TraceCheckUtils]: 6: Hoare triple {3208#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3209#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:32,670 INFO L290 TraceCheckUtils]: 7: Hoare triple {3209#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:32,670 INFO L290 TraceCheckUtils]: 8: Hoare triple {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:32,671 INFO L290 TraceCheckUtils]: 9: Hoare triple {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:32,672 INFO L290 TraceCheckUtils]: 10: Hoare triple {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-27 16:47:32,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-27 16:47:32,673 INFO L290 TraceCheckUtils]: 12: Hoare triple {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-27 16:47:32,675 INFO L290 TraceCheckUtils]: 13: Hoare triple {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:47:32,675 INFO L290 TraceCheckUtils]: 14: Hoare triple {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:47:32,676 INFO L272 TraceCheckUtils]: 15: Hoare triple {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3213#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:47:32,677 INFO L290 TraceCheckUtils]: 16: Hoare triple {3213#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3214#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:47:32,677 INFO L290 TraceCheckUtils]: 17: Hoare triple {3214#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3204#false} is VALID [2022-04-27 16:47:32,677 INFO L290 TraceCheckUtils]: 18: Hoare triple {3204#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3204#false} is VALID [2022-04-27 16:47:32,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:47:32,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:47:32,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382508214] [2022-04-27 16:47:32,677 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [382508214] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:47:32,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1992999888] [2022-04-27 16:47:32,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:47:32,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:47:32,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:47:32,678 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:47:32,679 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 16:47:32,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:47:32,708 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 16:47:32,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:47:32,721 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:47:34,981 INFO L272 TraceCheckUtils]: 0: Hoare triple {3203#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:34,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {3203#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3203#true} is VALID [2022-04-27 16:47:34,981 INFO L290 TraceCheckUtils]: 2: Hoare triple {3203#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:34,981 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3203#true} {3203#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:34,981 INFO L272 TraceCheckUtils]: 4: Hoare triple {3203#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:47:34,982 INFO L290 TraceCheckUtils]: 5: Hoare triple {3203#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3208#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:34,983 INFO L290 TraceCheckUtils]: 6: Hoare triple {3208#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3209#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:34,983 INFO L290 TraceCheckUtils]: 7: Hoare triple {3209#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:34,983 INFO L290 TraceCheckUtils]: 8: Hoare triple {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:34,984 INFO L290 TraceCheckUtils]: 9: Hoare triple {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:47:34,986 INFO L290 TraceCheckUtils]: 10: Hoare triple {3210#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-27 16:47:34,986 INFO L290 TraceCheckUtils]: 11: Hoare triple {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-27 16:47:34,986 INFO L290 TraceCheckUtils]: 12: Hoare triple {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-27 16:47:34,988 INFO L290 TraceCheckUtils]: 13: Hoare triple {3211#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:47:34,988 INFO L290 TraceCheckUtils]: 14: Hoare triple {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:47:34,989 INFO L272 TraceCheckUtils]: 15: Hoare triple {3212#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3264#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:47:34,990 INFO L290 TraceCheckUtils]: 16: Hoare triple {3264#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3268#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:47:34,990 INFO L290 TraceCheckUtils]: 17: Hoare triple {3268#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3204#false} is VALID [2022-04-27 16:47:34,990 INFO L290 TraceCheckUtils]: 18: Hoare triple {3204#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3204#false} is VALID [2022-04-27 16:47:34,990 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:47:34,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:49:14,654 WARN L232 SmtUtils]: Spent 8.17s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 16:49:21,661 INFO L290 TraceCheckUtils]: 18: Hoare triple {3204#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3204#false} is VALID [2022-04-27 16:49:21,661 INFO L290 TraceCheckUtils]: 17: Hoare triple {3268#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3204#false} is VALID [2022-04-27 16:49:21,662 INFO L290 TraceCheckUtils]: 16: Hoare triple {3264#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3268#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:49:21,662 INFO L272 TraceCheckUtils]: 15: Hoare triple {3284#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3264#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:49:21,662 INFO L290 TraceCheckUtils]: 14: Hoare triple {3284#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3284#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:49:23,679 WARN L290 TraceCheckUtils]: 13: Hoare triple {3291#(forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))) (or (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3284#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-27 16:49:25,748 WARN L290 TraceCheckUtils]: 12: Hoare triple {3291#(forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))) (or (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3291#(forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))) (or (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-27 16:49:27,840 WARN L290 TraceCheckUtils]: 11: Hoare triple {3291#(forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))) (or (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3291#(forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))) (or (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-27 16:49:29,914 WARN L290 TraceCheckUtils]: 10: Hoare triple {3301#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3291#(forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (and (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< 0 (mod main_~y~0 4294967296))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))) (or (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0)) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-27 16:49:31,952 WARN L290 TraceCheckUtils]: 9: Hoare triple {3305#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3301#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-27 16:49:33,979 WARN L290 TraceCheckUtils]: 8: Hoare triple {3305#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3305#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-27 16:49:36,037 WARN L290 TraceCheckUtils]: 7: Hoare triple {3312#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31) (and (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))))))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3305#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-27 16:49:36,060 INFO L290 TraceCheckUtils]: 6: Hoare triple {3316#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3312#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31) (and (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:49:36,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {3203#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3316#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:49:36,062 INFO L272 TraceCheckUtils]: 4: Hoare triple {3203#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:49:36,062 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3203#true} {3203#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:49:36,062 INFO L290 TraceCheckUtils]: 2: Hoare triple {3203#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:49:36,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {3203#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3203#true} is VALID [2022-04-27 16:49:36,062 INFO L272 TraceCheckUtils]: 0: Hoare triple {3203#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3203#true} is VALID [2022-04-27 16:49:36,062 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:49:36,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1992999888] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:49:36,063 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:49:36,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 18 [2022-04-27 16:49:36,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790397636] [2022-04-27 16:49:36,063 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:49:36,063 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:49:36,063 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:49:36,064 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:49:48,748 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 29 inductive. 0 not inductive. 6 times theorem prover too weak to decide inductivity. [2022-04-27 16:49:48,749 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 16:49:48,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:49:48,749 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 16:49:48,749 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=226, Unknown=23, NotChecked=0, Total=306 [2022-04-27 16:49:48,749 INFO L87 Difference]: Start difference. First operand 39 states and 60 transitions. Second operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:15,549 INFO L93 Difference]: Finished difference Result 50 states and 77 transitions. [2022-04-27 16:50:15,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 16:50:15,550 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:15,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:50:15,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 51 transitions. [2022-04-27 16:50:15,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 51 transitions. [2022-04-27 16:50:15,554 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 51 transitions. [2022-04-27 16:50:15,604 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:15,605 INFO L225 Difference]: With dead ends: 50 [2022-04-27 16:50:15,605 INFO L226 Difference]: Without dead ends: 47 [2022-04-27 16:50:15,605 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 28 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 83.4s TimeCoverageRelationStatistics Valid=116, Invalid=456, Unknown=28, NotChecked=0, Total=600 [2022-04-27 16:50:15,606 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 40 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 177 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 61 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 16:50:15,606 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 73 Invalid, 177 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 104 Invalid, 0 Unknown, 61 Unchecked, 0.5s Time] [2022-04-27 16:50:15,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-27 16:50:15,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 41. [2022-04-27 16:50:15,607 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:50:15,607 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,607 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,608 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:15,608 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. [2022-04-27 16:50:15,608 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 74 transitions. [2022-04-27 16:50:15,608 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:15,609 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:15,609 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-27 16:50:15,609 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-27 16:50:15,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:15,609 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. [2022-04-27 16:50:15,609 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 74 transitions. [2022-04-27 16:50:15,610 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:15,610 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:15,610 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:50:15,610 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:50:15,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. [2022-04-27 16:50:15,610 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 19 [2022-04-27 16:50:15,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:50:15,611 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. [2022-04-27 16:50:15,611 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:15,611 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. [2022-04-27 16:50:15,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:50:15,611 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:50:15,611 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:50:15,627 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 16:50:15,826 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 16:50:15,826 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:50:15,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:50:15,827 INFO L85 PathProgramCache]: Analyzing trace with hash -869752682, now seen corresponding path program 1 times [2022-04-27 16:50:15,827 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:50:15,827 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647169818] [2022-04-27 16:50:15,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:15,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:50:15,834 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:50:15,834 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:15,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:15,841 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-27 16:50:15,843 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:16,558 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:50:16,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:16,563 INFO L290 TraceCheckUtils]: 0: Hoare triple {3551#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3538#true} is VALID [2022-04-27 16:50:16,563 INFO L290 TraceCheckUtils]: 1: Hoare triple {3538#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:16,563 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3538#true} {3538#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:16,564 INFO L272 TraceCheckUtils]: 0: Hoare triple {3538#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3551#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:50:16,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {3551#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3538#true} is VALID [2022-04-27 16:50:16,564 INFO L290 TraceCheckUtils]: 2: Hoare triple {3538#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:16,564 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3538#true} {3538#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:16,564 INFO L272 TraceCheckUtils]: 4: Hoare triple {3538#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:16,565 INFO L290 TraceCheckUtils]: 5: Hoare triple {3538#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3543#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:16,566 INFO L290 TraceCheckUtils]: 6: Hoare triple {3543#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3544#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:16,566 INFO L290 TraceCheckUtils]: 7: Hoare triple {3544#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3545#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:16,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {3545#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3545#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:16,567 INFO L290 TraceCheckUtils]: 9: Hoare triple {3545#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3545#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:16,567 INFO L290 TraceCheckUtils]: 10: Hoare triple {3545#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3546#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:16,568 INFO L290 TraceCheckUtils]: 11: Hoare triple {3546#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3546#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:16,569 INFO L290 TraceCheckUtils]: 12: Hoare triple {3546#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {3547#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:50:16,570 INFO L290 TraceCheckUtils]: 13: Hoare triple {3547#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3548#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:50:16,570 INFO L290 TraceCheckUtils]: 14: Hoare triple {3548#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3548#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:50:16,571 INFO L272 TraceCheckUtils]: 15: Hoare triple {3548#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3549#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:50:16,572 INFO L290 TraceCheckUtils]: 16: Hoare triple {3549#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3550#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:50:16,572 INFO L290 TraceCheckUtils]: 17: Hoare triple {3550#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3539#false} is VALID [2022-04-27 16:50:16,572 INFO L290 TraceCheckUtils]: 18: Hoare triple {3539#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3539#false} is VALID [2022-04-27 16:50:16,572 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:50:16,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:50:16,573 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647169818] [2022-04-27 16:50:16,573 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1647169818] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:50:16,573 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [904815354] [2022-04-27 16:50:16,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:16,573 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:50:16,573 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:50:16,574 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:50:16,579 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 16:50:16,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:16,606 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:50:16,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:16,614 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:50:18,744 INFO L272 TraceCheckUtils]: 0: Hoare triple {3538#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:18,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {3538#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3538#true} is VALID [2022-04-27 16:50:18,744 INFO L290 TraceCheckUtils]: 2: Hoare triple {3538#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:18,744 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3538#true} {3538#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:18,744 INFO L272 TraceCheckUtils]: 4: Hoare triple {3538#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3538#true} is VALID [2022-04-27 16:50:18,745 INFO L290 TraceCheckUtils]: 5: Hoare triple {3538#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3570#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:50:18,745 INFO L290 TraceCheckUtils]: 6: Hoare triple {3570#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:18,745 INFO L290 TraceCheckUtils]: 7: Hoare triple {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:18,746 INFO L290 TraceCheckUtils]: 8: Hoare triple {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:18,746 INFO L290 TraceCheckUtils]: 9: Hoare triple {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:18,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-27 16:50:18,748 INFO L290 TraceCheckUtils]: 11: Hoare triple {3574#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3590#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:18,748 INFO L290 TraceCheckUtils]: 12: Hoare triple {3590#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {3590#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:18,748 INFO L290 TraceCheckUtils]: 13: Hoare triple {3590#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3597#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:18,749 INFO L290 TraceCheckUtils]: 14: Hoare triple {3597#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3597#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:18,750 INFO L272 TraceCheckUtils]: 15: Hoare triple {3597#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3604#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:50:18,750 INFO L290 TraceCheckUtils]: 16: Hoare triple {3604#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3608#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:50:18,751 INFO L290 TraceCheckUtils]: 17: Hoare triple {3608#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3539#false} is VALID [2022-04-27 16:50:18,751 INFO L290 TraceCheckUtils]: 18: Hoare triple {3539#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3539#false} is VALID [2022-04-27 16:50:18,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:50:18,751 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:50:18,751 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [904815354] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:50:18,751 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:50:18,751 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17 [2022-04-27 16:50:18,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660743650] [2022-04-27 16:50:18,751 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:50:18,752 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:18,752 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:50:18,752 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:18,767 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:18,767 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:50:18,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:50:18,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:50:18,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2022-04-27 16:50:18,768 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:19,623 INFO L93 Difference]: Finished difference Result 51 states and 77 transitions. [2022-04-27 16:50:19,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:50:19,623 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:19,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:50:19,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-27 16:50:19,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-27 16:50:19,624 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 45 transitions. [2022-04-27 16:50:19,673 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:19,674 INFO L225 Difference]: With dead ends: 51 [2022-04-27 16:50:19,674 INFO L226 Difference]: Without dead ends: 48 [2022-04-27 16:50:19,674 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-04-27 16:50:19,674 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 16 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:50:19,675 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 87 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 28 Invalid, 0 Unknown, 7 Unchecked, 0.1s Time] [2022-04-27 16:50:19,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-27 16:50:19,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 41. [2022-04-27 16:50:19,676 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:50:19,676 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,676 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,676 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:19,677 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-27 16:50:19,677 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-27 16:50:19,677 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:19,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:19,677 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-27 16:50:19,677 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-27 16:50:19,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:19,678 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-27 16:50:19,678 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-27 16:50:19,678 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:19,678 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:19,678 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:50:19,678 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:50:19,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. [2022-04-27 16:50:19,679 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 19 [2022-04-27 16:50:19,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:50:19,679 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. [2022-04-27 16:50:19,679 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:19,679 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. [2022-04-27 16:50:19,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:50:19,680 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:50:19,680 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:50:19,697 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 16:50:19,887 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 16:50:19,887 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:50:19,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:50:19,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1138278570, now seen corresponding path program 1 times [2022-04-27 16:50:19,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:50:19,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253982724] [2022-04-27 16:50:19,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:19,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:50:19,895 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:19,895 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:19,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:19,910 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:19,912 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:20,595 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:50:20,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:20,599 INFO L290 TraceCheckUtils]: 0: Hoare triple {3819#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3806#true} is VALID [2022-04-27 16:50:20,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {3806#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:20,599 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3806#true} {3806#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:20,600 INFO L272 TraceCheckUtils]: 0: Hoare triple {3806#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:50:20,600 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3806#true} is VALID [2022-04-27 16:50:20,600 INFO L290 TraceCheckUtils]: 2: Hoare triple {3806#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:20,601 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3806#true} {3806#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:20,601 INFO L272 TraceCheckUtils]: 4: Hoare triple {3806#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:20,601 INFO L290 TraceCheckUtils]: 5: Hoare triple {3806#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3811#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:20,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {3811#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3812#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:20,603 INFO L290 TraceCheckUtils]: 7: Hoare triple {3812#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3813#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:20,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {3813#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3814#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:20,605 INFO L290 TraceCheckUtils]: 9: Hoare triple {3814#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3814#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:20,607 INFO L290 TraceCheckUtils]: 10: Hoare triple {3814#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:50:20,607 INFO L290 TraceCheckUtils]: 11: Hoare triple {3815#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3815#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:50:20,608 INFO L290 TraceCheckUtils]: 12: Hoare triple {3815#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3815#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:50:20,609 INFO L290 TraceCheckUtils]: 13: Hoare triple {3815#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3816#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:50:20,609 INFO L290 TraceCheckUtils]: 14: Hoare triple {3816#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3816#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:50:20,610 INFO L272 TraceCheckUtils]: 15: Hoare triple {3816#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3817#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:50:20,611 INFO L290 TraceCheckUtils]: 16: Hoare triple {3817#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3818#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:50:20,611 INFO L290 TraceCheckUtils]: 17: Hoare triple {3818#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3807#false} is VALID [2022-04-27 16:50:20,611 INFO L290 TraceCheckUtils]: 18: Hoare triple {3807#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#false} is VALID [2022-04-27 16:50:20,611 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:50:20,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:50:20,611 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253982724] [2022-04-27 16:50:20,611 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [253982724] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:50:20,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [635298440] [2022-04-27 16:50:20,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:20,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:50:20,612 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:50:20,613 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:50:20,614 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 16:50:20,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:20,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:50:20,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:20,652 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:50:22,745 INFO L272 TraceCheckUtils]: 0: Hoare triple {3806#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:22,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {3806#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3806#true} is VALID [2022-04-27 16:50:22,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {3806#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:22,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3806#true} {3806#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:22,745 INFO L272 TraceCheckUtils]: 4: Hoare triple {3806#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3806#true} is VALID [2022-04-27 16:50:22,745 INFO L290 TraceCheckUtils]: 5: Hoare triple {3806#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3838#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:50:22,746 INFO L290 TraceCheckUtils]: 6: Hoare triple {3838#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,746 INFO L290 TraceCheckUtils]: 7: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,747 INFO L290 TraceCheckUtils]: 8: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,751 INFO L290 TraceCheckUtils]: 11: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,751 INFO L290 TraceCheckUtils]: 12: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3842#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:22,751 INFO L290 TraceCheckUtils]: 13: Hoare triple {3842#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3864#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:22,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {3864#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3864#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:22,753 INFO L272 TraceCheckUtils]: 15: Hoare triple {3864#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3871#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:50:22,753 INFO L290 TraceCheckUtils]: 16: Hoare triple {3871#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3875#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:50:22,754 INFO L290 TraceCheckUtils]: 17: Hoare triple {3875#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3807#false} is VALID [2022-04-27 16:50:22,754 INFO L290 TraceCheckUtils]: 18: Hoare triple {3807#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#false} is VALID [2022-04-27 16:50:22,754 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:50:22,754 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:50:22,754 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [635298440] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:50:22,754 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:50:22,754 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 16 [2022-04-27 16:50:22,754 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986442839] [2022-04-27 16:50:22,754 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:50:22,755 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:22,755 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:50:22,755 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:22,771 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:22,771 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:50:22,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:50:22,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:50:22,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-27 16:50:22,772 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:23,503 INFO L93 Difference]: Finished difference Result 54 states and 84 transitions. [2022-04-27 16:50:23,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:50:23,503 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:23,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:50:23,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 52 transitions. [2022-04-27 16:50:23,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 52 transitions. [2022-04-27 16:50:23,505 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 52 transitions. [2022-04-27 16:50:23,565 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:23,566 INFO L225 Difference]: With dead ends: 54 [2022-04-27 16:50:23,566 INFO L226 Difference]: Without dead ends: 51 [2022-04-27 16:50:23,566 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-04-27 16:50:23,567 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 12 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:50:23,567 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 68 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 26 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-27 16:50:23,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-27 16:50:23,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 42. [2022-04-27 16:50:23,568 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:50:23,568 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,568 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,569 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:23,569 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-27 16:50:23,569 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-27 16:50:23,569 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:23,570 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:23,570 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-27 16:50:23,570 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-27 16:50:23,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:23,570 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-27 16:50:23,571 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-27 16:50:23,571 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:23,571 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:23,571 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:50:23,571 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:50:23,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 66 transitions. [2022-04-27 16:50:23,571 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 66 transitions. Word has length 19 [2022-04-27 16:50:23,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:50:23,572 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 66 transitions. [2022-04-27 16:50:23,572 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:23,572 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 66 transitions. [2022-04-27 16:50:23,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:50:23,572 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:50:23,572 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:50:23,588 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 16:50:23,783 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:50:23,783 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:50:23,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:50:23,784 INFO L85 PathProgramCache]: Analyzing trace with hash 84699953, now seen corresponding path program 1 times [2022-04-27 16:50:23,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:50:23,784 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264110100] [2022-04-27 16:50:23,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:23,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:50:23,792 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:23,793 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:23,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:23,805 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:23,807 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:24,636 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:50:24,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:24,640 INFO L290 TraceCheckUtils]: 0: Hoare triple {4098#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4085#true} is VALID [2022-04-27 16:50:24,640 INFO L290 TraceCheckUtils]: 1: Hoare triple {4085#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:24,641 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4085#true} {4085#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:24,641 INFO L272 TraceCheckUtils]: 0: Hoare triple {4085#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4098#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:50:24,641 INFO L290 TraceCheckUtils]: 1: Hoare triple {4098#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4085#true} is VALID [2022-04-27 16:50:24,641 INFO L290 TraceCheckUtils]: 2: Hoare triple {4085#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:24,641 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4085#true} {4085#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:24,641 INFO L272 TraceCheckUtils]: 4: Hoare triple {4085#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:24,642 INFO L290 TraceCheckUtils]: 5: Hoare triple {4085#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4090#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:24,643 INFO L290 TraceCheckUtils]: 6: Hoare triple {4090#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4091#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:24,643 INFO L290 TraceCheckUtils]: 7: Hoare triple {4091#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4092#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:50:24,644 INFO L290 TraceCheckUtils]: 8: Hoare triple {4092#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4093#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,645 INFO L290 TraceCheckUtils]: 9: Hoare triple {4093#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4093#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,646 INFO L290 TraceCheckUtils]: 10: Hoare triple {4093#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4094#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,646 INFO L290 TraceCheckUtils]: 11: Hoare triple {4094#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4094#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,647 INFO L290 TraceCheckUtils]: 12: Hoare triple {4094#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4094#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,649 INFO L290 TraceCheckUtils]: 13: Hoare triple {4094#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4095#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,650 INFO L290 TraceCheckUtils]: 14: Hoare triple {4095#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4095#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-27 16:50:24,651 INFO L272 TraceCheckUtils]: 15: Hoare triple {4095#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4096#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:50:24,651 INFO L290 TraceCheckUtils]: 16: Hoare triple {4096#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4097#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:50:24,651 INFO L290 TraceCheckUtils]: 17: Hoare triple {4097#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4086#false} is VALID [2022-04-27 16:50:24,652 INFO L290 TraceCheckUtils]: 18: Hoare triple {4086#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4086#false} is VALID [2022-04-27 16:50:24,652 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:50:24,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:50:24,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264110100] [2022-04-27 16:50:24,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [264110100] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:50:24,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [367541792] [2022-04-27 16:50:24,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:24,652 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:50:24,652 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:50:24,653 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:50:24,654 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 16:50:24,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:24,684 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 16:50:24,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:24,696 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:50:27,017 INFO L272 TraceCheckUtils]: 0: Hoare triple {4085#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:27,017 INFO L290 TraceCheckUtils]: 1: Hoare triple {4085#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4085#true} is VALID [2022-04-27 16:50:27,017 INFO L290 TraceCheckUtils]: 2: Hoare triple {4085#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:27,017 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4085#true} {4085#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:27,017 INFO L272 TraceCheckUtils]: 4: Hoare triple {4085#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:27,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {4085#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4117#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:50:27,018 INFO L290 TraceCheckUtils]: 6: Hoare triple {4117#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4121#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:27,018 INFO L290 TraceCheckUtils]: 7: Hoare triple {4121#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4121#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:27,019 INFO L290 TraceCheckUtils]: 8: Hoare triple {4121#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4121#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:27,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {4121#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4131#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:27,019 INFO L290 TraceCheckUtils]: 10: Hoare triple {4131#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4135#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:27,020 INFO L290 TraceCheckUtils]: 11: Hoare triple {4135#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4135#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:27,020 INFO L290 TraceCheckUtils]: 12: Hoare triple {4135#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4135#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:27,022 INFO L290 TraceCheckUtils]: 13: Hoare triple {4135#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4131#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:27,022 INFO L290 TraceCheckUtils]: 14: Hoare triple {4131#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4131#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:27,023 INFO L272 TraceCheckUtils]: 15: Hoare triple {4131#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4151#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:50:27,023 INFO L290 TraceCheckUtils]: 16: Hoare triple {4151#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4155#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:50:27,023 INFO L290 TraceCheckUtils]: 17: Hoare triple {4155#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4086#false} is VALID [2022-04-27 16:50:27,024 INFO L290 TraceCheckUtils]: 18: Hoare triple {4086#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4086#false} is VALID [2022-04-27 16:50:27,024 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:50:27,024 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:50:40,088 INFO L290 TraceCheckUtils]: 18: Hoare triple {4086#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4086#false} is VALID [2022-04-27 16:50:40,088 INFO L290 TraceCheckUtils]: 17: Hoare triple {4155#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4086#false} is VALID [2022-04-27 16:50:40,089 INFO L290 TraceCheckUtils]: 16: Hoare triple {4151#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4155#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:50:40,089 INFO L272 TraceCheckUtils]: 15: Hoare triple {4171#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4151#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:50:40,090 INFO L290 TraceCheckUtils]: 14: Hoare triple {4171#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4171#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:50:42,103 WARN L290 TraceCheckUtils]: 13: Hoare triple {4178#(forall ((aux_div_v_main_~z~0_54_31 Int) (aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (or (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4171#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-27 16:50:42,104 INFO L290 TraceCheckUtils]: 12: Hoare triple {4178#(forall ((aux_div_v_main_~z~0_54_31 Int) (aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (or (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4178#(forall ((aux_div_v_main_~z~0_54_31 Int) (aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (or (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31)))} is VALID [2022-04-27 16:50:42,105 INFO L290 TraceCheckUtils]: 11: Hoare triple {4178#(forall ((aux_div_v_main_~z~0_54_31 Int) (aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (or (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4178#(forall ((aux_div_v_main_~z~0_54_31 Int) (aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (or (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31)))} is VALID [2022-04-27 16:50:42,107 INFO L290 TraceCheckUtils]: 10: Hoare triple {4171#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4178#(forall ((aux_div_v_main_~z~0_54_31 Int) (aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (or (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31)))} is VALID [2022-04-27 16:50:42,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {4121#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4171#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-27 16:50:42,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {4121#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4121#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:42,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {4121#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4121#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:42,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {4200#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4121#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:50:42,109 INFO L290 TraceCheckUtils]: 5: Hoare triple {4085#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4200#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:50:42,109 INFO L272 TraceCheckUtils]: 4: Hoare triple {4085#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:42,109 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4085#true} {4085#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:42,109 INFO L290 TraceCheckUtils]: 2: Hoare triple {4085#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:42,109 INFO L290 TraceCheckUtils]: 1: Hoare triple {4085#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4085#true} is VALID [2022-04-27 16:50:42,109 INFO L272 TraceCheckUtils]: 0: Hoare triple {4085#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4085#true} is VALID [2022-04-27 16:50:42,109 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:50:42,110 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [367541792] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:50:42,110 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:50:42,110 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 20 [2022-04-27 16:50:42,110 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813228997] [2022-04-27 16:50:42,110 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:50:42,110 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:42,110 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:50:42,110 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:46,333 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 41 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:46,334 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 16:50:46,334 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:50:46,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 16:50:46,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=301, Unknown=3, NotChecked=0, Total=380 [2022-04-27 16:50:46,334 INFO L87 Difference]: Start difference. First operand 42 states and 66 transitions. Second operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:49,062 INFO L93 Difference]: Finished difference Result 62 states and 99 transitions. [2022-04-27 16:50:49,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-27 16:50:49,062 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:50:49,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:50:49,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 67 transitions. [2022-04-27 16:50:49,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 67 transitions. [2022-04-27 16:50:49,064 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 67 transitions. [2022-04-27 16:50:49,147 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:50:49,148 INFO L225 Difference]: With dead ends: 62 [2022-04-27 16:50:49,148 INFO L226 Difference]: Without dead ends: 58 [2022-04-27 16:50:49,148 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 29 SyntacticMatches, 5 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 11.4s TimeCoverageRelationStatistics Valid=195, Invalid=732, Unknown=3, NotChecked=0, Total=930 [2022-04-27 16:50:49,148 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 75 mSDsluCounter, 41 mSDsCounter, 0 mSdLazyCounter, 107 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 107 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 16:50:49,148 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 53 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 107 Invalid, 0 Unknown, 30 Unchecked, 0.5s Time] [2022-04-27 16:50:49,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-04-27 16:50:49,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 45. [2022-04-27 16:50:49,150 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:50:49,150 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,150 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,150 INFO L87 Difference]: Start difference. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:49,151 INFO L93 Difference]: Finished difference Result 58 states and 94 transitions. [2022-04-27 16:50:49,151 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 94 transitions. [2022-04-27 16:50:49,151 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:49,151 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:49,151 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-27 16:50:49,151 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-27 16:50:49,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:50:49,152 INFO L93 Difference]: Finished difference Result 58 states and 94 transitions. [2022-04-27 16:50:49,152 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 94 transitions. [2022-04-27 16:50:49,152 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:50:49,152 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:50:49,152 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:50:49,152 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:50:49,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 72 transitions. [2022-04-27 16:50:49,153 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 72 transitions. Word has length 19 [2022-04-27 16:50:49,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:50:49,153 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 72 transitions. [2022-04-27 16:50:49,153 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:50:49,153 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 72 transitions. [2022-04-27 16:50:49,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:50:49,154 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:50:49,154 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:50:49,171 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 16:50:49,367 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 16:50:49,367 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:50:49,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:50:49,368 INFO L85 PathProgramCache]: Analyzing trace with hash 857687030, now seen corresponding path program 1 times [2022-04-27 16:50:49,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:50:49,368 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843584899] [2022-04-27 16:50:49,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:49,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:50:49,375 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:49,376 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:49,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:49,384 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:49,386 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-27 16:50:50,082 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:50:50,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:50,088 INFO L290 TraceCheckUtils]: 0: Hoare triple {4482#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4469#true} is VALID [2022-04-27 16:50:50,088 INFO L290 TraceCheckUtils]: 1: Hoare triple {4469#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:50:50,088 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4469#true} {4469#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:50:50,088 INFO L272 TraceCheckUtils]: 0: Hoare triple {4469#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4482#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:50:50,089 INFO L290 TraceCheckUtils]: 1: Hoare triple {4482#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4469#true} is VALID [2022-04-27 16:50:50,089 INFO L290 TraceCheckUtils]: 2: Hoare triple {4469#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:50:50,089 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4469#true} {4469#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:50:50,089 INFO L272 TraceCheckUtils]: 4: Hoare triple {4469#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:50:50,089 INFO L290 TraceCheckUtils]: 5: Hoare triple {4469#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4474#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:50,090 INFO L290 TraceCheckUtils]: 6: Hoare triple {4474#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4475#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:50:50,090 INFO L290 TraceCheckUtils]: 7: Hoare triple {4475#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4476#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:50:50,092 INFO L290 TraceCheckUtils]: 8: Hoare triple {4476#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4477#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:50,093 INFO L290 TraceCheckUtils]: 9: Hoare triple {4477#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:50,093 INFO L290 TraceCheckUtils]: 10: Hoare triple {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:50,094 INFO L290 TraceCheckUtils]: 11: Hoare triple {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:50,096 INFO L290 TraceCheckUtils]: 12: Hoare triple {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {4479#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:50:50,098 INFO L290 TraceCheckUtils]: 13: Hoare triple {4479#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4477#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:50,098 INFO L290 TraceCheckUtils]: 14: Hoare triple {4477#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4477#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-27 16:50:50,100 INFO L272 TraceCheckUtils]: 15: Hoare triple {4477#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4480#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:50:50,100 INFO L290 TraceCheckUtils]: 16: Hoare triple {4480#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4481#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:50:50,101 INFO L290 TraceCheckUtils]: 17: Hoare triple {4481#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4470#false} is VALID [2022-04-27 16:50:50,101 INFO L290 TraceCheckUtils]: 18: Hoare triple {4470#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4470#false} is VALID [2022-04-27 16:50:50,101 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:50:50,101 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:50:50,101 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843584899] [2022-04-27 16:50:50,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [843584899] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:50:50,101 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [250110823] [2022-04-27 16:50:50,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:50:50,101 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:50:50,101 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:50:50,102 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:50:50,103 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 16:50:50,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:50,131 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:50:50,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:50:50,137 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:51:12,234 INFO L272 TraceCheckUtils]: 0: Hoare triple {4469#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:51:12,235 INFO L290 TraceCheckUtils]: 1: Hoare triple {4469#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4469#true} is VALID [2022-04-27 16:51:12,235 INFO L290 TraceCheckUtils]: 2: Hoare triple {4469#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:51:12,235 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4469#true} {4469#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:51:12,235 INFO L272 TraceCheckUtils]: 4: Hoare triple {4469#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#true} is VALID [2022-04-27 16:51:12,235 INFO L290 TraceCheckUtils]: 5: Hoare triple {4469#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4501#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:51:12,236 INFO L290 TraceCheckUtils]: 6: Hoare triple {4501#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,236 INFO L290 TraceCheckUtils]: 7: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,236 INFO L290 TraceCheckUtils]: 8: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,236 INFO L290 TraceCheckUtils]: 9: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,237 INFO L290 TraceCheckUtils]: 10: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,237 INFO L290 TraceCheckUtils]: 11: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,237 INFO L290 TraceCheckUtils]: 12: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {4505#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:12,240 INFO L290 TraceCheckUtils]: 13: Hoare triple {4505#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:12,240 INFO L290 TraceCheckUtils]: 14: Hoare triple {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:12,242 INFO L272 TraceCheckUtils]: 15: Hoare triple {4478#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4533#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:51:12,242 INFO L290 TraceCheckUtils]: 16: Hoare triple {4533#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4537#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:51:12,242 INFO L290 TraceCheckUtils]: 17: Hoare triple {4537#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4470#false} is VALID [2022-04-27 16:51:12,243 INFO L290 TraceCheckUtils]: 18: Hoare triple {4470#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4470#false} is VALID [2022-04-27 16:51:12,243 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:51:12,243 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:51:12,243 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [250110823] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:51:12,243 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:51:12,243 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 15 [2022-04-27 16:51:12,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106888381] [2022-04-27 16:51:12,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:51:12,244 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:12,244 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:51:12,244 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:12,260 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:12,260 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:51:12,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:51:12,260 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:51:12,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:51:12,260 INFO L87 Difference]: Start difference. First operand 45 states and 72 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:13,059 INFO L93 Difference]: Finished difference Result 51 states and 79 transitions. [2022-04-27 16:51:13,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:51:13,059 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:13,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:51:13,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-27 16:51:13,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-27 16:51:13,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-27 16:51:13,111 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:13,111 INFO L225 Difference]: With dead ends: 51 [2022-04-27 16:51:13,112 INFO L226 Difference]: Without dead ends: 48 [2022-04-27 16:51:13,112 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:51:13,112 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 12 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:51:13,112 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 75 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 26 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-27 16:51:13,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-27 16:51:13,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 44. [2022-04-27 16:51:13,114 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:51:13,114 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,114 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,114 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:13,115 INFO L93 Difference]: Finished difference Result 48 states and 76 transitions. [2022-04-27 16:51:13,115 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 76 transitions. [2022-04-27 16:51:13,115 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:13,115 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:13,115 INFO L74 IsIncluded]: Start isIncluded. First operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-27 16:51:13,115 INFO L87 Difference]: Start difference. First operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-27 16:51:13,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:13,116 INFO L93 Difference]: Finished difference Result 48 states and 76 transitions. [2022-04-27 16:51:13,116 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 76 transitions. [2022-04-27 16:51:13,116 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:13,116 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:13,116 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:51:13,116 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:51:13,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 70 transitions. [2022-04-27 16:51:13,117 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 70 transitions. Word has length 19 [2022-04-27 16:51:13,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:51:13,117 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 70 transitions. [2022-04-27 16:51:13,117 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:13,117 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 70 transitions. [2022-04-27 16:51:13,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:51:13,117 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:51:13,117 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:51:13,133 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 16:51:13,318 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 16:51:13,318 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:51:13,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:51:13,318 INFO L85 PathProgramCache]: Analyzing trace with hash -949517359, now seen corresponding path program 1 times [2022-04-27 16:51:13,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:51:13,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173921037] [2022-04-27 16:51:13,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:13,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:51:13,325 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:13,326 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-27 16:51:13,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:13,342 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:13,345 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-27 16:51:13,934 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:51:13,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:13,937 INFO L290 TraceCheckUtils]: 0: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4740#true} is VALID [2022-04-27 16:51:13,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {4740#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:13,937 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4740#true} {4740#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:13,937 INFO L272 TraceCheckUtils]: 0: Hoare triple {4740#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:51:13,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4740#true} is VALID [2022-04-27 16:51:13,938 INFO L290 TraceCheckUtils]: 2: Hoare triple {4740#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:13,938 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4740#true} {4740#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:13,938 INFO L272 TraceCheckUtils]: 4: Hoare triple {4740#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:13,938 INFO L290 TraceCheckUtils]: 5: Hoare triple {4740#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4745#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:13,939 INFO L290 TraceCheckUtils]: 6: Hoare triple {4745#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4746#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:13,939 INFO L290 TraceCheckUtils]: 7: Hoare triple {4746#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4747#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-27 16:51:13,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {4747#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4748#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:51:13,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {4748#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:13,942 INFO L290 TraceCheckUtils]: 10: Hoare triple {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:13,943 INFO L290 TraceCheckUtils]: 11: Hoare triple {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:13,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:13,944 INFO L290 TraceCheckUtils]: 13: Hoare triple {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:13,944 INFO L290 TraceCheckUtils]: 14: Hoare triple {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:13,946 INFO L272 TraceCheckUtils]: 15: Hoare triple {4749#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4750#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:51:13,946 INFO L290 TraceCheckUtils]: 16: Hoare triple {4750#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4751#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:51:13,946 INFO L290 TraceCheckUtils]: 17: Hoare triple {4751#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4741#false} is VALID [2022-04-27 16:51:13,946 INFO L290 TraceCheckUtils]: 18: Hoare triple {4741#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4741#false} is VALID [2022-04-27 16:51:13,946 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:51:13,947 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:51:13,947 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173921037] [2022-04-27 16:51:13,947 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1173921037] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:51:13,947 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [341566068] [2022-04-27 16:51:13,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:13,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:13,947 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:51:13,948 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:51:13,949 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 16:51:13,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:13,990 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 16:51:13,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:13,996 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:51:15,804 INFO L272 TraceCheckUtils]: 0: Hoare triple {4740#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:15,804 INFO L290 TraceCheckUtils]: 1: Hoare triple {4740#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4740#true} is VALID [2022-04-27 16:51:15,804 INFO L290 TraceCheckUtils]: 2: Hoare triple {4740#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:15,804 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4740#true} {4740#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:15,804 INFO L272 TraceCheckUtils]: 4: Hoare triple {4740#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4740#true} is VALID [2022-04-27 16:51:15,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {4740#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4771#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:51:15,805 INFO L290 TraceCheckUtils]: 6: Hoare triple {4771#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4775#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:15,805 INFO L290 TraceCheckUtils]: 7: Hoare triple {4775#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4775#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:15,805 INFO L290 TraceCheckUtils]: 8: Hoare triple {4775#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4775#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:51:15,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {4775#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:15,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:15,807 INFO L290 TraceCheckUtils]: 11: Hoare triple {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:15,807 INFO L290 TraceCheckUtils]: 12: Hoare triple {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:15,807 INFO L290 TraceCheckUtils]: 13: Hoare triple {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:15,808 INFO L290 TraceCheckUtils]: 14: Hoare triple {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:15,809 INFO L272 TraceCheckUtils]: 15: Hoare triple {4785#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4804#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:51:15,809 INFO L290 TraceCheckUtils]: 16: Hoare triple {4804#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4808#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:51:15,810 INFO L290 TraceCheckUtils]: 17: Hoare triple {4808#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4741#false} is VALID [2022-04-27 16:51:15,810 INFO L290 TraceCheckUtils]: 18: Hoare triple {4741#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4741#false} is VALID [2022-04-27 16:51:15,810 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:51:15,810 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 16:51:15,810 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [341566068] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:51:15,810 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 16:51:15,810 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-27 16:51:15,810 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596096261] [2022-04-27 16:51:15,810 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:51:15,811 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:15,811 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:51:15,811 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:15,826 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:15,826 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:51:15,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:51:15,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:51:15,827 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:51:15,827 INFO L87 Difference]: Start difference. First operand 44 states and 70 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:16,651 INFO L93 Difference]: Finished difference Result 54 states and 84 transitions. [2022-04-27 16:51:16,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 16:51:16,652 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:16,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:51:16,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-27 16:51:16,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-27 16:51:16,653 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-27 16:51:16,701 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:16,701 INFO L225 Difference]: With dead ends: 54 [2022-04-27 16:51:16,701 INFO L226 Difference]: Without dead ends: 51 [2022-04-27 16:51:16,702 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-27 16:51:16,702 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 10 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:51:16,702 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 80 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 10 Unchecked, 0.1s Time] [2022-04-27 16:51:16,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-27 16:51:16,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 43. [2022-04-27 16:51:16,703 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:51:16,703 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,703 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,703 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:16,704 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-27 16:51:16,704 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-27 16:51:16,704 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:16,704 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:16,705 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-27 16:51:16,705 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-27 16:51:16,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:16,705 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-27 16:51:16,705 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-27 16:51:16,705 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:16,706 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:16,706 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:51:16,706 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:51:16,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 68 transitions. [2022-04-27 16:51:16,706 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 68 transitions. Word has length 19 [2022-04-27 16:51:16,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:51:16,706 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 68 transitions. [2022-04-27 16:51:16,706 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:16,707 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 68 transitions. [2022-04-27 16:51:16,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:51:16,707 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:51:16,707 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:51:16,722 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-04-27 16:51:16,922 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:16,922 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:51:16,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:51:16,923 INFO L85 PathProgramCache]: Analyzing trace with hash -593960234, now seen corresponding path program 1 times [2022-04-27 16:51:16,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:51:16,923 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118264126] [2022-04-27 16:51:16,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:16,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:51:16,930 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:16,931 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:16,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:16,944 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:16,948 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:17,809 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:51:17,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:17,813 INFO L290 TraceCheckUtils]: 0: Hoare triple {5033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5019#true} is VALID [2022-04-27 16:51:17,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {5019#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:17,813 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5019#true} {5019#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:17,813 INFO L272 TraceCheckUtils]: 0: Hoare triple {5019#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:51:17,814 INFO L290 TraceCheckUtils]: 1: Hoare triple {5033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5019#true} is VALID [2022-04-27 16:51:17,814 INFO L290 TraceCheckUtils]: 2: Hoare triple {5019#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:17,814 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5019#true} {5019#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:17,814 INFO L272 TraceCheckUtils]: 4: Hoare triple {5019#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:17,814 INFO L290 TraceCheckUtils]: 5: Hoare triple {5019#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5024#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:17,828 INFO L290 TraceCheckUtils]: 6: Hoare triple {5024#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5025#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:17,829 INFO L290 TraceCheckUtils]: 7: Hoare triple {5025#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5026#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:17,829 INFO L290 TraceCheckUtils]: 8: Hoare triple {5026#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5027#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} is VALID [2022-04-27 16:51:17,831 INFO L290 TraceCheckUtils]: 9: Hoare triple {5027#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:17,832 INFO L290 TraceCheckUtils]: 10: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5029#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:51:17,832 INFO L290 TraceCheckUtils]: 11: Hoare triple {5029#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5029#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:51:17,833 INFO L290 TraceCheckUtils]: 12: Hoare triple {5029#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5029#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:51:17,833 INFO L290 TraceCheckUtils]: 13: Hoare triple {5029#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:17,834 INFO L290 TraceCheckUtils]: 14: Hoare triple {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:17,835 INFO L272 TraceCheckUtils]: 15: Hoare triple {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5031#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:51:17,835 INFO L290 TraceCheckUtils]: 16: Hoare triple {5031#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5032#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:51:17,836 INFO L290 TraceCheckUtils]: 17: Hoare triple {5032#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5020#false} is VALID [2022-04-27 16:51:17,836 INFO L290 TraceCheckUtils]: 18: Hoare triple {5020#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5020#false} is VALID [2022-04-27 16:51:17,836 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:51:17,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:51:17,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118264126] [2022-04-27 16:51:17,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1118264126] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:51:17,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1555464521] [2022-04-27 16:51:17,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:17,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:17,836 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:51:17,838 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:51:17,838 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 16:51:17,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:17,904 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 16:51:17,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:17,921 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:51:21,337 INFO L272 TraceCheckUtils]: 0: Hoare triple {5019#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:21,338 INFO L290 TraceCheckUtils]: 1: Hoare triple {5019#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5019#true} is VALID [2022-04-27 16:51:21,338 INFO L290 TraceCheckUtils]: 2: Hoare triple {5019#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:21,338 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5019#true} {5019#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:21,338 INFO L272 TraceCheckUtils]: 4: Hoare triple {5019#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:21,338 INFO L290 TraceCheckUtils]: 5: Hoare triple {5019#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5024#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:21,352 INFO L290 TraceCheckUtils]: 6: Hoare triple {5024#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5055#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-27 16:51:21,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {5055#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5055#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-27 16:51:21,355 INFO L290 TraceCheckUtils]: 8: Hoare triple {5055#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5062#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:51:21,369 INFO L290 TraceCheckUtils]: 9: Hoare triple {5062#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:21,370 INFO L290 TraceCheckUtils]: 10: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:21,370 INFO L290 TraceCheckUtils]: 11: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:21,370 INFO L290 TraceCheckUtils]: 12: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:21,371 INFO L290 TraceCheckUtils]: 13: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5078#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:21,371 INFO L290 TraceCheckUtils]: 14: Hoare triple {5078#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5078#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:21,372 INFO L272 TraceCheckUtils]: 15: Hoare triple {5078#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5085#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:51:21,373 INFO L290 TraceCheckUtils]: 16: Hoare triple {5085#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5089#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:51:21,373 INFO L290 TraceCheckUtils]: 17: Hoare triple {5089#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5020#false} is VALID [2022-04-27 16:51:21,373 INFO L290 TraceCheckUtils]: 18: Hoare triple {5020#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5020#false} is VALID [2022-04-27 16:51:21,373 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:51:21,373 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:51:26,442 INFO L290 TraceCheckUtils]: 18: Hoare triple {5020#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5020#false} is VALID [2022-04-27 16:51:26,443 INFO L290 TraceCheckUtils]: 17: Hoare triple {5089#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5020#false} is VALID [2022-04-27 16:51:26,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {5085#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5089#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:51:26,444 INFO L272 TraceCheckUtils]: 15: Hoare triple {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5085#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:51:26,445 INFO L290 TraceCheckUtils]: 14: Hoare triple {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:26,446 INFO L290 TraceCheckUtils]: 13: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5030#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:26,446 INFO L290 TraceCheckUtils]: 12: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:26,446 INFO L290 TraceCheckUtils]: 11: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:26,447 INFO L290 TraceCheckUtils]: 10: Hoare triple {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:26,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {5123#(or (< 0 (mod main_~z~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5028#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:26,448 INFO L290 TraceCheckUtils]: 8: Hoare triple {5026#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5123#(or (< 0 (mod main_~z~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:26,448 INFO L290 TraceCheckUtils]: 7: Hoare triple {5026#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5026#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:26,497 INFO L290 TraceCheckUtils]: 6: Hoare triple {5133#(or (forall ((aux_div_v_main_~y~0_56_31 Int) (aux_mod_v_main_~y~0_56_31 Int)) (or (< 0 aux_mod_v_main_~y~0_56_31) (and (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (or (not (= main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (< aux_mod_v_main_~y~0_56_31 0))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5026#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:26,520 INFO L290 TraceCheckUtils]: 5: Hoare triple {5019#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5133#(or (forall ((aux_div_v_main_~y~0_56_31 Int) (aux_mod_v_main_~y~0_56_31 Int)) (or (< 0 aux_mod_v_main_~y~0_56_31) (and (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (or (not (= main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (< aux_mod_v_main_~y~0_56_31 0))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:26,520 INFO L272 TraceCheckUtils]: 4: Hoare triple {5019#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:26,520 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5019#true} {5019#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:26,520 INFO L290 TraceCheckUtils]: 2: Hoare triple {5019#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:26,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {5019#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5019#true} is VALID [2022-04-27 16:51:26,520 INFO L272 TraceCheckUtils]: 0: Hoare triple {5019#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5019#true} is VALID [2022-04-27 16:51:26,520 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:51:26,520 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1555464521] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:51:26,520 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:51:26,521 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9] total 19 [2022-04-27 16:51:26,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37431953] [2022-04-27 16:51:26,521 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:51:26,521 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:26,521 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:51:26,521 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:26,631 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:26,632 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 16:51:26,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:51:26,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 16:51:26,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=277, Unknown=1, NotChecked=0, Total=342 [2022-04-27 16:51:26,632 INFO L87 Difference]: Start difference. First operand 43 states and 68 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:30,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:30,918 INFO L93 Difference]: Finished difference Result 63 states and 101 transitions. [2022-04-27 16:51:30,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 16:51:30,918 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:30,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:51:30,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:30,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 61 transitions. [2022-04-27 16:51:30,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:30,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 61 transitions. [2022-04-27 16:51:30,919 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 61 transitions. [2022-04-27 16:51:31,012 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:31,013 INFO L225 Difference]: With dead ends: 63 [2022-04-27 16:51:31,013 INFO L226 Difference]: Without dead ends: 60 [2022-04-27 16:51:31,013 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 28 SyntacticMatches, 6 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=147, Invalid=553, Unknown=2, NotChecked=0, Total=702 [2022-04-27 16:51:31,014 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 55 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 16:51:31,014 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 58 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 90 Invalid, 0 Unknown, 27 Unchecked, 0.4s Time] [2022-04-27 16:51:31,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-04-27 16:51:31,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 42. [2022-04-27 16:51:31,015 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:51:31,015 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:31,015 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:31,015 INFO L87 Difference]: Start difference. First operand 60 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:31,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:31,016 INFO L93 Difference]: Finished difference Result 60 states and 98 transitions. [2022-04-27 16:51:31,016 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 98 transitions. [2022-04-27 16:51:31,016 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:31,016 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:31,017 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 60 states. [2022-04-27 16:51:31,017 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 60 states. [2022-04-27 16:51:31,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:31,017 INFO L93 Difference]: Finished difference Result 60 states and 98 transitions. [2022-04-27 16:51:31,018 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 98 transitions. [2022-04-27 16:51:31,018 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:31,018 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:31,018 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:51:31,018 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:51:31,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:31,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 66 transitions. [2022-04-27 16:51:31,018 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 66 transitions. Word has length 19 [2022-04-27 16:51:31,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:51:31,019 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 66 transitions. [2022-04-27 16:51:31,019 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:31,019 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 66 transitions. [2022-04-27 16:51:31,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:51:31,019 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:51:31,019 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:51:31,035 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-27 16:51:31,227 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:31,227 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:51:31,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:51:31,228 INFO L85 PathProgramCache]: Analyzing trace with hash 629018289, now seen corresponding path program 1 times [2022-04-27 16:51:31,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:51:31,228 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422541420] [2022-04-27 16:51:31,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:31,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:51:31,235 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:31,236 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:31,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:31,250 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:31,257 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:32,042 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:51:32,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:32,045 INFO L290 TraceCheckUtils]: 0: Hoare triple {5409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5396#true} is VALID [2022-04-27 16:51:32,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {5396#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:32,046 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5396#true} {5396#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:32,046 INFO L272 TraceCheckUtils]: 0: Hoare triple {5396#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:51:32,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {5409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5396#true} is VALID [2022-04-27 16:51:32,046 INFO L290 TraceCheckUtils]: 2: Hoare triple {5396#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:32,046 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5396#true} {5396#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:32,046 INFO L272 TraceCheckUtils]: 4: Hoare triple {5396#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:32,047 INFO L290 TraceCheckUtils]: 5: Hoare triple {5396#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5401#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:32,069 INFO L290 TraceCheckUtils]: 6: Hoare triple {5401#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5402#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:32,070 INFO L290 TraceCheckUtils]: 7: Hoare triple {5402#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5403#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:51:32,071 INFO L290 TraceCheckUtils]: 8: Hoare triple {5403#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5404#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} is VALID [2022-04-27 16:51:32,071 INFO L290 TraceCheckUtils]: 9: Hoare triple {5404#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5404#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} is VALID [2022-04-27 16:51:32,072 INFO L290 TraceCheckUtils]: 10: Hoare triple {5404#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5405#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:32,072 INFO L290 TraceCheckUtils]: 11: Hoare triple {5405#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5405#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:32,073 INFO L290 TraceCheckUtils]: 12: Hoare triple {5405#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5405#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:32,075 INFO L290 TraceCheckUtils]: 13: Hoare triple {5405#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:32,075 INFO L290 TraceCheckUtils]: 14: Hoare triple {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:32,077 INFO L272 TraceCheckUtils]: 15: Hoare triple {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5407#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:51:32,077 INFO L290 TraceCheckUtils]: 16: Hoare triple {5407#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5408#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:51:32,077 INFO L290 TraceCheckUtils]: 17: Hoare triple {5408#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5397#false} is VALID [2022-04-27 16:51:32,077 INFO L290 TraceCheckUtils]: 18: Hoare triple {5397#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5397#false} is VALID [2022-04-27 16:51:32,078 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:51:32,078 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:51:32,078 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422541420] [2022-04-27 16:51:32,078 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [422541420] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:51:32,078 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1095047564] [2022-04-27 16:51:32,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:32,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:32,078 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:51:32,079 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:51:32,082 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 16:51:32,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:32,121 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 16:51:32,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:32,141 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:51:34,332 INFO L272 TraceCheckUtils]: 0: Hoare triple {5396#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:34,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {5396#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5396#true} is VALID [2022-04-27 16:51:34,333 INFO L290 TraceCheckUtils]: 2: Hoare triple {5396#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:34,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5396#true} {5396#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:34,333 INFO L272 TraceCheckUtils]: 4: Hoare triple {5396#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:34,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {5396#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5401#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:34,343 INFO L290 TraceCheckUtils]: 6: Hoare triple {5401#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5431#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-27 16:51:34,345 INFO L290 TraceCheckUtils]: 7: Hoare triple {5431#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5431#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-27 16:51:34,346 INFO L290 TraceCheckUtils]: 8: Hoare triple {5431#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5438#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} is VALID [2022-04-27 16:51:34,368 INFO L290 TraceCheckUtils]: 9: Hoare triple {5438#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-27 16:51:34,369 INFO L290 TraceCheckUtils]: 10: Hoare triple {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-27 16:51:34,369 INFO L290 TraceCheckUtils]: 11: Hoare triple {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-27 16:51:34,369 INFO L290 TraceCheckUtils]: 12: Hoare triple {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-27 16:51:34,370 INFO L290 TraceCheckUtils]: 13: Hoare triple {5442#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {5455#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:51:34,370 INFO L290 TraceCheckUtils]: 14: Hoare triple {5455#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5455#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:51:34,371 INFO L272 TraceCheckUtils]: 15: Hoare triple {5455#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5462#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:51:34,371 INFO L290 TraceCheckUtils]: 16: Hoare triple {5462#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5466#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:51:34,372 INFO L290 TraceCheckUtils]: 17: Hoare triple {5466#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5397#false} is VALID [2022-04-27 16:51:34,372 INFO L290 TraceCheckUtils]: 18: Hoare triple {5397#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5397#false} is VALID [2022-04-27 16:51:34,372 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:51:34,372 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:51:46,226 INFO L290 TraceCheckUtils]: 18: Hoare triple {5397#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5397#false} is VALID [2022-04-27 16:51:46,227 INFO L290 TraceCheckUtils]: 17: Hoare triple {5466#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5397#false} is VALID [2022-04-27 16:51:46,227 INFO L290 TraceCheckUtils]: 16: Hoare triple {5462#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5466#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:51:46,228 INFO L272 TraceCheckUtils]: 15: Hoare triple {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5462#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:51:46,229 INFO L290 TraceCheckUtils]: 14: Hoare triple {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:46,359 INFO L290 TraceCheckUtils]: 13: Hoare triple {5488#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {5406#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:48,366 WARN L290 TraceCheckUtils]: 12: Hoare triple {5488#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5488#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} is UNKNOWN [2022-04-27 16:51:50,376 WARN L290 TraceCheckUtils]: 11: Hoare triple {5488#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5488#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} is UNKNOWN [2022-04-27 16:51:50,377 INFO L290 TraceCheckUtils]: 10: Hoare triple {5498#(or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5488#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-27 16:51:50,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {5502#(or (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5498#(or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:51:50,379 INFO L290 TraceCheckUtils]: 8: Hoare triple {5403#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5502#(or (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:51:50,380 INFO L290 TraceCheckUtils]: 7: Hoare triple {5403#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5403#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:51:50,441 INFO L290 TraceCheckUtils]: 6: Hoare triple {5512#(or (forall ((aux_mod_v_main_~y~0_61_31 Int) (aux_div_v_main_~y~0_61_31 Int)) (or (<= 1 aux_mod_v_main_~y~0_61_31) (< aux_mod_v_main_~y~0_61_31 0) (and (or (not (= main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296)))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296)))))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5403#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:51:50,458 INFO L290 TraceCheckUtils]: 5: Hoare triple {5396#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5512#(or (forall ((aux_mod_v_main_~y~0_61_31 Int) (aux_div_v_main_~y~0_61_31 Int)) (or (<= 1 aux_mod_v_main_~y~0_61_31) (< aux_mod_v_main_~y~0_61_31 0) (and (or (not (= main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296)))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296)))))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:50,459 INFO L272 TraceCheckUtils]: 4: Hoare triple {5396#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:50,459 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5396#true} {5396#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:50,459 INFO L290 TraceCheckUtils]: 2: Hoare triple {5396#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:50,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {5396#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5396#true} is VALID [2022-04-27 16:51:50,459 INFO L272 TraceCheckUtils]: 0: Hoare triple {5396#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5396#true} is VALID [2022-04-27 16:51:50,462 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:51:50,463 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1095047564] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:51:50,463 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:51:50,463 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 21 [2022-04-27 16:51:50,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [848406236] [2022-04-27 16:51:50,463 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:51:50,463 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:50,463 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:51:50,464 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:56,752 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:56,752 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-27 16:51:56,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:51:56,753 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-27 16:51:56,753 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=328, Unknown=2, NotChecked=0, Total=420 [2022-04-27 16:51:56,753 INFO L87 Difference]: Start difference. First operand 42 states and 66 transitions. Second operand has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:58,580 INFO L93 Difference]: Finished difference Result 55 states and 87 transitions. [2022-04-27 16:51:58,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 16:51:58,580 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:51:58,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:51:58,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 58 transitions. [2022-04-27 16:51:58,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 58 transitions. [2022-04-27 16:51:58,581 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 58 transitions. [2022-04-27 16:51:58,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:51:58,654 INFO L225 Difference]: With dead ends: 55 [2022-04-27 16:51:58,655 INFO L226 Difference]: Without dead ends: 52 [2022-04-27 16:51:58,655 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 8.0s TimeCoverageRelationStatistics Valid=167, Invalid=587, Unknown=2, NotChecked=0, Total=756 [2022-04-27 16:51:58,655 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 88 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 120 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 25 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 16:51:58,655 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 50 Invalid, 120 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 83 Invalid, 0 Unknown, 25 Unchecked, 0.4s Time] [2022-04-27 16:51:58,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-04-27 16:51:58,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 45. [2022-04-27 16:51:58,656 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:51:58,657 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,657 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,657 INFO L87 Difference]: Start difference. First operand 52 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:58,658 INFO L93 Difference]: Finished difference Result 52 states and 84 transitions. [2022-04-27 16:51:58,658 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 84 transitions. [2022-04-27 16:51:58,658 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:58,658 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:58,658 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 52 states. [2022-04-27 16:51:58,658 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 52 states. [2022-04-27 16:51:58,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:51:58,659 INFO L93 Difference]: Finished difference Result 52 states and 84 transitions. [2022-04-27 16:51:58,659 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 84 transitions. [2022-04-27 16:51:58,659 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:51:58,659 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:51:58,659 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:51:58,659 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:51:58,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 72 transitions. [2022-04-27 16:51:58,660 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 72 transitions. Word has length 19 [2022-04-27 16:51:58,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:51:58,660 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 72 transitions. [2022-04-27 16:51:58,660 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:51:58,660 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 72 transitions. [2022-04-27 16:51:58,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:51:58,660 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:51:58,660 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:51:58,676 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 16:51:58,876 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:58,876 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:51:58,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:51:58,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1402005366, now seen corresponding path program 1 times [2022-04-27 16:51:58,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:51:58,876 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [490484031] [2022-04-27 16:51:58,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:58,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:51:58,883 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:58,884 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:58,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:58,890 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:58,893 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-27 16:51:59,571 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:51:59,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:59,584 INFO L290 TraceCheckUtils]: 0: Hoare triple {5766#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5753#true} is VALID [2022-04-27 16:51:59,584 INFO L290 TraceCheckUtils]: 1: Hoare triple {5753#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:51:59,584 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5753#true} {5753#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:51:59,584 INFO L272 TraceCheckUtils]: 0: Hoare triple {5753#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5766#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:51:59,585 INFO L290 TraceCheckUtils]: 1: Hoare triple {5766#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5753#true} is VALID [2022-04-27 16:51:59,585 INFO L290 TraceCheckUtils]: 2: Hoare triple {5753#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:51:59,585 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5753#true} {5753#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:51:59,585 INFO L272 TraceCheckUtils]: 4: Hoare triple {5753#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:51:59,585 INFO L290 TraceCheckUtils]: 5: Hoare triple {5753#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5758#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:51:59,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {5758#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5759#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:51:59,596 INFO L290 TraceCheckUtils]: 7: Hoare triple {5759#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:51:59,597 INFO L290 TraceCheckUtils]: 8: Hoare triple {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:51:59,597 INFO L290 TraceCheckUtils]: 9: Hoare triple {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:51:59,598 INFO L290 TraceCheckUtils]: 10: Hoare triple {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:59,598 INFO L290 TraceCheckUtils]: 11: Hoare triple {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:51:59,599 INFO L290 TraceCheckUtils]: 12: Hoare triple {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5762#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-27 16:51:59,600 INFO L290 TraceCheckUtils]: 13: Hoare triple {5762#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:59,601 INFO L290 TraceCheckUtils]: 14: Hoare triple {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:51:59,602 INFO L272 TraceCheckUtils]: 15: Hoare triple {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5764#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:51:59,602 INFO L290 TraceCheckUtils]: 16: Hoare triple {5764#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5765#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:51:59,603 INFO L290 TraceCheckUtils]: 17: Hoare triple {5765#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5754#false} is VALID [2022-04-27 16:51:59,603 INFO L290 TraceCheckUtils]: 18: Hoare triple {5754#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5754#false} is VALID [2022-04-27 16:51:59,603 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:51:59,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:51:59,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [490484031] [2022-04-27 16:51:59,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [490484031] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:51:59,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1744530788] [2022-04-27 16:51:59,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:51:59,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:51:59,604 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:51:59,604 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:51:59,608 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 16:51:59,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:59,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 16:51:59,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:51:59,661 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:52:02,033 INFO L272 TraceCheckUtils]: 0: Hoare triple {5753#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:02,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {5753#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5753#true} is VALID [2022-04-27 16:52:02,033 INFO L290 TraceCheckUtils]: 2: Hoare triple {5753#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:02,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5753#true} {5753#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:02,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {5753#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:02,034 INFO L290 TraceCheckUtils]: 5: Hoare triple {5753#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5758#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:52:02,054 INFO L290 TraceCheckUtils]: 6: Hoare triple {5758#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5788#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-27 16:52:02,056 INFO L290 TraceCheckUtils]: 7: Hoare triple {5788#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5788#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-27 16:52:02,058 INFO L290 TraceCheckUtils]: 8: Hoare triple {5788#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5795#(or (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0)) (and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0)))} is VALID [2022-04-27 16:52:02,076 INFO L290 TraceCheckUtils]: 9: Hoare triple {5795#(or (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0)) (and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5799#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:52:02,076 INFO L290 TraceCheckUtils]: 10: Hoare triple {5799#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5799#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:52:02,076 INFO L290 TraceCheckUtils]: 11: Hoare triple {5799#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5799#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:52:02,077 INFO L290 TraceCheckUtils]: 12: Hoare triple {5799#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5809#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:52:02,077 INFO L290 TraceCheckUtils]: 13: Hoare triple {5809#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5809#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:52:02,078 INFO L290 TraceCheckUtils]: 14: Hoare triple {5809#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5809#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:52:02,079 INFO L272 TraceCheckUtils]: 15: Hoare triple {5809#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5819#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:52:02,079 INFO L290 TraceCheckUtils]: 16: Hoare triple {5819#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5823#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:52:02,079 INFO L290 TraceCheckUtils]: 17: Hoare triple {5823#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5754#false} is VALID [2022-04-27 16:52:02,079 INFO L290 TraceCheckUtils]: 18: Hoare triple {5754#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5754#false} is VALID [2022-04-27 16:52:02,080 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:52:02,080 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:52:07,141 INFO L290 TraceCheckUtils]: 18: Hoare triple {5754#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5754#false} is VALID [2022-04-27 16:52:07,141 INFO L290 TraceCheckUtils]: 17: Hoare triple {5823#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5754#false} is VALID [2022-04-27 16:52:07,141 INFO L290 TraceCheckUtils]: 16: Hoare triple {5819#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5823#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:52:07,143 INFO L272 TraceCheckUtils]: 15: Hoare triple {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5819#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:52:07,143 INFO L290 TraceCheckUtils]: 14: Hoare triple {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:07,144 INFO L290 TraceCheckUtils]: 13: Hoare triple {5845#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5763#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:07,146 INFO L290 TraceCheckUtils]: 12: Hoare triple {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5845#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:52:07,146 INFO L290 TraceCheckUtils]: 11: Hoare triple {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:52:07,146 INFO L290 TraceCheckUtils]: 10: Hoare triple {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:52:07,147 INFO L290 TraceCheckUtils]: 9: Hoare triple {5845#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5761#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-27 16:52:07,148 INFO L290 TraceCheckUtils]: 8: Hoare triple {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5845#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:52:07,148 INFO L290 TraceCheckUtils]: 7: Hoare triple {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:07,204 INFO L290 TraceCheckUtils]: 6: Hoare triple {5867#(or (forall ((aux_mod_v_main_~y~0_64_31 Int) (aux_div_v_main_~y~0_64_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)) main_~y~0))) (or (not (< main_~y~0 (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))))) (<= 1 aux_mod_v_main_~y~0_64_31) (< aux_mod_v_main_~y~0_64_31 0))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5760#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:07,230 INFO L290 TraceCheckUtils]: 5: Hoare triple {5753#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5867#(or (forall ((aux_mod_v_main_~y~0_64_31 Int) (aux_div_v_main_~y~0_64_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)) main_~y~0))) (or (not (< main_~y~0 (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))))) (<= 1 aux_mod_v_main_~y~0_64_31) (< aux_mod_v_main_~y~0_64_31 0))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:52:07,230 INFO L272 TraceCheckUtils]: 4: Hoare triple {5753#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:07,230 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5753#true} {5753#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:07,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {5753#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:07,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {5753#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5753#true} is VALID [2022-04-27 16:52:07,230 INFO L272 TraceCheckUtils]: 0: Hoare triple {5753#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5753#true} is VALID [2022-04-27 16:52:07,230 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:52:07,231 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1744530788] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:52:07,231 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:52:07,231 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 19 [2022-04-27 16:52:07,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862895517] [2022-04-27 16:52:07,231 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:52:07,231 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:52:07,231 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:52:07,232 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:07,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:52:07,457 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 16:52:07,457 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:52:07,457 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 16:52:07,457 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2022-04-27 16:52:07,457 INFO L87 Difference]: Start difference. First operand 45 states and 72 transitions. Second operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:10,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:52:10,576 INFO L93 Difference]: Finished difference Result 69 states and 111 transitions. [2022-04-27 16:52:10,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-27 16:52:10,576 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:52:10,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:52:10,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:10,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-27 16:52:10,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:10,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-27 16:52:10,577 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-27 16:52:12,758 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 70 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 16:52:12,758 INFO L225 Difference]: With dead ends: 69 [2022-04-27 16:52:12,758 INFO L226 Difference]: Without dead ends: 65 [2022-04-27 16:52:12,759 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 27 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=160, Invalid=596, Unknown=0, NotChecked=0, Total=756 [2022-04-27 16:52:12,759 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 56 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 139 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 139 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 63 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 16:52:12,759 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 71 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 139 Invalid, 0 Unknown, 63 Unchecked, 0.7s Time] [2022-04-27 16:52:12,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-04-27 16:52:12,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 51. [2022-04-27 16:52:12,760 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:52:12,761 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:12,761 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:12,761 INFO L87 Difference]: Start difference. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:12,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:52:12,762 INFO L93 Difference]: Finished difference Result 65 states and 106 transitions. [2022-04-27 16:52:12,762 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 106 transitions. [2022-04-27 16:52:12,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:52:12,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:52:12,762 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-27 16:52:12,762 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-27 16:52:12,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:52:12,763 INFO L93 Difference]: Finished difference Result 65 states and 106 transitions. [2022-04-27 16:52:12,763 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 106 transitions. [2022-04-27 16:52:12,763 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:52:12,763 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:52:12,763 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:52:12,763 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:52:12,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:12,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 83 transitions. [2022-04-27 16:52:12,764 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 83 transitions. Word has length 19 [2022-04-27 16:52:12,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:52:12,764 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 83 transitions. [2022-04-27 16:52:12,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:12,764 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 83 transitions. [2022-04-27 16:52:12,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:52:12,764 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:52:12,764 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:52:12,785 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-27 16:52:12,979 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-04-27 16:52:12,979 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:52:12,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:52:12,980 INFO L85 PathProgramCache]: Analyzing trace with hash -405199023, now seen corresponding path program 1 times [2022-04-27 16:52:12,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:52:12,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254205151] [2022-04-27 16:52:12,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:52:12,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:52:12,986 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:52:12,987 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-27 16:52:12,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:52:12,993 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:52:12,997 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-27 16:52:13,783 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:52:13,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:52:13,786 INFO L290 TraceCheckUtils]: 0: Hoare triple {6171#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6158#true} is VALID [2022-04-27 16:52:13,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {6158#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:13,786 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6158#true} {6158#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:13,787 INFO L272 TraceCheckUtils]: 0: Hoare triple {6158#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6171#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:52:13,787 INFO L290 TraceCheckUtils]: 1: Hoare triple {6171#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6158#true} is VALID [2022-04-27 16:52:13,787 INFO L290 TraceCheckUtils]: 2: Hoare triple {6158#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:13,787 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6158#true} {6158#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:13,787 INFO L272 TraceCheckUtils]: 4: Hoare triple {6158#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:13,787 INFO L290 TraceCheckUtils]: 5: Hoare triple {6158#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6163#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:52:13,807 INFO L290 TraceCheckUtils]: 6: Hoare triple {6163#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6164#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-27 16:52:13,808 INFO L290 TraceCheckUtils]: 7: Hoare triple {6164#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6165#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:13,809 INFO L290 TraceCheckUtils]: 8: Hoare triple {6165#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6166#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:13,810 INFO L290 TraceCheckUtils]: 9: Hoare triple {6166#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:13,811 INFO L290 TraceCheckUtils]: 10: Hoare triple {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:13,812 INFO L290 TraceCheckUtils]: 11: Hoare triple {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:13,812 INFO L290 TraceCheckUtils]: 12: Hoare triple {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:13,812 INFO L290 TraceCheckUtils]: 13: Hoare triple {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:13,813 INFO L290 TraceCheckUtils]: 14: Hoare triple {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:13,814 INFO L272 TraceCheckUtils]: 15: Hoare triple {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6169#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:52:13,814 INFO L290 TraceCheckUtils]: 16: Hoare triple {6169#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6170#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:52:13,815 INFO L290 TraceCheckUtils]: 17: Hoare triple {6170#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6159#false} is VALID [2022-04-27 16:52:13,815 INFO L290 TraceCheckUtils]: 18: Hoare triple {6159#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6159#false} is VALID [2022-04-27 16:52:13,815 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 16:52:13,815 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:52:13,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254205151] [2022-04-27 16:52:13,815 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [254205151] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:52:13,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1024858158] [2022-04-27 16:52:13,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:52:13,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:52:13,815 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:52:13,816 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:52:13,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 16:52:13,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:52:13,847 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 16:52:13,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:52:13,869 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:52:22,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {6158#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:22,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {6158#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6158#true} is VALID [2022-04-27 16:52:22,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {6158#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:22,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6158#true} {6158#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:22,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {6158#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:22,312 INFO L290 TraceCheckUtils]: 5: Hoare triple {6158#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6163#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:52:22,331 INFO L290 TraceCheckUtils]: 6: Hoare triple {6163#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6193#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-27 16:52:22,333 INFO L290 TraceCheckUtils]: 7: Hoare triple {6193#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6197#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-27 16:52:22,336 INFO L290 TraceCheckUtils]: 8: Hoare triple {6197#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6197#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-27 16:52:22,338 INFO L290 TraceCheckUtils]: 9: Hoare triple {6197#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6204#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-27 16:52:22,340 INFO L290 TraceCheckUtils]: 10: Hoare triple {6204#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6204#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-27 16:52:22,353 INFO L290 TraceCheckUtils]: 11: Hoare triple {6204#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6211#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 16:52:22,357 INFO L290 TraceCheckUtils]: 12: Hoare triple {6211#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6211#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 16:52:22,360 INFO L290 TraceCheckUtils]: 13: Hoare triple {6211#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6211#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 16:52:22,388 INFO L290 TraceCheckUtils]: 14: Hoare triple {6211#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6221#(and (<= (div (* (- 1) main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 16:52:22,389 INFO L272 TraceCheckUtils]: 15: Hoare triple {6221#(and (<= (div (* (- 1) main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6225#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:52:22,390 INFO L290 TraceCheckUtils]: 16: Hoare triple {6225#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6229#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:52:22,390 INFO L290 TraceCheckUtils]: 17: Hoare triple {6229#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6159#false} is VALID [2022-04-27 16:52:22,390 INFO L290 TraceCheckUtils]: 18: Hoare triple {6159#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6159#false} is VALID [2022-04-27 16:52:22,390 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:52:22,390 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:52:40,732 INFO L290 TraceCheckUtils]: 18: Hoare triple {6159#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6159#false} is VALID [2022-04-27 16:52:40,732 INFO L290 TraceCheckUtils]: 17: Hoare triple {6229#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6159#false} is VALID [2022-04-27 16:52:40,733 INFO L290 TraceCheckUtils]: 16: Hoare triple {6225#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6229#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:52:40,734 INFO L272 TraceCheckUtils]: 15: Hoare triple {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6225#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:52:40,735 INFO L290 TraceCheckUtils]: 14: Hoare triple {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6168#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:52:40,735 INFO L290 TraceCheckUtils]: 13: Hoare triple {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:40,736 INFO L290 TraceCheckUtils]: 12: Hoare triple {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:52:42,746 WARN L290 TraceCheckUtils]: 11: Hoare triple {6257#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6167#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is UNKNOWN [2022-04-27 16:52:42,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {6257#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6257#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} is VALID [2022-04-27 16:52:42,823 INFO L290 TraceCheckUtils]: 9: Hoare triple {6264#(or (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6257#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} is VALID [2022-04-27 16:52:42,864 INFO L290 TraceCheckUtils]: 8: Hoare triple {6264#(or (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6264#(or (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} is VALID [2022-04-27 16:52:42,866 INFO L290 TraceCheckUtils]: 7: Hoare triple {6164#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6264#(or (< main_~n~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_68_31 Int) (aux_mod_v_main_~y~0_68_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31))))} is VALID [2022-04-27 16:52:44,894 WARN L290 TraceCheckUtils]: 6: Hoare triple {6274#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~x~0_54_31 Int)) (or (>= aux_mod_v_main_~x~0_54_31 4294967296) (> 0 aux_mod_v_main_~x~0_54_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_54_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296))))) (forall ((aux_div_v_main_~y~0_69_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_69_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) 1) (+ aux_mod_v_main_~x~0_54_31 main_~y~0))))) (or (forall ((aux_div_v_main_~y~0_69_31 Int) (aux_div_v_main_~x~0_54_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_54_31 v_it_1 (* aux_div_v_main_~x~0_54_31 4294967296) 1) main_~x~0) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296))) (not (< (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296)) main_~x~0)))) (not (< 0 (mod main_~x~0 4294967296))))))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6164#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is UNKNOWN [2022-04-27 16:52:44,913 INFO L290 TraceCheckUtils]: 5: Hoare triple {6158#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6274#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~x~0_54_31 Int)) (or (>= aux_mod_v_main_~x~0_54_31 4294967296) (> 0 aux_mod_v_main_~x~0_54_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_54_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296))))) (forall ((aux_div_v_main_~y~0_69_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_69_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) 1) (+ aux_mod_v_main_~x~0_54_31 main_~y~0))))) (or (forall ((aux_div_v_main_~y~0_69_31 Int) (aux_div_v_main_~x~0_54_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_54_31 v_it_1 (* aux_div_v_main_~x~0_54_31 4294967296) 1) main_~x~0) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296))) (not (< (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296)) main_~x~0)))) (not (< 0 (mod main_~x~0 4294967296))))))))} is VALID [2022-04-27 16:52:44,913 INFO L272 TraceCheckUtils]: 4: Hoare triple {6158#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:44,914 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6158#true} {6158#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:44,914 INFO L290 TraceCheckUtils]: 2: Hoare triple {6158#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:44,914 INFO L290 TraceCheckUtils]: 1: Hoare triple {6158#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6158#true} is VALID [2022-04-27 16:52:44,914 INFO L272 TraceCheckUtils]: 0: Hoare triple {6158#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6158#true} is VALID [2022-04-27 16:52:44,919 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:52:44,919 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1024858158] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:52:44,919 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:52:44,919 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 21 [2022-04-27 16:52:44,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932612830] [2022-04-27 16:52:44,920 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:52:44,920 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:52:44,920 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:52:44,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:46,794 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:52:46,795 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-27 16:52:46,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:52:46,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-27 16:52:46,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=329, Unknown=5, NotChecked=0, Total=420 [2022-04-27 16:52:46,795 INFO L87 Difference]: Start difference. First operand 51 states and 83 transitions. Second operand has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:55,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:52:55,177 INFO L93 Difference]: Finished difference Result 72 states and 117 transitions. [2022-04-27 16:52:55,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-27 16:52:55,177 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:52:55,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:52:55,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:55,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 75 transitions. [2022-04-27 16:52:55,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:52:55,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 75 transitions. [2022-04-27 16:52:55,179 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 75 transitions. [2022-04-27 16:53:00,830 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 73 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 16:53:00,831 INFO L225 Difference]: With dead ends: 72 [2022-04-27 16:53:00,831 INFO L226 Difference]: Without dead ends: 68 [2022-04-27 16:53:00,832 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 28 SyntacticMatches, 6 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 312 ImplicationChecksByTransitivity, 20.0s TimeCoverageRelationStatistics Valid=244, Invalid=873, Unknown=5, NotChecked=0, Total=1122 [2022-04-27 16:53:00,833 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 73 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 117 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 84 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 16:53:00,833 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 65 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 117 Invalid, 0 Unknown, 84 Unchecked, 0.6s Time] [2022-04-27 16:53:00,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-04-27 16:53:00,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 51. [2022-04-27 16:53:00,834 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:53:00,834 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:53:00,834 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:53:00,834 INFO L87 Difference]: Start difference. First operand 68 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:53:00,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:53:00,835 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2022-04-27 16:53:00,835 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2022-04-27 16:53:00,835 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:53:00,835 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:53:00,835 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-27 16:53:00,836 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-27 16:53:00,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:53:00,836 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2022-04-27 16:53:00,836 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2022-04-27 16:53:00,836 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:53:00,837 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:53:00,837 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:53:00,837 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:53:00,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:53:00,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 83 transitions. [2022-04-27 16:53:00,837 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 83 transitions. Word has length 19 [2022-04-27 16:53:00,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:53:00,837 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 83 transitions. [2022-04-27 16:53:00,838 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:53:00,838 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 83 transitions. [2022-04-27 16:53:00,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:53:00,838 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:53:00,838 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:53:00,854 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-27 16:53:01,039 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-27 16:53:01,039 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:53:01,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:53:01,040 INFO L85 PathProgramCache]: Analyzing trace with hash 2144376817, now seen corresponding path program 1 times [2022-04-27 16:53:01,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:53:01,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859705145] [2022-04-27 16:53:01,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:53:01,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:53:01,047 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:53:01,047 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-27 16:53:01,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:53:01,056 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.4))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:53:01,058 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.5))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-27 16:53:01,947 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:53:01,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:53:01,951 INFO L290 TraceCheckUtils]: 0: Hoare triple {6598#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6584#true} is VALID [2022-04-27 16:53:01,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {6584#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:53:01,951 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6584#true} {6584#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:53:01,951 INFO L272 TraceCheckUtils]: 0: Hoare triple {6584#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6598#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:53:01,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {6598#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6584#true} is VALID [2022-04-27 16:53:01,951 INFO L290 TraceCheckUtils]: 2: Hoare triple {6584#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:53:01,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6584#true} {6584#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:53:01,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {6584#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:53:01,952 INFO L290 TraceCheckUtils]: 5: Hoare triple {6584#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6589#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:53:01,960 INFO L290 TraceCheckUtils]: 6: Hoare triple {6589#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6590#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} is VALID [2022-04-27 16:53:01,962 INFO L290 TraceCheckUtils]: 7: Hoare triple {6590#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6591#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} is VALID [2022-04-27 16:53:01,964 INFO L290 TraceCheckUtils]: 8: Hoare triple {6591#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6592#(and (or (<= (+ (* (div main_~z~0 4294967296) 4294967296) 1) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0))} is VALID [2022-04-27 16:53:01,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {6592#(and (or (<= (+ (* (div main_~z~0 4294967296) 4294967296) 1) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6593#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:53:01,967 INFO L290 TraceCheckUtils]: 10: Hoare triple {6593#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6594#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-27 16:53:01,968 INFO L290 TraceCheckUtils]: 11: Hoare triple {6594#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:53:01,968 INFO L290 TraceCheckUtils]: 12: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:53:01,969 INFO L290 TraceCheckUtils]: 13: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:53:01,969 INFO L290 TraceCheckUtils]: 14: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:53:01,970 INFO L272 TraceCheckUtils]: 15: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6596#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:53:01,970 INFO L290 TraceCheckUtils]: 16: Hoare triple {6596#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6597#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:53:01,971 INFO L290 TraceCheckUtils]: 17: Hoare triple {6597#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6585#false} is VALID [2022-04-27 16:53:01,971 INFO L290 TraceCheckUtils]: 18: Hoare triple {6585#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6585#false} is VALID [2022-04-27 16:53:01,971 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:53:01,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:53:01,971 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859705145] [2022-04-27 16:53:01,971 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1859705145] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:53:01,971 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [464341397] [2022-04-27 16:53:01,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:53:01,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:53:01,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:53:01,973 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:53:01,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 16:53:02,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:53:02,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 16:53:02,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:53:02,091 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:53:05,540 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (mod c_main_~n~0 4294967296)) (.cse2 (= c_main_~y~0 c_main_~z~0))) (or (and (< 0 c_main_~y~0) (< 0 .cse0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ c_main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) c_main_~y~0)) (not (<= 1 v_it_1)))) (let ((.cse1 (mod c_main_~y~0 4294967296))) (or (and (< 0 .cse1) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_it_2 c_main_~z~0 1) c_main_~y~0)) (< 0 (mod (+ (* v_it_2 4294967295) c_main_~y~0) 4294967296)))) (= (+ (* (- 1) c_main_~z~0) c_main_~n~0) c_main_~x~0) (< c_main_~z~0 c_main_~y~0)) (and (<= .cse1 0) (= (+ (* (- 1) c_main_~y~0) c_main_~n~0) c_main_~x~0) .cse2)))) (and (<= .cse0 0) (= c_main_~y~0 0) .cse2 (= c_main_~n~0 c_main_~x~0)))) is different from false [2022-04-27 16:54:24,740 WARN L232 SmtUtils]: Spent 1.08m on a formula simplification. DAG size of input: 59 DAG size of output: 54 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 16:54:34,049 INFO L272 TraceCheckUtils]: 0: Hoare triple {6584#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:54:34,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {6584#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6584#true} is VALID [2022-04-27 16:54:34,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {6584#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:54:34,049 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6584#true} {6584#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:54:34,049 INFO L272 TraceCheckUtils]: 4: Hoare triple {6584#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:54:34,050 INFO L290 TraceCheckUtils]: 5: Hoare triple {6584#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6589#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 16:54:34,066 INFO L290 TraceCheckUtils]: 6: Hoare triple {6589#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6620#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-27 16:54:34,068 INFO L290 TraceCheckUtils]: 7: Hoare triple {6620#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6620#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-27 16:54:34,069 INFO L290 TraceCheckUtils]: 8: Hoare triple {6620#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6627#(and (= main_~z~0 main_~y~0) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))))} is VALID [2022-04-27 16:54:34,083 INFO L290 TraceCheckUtils]: 9: Hoare triple {6627#(and (= main_~z~0 main_~y~0) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6631#(or (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (or (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0) (< 0 (mod main_~y~0 4294967296))) (and (= main_~z~0 main_~y~0) (<= (mod main_~y~0 4294967296) 0) (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-27 16:54:34,104 INFO L290 TraceCheckUtils]: 10: Hoare triple {6631#(or (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (or (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0) (< 0 (mod main_~y~0 4294967296))) (and (= main_~z~0 main_~y~0) (<= (mod main_~y~0 4294967296) 0) (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6635#(and (or (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0) (= main_~n~0 (+ main_~z~0 main_~x~0)) (< 0 (mod main_~y~0 4294967296)))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 16:54:34,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {6635#(and (or (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0) (= main_~n~0 (+ main_~z~0 main_~x~0)) (< 0 (mod main_~y~0 4294967296)))) (not (< 0 (mod main_~z~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6639#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:54:34,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {6639#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6643#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:54:34,106 INFO L290 TraceCheckUtils]: 13: Hoare triple {6643#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6643#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:54:34,107 INFO L290 TraceCheckUtils]: 14: Hoare triple {6643#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6643#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 16:54:34,107 INFO L272 TraceCheckUtils]: 15: Hoare triple {6643#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:54:34,108 INFO L290 TraceCheckUtils]: 16: Hoare triple {6653#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:54:34,108 INFO L290 TraceCheckUtils]: 17: Hoare triple {6657#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6585#false} is VALID [2022-04-27 16:54:34,108 INFO L290 TraceCheckUtils]: 18: Hoare triple {6585#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6585#false} is VALID [2022-04-27 16:54:34,108 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-27 16:54:34,108 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:55:11,681 INFO L290 TraceCheckUtils]: 18: Hoare triple {6585#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6585#false} is VALID [2022-04-27 16:55:11,682 INFO L290 TraceCheckUtils]: 17: Hoare triple {6657#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6585#false} is VALID [2022-04-27 16:55:11,682 INFO L290 TraceCheckUtils]: 16: Hoare triple {6653#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:55:11,683 INFO L272 TraceCheckUtils]: 15: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:55:11,684 INFO L290 TraceCheckUtils]: 14: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:55:11,684 INFO L290 TraceCheckUtils]: 13: Hoare triple {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:55:11,685 INFO L290 TraceCheckUtils]: 12: Hoare triple {6682#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6595#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 16:55:11,685 INFO L290 TraceCheckUtils]: 11: Hoare triple {6686#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6682#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 16:55:11,686 INFO L290 TraceCheckUtils]: 10: Hoare triple {6690#(or (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6686#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:55:13,730 WARN L290 TraceCheckUtils]: 9: Hoare triple {6694#(or (forall ((aux_mod_aux_mod_v_main_~z~0_72_31_42 Int) (aux_div_aux_mod_v_main_~z~0_72_31_42 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_72_31 Int) (aux_div_v_main_~x~0_58_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))) (< (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) (+ main_~z~0 main_~x~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_it_2 aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) 1 (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0))) (not (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0)))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_72_31 Int)) (not (= main_~z~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))) (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296)) 0) (< 0 aux_mod_aux_mod_v_main_~z~0_72_31_42) (< main_~n~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* (div main_~n~0 4294967296) 4294967296) 1)) (< aux_mod_aux_mod_v_main_~z~0_72_31_42 0))) (< 0 (mod main_~y~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6690#(or (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-27 16:55:13,740 INFO L290 TraceCheckUtils]: 8: Hoare triple {6698#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6694#(or (forall ((aux_mod_aux_mod_v_main_~z~0_72_31_42 Int) (aux_div_aux_mod_v_main_~z~0_72_31_42 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_72_31 Int) (aux_div_v_main_~x~0_58_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))) (< (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) (+ main_~z~0 main_~x~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_it_2 aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) 1 (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0))) (not (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0)))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_72_31 Int)) (not (= main_~z~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))) (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296)) 0) (< 0 aux_mod_aux_mod_v_main_~z~0_72_31_42) (< main_~n~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* (div main_~n~0 4294967296) 4294967296) 1)) (< aux_mod_aux_mod_v_main_~z~0_72_31_42 0))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:55:13,740 INFO L290 TraceCheckUtils]: 7: Hoare triple {6698#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6698#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 16:55:15,749 WARN L290 TraceCheckUtils]: 6: Hoare triple {6705#(forall ((aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 Int) (aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 Int) (aux_div_v_main_~x~0_59_41 Int) (aux_div_v_main_~y~0_72_31 Int) (aux_div_aux_mod_v_main_~x~0_59_41_111 Int) (aux_div_aux_mod_v_main_~y~0_72_31_107 Int)) (or (< aux_div_aux_mod_v_main_~x~0_59_41_111 (+ 2 aux_div_v_main_~x~0_59_41)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~n~0 4294967297 (* aux_div_aux_mod_v_main_~y~0_72_31_107 4294967296)) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)) (>= aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (< (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (* aux_div_v_main_~y~0_72_31 4294967296) 1) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)) (and (or (<= (+ main_~x~0 4294967297) (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111)) (<= (+ (* aux_div_v_main_~x~0_59_41 4294967296) 4294967297) main_~x~0) (not (= main_~y~0 (+ (- 1) (* aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (- 1)) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296))))) (or (<= (+ (* aux_div_v_main_~x~0_59_41 4294967296) 4294967296 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)) (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~y~0 main_~x~0)) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 v_it_1 main_~y~0 2) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~y~0 1) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~y~0 main_~x~0 4294967298) (+ (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296))))) (< (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (* aux_div_v_main_~y~0_72_31 4294967296) 1)) (< aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (+ aux_div_aux_mod_v_main_~y~0_72_31_107 (div main_~n~0 4294967296) 2))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6698#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-27 16:55:15,792 INFO L290 TraceCheckUtils]: 5: Hoare triple {6584#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6705#(forall ((aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 Int) (aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 Int) (aux_div_v_main_~x~0_59_41 Int) (aux_div_v_main_~y~0_72_31 Int) (aux_div_aux_mod_v_main_~x~0_59_41_111 Int) (aux_div_aux_mod_v_main_~y~0_72_31_107 Int)) (or (< aux_div_aux_mod_v_main_~x~0_59_41_111 (+ 2 aux_div_v_main_~x~0_59_41)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~n~0 4294967297 (* aux_div_aux_mod_v_main_~y~0_72_31_107 4294967296)) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)) (>= aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (< (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (* aux_div_v_main_~y~0_72_31 4294967296) 1) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)) (and (or (<= (+ main_~x~0 4294967297) (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111)) (<= (+ (* aux_div_v_main_~x~0_59_41 4294967296) 4294967297) main_~x~0) (not (= main_~y~0 (+ (- 1) (* aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (- 1)) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296))))) (or (<= (+ (* aux_div_v_main_~x~0_59_41 4294967296) 4294967296 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)) (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~y~0 main_~x~0)) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 v_it_1 main_~y~0 2) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296)))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~y~0 1) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 main_~y~0 main_~x~0 4294967298) (+ (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111) (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296))))) (< (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (* aux_div_v_main_~y~0_72_31 4294967296) 1)) (< aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 (+ aux_div_aux_mod_v_main_~y~0_72_31_107 (div main_~n~0 4294967296) 2))))} is VALID [2022-04-27 16:55:15,792 INFO L272 TraceCheckUtils]: 4: Hoare triple {6584#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:55:15,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6584#true} {6584#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:55:15,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {6584#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:55:15,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {6584#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6584#true} is VALID [2022-04-27 16:55:15,792 INFO L272 TraceCheckUtils]: 0: Hoare triple {6584#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6584#true} is VALID [2022-04-27 16:55:15,793 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:55:15,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [464341397] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:55:15,793 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:55:15,793 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 26 [2022-04-27 16:55:15,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281549590] [2022-04-27 16:55:15,793 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:55:15,794 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:55:15,794 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:55:15,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:55:20,085 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 40 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 16:55:20,085 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 16:55:20,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:55:20,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 16:55:20,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=453, Unknown=18, NotChecked=46, Total=650 [2022-04-27 16:55:20,086 INFO L87 Difference]: Start difference. First operand 51 states and 83 transitions. Second operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:03,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:56:03,697 INFO L93 Difference]: Finished difference Result 87 states and 146 transitions. [2022-04-27 16:56:03,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-27 16:56:03,697 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:56:03,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:56:03,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:03,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 92 transitions. [2022-04-27 16:56:03,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:03,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 92 transitions. [2022-04-27 16:56:03,699 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 92 transitions. [2022-04-27 16:56:08,593 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 90 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 16:56:08,594 INFO L225 Difference]: With dead ends: 87 [2022-04-27 16:56:08,595 INFO L226 Difference]: Without dead ends: 83 [2022-04-27 16:56:08,595 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 24 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 146.0s TimeCoverageRelationStatistics Valid=346, Invalid=1187, Unknown=31, NotChecked=76, Total=1640 [2022-04-27 16:56:08,595 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 121 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 127 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 127 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 152 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 16:56:08,595 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 65 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 127 Invalid, 0 Unknown, 152 Unchecked, 0.7s Time] [2022-04-27 16:56:08,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-04-27 16:56:08,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 54. [2022-04-27 16:56:08,597 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:56:08,597 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:08,597 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:08,597 INFO L87 Difference]: Start difference. First operand 83 states. Second operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:08,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:56:08,598 INFO L93 Difference]: Finished difference Result 83 states and 141 transitions. [2022-04-27 16:56:08,598 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 141 transitions. [2022-04-27 16:56:08,598 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:56:08,598 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:56:08,599 INFO L74 IsIncluded]: Start isIncluded. First operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 83 states. [2022-04-27 16:56:08,599 INFO L87 Difference]: Start difference. First operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 83 states. [2022-04-27 16:56:08,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:56:08,600 INFO L93 Difference]: Finished difference Result 83 states and 141 transitions. [2022-04-27 16:56:08,600 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 141 transitions. [2022-04-27 16:56:08,600 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:56:08,600 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:56:08,600 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:56:08,600 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:56:08,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:08,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 89 transitions. [2022-04-27 16:56:08,601 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 89 transitions. Word has length 19 [2022-04-27 16:56:08,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:56:08,601 INFO L495 AbstractCegarLoop]: Abstraction has 54 states and 89 transitions. [2022-04-27 16:56:08,601 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:56:08,601 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 89 transitions. [2022-04-27 16:56:08,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 16:56:08,601 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:56:08,601 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:56:08,609 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-27 16:56:08,805 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:56:08,805 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:56:08,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:56:08,806 INFO L85 PathProgramCache]: Analyzing trace with hash -369501645, now seen corresponding path program 2 times [2022-04-27 16:56:08,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:56:08,806 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790004480] [2022-04-27 16:56:08,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:56:08,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:56:08,814 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:56:08,814 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:56:08,815 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_13 .cse0 (* (- 4294967296) (div (+ main_~y~0_13 .cse0) 4294967296)))) 0)) [2022-04-27 16:56:08,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:56:08,834 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-27 16:56:08,836 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.5))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-27 16:56:08,840 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.6))) (+ main_~y~0_13 .cse0 (* (- 4294967296) (div (+ main_~y~0_13 .cse0) 4294967296)))) 0)) [2022-04-27 16:56:09,683 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:56:09,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:56:09,689 INFO L290 TraceCheckUtils]: 0: Hoare triple {7078#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7066#true} is VALID [2022-04-27 16:56:09,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {7066#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:09,689 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7066#true} {7066#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:09,689 INFO L272 TraceCheckUtils]: 0: Hoare triple {7066#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7078#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:56:09,690 INFO L290 TraceCheckUtils]: 1: Hoare triple {7078#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7066#true} is VALID [2022-04-27 16:56:09,690 INFO L290 TraceCheckUtils]: 2: Hoare triple {7066#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:09,690 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7066#true} {7066#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:09,690 INFO L272 TraceCheckUtils]: 4: Hoare triple {7066#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:09,690 INFO L290 TraceCheckUtils]: 5: Hoare triple {7066#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7071#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,691 INFO L290 TraceCheckUtils]: 6: Hoare triple {7071#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7072#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,691 INFO L290 TraceCheckUtils]: 7: Hoare triple {7072#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,692 INFO L290 TraceCheckUtils]: 8: Hoare triple {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,693 INFO L290 TraceCheckUtils]: 9: Hoare triple {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,693 INFO L290 TraceCheckUtils]: 10: Hoare triple {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,693 INFO L290 TraceCheckUtils]: 11: Hoare triple {7073#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7074#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,694 INFO L290 TraceCheckUtils]: 12: Hoare triple {7074#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7074#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,694 INFO L290 TraceCheckUtils]: 13: Hoare triple {7074#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7074#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 16:56:09,696 INFO L290 TraceCheckUtils]: 14: Hoare triple {7074#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7075#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:56:09,696 INFO L290 TraceCheckUtils]: 15: Hoare triple {7075#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7075#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 16:56:09,697 INFO L272 TraceCheckUtils]: 16: Hoare triple {7075#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7076#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:56:09,697 INFO L290 TraceCheckUtils]: 17: Hoare triple {7076#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7077#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:56:09,697 INFO L290 TraceCheckUtils]: 18: Hoare triple {7077#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7067#false} is VALID [2022-04-27 16:56:09,698 INFO L290 TraceCheckUtils]: 19: Hoare triple {7067#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7067#false} is VALID [2022-04-27 16:56:09,698 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:56:09,698 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:56:09,698 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1790004480] [2022-04-27 16:56:09,698 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1790004480] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:56:09,698 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [915733775] [2022-04-27 16:56:09,698 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:56:09,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:56:09,698 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:56:09,699 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:56:09,699 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 16:56:09,730 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:56:09,730 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:56:09,731 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 16:56:09,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:56:09,741 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:56:12,337 INFO L272 TraceCheckUtils]: 0: Hoare triple {7066#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:12,337 INFO L290 TraceCheckUtils]: 1: Hoare triple {7066#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7066#true} is VALID [2022-04-27 16:56:12,337 INFO L290 TraceCheckUtils]: 2: Hoare triple {7066#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:12,337 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7066#true} {7066#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:12,337 INFO L272 TraceCheckUtils]: 4: Hoare triple {7066#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7066#true} is VALID [2022-04-27 16:56:12,338 INFO L290 TraceCheckUtils]: 5: Hoare triple {7066#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7097#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 16:56:12,338 INFO L290 TraceCheckUtils]: 6: Hoare triple {7097#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7101#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:56:12,338 INFO L290 TraceCheckUtils]: 7: Hoare triple {7101#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7101#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:56:12,338 INFO L290 TraceCheckUtils]: 8: Hoare triple {7101#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7101#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:56:12,339 INFO L290 TraceCheckUtils]: 9: Hoare triple {7101#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7101#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-27 16:56:12,339 INFO L290 TraceCheckUtils]: 10: Hoare triple {7101#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7114#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:56:12,339 INFO L290 TraceCheckUtils]: 11: Hoare triple {7114#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7114#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:56:12,340 INFO L290 TraceCheckUtils]: 12: Hoare triple {7114#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7121#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:56:12,342 INFO L290 TraceCheckUtils]: 13: Hoare triple {7121#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7121#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 16:56:12,343 INFO L290 TraceCheckUtils]: 14: Hoare triple {7121#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7128#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 16:56:12,343 INFO L290 TraceCheckUtils]: 15: Hoare triple {7128#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7128#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 16:56:12,344 INFO L272 TraceCheckUtils]: 16: Hoare triple {7128#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7135#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:56:12,345 INFO L290 TraceCheckUtils]: 17: Hoare triple {7135#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7139#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:56:12,345 INFO L290 TraceCheckUtils]: 18: Hoare triple {7139#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7067#false} is VALID [2022-04-27 16:56:12,345 INFO L290 TraceCheckUtils]: 19: Hoare triple {7067#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7067#false} is VALID [2022-04-27 16:56:12,345 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 16:56:12,345 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:56:15,706 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_77_31 Int) (aux_div_v_main_~z~0_77_31 Int)) (or (> 0 aux_mod_v_main_~z~0_77_31) (let ((.cse0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (.cse1 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (not (< c_main_~z~0 .cse0)) (not .cse1) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296)))))) (or (not (= c_main_~z~0 .cse0)) .cse1))) (>= aux_mod_v_main_~z~0_77_31 4294967296) (= aux_mod_v_main_~z~0_77_31 (mod c_main_~n~0 4294967296)))) is different from false