/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops/invert_string-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 15:56:05,613 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 15:56:05,614 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 15:56:05,640 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 15:56:05,641 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 15:56:05,641 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 15:56:05,643 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 15:56:05,644 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 15:56:05,646 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 15:56:05,646 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 15:56:05,647 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 15:56:05,648 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 15:56:05,649 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 15:56:05,649 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 15:56:05,650 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 15:56:05,651 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 15:56:05,652 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 15:56:05,653 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 15:56:05,655 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 15:56:05,657 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 15:56:05,658 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 15:56:05,661 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 15:56:05,662 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 15:56:05,663 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 15:56:05,664 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 15:56:05,667 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 15:56:05,675 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 15:56:05,680 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 15:56:05,686 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 15:56:05,687 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 15:56:05,704 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 15:56:05,705 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 15:56:05,706 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 15:56:05,706 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 15:56:05,707 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 15:56:05,707 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 15:56:05,708 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 15:56:05,708 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 15:56:05,708 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 15:56:05,709 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 15:56:05,709 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 15:56:05,948 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 15:56:05,973 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 15:56:05,975 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 15:56:05,976 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 15:56:05,977 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 15:56:05,979 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string-1.c [2022-04-27 15:56:06,049 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dd3d3eb17/878e2231d44e44ab9c5bca2f4e5aabcf/FLAG03b8ee127 [2022-04-27 15:56:06,445 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 15:56:06,446 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c [2022-04-27 15:56:06,450 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dd3d3eb17/878e2231d44e44ab9c5bca2f4e5aabcf/FLAG03b8ee127 [2022-04-27 15:56:06,876 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dd3d3eb17/878e2231d44e44ab9c5bca2f4e5aabcf [2022-04-27 15:56:06,878 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 15:56:06,880 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 15:56:06,889 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 15:56:06,890 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 15:56:06,893 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 15:56:06,894 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 03:56:06" (1/1) ... [2022-04-27 15:56:06,895 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@22452caa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:06, skipping insertion in model container [2022-04-27 15:56:06,896 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 03:56:06" (1/1) ... [2022-04-27 15:56:06,901 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 15:56:06,914 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 15:56:07,043 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c[352,365] [2022-04-27 15:56:07,059 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 15:56:07,067 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 15:56:07,081 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c[352,365] [2022-04-27 15:56:07,101 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 15:56:07,112 INFO L208 MainTranslator]: Completed translation [2022-04-27 15:56:07,113 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07 WrapperNode [2022-04-27 15:56:07,113 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 15:56:07,114 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 15:56:07,114 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 15:56:07,114 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 15:56:07,124 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,124 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,129 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,129 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,140 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,144 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,145 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,147 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 15:56:07,148 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 15:56:07,148 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 15:56:07,148 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 15:56:07,149 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 15:56:07,164 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:07,175 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 15:56:07,178 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 15:56:07,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 15:56:07,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 15:56:07,206 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 15:56:07,207 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 15:56:07,207 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 15:56:07,207 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 15:56:07,208 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 15:56:07,208 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 15:56:07,208 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 15:56:07,209 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 15:56:07,209 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-27 15:56:07,209 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 15:56:07,209 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 15:56:07,209 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-27 15:56:07,210 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 15:56:07,212 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 15:56:07,212 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 15:56:07,212 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 15:56:07,212 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 15:56:07,212 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 15:56:07,262 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 15:56:07,263 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 15:56:07,449 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 15:56:07,456 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 15:56:07,456 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-27 15:56:07,457 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 03:56:07 BoogieIcfgContainer [2022-04-27 15:56:07,457 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 15:56:07,458 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 15:56:07,458 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 15:56:07,459 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 15:56:07,462 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 03:56:07" (1/1) ... [2022-04-27 15:56:07,464 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 15:56:07,490 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 03:56:07 BasicIcfg [2022-04-27 15:56:07,490 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 15:56:07,491 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 15:56:07,491 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 15:56:07,494 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 15:56:07,494 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 03:56:06" (1/4) ... [2022-04-27 15:56:07,495 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40c32fcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 03:56:07, skipping insertion in model container [2022-04-27 15:56:07,495 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:56:07" (2/4) ... [2022-04-27 15:56:07,495 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40c32fcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 03:56:07, skipping insertion in model container [2022-04-27 15:56:07,495 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 03:56:07" (3/4) ... [2022-04-27 15:56:07,495 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40c32fcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 03:56:07, skipping insertion in model container [2022-04-27 15:56:07,496 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 03:56:07" (4/4) ... [2022-04-27 15:56:07,496 INFO L111 eAbstractionObserver]: Analyzing ICFG invert_string-1.cJordan [2022-04-27 15:56:07,507 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 15:56:07,507 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 15:56:07,542 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 15:56:07,547 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@6391fbb6, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2d903bb6 [2022-04-27 15:56:07,548 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 15:56:07,555 INFO L276 IsEmpty]: Start isEmpty. Operand has 29 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 22 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:07,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 15:56:07,561 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:07,561 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:07,562 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:07,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:07,566 INFO L85 PathProgramCache]: Analyzing trace with hash 1459888189, now seen corresponding path program 1 times [2022-04-27 15:56:07,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:07,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757127360] [2022-04-27 15:56:07,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:07,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:07,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:07,734 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:07,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:07,749 INFO L290 TraceCheckUtils]: 0: Hoare triple {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32#true} is VALID [2022-04-27 15:56:07,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 15:56:07,750 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32#true} {32#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 15:56:07,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {32#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:07,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32#true} is VALID [2022-04-27 15:56:07,753 INFO L290 TraceCheckUtils]: 2: Hoare triple {32#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 15:56:07,753 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32#true} {32#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 15:56:07,753 INFO L272 TraceCheckUtils]: 4: Hoare triple {32#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 15:56:07,753 INFO L290 TraceCheckUtils]: 5: Hoare triple {32#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {32#true} is VALID [2022-04-27 15:56:07,754 INFO L290 TraceCheckUtils]: 6: Hoare triple {32#true} [83] L17-->L17-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 15:56:07,755 INFO L290 TraceCheckUtils]: 7: Hoare triple {33#false} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {33#false} is VALID [2022-04-27 15:56:07,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {33#false} [86] L22-3-->L22-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 15:56:07,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {33#false} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {33#false} is VALID [2022-04-27 15:56:07,755 INFO L290 TraceCheckUtils]: 10: Hoare triple {33#false} [91] L29-3-->L29-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 15:56:07,756 INFO L290 TraceCheckUtils]: 11: Hoare triple {33#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {33#false} is VALID [2022-04-27 15:56:07,756 INFO L290 TraceCheckUtils]: 12: Hoare triple {33#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {33#false} is VALID [2022-04-27 15:56:07,756 INFO L272 TraceCheckUtils]: 13: Hoare triple {33#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {33#false} is VALID [2022-04-27 15:56:07,756 INFO L290 TraceCheckUtils]: 14: Hoare triple {33#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {33#false} is VALID [2022-04-27 15:56:07,757 INFO L290 TraceCheckUtils]: 15: Hoare triple {33#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 15:56:07,757 INFO L290 TraceCheckUtils]: 16: Hoare triple {33#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 15:56:07,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:07,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:07,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757127360] [2022-04-27 15:56:07,759 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1757127360] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:56:07,759 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:56:07,759 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 15:56:07,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387866633] [2022-04-27 15:56:07,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:56:07,765 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 15:56:07,767 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:07,769 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:07,800 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:07,800 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 15:56:07,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:07,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 15:56:07,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 15:56:07,823 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 22 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:07,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:07,911 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2022-04-27 15:56:07,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 15:56:07,911 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 15:56:07,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:07,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:07,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-27 15:56:07,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:07,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-27 15:56:07,933 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 36 transitions. [2022-04-27 15:56:07,972 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:07,979 INFO L225 Difference]: With dead ends: 29 [2022-04-27 15:56:07,980 INFO L226 Difference]: Without dead ends: 24 [2022-04-27 15:56:07,981 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 15:56:07,984 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 22 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:07,985 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 33 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 15:56:07,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-27 15:56:08,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-04-27 15:56:08,008 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:08,009 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,009 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,010 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,013 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-27 15:56:08,013 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 15:56:08,013 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:08,013 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:08,014 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-27 15:56:08,014 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-27 15:56:08,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,017 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-27 15:56:08,017 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 15:56:08,017 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:08,017 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:08,018 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:08,018 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:08,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-27 15:56:08,021 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 17 [2022-04-27 15:56:08,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:08,021 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-27 15:56:08,022 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,022 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 15:56:08,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 15:56:08,022 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:08,022 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:08,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 15:56:08,023 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:08,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:08,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1257013952, now seen corresponding path program 1 times [2022-04-27 15:56:08,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:08,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806004800] [2022-04-27 15:56:08,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:08,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:08,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:08,129 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:08,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:08,138 INFO L290 TraceCheckUtils]: 0: Hoare triple {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {141#true} is VALID [2022-04-27 15:56:08,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {141#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-27 15:56:08,139 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {141#true} {141#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-27 15:56:08,140 INFO L272 TraceCheckUtils]: 0: Hoare triple {141#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:08,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {148#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {141#true} is VALID [2022-04-27 15:56:08,140 INFO L290 TraceCheckUtils]: 2: Hoare triple {141#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-27 15:56:08,141 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {141#true} {141#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-27 15:56:08,141 INFO L272 TraceCheckUtils]: 4: Hoare triple {141#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#true} is VALID [2022-04-27 15:56:08,141 INFO L290 TraceCheckUtils]: 5: Hoare triple {141#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {141#true} is VALID [2022-04-27 15:56:08,142 INFO L290 TraceCheckUtils]: 6: Hoare triple {141#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {146#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:08,143 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {147#(and (<= 1 main_~MAX~0) (= main_~i~0 0))} is VALID [2022-04-27 15:56:08,143 INFO L290 TraceCheckUtils]: 8: Hoare triple {147#(and (<= 1 main_~MAX~0) (= main_~i~0 0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-27 15:56:08,144 INFO L290 TraceCheckUtils]: 9: Hoare triple {142#false} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {142#false} is VALID [2022-04-27 15:56:08,144 INFO L290 TraceCheckUtils]: 10: Hoare triple {142#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-27 15:56:08,144 INFO L290 TraceCheckUtils]: 11: Hoare triple {142#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {142#false} is VALID [2022-04-27 15:56:08,145 INFO L290 TraceCheckUtils]: 12: Hoare triple {142#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {142#false} is VALID [2022-04-27 15:56:08,145 INFO L272 TraceCheckUtils]: 13: Hoare triple {142#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {142#false} is VALID [2022-04-27 15:56:08,145 INFO L290 TraceCheckUtils]: 14: Hoare triple {142#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {142#false} is VALID [2022-04-27 15:56:08,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {142#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-27 15:56:08,146 INFO L290 TraceCheckUtils]: 16: Hoare triple {142#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {142#false} is VALID [2022-04-27 15:56:08,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:08,146 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:08,146 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806004800] [2022-04-27 15:56:08,147 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806004800] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:56:08,147 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:56:08,147 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 15:56:08,147 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206406066] [2022-04-27 15:56:08,147 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:56:08,149 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 15:56:08,149 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:08,149 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,165 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:08,165 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 15:56:08,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:08,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 15:56:08,166 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-27 15:56:08,167 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,354 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-27 15:56:08,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 15:56:08,354 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 15:56:08,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:08,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-27 15:56:08,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-27 15:56:08,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 34 transitions. [2022-04-27 15:56:08,422 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:08,425 INFO L225 Difference]: With dead ends: 30 [2022-04-27 15:56:08,425 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 15:56:08,428 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-04-27 15:56:08,430 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 40 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:08,431 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 24 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 15:56:08,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 15:56:08,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-04-27 15:56:08,443 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:08,443 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,445 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,446 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,449 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-27 15:56:08,449 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2022-04-27 15:56:08,450 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:08,450 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:08,450 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 30 states. [2022-04-27 15:56:08,451 INFO L87 Difference]: Start difference. First operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 30 states. [2022-04-27 15:56:08,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,453 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-27 15:56:08,453 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2022-04-27 15:56:08,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:08,454 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:08,454 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:08,454 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:08,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-04-27 15:56:08,457 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 17 [2022-04-27 15:56:08,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:08,458 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-04-27 15:56:08,458 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,458 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-27 15:56:08,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 15:56:08,459 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:08,460 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:08,460 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 15:56:08,460 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:08,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:08,461 INFO L85 PathProgramCache]: Analyzing trace with hash 313528638, now seen corresponding path program 1 times [2022-04-27 15:56:08,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:08,461 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443713631] [2022-04-27 15:56:08,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:08,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:08,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:08,550 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:08,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:08,563 INFO L290 TraceCheckUtils]: 0: Hoare triple {277#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {270#true} is VALID [2022-04-27 15:56:08,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {270#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-27 15:56:08,564 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {270#true} {270#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-27 15:56:08,565 INFO L272 TraceCheckUtils]: 0: Hoare triple {270#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {277#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:08,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {277#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {270#true} is VALID [2022-04-27 15:56:08,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {270#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-27 15:56:08,566 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {270#true} {270#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-27 15:56:08,567 INFO L272 TraceCheckUtils]: 4: Hoare triple {270#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {270#true} is VALID [2022-04-27 15:56:08,571 INFO L290 TraceCheckUtils]: 5: Hoare triple {270#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {270#true} is VALID [2022-04-27 15:56:08,572 INFO L290 TraceCheckUtils]: 6: Hoare triple {270#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:08,574 INFO L290 TraceCheckUtils]: 7: Hoare triple {275#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:08,575 INFO L290 TraceCheckUtils]: 8: Hoare triple {275#(<= 1 main_~MAX~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:08,576 INFO L290 TraceCheckUtils]: 9: Hoare triple {275#(<= 1 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:08,576 INFO L290 TraceCheckUtils]: 10: Hoare triple {275#(<= 1 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {275#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:08,577 INFO L290 TraceCheckUtils]: 11: Hoare triple {275#(<= 1 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {276#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:08,580 INFO L290 TraceCheckUtils]: 12: Hoare triple {276#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {271#false} is VALID [2022-04-27 15:56:08,581 INFO L290 TraceCheckUtils]: 13: Hoare triple {271#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {271#false} is VALID [2022-04-27 15:56:08,582 INFO L290 TraceCheckUtils]: 14: Hoare triple {271#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {271#false} is VALID [2022-04-27 15:56:08,582 INFO L272 TraceCheckUtils]: 15: Hoare triple {271#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {271#false} is VALID [2022-04-27 15:56:08,582 INFO L290 TraceCheckUtils]: 16: Hoare triple {271#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {271#false} is VALID [2022-04-27 15:56:08,582 INFO L290 TraceCheckUtils]: 17: Hoare triple {271#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {271#false} is VALID [2022-04-27 15:56:08,582 INFO L290 TraceCheckUtils]: 18: Hoare triple {271#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271#false} is VALID [2022-04-27 15:56:08,583 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 15:56:08,583 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:08,583 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443713631] [2022-04-27 15:56:08,583 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1443713631] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:56:08,583 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:56:08,584 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 15:56:08,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1244564481] [2022-04-27 15:56:08,584 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:56:08,584 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 15:56:08,585 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:08,585 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,604 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:08,605 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 15:56:08,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:08,606 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 15:56:08,606 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 15:56:08,607 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,756 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-27 15:56:08,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 15:56:08,756 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 15:56:08,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:08,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-27 15:56:08,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-27 15:56:08,761 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 28 transitions. [2022-04-27 15:56:08,788 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:08,790 INFO L225 Difference]: With dead ends: 26 [2022-04-27 15:56:08,790 INFO L226 Difference]: Without dead ends: 26 [2022-04-27 15:56:08,794 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 15:56:08,798 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 27 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:08,799 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 27 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 15:56:08,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-27 15:56:08,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-27 15:56:08,803 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:08,804 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,805 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,807 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,810 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-27 15:56:08,810 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-27 15:56:08,811 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:08,812 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:08,812 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 26 states. [2022-04-27 15:56:08,812 INFO L87 Difference]: Start difference. First operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 26 states. [2022-04-27 15:56:08,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:08,815 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-27 15:56:08,815 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-27 15:56:08,816 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:08,816 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:08,816 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:08,816 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:08,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:56:08,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2022-04-27 15:56:08,819 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 19 [2022-04-27 15:56:08,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:08,819 INFO L495 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2022-04-27 15:56:08,819 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:08,819 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-27 15:56:08,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 15:56:08,822 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:08,822 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:08,823 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 15:56:08,823 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:08,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:08,824 INFO L85 PathProgramCache]: Analyzing trace with hash -617930468, now seen corresponding path program 1 times [2022-04-27 15:56:08,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:08,824 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220454306] [2022-04-27 15:56:08,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:08,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:08,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:09,258 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:09,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:09,270 INFO L290 TraceCheckUtils]: 0: Hoare triple {403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-27 15:56:09,270 INFO L290 TraceCheckUtils]: 1: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:09,270 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:09,271 INFO L272 TraceCheckUtils]: 0: Hoare triple {388#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:09,272 INFO L290 TraceCheckUtils]: 1: Hoare triple {403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-27 15:56:09,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:09,272 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:09,272 INFO L272 TraceCheckUtils]: 4: Hoare triple {388#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:09,272 INFO L290 TraceCheckUtils]: 5: Hoare triple {388#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {388#true} is VALID [2022-04-27 15:56:09,273 INFO L290 TraceCheckUtils]: 6: Hoare triple {388#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {393#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:09,274 INFO L290 TraceCheckUtils]: 7: Hoare triple {393#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:09,274 INFO L290 TraceCheckUtils]: 8: Hoare triple {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:09,275 INFO L290 TraceCheckUtils]: 9: Hoare triple {394#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:09,276 INFO L290 TraceCheckUtils]: 10: Hoare triple {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:09,276 INFO L290 TraceCheckUtils]: 11: Hoare triple {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:09,278 INFO L290 TraceCheckUtils]: 12: Hoare triple {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:09,278 INFO L290 TraceCheckUtils]: 13: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:09,279 INFO L290 TraceCheckUtils]: 14: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:09,280 INFO L290 TraceCheckUtils]: 15: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:09,280 INFO L290 TraceCheckUtils]: 16: Hoare triple {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {400#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:09,281 INFO L272 TraceCheckUtils]: 17: Hoare triple {400#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {401#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 15:56:09,281 INFO L290 TraceCheckUtils]: 18: Hoare triple {401#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {402#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 15:56:09,282 INFO L290 TraceCheckUtils]: 19: Hoare triple {402#(not (= __VERIFIER_assert_~cond 0))} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-27 15:56:09,282 INFO L290 TraceCheckUtils]: 20: Hoare triple {389#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-27 15:56:09,287 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:09,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:09,288 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220454306] [2022-04-27 15:56:09,288 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220454306] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:56:09,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [147833499] [2022-04-27 15:56:09,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:09,289 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:09,290 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:09,291 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:56:09,292 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 15:56:09,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:09,345 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-27 15:56:09,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:09,377 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:56:09,534 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-27 15:56:09,735 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 15 [2022-04-27 15:56:09,958 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 10 [2022-04-27 15:56:10,012 INFO L272 TraceCheckUtils]: 0: Hoare triple {388#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {388#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-27 15:56:10,013 INFO L290 TraceCheckUtils]: 2: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,013 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,013 INFO L272 TraceCheckUtils]: 4: Hoare triple {388#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,013 INFO L290 TraceCheckUtils]: 5: Hoare triple {388#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {388#true} is VALID [2022-04-27 15:56:10,014 INFO L290 TraceCheckUtils]: 6: Hoare triple {388#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {393#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:10,016 INFO L290 TraceCheckUtils]: 7: Hoare triple {393#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:10,017 INFO L290 TraceCheckUtils]: 8: Hoare triple {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:10,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {428#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:10,023 INFO L290 TraceCheckUtils]: 10: Hoare triple {395#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:10,024 INFO L290 TraceCheckUtils]: 11: Hoare triple {396#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:10,024 INFO L290 TraceCheckUtils]: 12: Hoare triple {397#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:10,025 INFO L290 TraceCheckUtils]: 13: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:10,026 INFO L290 TraceCheckUtils]: 14: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:10,027 INFO L290 TraceCheckUtils]: 15: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:10,028 INFO L290 TraceCheckUtils]: 16: Hoare triple {399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {400#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:10,029 INFO L272 TraceCheckUtils]: 17: Hoare triple {400#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {459#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 15:56:10,031 INFO L290 TraceCheckUtils]: 18: Hoare triple {459#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {463#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 15:56:10,031 INFO L290 TraceCheckUtils]: 19: Hoare triple {463#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-27 15:56:10,031 INFO L290 TraceCheckUtils]: 20: Hoare triple {389#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-27 15:56:10,032 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:10,032 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:56:10,162 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-27 15:56:10,166 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-04-27 15:56:10,181 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2022-04-27 15:56:10,199 INFO L356 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-04-27 15:56:10,199 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2022-04-27 15:56:10,530 INFO L290 TraceCheckUtils]: 20: Hoare triple {389#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-27 15:56:10,534 INFO L290 TraceCheckUtils]: 19: Hoare triple {463#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {389#false} is VALID [2022-04-27 15:56:10,534 INFO L290 TraceCheckUtils]: 18: Hoare triple {459#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {463#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 15:56:10,535 INFO L272 TraceCheckUtils]: 17: Hoare triple {400#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {459#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 15:56:10,536 INFO L290 TraceCheckUtils]: 16: Hoare triple {482#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {400#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:10,536 INFO L290 TraceCheckUtils]: 15: Hoare triple {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {482#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:10,537 INFO L290 TraceCheckUtils]: 14: Hoare triple {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 15:56:10,538 INFO L290 TraceCheckUtils]: 13: Hoare triple {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 15:56:10,539 INFO L290 TraceCheckUtils]: 12: Hoare triple {496#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 (+ main_~j~0 1))) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 (+ main_~j~0 1))))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {486#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 15:56:10,540 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1)))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {496#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 (+ main_~j~0 1))) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 (+ main_~j~0 1))))} is VALID [2022-04-27 15:56:10,541 INFO L290 TraceCheckUtils]: 10: Hoare triple {504#(or (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))) (< main_~i~0 main_~MAX~0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {500#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1)))} is VALID [2022-04-27 15:56:10,543 INFO L290 TraceCheckUtils]: 9: Hoare triple {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {504#(or (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-27 15:56:10,543 INFO L290 TraceCheckUtils]: 8: Hoare triple {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} is VALID [2022-04-27 15:56:10,549 INFO L290 TraceCheckUtils]: 7: Hoare triple {393#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {508#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} is VALID [2022-04-27 15:56:10,550 INFO L290 TraceCheckUtils]: 6: Hoare triple {388#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {393#(<= 1 main_~MAX~0)} is VALID [2022-04-27 15:56:10,550 INFO L290 TraceCheckUtils]: 5: Hoare triple {388#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {388#true} is VALID [2022-04-27 15:56:10,550 INFO L272 TraceCheckUtils]: 4: Hoare triple {388#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,550 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {388#true} {388#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,550 INFO L290 TraceCheckUtils]: 2: Hoare triple {388#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {388#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {388#true} is VALID [2022-04-27 15:56:10,551 INFO L272 TraceCheckUtils]: 0: Hoare triple {388#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {388#true} is VALID [2022-04-27 15:56:10,551 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:10,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [147833499] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:56:10,551 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:56:10,551 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 22 [2022-04-27 15:56:10,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806802961] [2022-04-27 15:56:10,552 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:56:10,552 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 15:56:10,553 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:10,553 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:10,584 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:10,585 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 15:56:10,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:10,585 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 15:56:10,585 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2022-04-27 15:56:10,586 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:11,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:11,986 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-27 15:56:11,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-27 15:56:11,986 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 15:56:11,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:11,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:11,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 59 transitions. [2022-04-27 15:56:11,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:11,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 59 transitions. [2022-04-27 15:56:11,992 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 59 transitions. [2022-04-27 15:56:12,061 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:12,063 INFO L225 Difference]: With dead ends: 52 [2022-04-27 15:56:12,063 INFO L226 Difference]: Without dead ends: 52 [2022-04-27 15:56:12,064 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=287, Invalid=1119, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 15:56:12,064 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 73 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 444 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:12,065 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 70 Invalid, 444 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 15:56:12,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-04-27 15:56:12,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 39. [2022-04-27 15:56:12,068 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:12,068 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:12,069 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:12,069 INFO L87 Difference]: Start difference. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:12,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:12,072 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-27 15:56:12,072 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 58 transitions. [2022-04-27 15:56:12,073 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:12,073 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:12,074 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-27 15:56:12,074 INFO L87 Difference]: Start difference. First operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-27 15:56:12,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:12,079 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-27 15:56:12,080 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 58 transitions. [2022-04-27 15:56:12,081 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:12,081 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:12,081 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:12,081 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:12,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:12,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2022-04-27 15:56:12,085 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 43 transitions. Word has length 21 [2022-04-27 15:56:12,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:12,086 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 43 transitions. [2022-04-27 15:56:12,086 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:12,087 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 43 transitions. [2022-04-27 15:56:12,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 15:56:12,087 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:12,088 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:12,112 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 15:56:12,303 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:12,304 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:12,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:12,304 INFO L85 PathProgramCache]: Analyzing trace with hash 809600538, now seen corresponding path program 2 times [2022-04-27 15:56:12,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:12,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356870779] [2022-04-27 15:56:12,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:12,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:12,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:12,398 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:12,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:12,404 INFO L290 TraceCheckUtils]: 0: Hoare triple {774#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-27 15:56:12,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,404 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,405 INFO L272 TraceCheckUtils]: 0: Hoare triple {765#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:12,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-27 15:56:12,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,406 INFO L272 TraceCheckUtils]: 4: Hoare triple {765#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {765#true} is VALID [2022-04-27 15:56:12,406 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,406 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {770#(= main_~i~0 0)} is VALID [2022-04-27 15:56:12,407 INFO L290 TraceCheckUtils]: 8: Hoare triple {770#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {770#(= main_~i~0 0)} is VALID [2022-04-27 15:56:12,407 INFO L290 TraceCheckUtils]: 9: Hoare triple {770#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,408 INFO L290 TraceCheckUtils]: 10: Hoare triple {771#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,408 INFO L290 TraceCheckUtils]: 11: Hoare triple {772#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,409 INFO L290 TraceCheckUtils]: 12: Hoare triple {772#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,411 INFO L290 TraceCheckUtils]: 13: Hoare triple {772#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,412 INFO L290 TraceCheckUtils]: 14: Hoare triple {771#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,413 INFO L290 TraceCheckUtils]: 15: Hoare triple {771#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,413 INFO L290 TraceCheckUtils]: 16: Hoare triple {773#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,413 INFO L290 TraceCheckUtils]: 17: Hoare triple {766#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {766#false} is VALID [2022-04-27 15:56:12,413 INFO L290 TraceCheckUtils]: 18: Hoare triple {766#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {766#false} is VALID [2022-04-27 15:56:12,413 INFO L272 TraceCheckUtils]: 19: Hoare triple {766#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {766#false} is VALID [2022-04-27 15:56:12,414 INFO L290 TraceCheckUtils]: 20: Hoare triple {766#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {766#false} is VALID [2022-04-27 15:56:12,414 INFO L290 TraceCheckUtils]: 21: Hoare triple {766#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,414 INFO L290 TraceCheckUtils]: 22: Hoare triple {766#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,414 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:12,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:12,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356870779] [2022-04-27 15:56:12,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [356870779] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:56:12,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1044103993] [2022-04-27 15:56:12,415 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 15:56:12,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:12,415 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:12,416 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:56:12,417 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 15:56:12,477 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 15:56:12,477 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 15:56:12,478 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 15:56:12,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:12,490 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:56:12,593 INFO L272 TraceCheckUtils]: 0: Hoare triple {765#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {765#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-27 15:56:12,593 INFO L290 TraceCheckUtils]: 2: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,593 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,593 INFO L272 TraceCheckUtils]: 4: Hoare triple {765#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,594 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {765#true} is VALID [2022-04-27 15:56:12,594 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,594 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,595 INFO L290 TraceCheckUtils]: 8: Hoare triple {773#(<= 0 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {773#(<= 0 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,596 INFO L290 TraceCheckUtils]: 10: Hoare triple {771#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,596 INFO L290 TraceCheckUtils]: 11: Hoare triple {772#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,596 INFO L290 TraceCheckUtils]: 12: Hoare triple {772#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,597 INFO L290 TraceCheckUtils]: 13: Hoare triple {772#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,597 INFO L290 TraceCheckUtils]: 14: Hoare triple {771#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,599 INFO L290 TraceCheckUtils]: 15: Hoare triple {771#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,599 INFO L290 TraceCheckUtils]: 16: Hoare triple {773#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,599 INFO L290 TraceCheckUtils]: 17: Hoare triple {766#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {766#false} is VALID [2022-04-27 15:56:12,599 INFO L290 TraceCheckUtils]: 18: Hoare triple {766#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {766#false} is VALID [2022-04-27 15:56:12,599 INFO L272 TraceCheckUtils]: 19: Hoare triple {766#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {766#false} is VALID [2022-04-27 15:56:12,600 INFO L290 TraceCheckUtils]: 20: Hoare triple {766#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {766#false} is VALID [2022-04-27 15:56:12,600 INFO L290 TraceCheckUtils]: 21: Hoare triple {766#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,600 INFO L290 TraceCheckUtils]: 22: Hoare triple {766#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,600 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:12,600 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:56:12,691 INFO L290 TraceCheckUtils]: 22: Hoare triple {766#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,691 INFO L290 TraceCheckUtils]: 21: Hoare triple {766#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,691 INFO L290 TraceCheckUtils]: 20: Hoare triple {766#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {766#false} is VALID [2022-04-27 15:56:12,691 INFO L272 TraceCheckUtils]: 19: Hoare triple {766#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {766#false} is VALID [2022-04-27 15:56:12,691 INFO L290 TraceCheckUtils]: 18: Hoare triple {766#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {766#false} is VALID [2022-04-27 15:56:12,691 INFO L290 TraceCheckUtils]: 17: Hoare triple {766#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {766#false} is VALID [2022-04-27 15:56:12,692 INFO L290 TraceCheckUtils]: 16: Hoare triple {773#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {766#false} is VALID [2022-04-27 15:56:12,695 INFO L290 TraceCheckUtils]: 15: Hoare triple {771#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,696 INFO L290 TraceCheckUtils]: 14: Hoare triple {771#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,697 INFO L290 TraceCheckUtils]: 13: Hoare triple {772#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,697 INFO L290 TraceCheckUtils]: 12: Hoare triple {772#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,697 INFO L290 TraceCheckUtils]: 11: Hoare triple {772#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,698 INFO L290 TraceCheckUtils]: 10: Hoare triple {771#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {772#(<= 2 main_~MAX~0)} is VALID [2022-04-27 15:56:12,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {773#(<= 0 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {771#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:12,699 INFO L290 TraceCheckUtils]: 8: Hoare triple {773#(<= 0 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,699 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {773#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:12,699 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,700 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {765#true} is VALID [2022-04-27 15:56:12,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {765#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {765#true} {765#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {765#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {765#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {765#true} is VALID [2022-04-27 15:56:12,722 INFO L272 TraceCheckUtils]: 0: Hoare triple {765#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {765#true} is VALID [2022-04-27 15:56:12,723 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:12,723 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1044103993] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:56:12,723 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:56:12,723 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 7 [2022-04-27 15:56:12,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797493278] [2022-04-27 15:56:12,723 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:56:12,724 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 15:56:12,725 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:12,725 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:12,745 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:12,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 15:56:12,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:12,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 15:56:12,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-27 15:56:12,746 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:13,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:13,026 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-27 15:56:13,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 15:56:13,026 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 15:56:13,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:13,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:13,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 15:56:13,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:13,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 15:56:13,030 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-27 15:56:13,076 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:13,078 INFO L225 Difference]: With dead ends: 48 [2022-04-27 15:56:13,078 INFO L226 Difference]: Without dead ends: 48 [2022-04-27 15:56:13,078 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-27 15:56:13,079 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 38 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:13,079 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [38 Valid, 36 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 15:56:13,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-27 15:56:13,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 41. [2022-04-27 15:56:13,082 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:13,082 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:13,082 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:13,082 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:13,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:13,084 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-27 15:56:13,084 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-04-27 15:56:13,084 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:13,084 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:13,084 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 48 states. [2022-04-27 15:56:13,085 INFO L87 Difference]: Start difference. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 48 states. [2022-04-27 15:56:13,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:13,086 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-27 15:56:13,086 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-04-27 15:56:13,086 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:13,087 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:13,087 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:13,087 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:13,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:13,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2022-04-27 15:56:13,088 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 23 [2022-04-27 15:56:13,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:13,088 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-04-27 15:56:13,088 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:13,089 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2022-04-27 15:56:13,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 15:56:13,089 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:13,089 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:13,107 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 15:56:13,296 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:13,297 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:13,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:13,297 INFO L85 PathProgramCache]: Analyzing trace with hash -634204424, now seen corresponding path program 3 times [2022-04-27 15:56:13,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:13,297 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788446484] [2022-04-27 15:56:13,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:13,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:13,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:13,676 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:13,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:13,680 INFO L290 TraceCheckUtils]: 0: Hoare triple {1128#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-27 15:56:13,680 INFO L290 TraceCheckUtils]: 1: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:13,680 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:13,681 INFO L272 TraceCheckUtils]: 0: Hoare triple {1111#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1128#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:13,681 INFO L290 TraceCheckUtils]: 1: Hoare triple {1128#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-27 15:56:13,681 INFO L290 TraceCheckUtils]: 2: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:13,682 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:13,682 INFO L272 TraceCheckUtils]: 4: Hoare triple {1111#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:13,682 INFO L290 TraceCheckUtils]: 5: Hoare triple {1111#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1111#true} is VALID [2022-04-27 15:56:13,682 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:13,683 INFO L290 TraceCheckUtils]: 7: Hoare triple {1111#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:13,684 INFO L290 TraceCheckUtils]: 8: Hoare triple {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:13,684 INFO L290 TraceCheckUtils]: 9: Hoare triple {1116#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1117#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-27 15:56:13,685 INFO L290 TraceCheckUtils]: 10: Hoare triple {1117#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1118#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:13,685 INFO L290 TraceCheckUtils]: 11: Hoare triple {1118#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1119#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-27 15:56:13,686 INFO L290 TraceCheckUtils]: 12: Hoare triple {1119#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1120#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:13,687 INFO L290 TraceCheckUtils]: 13: Hoare triple {1120#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1121#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:13,687 INFO L290 TraceCheckUtils]: 14: Hoare triple {1121#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} is VALID [2022-04-27 15:56:13,688 INFO L290 TraceCheckUtils]: 15: Hoare triple {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} is VALID [2022-04-27 15:56:13,689 INFO L290 TraceCheckUtils]: 16: Hoare triple {1122#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:13,689 INFO L290 TraceCheckUtils]: 17: Hoare triple {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:13,690 INFO L290 TraceCheckUtils]: 18: Hoare triple {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:13,691 INFO L290 TraceCheckUtils]: 19: Hoare triple {1123#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1124#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} is VALID [2022-04-27 15:56:13,691 INFO L290 TraceCheckUtils]: 20: Hoare triple {1124#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1125#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:13,692 INFO L272 TraceCheckUtils]: 21: Hoare triple {1125#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1126#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 15:56:13,693 INFO L290 TraceCheckUtils]: 22: Hoare triple {1126#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1127#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 15:56:13,693 INFO L290 TraceCheckUtils]: 23: Hoare triple {1127#(not (= __VERIFIER_assert_~cond 0))} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-27 15:56:13,693 INFO L290 TraceCheckUtils]: 24: Hoare triple {1112#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-27 15:56:13,693 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:13,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:13,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788446484] [2022-04-27 15:56:13,694 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788446484] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:56:13,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2025878688] [2022-04-27 15:56:13,694 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 15:56:13,694 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:13,694 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:13,696 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:56:13,724 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 15:56:13,759 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 15:56:13,759 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 15:56:13,760 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 15:56:13,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:13,778 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:56:13,800 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-27 15:56:14,018 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-27 15:56:14,099 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-27 15:56:14,452 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-27 15:56:14,453 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 13 [2022-04-27 15:56:14,542 INFO L272 TraceCheckUtils]: 0: Hoare triple {1111#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:14,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {1111#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-27 15:56:14,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:14,543 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:14,543 INFO L272 TraceCheckUtils]: 4: Hoare triple {1111#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:14,543 INFO L290 TraceCheckUtils]: 5: Hoare triple {1111#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1111#true} is VALID [2022-04-27 15:56:14,543 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:14,544 INFO L290 TraceCheckUtils]: 7: Hoare triple {1111#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:14,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:14,545 INFO L290 TraceCheckUtils]: 9: Hoare triple {1153#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1160#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-27 15:56:14,546 INFO L290 TraceCheckUtils]: 10: Hoare triple {1160#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1164#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-27 15:56:14,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {1164#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< main_~i~0 main_~MAX~0))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1168#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-27 15:56:14,549 INFO L290 TraceCheckUtils]: 12: Hoare triple {1168#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1172#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,549 INFO L290 TraceCheckUtils]: 13: Hoare triple {1172#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1176#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {1176#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,551 INFO L290 TraceCheckUtils]: 16: Hoare triple {1180#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,552 INFO L290 TraceCheckUtils]: 17: Hoare triple {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,553 INFO L290 TraceCheckUtils]: 18: Hoare triple {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 15:56:14,554 INFO L290 TraceCheckUtils]: 19: Hoare triple {1187#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1197#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 0 main_~j~0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1))} is VALID [2022-04-27 15:56:14,557 INFO L290 TraceCheckUtils]: 20: Hoare triple {1197#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 0 main_~j~0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1125#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:14,558 INFO L272 TraceCheckUtils]: 21: Hoare triple {1125#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 15:56:14,559 INFO L290 TraceCheckUtils]: 22: Hoare triple {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1208#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 15:56:14,560 INFO L290 TraceCheckUtils]: 23: Hoare triple {1208#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-27 15:56:14,560 INFO L290 TraceCheckUtils]: 24: Hoare triple {1112#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-27 15:56:14,560 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:14,560 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:56:16,570 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 108 [2022-04-27 15:56:16,591 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-27 15:56:16,592 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 201 treesize of output 179 [2022-04-27 15:56:17,023 INFO L290 TraceCheckUtils]: 24: Hoare triple {1112#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-27 15:56:17,027 INFO L290 TraceCheckUtils]: 23: Hoare triple {1208#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1112#false} is VALID [2022-04-27 15:56:17,031 INFO L290 TraceCheckUtils]: 22: Hoare triple {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1208#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 15:56:17,032 INFO L272 TraceCheckUtils]: 21: Hoare triple {1125#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1204#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 15:56:17,033 INFO L290 TraceCheckUtils]: 20: Hoare triple {1227#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1125#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:17,033 INFO L290 TraceCheckUtils]: 19: Hoare triple {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1227#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:17,034 INFO L290 TraceCheckUtils]: 18: Hoare triple {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 15:56:17,035 INFO L290 TraceCheckUtils]: 17: Hoare triple {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 15:56:17,644 WARN L290 TraceCheckUtils]: 16: Hoare triple {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1231#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is UNKNOWN [2022-04-27 15:56:17,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:17,646 INFO L290 TraceCheckUtils]: 14: Hoare triple {1248#(= main_~MAX~0 (+ main_~j~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1241#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:17,646 INFO L290 TraceCheckUtils]: 13: Hoare triple {1252#(= main_~MAX~0 2)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1248#(= main_~MAX~0 (+ main_~j~0 2))} is VALID [2022-04-27 15:56:17,647 INFO L290 TraceCheckUtils]: 12: Hoare triple {1256#(or (= main_~MAX~0 2) (< main_~i~0 main_~MAX~0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1252#(= main_~MAX~0 2)} is VALID [2022-04-27 15:56:17,647 INFO L290 TraceCheckUtils]: 11: Hoare triple {1260#(or (< (+ main_~i~0 1) main_~MAX~0) (= main_~MAX~0 2))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1256#(or (= main_~MAX~0 2) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-27 15:56:17,648 INFO L290 TraceCheckUtils]: 10: Hoare triple {1264#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1260#(or (< (+ main_~i~0 1) main_~MAX~0) (= main_~MAX~0 2))} is VALID [2022-04-27 15:56:17,649 INFO L290 TraceCheckUtils]: 9: Hoare triple {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1264#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 15:56:17,649 INFO L290 TraceCheckUtils]: 8: Hoare triple {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} is VALID [2022-04-27 15:56:17,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {1111#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1268#(and (<= main_~i~0 0) (<= 0 main_~i~0))} is VALID [2022-04-27 15:56:17,650 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:17,650 INFO L290 TraceCheckUtils]: 5: Hoare triple {1111#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1111#true} is VALID [2022-04-27 15:56:17,650 INFO L272 TraceCheckUtils]: 4: Hoare triple {1111#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:17,650 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1111#true} {1111#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:17,651 INFO L290 TraceCheckUtils]: 2: Hoare triple {1111#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:17,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {1111#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1111#true} is VALID [2022-04-27 15:56:17,651 INFO L272 TraceCheckUtils]: 0: Hoare triple {1111#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1111#true} is VALID [2022-04-27 15:56:17,651 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:17,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2025878688] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:56:17,651 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:56:17,652 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 35 [2022-04-27 15:56:17,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474805350] [2022-04-27 15:56:17,652 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:56:17,652 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 15:56:17,653 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:17,653 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:18,402 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 57 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:18,403 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-27 15:56:18,403 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:18,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-27 15:56:18,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1047, Unknown=2, NotChecked=0, Total=1190 [2022-04-27 15:56:18,404 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:20,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:20,888 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-27 15:56:20,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-27 15:56:20,889 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 15:56:20,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:20,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:20,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 76 transitions. [2022-04-27 15:56:20,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:20,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 76 transitions. [2022-04-27 15:56:20,894 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 76 transitions. [2022-04-27 15:56:20,968 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:20,969 INFO L225 Difference]: With dead ends: 78 [2022-04-27 15:56:20,970 INFO L226 Difference]: Without dead ends: 78 [2022-04-27 15:56:20,971 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 850 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=560, Invalid=3098, Unknown=2, NotChecked=0, Total=3660 [2022-04-27 15:56:20,971 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 84 mSDsluCounter, 89 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 155 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 108 SdHoareTripleChecker+Invalid, 997 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 155 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:20,971 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [84 Valid, 108 Invalid, 997 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [155 Valid, 790 Invalid, 0 Unknown, 52 Unchecked, 0.9s Time] [2022-04-27 15:56:20,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-27 15:56:20,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 46. [2022-04-27 15:56:20,975 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:20,975 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:20,975 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:20,976 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:20,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:20,978 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-27 15:56:20,978 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 88 transitions. [2022-04-27 15:56:20,979 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:20,979 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:20,979 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 78 states. [2022-04-27 15:56:20,979 INFO L87 Difference]: Start difference. First operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 78 states. [2022-04-27 15:56:20,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:20,982 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-27 15:56:20,982 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 88 transitions. [2022-04-27 15:56:20,982 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:20,982 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:20,982 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:20,982 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:20,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 15:56:20,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2022-04-27 15:56:20,984 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 25 [2022-04-27 15:56:20,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:20,984 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2022-04-27 15:56:20,984 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:20,984 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-27 15:56:20,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 15:56:20,985 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:20,985 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:21,011 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 15:56:21,206 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:21,206 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:21,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:21,207 INFO L85 PathProgramCache]: Analyzing trace with hash 1131578614, now seen corresponding path program 4 times [2022-04-27 15:56:21,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:21,207 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [726255578] [2022-04-27 15:56:21,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:21,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:21,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:21,294 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:21,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:21,298 INFO L290 TraceCheckUtils]: 0: Hoare triple {1640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-27 15:56:21,299 INFO L290 TraceCheckUtils]: 1: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,299 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,299 INFO L272 TraceCheckUtils]: 0: Hoare triple {1630#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:21,300 INFO L290 TraceCheckUtils]: 1: Hoare triple {1640#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-27 15:56:21,300 INFO L290 TraceCheckUtils]: 2: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,300 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,300 INFO L272 TraceCheckUtils]: 4: Hoare triple {1630#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,300 INFO L290 TraceCheckUtils]: 5: Hoare triple {1630#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1630#true} is VALID [2022-04-27 15:56:21,300 INFO L290 TraceCheckUtils]: 6: Hoare triple {1630#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,300 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1635#(= main_~i~0 0)} is VALID [2022-04-27 15:56:21,301 INFO L290 TraceCheckUtils]: 8: Hoare triple {1635#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1635#(= main_~i~0 0)} is VALID [2022-04-27 15:56:21,301 INFO L290 TraceCheckUtils]: 9: Hoare triple {1635#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1636#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:21,302 INFO L290 TraceCheckUtils]: 10: Hoare triple {1636#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1636#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:21,302 INFO L290 TraceCheckUtils]: 11: Hoare triple {1636#(<= 1 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1637#(<= 2 main_~i~0)} is VALID [2022-04-27 15:56:21,303 INFO L290 TraceCheckUtils]: 12: Hoare triple {1637#(<= 2 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1638#(<= 3 main_~MAX~0)} is VALID [2022-04-27 15:56:21,303 INFO L290 TraceCheckUtils]: 13: Hoare triple {1638#(<= 3 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1638#(<= 3 main_~MAX~0)} is VALID [2022-04-27 15:56:21,304 INFO L290 TraceCheckUtils]: 14: Hoare triple {1638#(<= 3 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1638#(<= 3 main_~MAX~0)} is VALID [2022-04-27 15:56:21,304 INFO L290 TraceCheckUtils]: 15: Hoare triple {1638#(<= 3 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1637#(<= 2 main_~i~0)} is VALID [2022-04-27 15:56:21,305 INFO L290 TraceCheckUtils]: 16: Hoare triple {1637#(<= 2 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1637#(<= 2 main_~i~0)} is VALID [2022-04-27 15:56:21,305 INFO L290 TraceCheckUtils]: 17: Hoare triple {1637#(<= 2 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1636#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:21,305 INFO L290 TraceCheckUtils]: 18: Hoare triple {1636#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1636#(<= 1 main_~i~0)} is VALID [2022-04-27 15:56:21,306 INFO L290 TraceCheckUtils]: 19: Hoare triple {1636#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1639#(<= 0 main_~i~0)} is VALID [2022-04-27 15:56:21,306 INFO L290 TraceCheckUtils]: 20: Hoare triple {1639#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:21,306 INFO L290 TraceCheckUtils]: 21: Hoare triple {1631#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1631#false} is VALID [2022-04-27 15:56:21,307 INFO L290 TraceCheckUtils]: 22: Hoare triple {1631#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1631#false} is VALID [2022-04-27 15:56:21,307 INFO L272 TraceCheckUtils]: 23: Hoare triple {1631#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1631#false} is VALID [2022-04-27 15:56:21,308 INFO L290 TraceCheckUtils]: 24: Hoare triple {1631#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1631#false} is VALID [2022-04-27 15:56:21,308 INFO L290 TraceCheckUtils]: 25: Hoare triple {1631#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:21,308 INFO L290 TraceCheckUtils]: 26: Hoare triple {1631#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:21,308 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:21,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:21,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [726255578] [2022-04-27 15:56:21,308 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [726255578] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:56:21,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1527463398] [2022-04-27 15:56:21,309 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 15:56:21,309 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:21,309 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:21,312 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:56:21,325 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 15:56:21,362 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 15:56:21,363 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 15:56:21,363 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-27 15:56:21,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:21,375 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:56:21,405 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-27 15:56:21,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-27 15:56:21,903 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-27 15:56:21,903 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 13 [2022-04-27 15:56:21,981 INFO L272 TraceCheckUtils]: 0: Hoare triple {1630#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {1630#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-27 15:56:21,981 INFO L290 TraceCheckUtils]: 2: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,981 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,981 INFO L272 TraceCheckUtils]: 4: Hoare triple {1630#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,981 INFO L290 TraceCheckUtils]: 5: Hoare triple {1630#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1630#true} is VALID [2022-04-27 15:56:21,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {1630#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:21,982 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,982 INFO L290 TraceCheckUtils]: 8: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,983 INFO L290 TraceCheckUtils]: 9: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,984 INFO L290 TraceCheckUtils]: 10: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,984 INFO L290 TraceCheckUtils]: 11: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,991 INFO L290 TraceCheckUtils]: 13: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,992 INFO L290 TraceCheckUtils]: 14: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,992 INFO L290 TraceCheckUtils]: 15: Hoare triple {1665#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1690#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,993 INFO L290 TraceCheckUtils]: 16: Hoare triple {1690#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1694#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,994 INFO L290 TraceCheckUtils]: 17: Hoare triple {1694#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1698#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,994 INFO L290 TraceCheckUtils]: 18: Hoare triple {1698#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1702#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,995 INFO L290 TraceCheckUtils]: 19: Hoare triple {1702#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1706#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= main_~MAX~0 (+ main_~i~0 3)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,996 INFO L290 TraceCheckUtils]: 20: Hoare triple {1706#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= main_~MAX~0 (+ main_~i~0 3)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1710#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< main_~MAX~0 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,997 INFO L290 TraceCheckUtils]: 21: Hoare triple {1710#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< main_~MAX~0 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1714#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (< main_~j~0 2) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 15:56:21,997 INFO L290 TraceCheckUtils]: 22: Hoare triple {1714#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (< main_~j~0 2) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1718#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:21,998 INFO L272 TraceCheckUtils]: 23: Hoare triple {1718#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 15:56:21,998 INFO L290 TraceCheckUtils]: 24: Hoare triple {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1726#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 15:56:21,999 INFO L290 TraceCheckUtils]: 25: Hoare triple {1726#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:22,004 INFO L290 TraceCheckUtils]: 26: Hoare triple {1631#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:22,004 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 15:56:22,004 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:56:22,194 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-27 15:56:22,194 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-04-27 15:56:22,216 INFO L356 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-04-27 15:56:22,216 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2022-04-27 15:56:22,233 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2022-04-27 15:56:22,398 INFO L290 TraceCheckUtils]: 26: Hoare triple {1631#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:22,398 INFO L290 TraceCheckUtils]: 25: Hoare triple {1726#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1631#false} is VALID [2022-04-27 15:56:22,399 INFO L290 TraceCheckUtils]: 24: Hoare triple {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1726#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 15:56:22,399 INFO L272 TraceCheckUtils]: 23: Hoare triple {1718#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1722#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 15:56:22,400 INFO L290 TraceCheckUtils]: 22: Hoare triple {1745#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1718#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 15:56:22,400 INFO L290 TraceCheckUtils]: 21: Hoare triple {1749#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1745#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-27 15:56:22,401 INFO L290 TraceCheckUtils]: 20: Hoare triple {1753#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 0 main_~i~0))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1749#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 15:56:22,401 INFO L290 TraceCheckUtils]: 19: Hoare triple {1757#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 1 main_~i~0))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1753#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 0 main_~i~0))} is VALID [2022-04-27 15:56:22,402 INFO L290 TraceCheckUtils]: 18: Hoare triple {1761#(or (not (<= 0 main_~i~0)) (<= 1 main_~i~0) (= main_~MAX~0 (+ main_~j~0 1)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1757#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 1 main_~i~0))} is VALID [2022-04-27 15:56:22,402 INFO L290 TraceCheckUtils]: 17: Hoare triple {1765#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (= main_~MAX~0 (+ main_~j~0 1)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1761#(or (not (<= 0 main_~i~0)) (<= 1 main_~i~0) (= main_~MAX~0 (+ main_~j~0 1)))} is VALID [2022-04-27 15:56:22,403 INFO L290 TraceCheckUtils]: 16: Hoare triple {1769#(or (<= 2 main_~i~0) (= main_~MAX~0 (+ main_~j~0 2)) (not (<= 1 main_~i~0)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1765#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (= main_~MAX~0 (+ main_~j~0 1)))} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 15: Hoare triple {1630#true} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1769#(or (<= 2 main_~i~0) (= main_~MAX~0 (+ main_~j~0 2)) (not (<= 1 main_~i~0)))} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 14: Hoare triple {1630#true} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 13: Hoare triple {1630#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {1630#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 11: Hoare triple {1630#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {1630#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 9: Hoare triple {1630#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 8: Hoare triple {1630#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 6: Hoare triple {1630#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L290 TraceCheckUtils]: 5: Hoare triple {1630#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1630#true} is VALID [2022-04-27 15:56:22,404 INFO L272 TraceCheckUtils]: 4: Hoare triple {1630#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:22,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1630#true} {1630#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:22,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {1630#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:22,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {1630#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1630#true} is VALID [2022-04-27 15:56:22,405 INFO L272 TraceCheckUtils]: 0: Hoare triple {1630#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#true} is VALID [2022-04-27 15:56:22,405 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 15:56:22,405 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1527463398] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:56:22,405 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:56:22,405 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 12] total 26 [2022-04-27 15:56:22,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705205684] [2022-04-27 15:56:22,406 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:56:22,406 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 15:56:22,406 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:22,407 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:22,447 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:22,447 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 15:56:22,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:22,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 15:56:22,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=556, Unknown=0, NotChecked=0, Total=650 [2022-04-27 15:56:22,448 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:26,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:26,032 INFO L93 Difference]: Finished difference Result 114 states and 130 transitions. [2022-04-27 15:56:26,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-27 15:56:26,032 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 15:56:26,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:26,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:26,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 124 transitions. [2022-04-27 15:56:26,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:26,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 124 transitions. [2022-04-27 15:56:26,040 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 124 transitions. [2022-04-27 15:56:26,176 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 124 edges. 124 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:26,179 INFO L225 Difference]: With dead ends: 114 [2022-04-27 15:56:26,179 INFO L226 Difference]: Without dead ends: 111 [2022-04-27 15:56:26,180 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1387 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=935, Invalid=4615, Unknown=0, NotChecked=0, Total=5550 [2022-04-27 15:56:26,181 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 119 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 918 mSolverCounterSat, 252 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 119 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 1170 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 252 IncrementalHoareTripleChecker+Valid, 918 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:26,181 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [119 Valid, 79 Invalid, 1170 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [252 Valid, 918 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-27 15:56:26,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-04-27 15:56:26,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 71. [2022-04-27 15:56:26,186 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:26,186 INFO L82 GeneralOperation]: Start isEquivalent. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:26,186 INFO L74 IsIncluded]: Start isIncluded. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:26,187 INFO L87 Difference]: Start difference. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:26,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:26,190 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-27 15:56:26,190 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-27 15:56:26,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:26,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:26,191 INFO L74 IsIncluded]: Start isIncluded. First operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 111 states. [2022-04-27 15:56:26,191 INFO L87 Difference]: Start difference. First operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 111 states. [2022-04-27 15:56:26,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:26,194 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-27 15:56:26,194 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-27 15:56:26,195 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:26,195 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:26,195 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:26,195 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:26,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:26,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 81 transitions. [2022-04-27 15:56:26,197 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 81 transitions. Word has length 27 [2022-04-27 15:56:26,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:26,197 INFO L495 AbstractCegarLoop]: Abstraction has 71 states and 81 transitions. [2022-04-27 15:56:26,197 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:26,197 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2022-04-27 15:56:26,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 15:56:26,198 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:26,198 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:26,218 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-27 15:56:26,411 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:26,411 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:26,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:26,412 INFO L85 PathProgramCache]: Analyzing trace with hash -468461934, now seen corresponding path program 1 times [2022-04-27 15:56:26,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:26,412 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958356629] [2022-04-27 15:56:26,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:26,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:26,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:26,505 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:26,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:26,516 INFO L290 TraceCheckUtils]: 0: Hoare triple {2343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-27 15:56:26,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,516 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,516 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-04-27 15:56:26,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:26,523 INFO L290 TraceCheckUtils]: 0: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-27 15:56:26,523 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,523 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,524 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,524 INFO L272 TraceCheckUtils]: 0: Hoare triple {2329#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:26,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {2343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-27 15:56:26,525 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,525 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,525 INFO L272 TraceCheckUtils]: 4: Hoare triple {2329#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,529 INFO L290 TraceCheckUtils]: 5: Hoare triple {2329#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2329#true} is VALID [2022-04-27 15:56:26,531 INFO L290 TraceCheckUtils]: 6: Hoare triple {2329#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2334#(= main_~i~0 0)} is VALID [2022-04-27 15:56:26,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {2334#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2334#(= main_~i~0 0)} is VALID [2022-04-27 15:56:26,537 INFO L290 TraceCheckUtils]: 9: Hoare triple {2334#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2335#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:26,537 INFO L290 TraceCheckUtils]: 10: Hoare triple {2335#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,538 INFO L290 TraceCheckUtils]: 11: Hoare triple {2336#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,538 INFO L290 TraceCheckUtils]: 12: Hoare triple {2336#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,538 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,539 INFO L290 TraceCheckUtils]: 14: Hoare triple {2336#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,539 INFO L290 TraceCheckUtils]: 15: Hoare triple {2336#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,540 INFO L290 TraceCheckUtils]: 16: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,540 INFO L272 TraceCheckUtils]: 17: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2329#true} is VALID [2022-04-27 15:56:26,540 INFO L290 TraceCheckUtils]: 18: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-27 15:56:26,540 INFO L290 TraceCheckUtils]: 19: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,540 INFO L290 TraceCheckUtils]: 20: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,541 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2329#true} {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,541 INFO L290 TraceCheckUtils]: 22: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,541 INFO L290 TraceCheckUtils]: 23: Hoare triple {2337#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2342#(<= main_~MAX~0 main_~i~0)} is VALID [2022-04-27 15:56:26,542 INFO L290 TraceCheckUtils]: 24: Hoare triple {2342#(<= main_~MAX~0 main_~i~0)} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2330#false} is VALID [2022-04-27 15:56:26,542 INFO L272 TraceCheckUtils]: 25: Hoare triple {2330#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2330#false} is VALID [2022-04-27 15:56:26,542 INFO L290 TraceCheckUtils]: 26: Hoare triple {2330#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2330#false} is VALID [2022-04-27 15:56:26,542 INFO L290 TraceCheckUtils]: 27: Hoare triple {2330#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-27 15:56:26,542 INFO L290 TraceCheckUtils]: 28: Hoare triple {2330#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-27 15:56:26,542 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 15:56:26,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:26,543 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958356629] [2022-04-27 15:56:26,543 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958356629] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:56:26,543 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1993991964] [2022-04-27 15:56:26,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:26,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:26,543 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:26,544 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:56:26,547 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 15:56:26,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:26,592 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 15:56:26,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:26,603 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:56:26,763 INFO L272 TraceCheckUtils]: 0: Hoare triple {2329#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,763 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-27 15:56:26,763 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,763 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,763 INFO L272 TraceCheckUtils]: 4: Hoare triple {2329#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,763 INFO L290 TraceCheckUtils]: 5: Hoare triple {2329#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2329#true} is VALID [2022-04-27 15:56:26,764 INFO L290 TraceCheckUtils]: 6: Hoare triple {2329#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,764 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2368#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:26,764 INFO L290 TraceCheckUtils]: 8: Hoare triple {2368#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2368#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:26,765 INFO L290 TraceCheckUtils]: 9: Hoare triple {2368#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2335#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:26,765 INFO L290 TraceCheckUtils]: 10: Hoare triple {2335#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,766 INFO L290 TraceCheckUtils]: 11: Hoare triple {2336#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,777 INFO L290 TraceCheckUtils]: 12: Hoare triple {2336#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,778 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,778 INFO L290 TraceCheckUtils]: 14: Hoare triple {2336#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {2336#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,779 INFO L290 TraceCheckUtils]: 16: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,779 INFO L272 TraceCheckUtils]: 17: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2329#true} is VALID [2022-04-27 15:56:26,779 INFO L290 TraceCheckUtils]: 18: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-27 15:56:26,779 INFO L290 TraceCheckUtils]: 19: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,779 INFO L290 TraceCheckUtils]: 20: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,780 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2329#true} {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,780 INFO L290 TraceCheckUtils]: 22: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 15:56:26,781 INFO L290 TraceCheckUtils]: 23: Hoare triple {2393#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2418#(and (<= main_~MAX~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 15:56:26,781 INFO L290 TraceCheckUtils]: 24: Hoare triple {2418#(and (<= main_~MAX~0 1) (<= 1 main_~i~0))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2330#false} is VALID [2022-04-27 15:56:26,781 INFO L272 TraceCheckUtils]: 25: Hoare triple {2330#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2330#false} is VALID [2022-04-27 15:56:26,781 INFO L290 TraceCheckUtils]: 26: Hoare triple {2330#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2330#false} is VALID [2022-04-27 15:56:26,781 INFO L290 TraceCheckUtils]: 27: Hoare triple {2330#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-27 15:56:26,781 INFO L290 TraceCheckUtils]: 28: Hoare triple {2330#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-27 15:56:26,782 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 15:56:26,782 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:56:26,916 INFO L290 TraceCheckUtils]: 28: Hoare triple {2330#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-27 15:56:26,916 INFO L290 TraceCheckUtils]: 27: Hoare triple {2330#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2330#false} is VALID [2022-04-27 15:56:26,916 INFO L290 TraceCheckUtils]: 26: Hoare triple {2330#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2330#false} is VALID [2022-04-27 15:56:26,917 INFO L272 TraceCheckUtils]: 25: Hoare triple {2330#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2330#false} is VALID [2022-04-27 15:56:26,917 INFO L290 TraceCheckUtils]: 24: Hoare triple {2342#(<= main_~MAX~0 main_~i~0)} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2330#false} is VALID [2022-04-27 15:56:26,918 INFO L290 TraceCheckUtils]: 23: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2342#(<= main_~MAX~0 main_~i~0)} is VALID [2022-04-27 15:56:26,918 INFO L290 TraceCheckUtils]: 22: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 15:56:26,919 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2329#true} {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 15:56:26,919 INFO L290 TraceCheckUtils]: 20: Hoare triple {2329#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,919 INFO L290 TraceCheckUtils]: 19: Hoare triple {2329#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,919 INFO L290 TraceCheckUtils]: 18: Hoare triple {2329#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2329#true} is VALID [2022-04-27 15:56:26,919 INFO L272 TraceCheckUtils]: 17: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2329#true} is VALID [2022-04-27 15:56:26,920 INFO L290 TraceCheckUtils]: 16: Hoare triple {2449#(<= main_~MAX~0 (+ main_~i~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 15:56:26,920 INFO L290 TraceCheckUtils]: 15: Hoare triple {2336#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2449#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 15:56:26,921 INFO L290 TraceCheckUtils]: 14: Hoare triple {2336#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,921 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,921 INFO L290 TraceCheckUtils]: 12: Hoare triple {2336#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,922 INFO L290 TraceCheckUtils]: 11: Hoare triple {2336#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,922 INFO L290 TraceCheckUtils]: 10: Hoare triple {2335#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2336#(<= main_~MAX~0 1)} is VALID [2022-04-27 15:56:26,923 INFO L290 TraceCheckUtils]: 9: Hoare triple {2368#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2335#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:26,923 INFO L290 TraceCheckUtils]: 8: Hoare triple {2368#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2368#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:26,924 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2368#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:26,924 INFO L290 TraceCheckUtils]: 6: Hoare triple {2329#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,924 INFO L290 TraceCheckUtils]: 5: Hoare triple {2329#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2329#true} is VALID [2022-04-27 15:56:26,924 INFO L272 TraceCheckUtils]: 4: Hoare triple {2329#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,924 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2329#true} {2329#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,925 INFO L290 TraceCheckUtils]: 2: Hoare triple {2329#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {2329#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2329#true} is VALID [2022-04-27 15:56:26,925 INFO L272 TraceCheckUtils]: 0: Hoare triple {2329#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#true} is VALID [2022-04-27 15:56:26,925 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 15:56:26,925 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1993991964] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:56:26,925 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:56:26,925 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-27 15:56:26,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182325311] [2022-04-27 15:56:26,926 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:56:26,926 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-04-27 15:56:26,926 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:26,927 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 15:56:26,961 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:26,961 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 15:56:26,961 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:26,962 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 15:56:26,962 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2022-04-27 15:56:26,962 INFO L87 Difference]: Start difference. First operand 71 states and 81 transitions. Second operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 15:56:27,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:27,314 INFO L93 Difference]: Finished difference Result 100 states and 116 transitions. [2022-04-27 15:56:27,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 15:56:27,314 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-04-27 15:56:27,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:27,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 15:56:27,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-27 15:56:27,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 15:56:27,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-27 15:56:27,318 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 55 transitions. [2022-04-27 15:56:27,367 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:27,368 INFO L225 Difference]: With dead ends: 100 [2022-04-27 15:56:27,368 INFO L226 Difference]: Without dead ends: 75 [2022-04-27 15:56:27,369 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2022-04-27 15:56:27,369 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 57 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:27,370 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [58 Valid, 37 Invalid, 171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 15:56:27,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-04-27 15:56:27,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 67. [2022-04-27 15:56:27,373 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:27,374 INFO L82 GeneralOperation]: Start isEquivalent. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:27,374 INFO L74 IsIncluded]: Start isIncluded. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:27,374 INFO L87 Difference]: Start difference. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:27,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:27,376 INFO L93 Difference]: Finished difference Result 75 states and 85 transitions. [2022-04-27 15:56:27,376 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2022-04-27 15:56:27,377 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:27,377 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:27,377 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 75 states. [2022-04-27 15:56:27,377 INFO L87 Difference]: Start difference. First operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 75 states. [2022-04-27 15:56:27,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:27,379 INFO L93 Difference]: Finished difference Result 75 states and 85 transitions. [2022-04-27 15:56:27,379 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2022-04-27 15:56:27,379 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:27,380 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:27,380 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:27,380 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:27,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:27,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 75 transitions. [2022-04-27 15:56:27,381 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 75 transitions. Word has length 29 [2022-04-27 15:56:27,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:27,382 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 75 transitions. [2022-04-27 15:56:27,382 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 15:56:27,382 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 75 transitions. [2022-04-27 15:56:27,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 15:56:27,382 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:27,382 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:27,407 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 15:56:27,604 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:27,605 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:27,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:27,605 INFO L85 PathProgramCache]: Analyzing trace with hash -812414670, now seen corresponding path program 5 times [2022-04-27 15:56:27,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:27,605 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542938386] [2022-04-27 15:56:27,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:27,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:27,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:27,733 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:56:27,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:27,738 INFO L290 TraceCheckUtils]: 0: Hoare triple {2870#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-27 15:56:27,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,738 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,739 INFO L272 TraceCheckUtils]: 0: Hoare triple {2858#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2870#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:56:27,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {2870#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-27 15:56:27,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,739 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,739 INFO L272 TraceCheckUtils]: 4: Hoare triple {2858#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,739 INFO L290 TraceCheckUtils]: 5: Hoare triple {2858#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2858#true} is VALID [2022-04-27 15:56:27,739 INFO L290 TraceCheckUtils]: 6: Hoare triple {2858#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,740 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2863#(= main_~i~0 0)} is VALID [2022-04-27 15:56:27,740 INFO L290 TraceCheckUtils]: 8: Hoare triple {2863#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2863#(= main_~i~0 0)} is VALID [2022-04-27 15:56:27,740 INFO L290 TraceCheckUtils]: 9: Hoare triple {2863#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:27,741 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:27,741 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:27,742 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:27,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2866#(<= main_~i~0 3)} is VALID [2022-04-27 15:56:27,743 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2867#(<= main_~MAX~0 3)} is VALID [2022-04-27 15:56:27,743 INFO L290 TraceCheckUtils]: 15: Hoare triple {2867#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:27,744 INFO L290 TraceCheckUtils]: 16: Hoare triple {2865#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:27,744 INFO L290 TraceCheckUtils]: 17: Hoare triple {2865#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:27,745 INFO L290 TraceCheckUtils]: 18: Hoare triple {2864#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:27,745 INFO L290 TraceCheckUtils]: 19: Hoare triple {2864#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:27,746 INFO L290 TraceCheckUtils]: 20: Hoare triple {2868#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:27,746 INFO L290 TraceCheckUtils]: 21: Hoare triple {2868#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2869#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 22: Hoare triple {2869#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 23: Hoare triple {2859#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 24: Hoare triple {2859#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 25: Hoare triple {2859#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 26: Hoare triple {2859#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L272 TraceCheckUtils]: 27: Hoare triple {2859#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 28: Hoare triple {2859#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 29: Hoare triple {2859#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:27,747 INFO L290 TraceCheckUtils]: 30: Hoare triple {2859#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:27,748 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:27,748 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:56:27,748 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542938386] [2022-04-27 15:56:27,748 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1542938386] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:56:27,748 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2099531802] [2022-04-27 15:56:27,748 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 15:56:27,748 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:27,748 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:56:27,752 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:56:27,753 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 15:56:27,819 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-27 15:56:27,819 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 15:56:27,820 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 15:56:27,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:56:27,830 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:56:27,997 INFO L272 TraceCheckUtils]: 0: Hoare triple {2858#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,998 INFO L290 TraceCheckUtils]: 1: Hoare triple {2858#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-27 15:56:27,998 INFO L290 TraceCheckUtils]: 2: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,998 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,998 INFO L272 TraceCheckUtils]: 4: Hoare triple {2858#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,998 INFO L290 TraceCheckUtils]: 5: Hoare triple {2858#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2858#true} is VALID [2022-04-27 15:56:27,998 INFO L290 TraceCheckUtils]: 6: Hoare triple {2858#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:27,999 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:27,999 INFO L290 TraceCheckUtils]: 8: Hoare triple {2868#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:27,999 INFO L290 TraceCheckUtils]: 9: Hoare triple {2868#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,000 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,000 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,001 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,001 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2866#(<= main_~i~0 3)} is VALID [2022-04-27 15:56:28,002 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2867#(<= main_~MAX~0 3)} is VALID [2022-04-27 15:56:28,002 INFO L290 TraceCheckUtils]: 15: Hoare triple {2867#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,003 INFO L290 TraceCheckUtils]: 16: Hoare triple {2865#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,003 INFO L290 TraceCheckUtils]: 17: Hoare triple {2865#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,004 INFO L290 TraceCheckUtils]: 18: Hoare triple {2864#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,004 INFO L290 TraceCheckUtils]: 19: Hoare triple {2864#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:28,004 INFO L290 TraceCheckUtils]: 20: Hoare triple {2868#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:28,005 INFO L290 TraceCheckUtils]: 21: Hoare triple {2868#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2869#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 22: Hoare triple {2869#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 23: Hoare triple {2859#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 24: Hoare triple {2859#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 25: Hoare triple {2859#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 26: Hoare triple {2859#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L272 TraceCheckUtils]: 27: Hoare triple {2859#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 28: Hoare triple {2859#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 29: Hoare triple {2859#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:28,006 INFO L290 TraceCheckUtils]: 30: Hoare triple {2859#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:28,007 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:28,007 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:56:28,152 INFO L290 TraceCheckUtils]: 30: Hoare triple {2859#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:28,152 INFO L290 TraceCheckUtils]: 29: Hoare triple {2859#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:28,152 INFO L290 TraceCheckUtils]: 28: Hoare triple {2859#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2859#false} is VALID [2022-04-27 15:56:28,152 INFO L272 TraceCheckUtils]: 27: Hoare triple {2859#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2859#false} is VALID [2022-04-27 15:56:28,153 INFO L290 TraceCheckUtils]: 26: Hoare triple {2859#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2859#false} is VALID [2022-04-27 15:56:28,153 INFO L290 TraceCheckUtils]: 25: Hoare triple {2859#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2859#false} is VALID [2022-04-27 15:56:28,153 INFO L290 TraceCheckUtils]: 24: Hoare triple {2859#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2859#false} is VALID [2022-04-27 15:56:28,153 INFO L290 TraceCheckUtils]: 23: Hoare triple {2859#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2859#false} is VALID [2022-04-27 15:56:28,153 INFO L290 TraceCheckUtils]: 22: Hoare triple {2869#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2859#false} is VALID [2022-04-27 15:56:28,154 INFO L290 TraceCheckUtils]: 21: Hoare triple {2868#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2869#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-27 15:56:28,154 INFO L290 TraceCheckUtils]: 20: Hoare triple {2868#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:28,154 INFO L290 TraceCheckUtils]: 19: Hoare triple {2864#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:28,155 INFO L290 TraceCheckUtils]: 18: Hoare triple {2864#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,155 INFO L290 TraceCheckUtils]: 17: Hoare triple {2865#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,155 INFO L290 TraceCheckUtils]: 16: Hoare triple {2865#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,156 INFO L290 TraceCheckUtils]: 15: Hoare triple {2867#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,156 INFO L290 TraceCheckUtils]: 14: Hoare triple {2866#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2867#(<= main_~MAX~0 3)} is VALID [2022-04-27 15:56:28,157 INFO L290 TraceCheckUtils]: 13: Hoare triple {2865#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2866#(<= main_~i~0 3)} is VALID [2022-04-27 15:56:28,157 INFO L290 TraceCheckUtils]: 12: Hoare triple {2865#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,157 INFO L290 TraceCheckUtils]: 11: Hoare triple {2864#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2865#(<= main_~i~0 2)} is VALID [2022-04-27 15:56:28,158 INFO L290 TraceCheckUtils]: 10: Hoare triple {2864#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,158 INFO L290 TraceCheckUtils]: 9: Hoare triple {2868#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2864#(<= main_~i~0 1)} is VALID [2022-04-27 15:56:28,158 INFO L290 TraceCheckUtils]: 8: Hoare triple {2868#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:28,159 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2868#(<= main_~i~0 0)} is VALID [2022-04-27 15:56:28,159 INFO L290 TraceCheckUtils]: 6: Hoare triple {2858#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L290 TraceCheckUtils]: 5: Hoare triple {2858#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L272 TraceCheckUtils]: 4: Hoare triple {2858#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2858#true} {2858#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {2858#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {2858#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L272 TraceCheckUtils]: 0: Hoare triple {2858#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2858#true} is VALID [2022-04-27 15:56:28,159 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:56:28,160 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2099531802] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:56:28,160 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:56:28,160 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 10 [2022-04-27 15:56:28,160 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [954249645] [2022-04-27 15:56:28,160 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:56:28,160 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 15:56:28,161 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:56:28,161 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:28,190 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:28,190 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 15:56:28,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:56:28,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 15:56:28,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2022-04-27 15:56:28,191 INFO L87 Difference]: Start difference. First operand 67 states and 75 transitions. Second operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:28,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:28,620 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-27 15:56:28,620 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 15:56:28,620 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 15:56:28,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:56:28,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:28,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 84 transitions. [2022-04-27 15:56:28,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:28,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 84 transitions. [2022-04-27 15:56:28,624 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 84 transitions. [2022-04-27 15:56:28,695 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:56:28,696 INFO L225 Difference]: With dead ends: 106 [2022-04-27 15:56:28,697 INFO L226 Difference]: Without dead ends: 106 [2022-04-27 15:56:28,697 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 65 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=274, Unknown=0, NotChecked=0, Total=420 [2022-04-27 15:56:28,697 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 78 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 145 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 145 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 15:56:28,698 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 32 Invalid, 217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 145 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 15:56:28,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-27 15:56:28,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 75. [2022-04-27 15:56:28,702 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:56:28,703 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:28,703 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:28,703 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:28,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:28,706 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-27 15:56:28,706 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2022-04-27 15:56:28,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:28,707 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:28,707 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 106 states. [2022-04-27 15:56:28,707 INFO L87 Difference]: Start difference. First operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 106 states. [2022-04-27 15:56:28,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:56:28,710 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-27 15:56:28,710 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2022-04-27 15:56:28,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:56:28,711 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:56:28,711 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:56:28,711 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:56:28,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 15:56:28,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 82 transitions. [2022-04-27 15:56:28,713 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 82 transitions. Word has length 31 [2022-04-27 15:56:28,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:56:28,713 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 82 transitions. [2022-04-27 15:56:28,713 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 15:56:28,713 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 82 transitions. [2022-04-27 15:56:28,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 15:56:28,714 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:56:28,714 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:56:28,733 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 15:56:28,919 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:56:28,920 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:56:28,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:56:28,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1779570578, now seen corresponding path program 2 times [2022-04-27 15:56:28,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:56:28,920 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317914154] [2022-04-27 15:56:28,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:56:28,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:56:28,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-27 15:56:28,944 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-04-27 15:56:28,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-27 15:56:28,974 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-04-27 15:56:28,975 INFO L271 BasicCegarLoop]: Counterexample is feasible [2022-04-27 15:56:28,976 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 15:56:28,977 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-27 15:56:28,979 INFO L356 BasicCegarLoop]: Path program histogram: [5, 2, 1, 1, 1] [2022-04-27 15:56:28,982 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 15:56:29,007 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 03:56:29 BasicIcfg [2022-04-27 15:56:29,007 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 15:56:29,008 INFO L158 Benchmark]: Toolchain (without parser) took 22128.22ms. Allocated memory was 169.9MB in the beginning and 249.6MB in the end (delta: 79.7MB). Free memory was 120.3MB in the beginning and 107.8MB in the end (delta: 12.5MB). Peak memory consumption was 93.3MB. Max. memory is 8.0GB. [2022-04-27 15:56:29,008 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 169.9MB. Free memory is still 136.1MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 15:56:29,008 INFO L158 Benchmark]: CACSL2BoogieTranslator took 223.86ms. Allocated memory is still 169.9MB. Free memory was 120.0MB in the beginning and 145.6MB in the end (delta: -25.7MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2022-04-27 15:56:29,008 INFO L158 Benchmark]: Boogie Preprocessor took 33.19ms. Allocated memory is still 169.9MB. Free memory was 145.6MB in the beginning and 144.2MB in the end (delta: 1.4MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 15:56:29,008 INFO L158 Benchmark]: RCFGBuilder took 309.97ms. Allocated memory is still 169.9MB. Free memory was 144.2MB in the beginning and 131.6MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2022-04-27 15:56:29,009 INFO L158 Benchmark]: IcfgTransformer took 31.90ms. Allocated memory is still 169.9MB. Free memory was 131.4MB in the beginning and 129.9MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-27 15:56:29,009 INFO L158 Benchmark]: TraceAbstraction took 21515.45ms. Allocated memory was 169.9MB in the beginning and 249.6MB in the end (delta: 79.7MB). Free memory was 129.3MB in the beginning and 107.8MB in the end (delta: 21.5MB). Peak memory consumption was 102.8MB. Max. memory is 8.0GB. [2022-04-27 15:56:29,010 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 169.9MB. Free memory is still 136.1MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 223.86ms. Allocated memory is still 169.9MB. Free memory was 120.0MB in the beginning and 145.6MB in the end (delta: -25.7MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * Boogie Preprocessor took 33.19ms. Allocated memory is still 169.9MB. Free memory was 145.6MB in the beginning and 144.2MB in the end (delta: 1.4MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 309.97ms. Allocated memory is still 169.9MB. Free memory was 144.2MB in the beginning and 131.6MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * IcfgTransformer took 31.90ms. Allocated memory is still 169.9MB. Free memory was 131.4MB in the beginning and 129.9MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * TraceAbstraction took 21515.45ms. Allocated memory was 169.9MB in the beginning and 249.6MB in the end (delta: 79.7MB). Free memory was 129.3MB in the beginning and 107.8MB in the end (delta: 21.5MB). Peak memory consumption was 102.8MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 8]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L16] int MAX = __VERIFIER_nondet_uint(); [L17] COND FALSE !(!(MAX > 0)) VAL [MAX=2] [L18] char str1[MAX], str2[MAX]; [L19] int cont, i, j; [L20] cont = 0 [L22] i=0 VAL [cont=0, i=0, MAX=2, str1={5:0}, str2={4:0}] [L22] COND TRUE i= 0 [L30] EXPR str1[0] [L30] str2[j] = str1[0] [L31] j++ VAL [cont=0, i=1, j=1, MAX=2, str1={5:0}, str2={4:0}] [L29] i-- VAL [cont=0, i=0, j=1, MAX=2, str1={5:0}, str2={4:0}] [L29] COND TRUE i >= 0 [L30] EXPR str1[0] [L30] str2[j] = str1[0] [L31] j++ VAL [cont=0, i=0, j=2, MAX=2, str1={5:0}, str2={4:0}] [L29] i-- VAL [cont=0, i=-1, j=2, MAX=2, str1={5:0}, str2={4:0}] [L29] COND FALSE !(i >= 0) VAL [cont=0, i=-1, j=2, MAX=2, str1={5:0}, str2={4:0}] [L34] j = MAX-1 [L35] i=0 VAL [cont=0, i=0, j=1, MAX=2, str1={5:0}, str2={4:0}] [L35] COND TRUE i