/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:22:00,949 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:22:00,951 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:22:00,998 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 16:22:00,998 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 16:22:01,000 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 16:22:01,004 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 16:22:01,010 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 16:22:01,011 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 16:22:01,020 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 16:22:01,021 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 16:22:01,021 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 16:22:01,022 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:22:01,022 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:22:01,023 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:22:01,024 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:22:01,024 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:22:01,025 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:22:01,026 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:22:01,027 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:22:01,028 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:22:01,029 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:22:01,030 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:22:01,031 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:22:01,031 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:22:01,034 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 16:22:01,040 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:22:01,040 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:22:01,044 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:22:01,045 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:22:01,059 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:22:01,059 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:22:01,061 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:22:01,061 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:22:01,061 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:22:01,061 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:22:01,061 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:22:01,061 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:22:01,061 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:22:01,062 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:22:01,062 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:22:01,063 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:22:01,063 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:22:01,064 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:22:01,064 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:22:01,064 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:22:01,065 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:22:01,303 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:22:01,326 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:22:01,328 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:22:01,329 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:22:01,331 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:22:01,333 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-27 16:22:01,399 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/653464a8e/839f46ad767949e6b6b3384bae5304c9/FLAG45d7bc4ca [2022-04-27 16:22:01,788 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:22:01,788 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-27 16:22:01,792 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/653464a8e/839f46ad767949e6b6b3384bae5304c9/FLAG45d7bc4ca [2022-04-27 16:22:01,803 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/653464a8e/839f46ad767949e6b6b3384bae5304c9 [2022-04-27 16:22:01,805 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:22:01,806 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:22:01,812 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:22:01,812 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:22:01,815 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:22:01,816 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:22:01" (1/1) ... [2022-04-27 16:22:01,817 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@a107338 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:01, skipping insertion in model container [2022-04-27 16:22:01,817 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:22:01" (1/1) ... [2022-04-27 16:22:01,827 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:22:01,838 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:22:02,068 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-27 16:22:02,093 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:22:02,102 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:22:02,117 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-27 16:22:02,131 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:22:02,144 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:22:02,144 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02 WrapperNode [2022-04-27 16:22:02,144 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:22:02,146 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:22:02,146 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:22:02,146 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:22:02,157 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,157 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,165 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,166 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,177 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,183 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,184 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,185 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:22:02,186 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:22:02,186 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:22:02,186 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:22:02,187 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:22:02,203 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:02,221 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:22:02,242 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:22:02,261 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:22:02,262 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:22:02,262 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:22:02,262 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-27 16:22:02,263 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:22:02,263 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:22:02,263 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-27 16:22:02,263 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:22:02,263 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:22:02,263 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-27 16:22:02,263 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-27 16:22:02,264 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:22:02,264 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:22:02,264 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-27 16:22:02,265 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:22:02,266 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:22:02,267 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:22:02,327 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:22:02,328 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:22:02,482 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:22:02,488 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:22:02,488 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-27 16:22:02,490 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:22:02 BoogieIcfgContainer [2022-04-27 16:22:02,490 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:22:02,490 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:22:02,490 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:22:02,491 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:22:02,494 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:22:02" (1/1) ... [2022-04-27 16:22:02,496 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:22:02,519 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:22:02 BasicIcfg [2022-04-27 16:22:02,519 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:22:02,520 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:22:02,520 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:22:02,523 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:22:02,523 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:22:01" (1/4) ... [2022-04-27 16:22:02,524 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34b1c0c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:22:02, skipping insertion in model container [2022-04-27 16:22:02,524 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:22:02" (2/4) ... [2022-04-27 16:22:02,524 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34b1c0c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:22:02, skipping insertion in model container [2022-04-27 16:22:02,524 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:22:02" (3/4) ... [2022-04-27 16:22:02,525 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34b1c0c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:22:02, skipping insertion in model container [2022-04-27 16:22:02,525 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:22:02" (4/4) ... [2022-04-27 16:22:02,526 INFO L111 eAbstractionObserver]: Analyzing ICFG mcmillan2006.iJordan [2022-04-27 16:22:02,537 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:22:02,538 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:22:02,572 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:22:02,578 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@178bc6d3, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@795e0712 [2022-04-27 16:22:02,578 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:22:02,586 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:02,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 16:22:02,592 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:02,592 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:02,593 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:02,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:02,598 INFO L85 PathProgramCache]: Analyzing trace with hash 1476197606, now seen corresponding path program 1 times [2022-04-27 16:22:02,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:02,621 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780648483] [2022-04-27 16:22:02,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:02,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:02,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:02,848 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:02,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:02,871 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-27 16:22:02,872 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:22:02,872 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:22:02,876 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:02,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-27 16:22:02,878 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:22:02,878 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:22:02,878 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 16:22:02,879 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {28#true} is VALID [2022-04-27 16:22:02,880 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {28#true} is VALID [2022-04-27 16:22:02,881 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#true} [82] L30-3-->L30-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:22:02,881 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {29#false} is VALID [2022-04-27 16:22:02,882 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {29#false} is VALID [2022-04-27 16:22:02,883 INFO L272 TraceCheckUtils]: 10: Hoare triple {29#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {29#false} is VALID [2022-04-27 16:22:02,883 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-27 16:22:02,883 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:22:02,883 INFO L290 TraceCheckUtils]: 13: Hoare triple {29#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 16:22:02,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:02,884 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:02,885 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780648483] [2022-04-27 16:22:02,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [780648483] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:22:02,886 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:22:02,886 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:22:02,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773813437] [2022-04-27 16:22:02,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:22:02,894 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:22:02,897 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:02,900 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:02,927 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:02,927 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:22:02,929 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:02,953 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:22:02,954 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:22:02,958 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:03,042 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-27 16:22:03,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:22:03,043 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:22:03,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:03,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 30 transitions. [2022-04-27 16:22:03,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 30 transitions. [2022-04-27 16:22:03,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 30 transitions. [2022-04-27 16:22:03,114 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:03,122 INFO L225 Difference]: With dead ends: 25 [2022-04-27 16:22:03,122 INFO L226 Difference]: Without dead ends: 20 [2022-04-27 16:22:03,124 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:22:03,127 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 18 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:03,129 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 29 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:22:03,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-27 16:22:03,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-27 16:22:03,155 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:03,155 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,156 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,157 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:03,164 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-27 16:22:03,165 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-27 16:22:03,165 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:03,165 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:03,166 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-27 16:22:03,166 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-27 16:22:03,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:03,169 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-27 16:22:03,169 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-27 16:22:03,169 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:03,170 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:03,170 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:03,170 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:03,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2022-04-27 16:22:03,176 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2022-04-27 16:22:03,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:03,179 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2022-04-27 16:22:03,184 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,185 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-27 16:22:03,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 16:22:03,185 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:03,185 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:03,186 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:22:03,186 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:03,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:03,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1931266009, now seen corresponding path program 1 times [2022-04-27 16:22:03,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:03,187 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1320302193] [2022-04-27 16:22:03,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:03,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:03,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:03,343 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:03,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:03,362 INFO L290 TraceCheckUtils]: 0: Hoare triple {129#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {121#true} is VALID [2022-04-27 16:22:03,362 INFO L290 TraceCheckUtils]: 1: Hoare triple {121#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-27 16:22:03,362 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {121#true} {121#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-27 16:22:03,365 INFO L272 TraceCheckUtils]: 0: Hoare triple {121#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {129#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:03,365 INFO L290 TraceCheckUtils]: 1: Hoare triple {129#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {121#true} is VALID [2022-04-27 16:22:03,365 INFO L290 TraceCheckUtils]: 2: Hoare triple {121#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-27 16:22:03,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {121#true} {121#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-27 16:22:03,366 INFO L272 TraceCheckUtils]: 4: Hoare triple {121#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-27 16:22:03,366 INFO L290 TraceCheckUtils]: 5: Hoare triple {121#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {121#true} is VALID [2022-04-27 16:22:03,368 INFO L290 TraceCheckUtils]: 6: Hoare triple {121#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {126#(= main_~i~0 0)} is VALID [2022-04-27 16:22:03,369 INFO L290 TraceCheckUtils]: 7: Hoare triple {126#(= main_~i~0 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {127#(<= main_~n~0 0)} is VALID [2022-04-27 16:22:03,370 INFO L290 TraceCheckUtils]: 8: Hoare triple {127#(<= main_~n~0 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {128#(and (<= main_~n~0 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:03,370 INFO L290 TraceCheckUtils]: 9: Hoare triple {128#(and (<= main_~n~0 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {122#false} is VALID [2022-04-27 16:22:03,371 INFO L272 TraceCheckUtils]: 10: Hoare triple {122#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {122#false} is VALID [2022-04-27 16:22:03,371 INFO L290 TraceCheckUtils]: 11: Hoare triple {122#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {122#false} is VALID [2022-04-27 16:22:03,371 INFO L290 TraceCheckUtils]: 12: Hoare triple {122#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {122#false} is VALID [2022-04-27 16:22:03,371 INFO L290 TraceCheckUtils]: 13: Hoare triple {122#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122#false} is VALID [2022-04-27 16:22:03,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:03,372 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:03,372 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1320302193] [2022-04-27 16:22:03,372 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1320302193] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:22:03,372 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:22:03,372 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 16:22:03,373 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115002877] [2022-04-27 16:22:03,373 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:22:03,374 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:22:03,375 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:03,376 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,391 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:03,392 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 16:22:03,392 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:03,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 16:22:03,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-27 16:22:03,397 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:03,593 INFO L93 Difference]: Finished difference Result 24 states and 25 transitions. [2022-04-27 16:22:03,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 16:22:03,594 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 16:22:03,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:03,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-27 16:22:03,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-27 16:22:03,598 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 26 transitions. [2022-04-27 16:22:03,624 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:03,626 INFO L225 Difference]: With dead ends: 24 [2022-04-27 16:22:03,626 INFO L226 Difference]: Without dead ends: 22 [2022-04-27 16:22:03,626 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-04-27 16:22:03,628 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 21 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:03,629 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 34 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:22:03,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-27 16:22:03,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-27 16:22:03,634 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:03,634 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,635 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,636 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:03,639 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-27 16:22:03,639 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-27 16:22:03,639 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:03,639 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:03,640 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-27 16:22:03,640 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-27 16:22:03,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:03,642 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-27 16:22:03,642 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-27 16:22:03,643 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:03,643 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:03,643 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:03,643 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:03,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 16:22:03,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2022-04-27 16:22:03,646 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 14 [2022-04-27 16:22:03,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:03,647 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2022-04-27 16:22:03,648 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:03,648 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2022-04-27 16:22:03,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 16:22:03,649 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:03,649 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:03,650 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:22:03,650 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:03,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:03,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1791050651, now seen corresponding path program 1 times [2022-04-27 16:22:03,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:03,654 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057021680] [2022-04-27 16:22:03,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:03,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:03,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:03,919 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:03,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:03,926 INFO L290 TraceCheckUtils]: 0: Hoare triple {239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-27 16:22:03,927 INFO L290 TraceCheckUtils]: 1: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:03,927 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:03,928 INFO L272 TraceCheckUtils]: 0: Hoare triple {227#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:03,928 INFO L290 TraceCheckUtils]: 1: Hoare triple {239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-27 16:22:03,929 INFO L290 TraceCheckUtils]: 2: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:03,929 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:03,929 INFO L272 TraceCheckUtils]: 4: Hoare triple {227#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:03,929 INFO L290 TraceCheckUtils]: 5: Hoare triple {227#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {227#true} is VALID [2022-04-27 16:22:03,930 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-27 16:22:03,931 INFO L290 TraceCheckUtils]: 7: Hoare triple {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {233#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-27 16:22:03,932 INFO L290 TraceCheckUtils]: 8: Hoare triple {233#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 16:22:03,932 INFO L290 TraceCheckUtils]: 9: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 16:22:03,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:03,935 INFO L290 TraceCheckUtils]: 11: Hoare triple {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {236#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:03,936 INFO L272 TraceCheckUtils]: 12: Hoare triple {236#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {237#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:22:03,939 INFO L290 TraceCheckUtils]: 13: Hoare triple {237#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {238#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:22:03,939 INFO L290 TraceCheckUtils]: 14: Hoare triple {238#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-27 16:22:03,940 INFO L290 TraceCheckUtils]: 15: Hoare triple {228#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-27 16:22:03,940 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:03,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:03,941 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057021680] [2022-04-27 16:22:03,941 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057021680] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:03,941 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [654904210] [2022-04-27 16:22:03,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:03,941 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:03,942 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:03,943 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:03,958 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:22:04,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:04,013 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-27 16:22:04,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:04,029 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:04,110 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-04-27 16:22:04,202 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-04-27 16:22:04,288 INFO L272 TraceCheckUtils]: 0: Hoare triple {227#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {227#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-27 16:22:04,289 INFO L290 TraceCheckUtils]: 2: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,289 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,290 INFO L272 TraceCheckUtils]: 4: Hoare triple {227#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,290 INFO L290 TraceCheckUtils]: 5: Hoare triple {227#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {227#true} is VALID [2022-04-27 16:22:04,291 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-27 16:22:04,292 INFO L290 TraceCheckUtils]: 7: Hoare triple {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 16:22:04,292 INFO L290 TraceCheckUtils]: 8: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 16:22:04,293 INFO L290 TraceCheckUtils]: 9: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 16:22:04,294 INFO L290 TraceCheckUtils]: 10: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:04,294 INFO L290 TraceCheckUtils]: 11: Hoare triple {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {236#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:04,295 INFO L272 TraceCheckUtils]: 12: Hoare triple {236#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {279#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:04,296 INFO L290 TraceCheckUtils]: 13: Hoare triple {279#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {283#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:04,296 INFO L290 TraceCheckUtils]: 14: Hoare triple {283#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-27 16:22:04,296 INFO L290 TraceCheckUtils]: 15: Hoare triple {228#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-27 16:22:04,297 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:04,297 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:04,449 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-27 16:22:04,454 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2022-04-27 16:22:04,501 INFO L290 TraceCheckUtils]: 15: Hoare triple {228#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-27 16:22:04,501 INFO L290 TraceCheckUtils]: 14: Hoare triple {283#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-27 16:22:04,502 INFO L290 TraceCheckUtils]: 13: Hoare triple {279#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {283#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:04,503 INFO L272 TraceCheckUtils]: 12: Hoare triple {236#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {279#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:04,503 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {236#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:04,504 INFO L290 TraceCheckUtils]: 10: Hoare triple {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:04,505 INFO L290 TraceCheckUtils]: 9: Hoare triple {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-27 16:22:04,505 INFO L290 TraceCheckUtils]: 8: Hoare triple {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-27 16:22:04,506 INFO L290 TraceCheckUtils]: 7: Hoare triple {316#(= 0 (* main_~i~0 4))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-27 16:22:04,507 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {316#(= 0 (* main_~i~0 4))} is VALID [2022-04-27 16:22:04,507 INFO L290 TraceCheckUtils]: 5: Hoare triple {227#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {227#true} is VALID [2022-04-27 16:22:04,507 INFO L272 TraceCheckUtils]: 4: Hoare triple {227#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,507 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {227#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-27 16:22:04,508 INFO L272 TraceCheckUtils]: 0: Hoare triple {227#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-27 16:22:04,509 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:04,509 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [654904210] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:22:04,509 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:22:04,509 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 15 [2022-04-27 16:22:04,511 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [142507234] [2022-04-27 16:22:04,512 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:04,513 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 16:22:04,513 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:04,513 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:04,536 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:04,537 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 16:22:04,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:04,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 16:22:04,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:22:04,539 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:05,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:05,025 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 16:22:05,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 16:22:05,025 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 16:22:05,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:05,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:05,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 32 transitions. [2022-04-27 16:22:05,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:05,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 32 transitions. [2022-04-27 16:22:05,035 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 32 transitions. [2022-04-27 16:22:05,065 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:05,066 INFO L225 Difference]: With dead ends: 30 [2022-04-27 16:22:05,066 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 16:22:05,067 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2022-04-27 16:22:05,067 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 36 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:05,068 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 57 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 16:22:05,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 16:22:05,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-04-27 16:22:05,071 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:05,071 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:05,071 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:05,072 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:05,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:05,073 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 16:22:05,073 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 16:22:05,074 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:05,074 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:05,074 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 16:22:05,074 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 16:22:05,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:05,076 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 16:22:05,076 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 16:22:05,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:05,076 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:05,077 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:05,077 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:05,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:05,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-04-27 16:22:05,078 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2022-04-27 16:22:05,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:05,079 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-04-27 16:22:05,079 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:22:05,079 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2022-04-27 16:22:05,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 16:22:05,080 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:05,080 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:05,106 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:05,303 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:05,304 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:05,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:05,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1619165115, now seen corresponding path program 1 times [2022-04-27 16:22:05,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:05,305 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157867693] [2022-04-27 16:22:05,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:05,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:05,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:05,379 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:05,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:05,385 INFO L290 TraceCheckUtils]: 0: Hoare triple {487#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-27 16:22:05,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,385 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-04-27 16:22:05,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:05,391 INFO L290 TraceCheckUtils]: 0: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-27 16:22:05,392 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,392 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,392 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 16:22:05,393 INFO L272 TraceCheckUtils]: 0: Hoare triple {473#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {487#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:05,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {487#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-27 16:22:05,394 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,394 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,394 INFO L272 TraceCheckUtils]: 4: Hoare triple {473#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,394 INFO L290 TraceCheckUtils]: 5: Hoare triple {473#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {473#true} is VALID [2022-04-27 16:22:05,395 INFO L290 TraceCheckUtils]: 6: Hoare triple {473#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {478#(= main_~i~0 0)} is VALID [2022-04-27 16:22:05,395 INFO L290 TraceCheckUtils]: 7: Hoare triple {478#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {478#(= main_~i~0 0)} is VALID [2022-04-27 16:22:05,396 INFO L290 TraceCheckUtils]: 8: Hoare triple {478#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {479#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:05,396 INFO L290 TraceCheckUtils]: 9: Hoare triple {479#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {480#(<= main_~n~0 1)} is VALID [2022-04-27 16:22:05,397 INFO L290 TraceCheckUtils]: 10: Hoare triple {480#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 16:22:05,397 INFO L290 TraceCheckUtils]: 11: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 16:22:05,397 INFO L272 TraceCheckUtils]: 12: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {473#true} is VALID [2022-04-27 16:22:05,398 INFO L290 TraceCheckUtils]: 13: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-27 16:22:05,398 INFO L290 TraceCheckUtils]: 14: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,398 INFO L290 TraceCheckUtils]: 15: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,399 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {473#true} {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 16:22:05,399 INFO L290 TraceCheckUtils]: 17: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 16:22:05,400 INFO L290 TraceCheckUtils]: 18: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {486#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:22:05,400 INFO L290 TraceCheckUtils]: 19: Hoare triple {486#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {474#false} is VALID [2022-04-27 16:22:05,400 INFO L272 TraceCheckUtils]: 20: Hoare triple {474#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {474#false} is VALID [2022-04-27 16:22:05,401 INFO L290 TraceCheckUtils]: 21: Hoare triple {474#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#false} is VALID [2022-04-27 16:22:05,401 INFO L290 TraceCheckUtils]: 22: Hoare triple {474#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-27 16:22:05,401 INFO L290 TraceCheckUtils]: 23: Hoare triple {474#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-27 16:22:05,401 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:05,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:05,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157867693] [2022-04-27 16:22:05,402 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1157867693] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:05,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [241793371] [2022-04-27 16:22:05,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:05,402 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:05,402 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:05,403 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:05,414 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:22:05,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:05,457 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 16:22:05,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:05,471 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:05,646 INFO L272 TraceCheckUtils]: 0: Hoare triple {473#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-27 16:22:05,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,647 INFO L272 TraceCheckUtils]: 4: Hoare triple {473#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,648 INFO L290 TraceCheckUtils]: 5: Hoare triple {473#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {473#true} is VALID [2022-04-27 16:22:05,658 INFO L290 TraceCheckUtils]: 6: Hoare triple {473#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {509#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:05,658 INFO L290 TraceCheckUtils]: 7: Hoare triple {509#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {509#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:05,659 INFO L290 TraceCheckUtils]: 8: Hoare triple {509#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {479#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:05,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {479#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {480#(<= main_~n~0 1)} is VALID [2022-04-27 16:22:05,660 INFO L290 TraceCheckUtils]: 10: Hoare triple {480#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 16:22:05,660 INFO L290 TraceCheckUtils]: 11: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 16:22:05,660 INFO L272 TraceCheckUtils]: 12: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {473#true} is VALID [2022-04-27 16:22:05,661 INFO L290 TraceCheckUtils]: 13: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-27 16:22:05,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,662 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {473#true} {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 16:22:05,662 INFO L290 TraceCheckUtils]: 17: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 16:22:05,663 INFO L290 TraceCheckUtils]: 18: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {547#(and (<= 1 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 16:22:05,663 INFO L290 TraceCheckUtils]: 19: Hoare triple {547#(and (<= 1 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {474#false} is VALID [2022-04-27 16:22:05,664 INFO L272 TraceCheckUtils]: 20: Hoare triple {474#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {474#false} is VALID [2022-04-27 16:22:05,664 INFO L290 TraceCheckUtils]: 21: Hoare triple {474#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#false} is VALID [2022-04-27 16:22:05,664 INFO L290 TraceCheckUtils]: 22: Hoare triple {474#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-27 16:22:05,664 INFO L290 TraceCheckUtils]: 23: Hoare triple {474#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-27 16:22:05,664 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:05,664 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:05,789 INFO L290 TraceCheckUtils]: 23: Hoare triple {474#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-27 16:22:05,789 INFO L290 TraceCheckUtils]: 22: Hoare triple {474#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-27 16:22:05,790 INFO L290 TraceCheckUtils]: 21: Hoare triple {474#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#false} is VALID [2022-04-27 16:22:05,790 INFO L272 TraceCheckUtils]: 20: Hoare triple {474#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {474#false} is VALID [2022-04-27 16:22:05,791 INFO L290 TraceCheckUtils]: 19: Hoare triple {486#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {474#false} is VALID [2022-04-27 16:22:05,791 INFO L290 TraceCheckUtils]: 18: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {486#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:22:05,792 INFO L290 TraceCheckUtils]: 17: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:05,792 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {473#true} {578#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:05,793 INFO L290 TraceCheckUtils]: 15: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,793 INFO L290 TraceCheckUtils]: 14: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,793 INFO L290 TraceCheckUtils]: 13: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-27 16:22:05,793 INFO L272 TraceCheckUtils]: 12: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {473#true} is VALID [2022-04-27 16:22:05,793 INFO L290 TraceCheckUtils]: 11: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:05,794 INFO L290 TraceCheckUtils]: 10: Hoare triple {480#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:05,794 INFO L290 TraceCheckUtils]: 9: Hoare triple {479#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {480#(<= main_~n~0 1)} is VALID [2022-04-27 16:22:05,795 INFO L290 TraceCheckUtils]: 8: Hoare triple {509#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {479#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:05,795 INFO L290 TraceCheckUtils]: 7: Hoare triple {509#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {509#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:05,796 INFO L290 TraceCheckUtils]: 6: Hoare triple {473#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {509#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:05,796 INFO L290 TraceCheckUtils]: 5: Hoare triple {473#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {473#true} is VALID [2022-04-27 16:22:05,796 INFO L272 TraceCheckUtils]: 4: Hoare triple {473#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,796 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,796 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,797 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-27 16:22:05,797 INFO L272 TraceCheckUtils]: 0: Hoare triple {473#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-27 16:22:05,797 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:05,797 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [241793371] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:22:05,797 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:22:05,797 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-27 16:22:05,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569424872] [2022-04-27 16:22:05,798 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:05,798 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-27 16:22:05,799 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:05,799 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:05,841 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:05,841 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 16:22:05,841 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:05,842 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 16:22:05,842 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-27 16:22:05,842 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:06,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:06,151 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2022-04-27 16:22:06,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 16:22:06,151 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-27 16:22:06,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:06,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:06,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 33 transitions. [2022-04-27 16:22:06,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:06,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 33 transitions. [2022-04-27 16:22:06,155 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 33 transitions. [2022-04-27 16:22:06,197 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:06,201 INFO L225 Difference]: With dead ends: 36 [2022-04-27 16:22:06,201 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 16:22:06,201 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2022-04-27 16:22:06,202 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 29 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:06,202 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 42 Invalid, 111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:22:06,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 16:22:06,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2022-04-27 16:22:06,206 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:06,206 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:06,206 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:06,206 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:06,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:06,208 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 16:22:06,209 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 16:22:06,209 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:06,209 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:06,209 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 16:22:06,209 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 16:22:06,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:06,211 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 16:22:06,211 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 16:22:06,211 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:06,212 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:06,212 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:06,212 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:06,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:22:06,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2022-04-27 16:22:06,213 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2022-04-27 16:22:06,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:06,213 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2022-04-27 16:22:06,214 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:06,214 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2022-04-27 16:22:06,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 16:22:06,214 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:06,214 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:06,241 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:06,427 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 16:22:06,428 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:06,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:06,428 INFO L85 PathProgramCache]: Analyzing trace with hash -290697607, now seen corresponding path program 2 times [2022-04-27 16:22:06,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:06,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314879077] [2022-04-27 16:22:06,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:06,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:06,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:06,554 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:06,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:06,568 INFO L290 TraceCheckUtils]: 0: Hoare triple {788#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-27 16:22:06,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,569 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,569 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-27 16:22:06,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:06,577 INFO L290 TraceCheckUtils]: 0: Hoare triple {770#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {770#true} is VALID [2022-04-27 16:22:06,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,579 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,580 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:06,581 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:06,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {788#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-27 16:22:06,582 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,582 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,582 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,582 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {770#true} is VALID [2022-04-27 16:22:06,582 INFO L290 TraceCheckUtils]: 6: Hoare triple {770#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {775#(= main_~i~0 0)} is VALID [2022-04-27 16:22:06,584 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {775#(= main_~i~0 0)} is VALID [2022-04-27 16:22:06,585 INFO L290 TraceCheckUtils]: 8: Hoare triple {775#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:06,586 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {777#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:06,586 INFO L290 TraceCheckUtils]: 10: Hoare triple {777#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:06,587 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:06,588 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:06,588 INFO L290 TraceCheckUtils]: 13: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:06,588 INFO L272 TraceCheckUtils]: 14: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {770#true} is VALID [2022-04-27 16:22:06,589 INFO L290 TraceCheckUtils]: 15: Hoare triple {770#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {770#true} is VALID [2022-04-27 16:22:06,589 INFO L290 TraceCheckUtils]: 16: Hoare triple {770#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,589 INFO L290 TraceCheckUtils]: 17: Hoare triple {770#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:06,590 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {770#true} {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:06,590 INFO L290 TraceCheckUtils]: 19: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:06,591 INFO L290 TraceCheckUtils]: 20: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:06,591 INFO L290 TraceCheckUtils]: 21: Hoare triple {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {785#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:06,592 INFO L272 TraceCheckUtils]: 22: Hoare triple {785#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {786#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:22:06,592 INFO L290 TraceCheckUtils]: 23: Hoare triple {786#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {787#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:22:06,593 INFO L290 TraceCheckUtils]: 24: Hoare triple {787#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-27 16:22:06,593 INFO L290 TraceCheckUtils]: 25: Hoare triple {771#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-27 16:22:06,593 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:06,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:06,593 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [314879077] [2022-04-27 16:22:06,593 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [314879077] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:06,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1127613519] [2022-04-27 16:22:06,594 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:22:06,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:06,594 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:06,596 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:06,611 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:22:06,655 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:22:06,655 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:22:06,656 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-27 16:22:06,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:06,670 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:06,730 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:22:09,102 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:22:09,157 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:09,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-27 16:22:09,158 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:09,158 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:09,158 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:09,158 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {770#true} is VALID [2022-04-27 16:22:09,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {770#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {775#(= main_~i~0 0)} is VALID [2022-04-27 16:22:09,164 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {775#(= main_~i~0 0)} is VALID [2022-04-27 16:22:09,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {775#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:09,169 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:09,170 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:09,170 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:09,171 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:09,172 INFO L290 TraceCheckUtils]: 13: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:09,173 INFO L272 TraceCheckUtils]: 14: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 16:22:09,173 INFO L290 TraceCheckUtils]: 15: Hoare triple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 16:22:09,174 INFO L290 TraceCheckUtils]: 16: Hoare triple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 16:22:09,174 INFO L290 TraceCheckUtils]: 17: Hoare triple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 16:22:09,175 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:09,175 INFO L290 TraceCheckUtils]: 19: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:09,176 INFO L290 TraceCheckUtils]: 20: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {853#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:22:09,176 INFO L290 TraceCheckUtils]: 21: Hoare triple {853#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {785#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:09,177 INFO L272 TraceCheckUtils]: 22: Hoare triple {785#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:09,177 INFO L290 TraceCheckUtils]: 23: Hoare triple {860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:09,178 INFO L290 TraceCheckUtils]: 24: Hoare triple {864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-27 16:22:09,178 INFO L290 TraceCheckUtils]: 25: Hoare triple {771#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-27 16:22:09,178 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:09,178 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:11,353 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:22:11,359 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:22:11,413 INFO L290 TraceCheckUtils]: 25: Hoare triple {771#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-27 16:22:11,414 INFO L290 TraceCheckUtils]: 24: Hoare triple {864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-27 16:22:11,415 INFO L290 TraceCheckUtils]: 23: Hoare triple {860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:11,415 INFO L272 TraceCheckUtils]: 22: Hoare triple {785#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:11,416 INFO L290 TraceCheckUtils]: 21: Hoare triple {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {785#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:11,417 INFO L290 TraceCheckUtils]: 20: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:11,417 INFO L290 TraceCheckUtils]: 19: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:11,418 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {770#true} {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:11,418 INFO L290 TraceCheckUtils]: 17: Hoare triple {770#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:11,418 INFO L290 TraceCheckUtils]: 16: Hoare triple {770#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:11,419 INFO L290 TraceCheckUtils]: 15: Hoare triple {770#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {770#true} is VALID [2022-04-27 16:22:11,419 INFO L272 TraceCheckUtils]: 14: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {770#true} is VALID [2022-04-27 16:22:11,421 INFO L290 TraceCheckUtils]: 13: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:11,421 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:11,422 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:11,422 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:11,423 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 16:22:11,423 INFO L290 TraceCheckUtils]: 8: Hoare triple {775#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:11,424 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {775#(= main_~i~0 0)} is VALID [2022-04-27 16:22:11,424 INFO L290 TraceCheckUtils]: 6: Hoare triple {770#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {775#(= main_~i~0 0)} is VALID [2022-04-27 16:22:11,424 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {770#true} is VALID [2022-04-27 16:22:11,425 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:11,425 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:11,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:11,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-27 16:22:11,425 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-27 16:22:11,425 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:22:11,426 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1127613519] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:22:11,426 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:22:11,426 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 17 [2022-04-27 16:22:11,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1470901348] [2022-04-27 16:22:11,426 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:11,427 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-27 16:22:11,427 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:11,428 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 16:22:11,470 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:11,470 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-27 16:22:11,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:11,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-27 16:22:11,471 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=227, Unknown=2, NotChecked=0, Total=272 [2022-04-27 16:22:11,471 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 16:22:12,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:12,065 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 16:22:12,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 16:22:12,065 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-27 16:22:12,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:12,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 16:22:12,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 42 transitions. [2022-04-27 16:22:12,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 16:22:12,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 42 transitions. [2022-04-27 16:22:12,069 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 42 transitions. [2022-04-27 16:22:12,116 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:12,117 INFO L225 Difference]: With dead ends: 40 [2022-04-27 16:22:12,117 INFO L226 Difference]: Without dead ends: 40 [2022-04-27 16:22:12,117 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=118, Invalid=636, Unknown=2, NotChecked=0, Total=756 [2022-04-27 16:22:12,118 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 50 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 199 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 199 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:12,118 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 68 Invalid, 256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 199 Invalid, 0 Unknown, 36 Unchecked, 0.2s Time] [2022-04-27 16:22:12,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-27 16:22:12,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 37. [2022-04-27 16:22:12,122 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:12,122 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:12,122 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:12,122 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:12,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:12,124 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 16:22:12,124 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 16:22:12,124 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:12,125 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:12,125 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 16:22:12,125 INFO L87 Difference]: Start difference. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 16:22:12,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:12,126 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 16:22:12,127 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 16:22:12,127 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:12,127 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:12,127 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:12,127 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:12,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:12,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2022-04-27 16:22:12,128 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2022-04-27 16:22:12,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:12,129 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2022-04-27 16:22:12,129 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 16:22:12,129 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2022-04-27 16:22:12,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 16:22:12,130 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:12,130 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:12,159 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:12,345 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:12,346 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:12,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:12,346 INFO L85 PathProgramCache]: Analyzing trace with hash -1718174257, now seen corresponding path program 3 times [2022-04-27 16:22:12,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:12,347 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839289046] [2022-04-27 16:22:12,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:12,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:12,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:12,456 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:12,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:12,465 INFO L290 TraceCheckUtils]: 0: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-27 16:22:12,466 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,466 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,466 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-27 16:22:12,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:12,476 INFO L290 TraceCheckUtils]: 0: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:12,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,481 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 16:22:12,481 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 16:22:12,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:12,492 INFO L290 TraceCheckUtils]: 0: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:12,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,494 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1143#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:12,494 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:12,494 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-27 16:22:12,494 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,495 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,495 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,495 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1129#true} is VALID [2022-04-27 16:22:12,495 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1134#(= main_~i~0 0)} is VALID [2022-04-27 16:22:12,496 INFO L290 TraceCheckUtils]: 7: Hoare triple {1134#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1134#(= main_~i~0 0)} is VALID [2022-04-27 16:22:12,496 INFO L290 TraceCheckUtils]: 8: Hoare triple {1134#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1135#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:12,496 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1135#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:12,497 INFO L290 TraceCheckUtils]: 10: Hoare triple {1135#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1136#(<= main_~i~0 2)} is VALID [2022-04-27 16:22:12,497 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1137#(<= main_~n~0 2)} is VALID [2022-04-27 16:22:12,498 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 16:22:12,498 INFO L290 TraceCheckUtils]: 13: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 16:22:12,498 INFO L272 TraceCheckUtils]: 14: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-27 16:22:12,499 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:12,499 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,499 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,499 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1129#true} {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 16:22:12,500 INFO L290 TraceCheckUtils]: 19: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 16:22:12,500 INFO L290 TraceCheckUtils]: 20: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:12,501 INFO L290 TraceCheckUtils]: 21: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:12,501 INFO L272 TraceCheckUtils]: 22: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-27 16:22:12,501 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:12,501 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,501 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,502 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1129#true} {1143#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:12,502 INFO L290 TraceCheckUtils]: 27: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:12,503 INFO L290 TraceCheckUtils]: 28: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1148#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:22:12,503 INFO L290 TraceCheckUtils]: 29: Hoare triple {1148#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1130#false} is VALID [2022-04-27 16:22:12,503 INFO L272 TraceCheckUtils]: 30: Hoare triple {1130#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1130#false} is VALID [2022-04-27 16:22:12,503 INFO L290 TraceCheckUtils]: 31: Hoare triple {1130#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-27 16:22:12,503 INFO L290 TraceCheckUtils]: 32: Hoare triple {1130#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-27 16:22:12,504 INFO L290 TraceCheckUtils]: 33: Hoare triple {1130#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-27 16:22:12,505 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:12,506 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:12,506 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839289046] [2022-04-27 16:22:12,506 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1839289046] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:12,506 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [636943266] [2022-04-27 16:22:12,506 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:22:12,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:12,506 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:12,507 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:12,525 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 16:22:12,568 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 16:22:12,568 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:22:12,569 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 16:22:12,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:12,585 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:12,873 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-27 16:22:12,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,873 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,874 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1129#true} is VALID [2022-04-27 16:22:12,874 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1171#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:12,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {1171#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1171#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:12,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {1171#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1135#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:12,876 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1135#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:12,876 INFO L290 TraceCheckUtils]: 10: Hoare triple {1135#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1136#(<= main_~i~0 2)} is VALID [2022-04-27 16:22:12,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1137#(<= main_~n~0 2)} is VALID [2022-04-27 16:22:12,878 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 16:22:12,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 16:22:12,878 INFO L272 TraceCheckUtils]: 14: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-27 16:22:12,879 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:12,879 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,879 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,879 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1129#true} {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 16:22:12,880 INFO L290 TraceCheckUtils]: 19: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 16:22:12,881 INFO L290 TraceCheckUtils]: 20: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 16:22:12,881 INFO L290 TraceCheckUtils]: 21: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 16:22:12,881 INFO L272 TraceCheckUtils]: 22: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-27 16:22:12,881 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:12,882 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,882 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:12,882 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1129#true} {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 16:22:12,883 INFO L290 TraceCheckUtils]: 27: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 16:22:12,883 INFO L290 TraceCheckUtils]: 28: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1240#(and (<= main_~n~0 2) (<= 2 main_~i~1))} is VALID [2022-04-27 16:22:12,884 INFO L290 TraceCheckUtils]: 29: Hoare triple {1240#(and (<= main_~n~0 2) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1130#false} is VALID [2022-04-27 16:22:12,884 INFO L272 TraceCheckUtils]: 30: Hoare triple {1130#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1130#false} is VALID [2022-04-27 16:22:12,884 INFO L290 TraceCheckUtils]: 31: Hoare triple {1130#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-27 16:22:12,884 INFO L290 TraceCheckUtils]: 32: Hoare triple {1130#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-27 16:22:12,885 INFO L290 TraceCheckUtils]: 33: Hoare triple {1130#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-27 16:22:12,885 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:12,885 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:13,072 INFO L290 TraceCheckUtils]: 33: Hoare triple {1130#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-27 16:22:13,073 INFO L290 TraceCheckUtils]: 32: Hoare triple {1130#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-27 16:22:13,073 INFO L290 TraceCheckUtils]: 31: Hoare triple {1130#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-27 16:22:13,073 INFO L272 TraceCheckUtils]: 30: Hoare triple {1130#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1130#false} is VALID [2022-04-27 16:22:13,073 INFO L290 TraceCheckUtils]: 29: Hoare triple {1148#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1130#false} is VALID [2022-04-27 16:22:13,074 INFO L290 TraceCheckUtils]: 28: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1148#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:22:13,074 INFO L290 TraceCheckUtils]: 27: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:13,075 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1129#true} {1143#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:13,075 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,075 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,075 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:13,075 INFO L272 TraceCheckUtils]: 22: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-27 16:22:13,078 INFO L290 TraceCheckUtils]: 21: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:13,078 INFO L290 TraceCheckUtils]: 20: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:22:13,079 INFO L290 TraceCheckUtils]: 19: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:22:13,079 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1129#true} {1295#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:22:13,079 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,079 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,079 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-27 16:22:13,080 INFO L272 TraceCheckUtils]: 14: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-27 16:22:13,080 INFO L290 TraceCheckUtils]: 13: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:22:13,083 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:22:13,084 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1137#(<= main_~n~0 2)} is VALID [2022-04-27 16:22:13,085 INFO L290 TraceCheckUtils]: 10: Hoare triple {1135#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1136#(<= main_~i~0 2)} is VALID [2022-04-27 16:22:13,085 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1135#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:13,085 INFO L290 TraceCheckUtils]: 8: Hoare triple {1171#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1135#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:13,086 INFO L290 TraceCheckUtils]: 7: Hoare triple {1171#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1171#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:13,087 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1171#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:13,087 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1129#true} is VALID [2022-04-27 16:22:13,087 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,087 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-27 16:22:13,087 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-27 16:22:13,088 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:13,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [636943266] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:22:13,088 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:22:13,088 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 15 [2022-04-27 16:22:13,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856048258] [2022-04-27 16:22:13,088 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:13,089 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-27 16:22:13,090 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:13,090 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 16:22:13,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:13,137 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 16:22:13,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:13,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 16:22:13,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-04-27 16:22:13,138 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 16:22:13,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:13,539 INFO L93 Difference]: Finished difference Result 50 states and 53 transitions. [2022-04-27 16:22:13,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 16:22:13,540 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-27 16:22:13,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:13,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 16:22:13,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 40 transitions. [2022-04-27 16:22:13,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 16:22:13,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 40 transitions. [2022-04-27 16:22:13,551 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 40 transitions. [2022-04-27 16:22:13,585 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:13,586 INFO L225 Difference]: With dead ends: 50 [2022-04-27 16:22:13,586 INFO L226 Difference]: Without dead ends: 40 [2022-04-27 16:22:13,587 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=351, Unknown=0, NotChecked=0, Total=462 [2022-04-27 16:22:13,587 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 36 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:13,587 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 54 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 16:22:13,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-27 16:22:13,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2022-04-27 16:22:13,590 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:13,591 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:13,591 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:13,591 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:13,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:13,593 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 16:22:13,593 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 16:22:13,593 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:13,593 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:13,593 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 16:22:13,594 INFO L87 Difference]: Start difference. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 16:22:13,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:13,595 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 16:22:13,595 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 16:22:13,596 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:13,596 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:13,596 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:13,596 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:13,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:13,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2022-04-27 16:22:13,597 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2022-04-27 16:22:13,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:13,598 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2022-04-27 16:22:13,598 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 16:22:13,598 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2022-04-27 16:22:13,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 16:22:13,599 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:13,599 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:13,623 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:13,822 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:13,823 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:13,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:13,823 INFO L85 PathProgramCache]: Analyzing trace with hash -770459891, now seen corresponding path program 4 times [2022-04-27 16:22:13,823 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:13,823 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467041352] [2022-04-27 16:22:13,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:13,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:13,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:13,976 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:13,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:13,989 INFO L290 TraceCheckUtils]: 0: Hoare triple {1565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1541#true} is VALID [2022-04-27 16:22:13,989 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:13,989 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1541#true} {1541#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:13,989 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 16:22:13,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:14,000 INFO L290 TraceCheckUtils]: 0: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-27 16:22:14,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,001 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:14,003 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 16:22:14,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:14,010 INFO L290 TraceCheckUtils]: 0: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-27 16:22:14,010 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,010 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,012 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:14,013 INFO L272 TraceCheckUtils]: 0: Hoare triple {1541#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:14,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {1565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1541#true} is VALID [2022-04-27 16:22:14,017 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1541#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,019 INFO L272 TraceCheckUtils]: 4: Hoare triple {1541#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,019 INFO L290 TraceCheckUtils]: 5: Hoare triple {1541#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1541#true} is VALID [2022-04-27 16:22:14,020 INFO L290 TraceCheckUtils]: 6: Hoare triple {1541#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1546#(= main_~i~0 0)} is VALID [2022-04-27 16:22:14,021 INFO L290 TraceCheckUtils]: 7: Hoare triple {1546#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1546#(= main_~i~0 0)} is VALID [2022-04-27 16:22:14,021 INFO L290 TraceCheckUtils]: 8: Hoare triple {1546#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:14,021 INFO L290 TraceCheckUtils]: 9: Hoare triple {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:14,022 INFO L290 TraceCheckUtils]: 10: Hoare triple {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1548#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:14,023 INFO L290 TraceCheckUtils]: 11: Hoare triple {1548#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1549#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:14,023 INFO L290 TraceCheckUtils]: 12: Hoare triple {1549#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:14,024 INFO L290 TraceCheckUtils]: 13: Hoare triple {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:14,024 INFO L290 TraceCheckUtils]: 14: Hoare triple {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:14,025 INFO L290 TraceCheckUtils]: 15: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:14,025 INFO L272 TraceCheckUtils]: 16: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1541#true} is VALID [2022-04-27 16:22:14,025 INFO L290 TraceCheckUtils]: 17: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-27 16:22:14,025 INFO L290 TraceCheckUtils]: 18: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,025 INFO L290 TraceCheckUtils]: 19: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,026 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1541#true} {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:14,026 INFO L290 TraceCheckUtils]: 21: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:14,027 INFO L290 TraceCheckUtils]: 22: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:14,027 INFO L290 TraceCheckUtils]: 23: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:14,027 INFO L272 TraceCheckUtils]: 24: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1541#true} is VALID [2022-04-27 16:22:14,027 INFO L290 TraceCheckUtils]: 25: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-27 16:22:14,028 INFO L290 TraceCheckUtils]: 26: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,028 INFO L290 TraceCheckUtils]: 27: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:14,028 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1541#true} {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:14,029 INFO L290 TraceCheckUtils]: 29: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:14,030 INFO L290 TraceCheckUtils]: 30: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1561#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:14,030 INFO L290 TraceCheckUtils]: 31: Hoare triple {1561#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1562#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:14,031 INFO L272 TraceCheckUtils]: 32: Hoare triple {1562#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1563#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:22:14,031 INFO L290 TraceCheckUtils]: 33: Hoare triple {1563#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1564#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:22:14,032 INFO L290 TraceCheckUtils]: 34: Hoare triple {1564#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-27 16:22:14,032 INFO L290 TraceCheckUtils]: 35: Hoare triple {1542#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-27 16:22:14,032 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:14,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:14,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467041352] [2022-04-27 16:22:14,033 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467041352] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:14,033 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [516079313] [2022-04-27 16:22:14,033 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:22:14,033 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:14,033 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:14,036 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:14,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 16:22:14,090 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:22:14,090 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:22:14,091 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 16:22:14,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:14,107 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:14,210 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:22:16,471 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-27 16:22:16,472 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-27 16:22:16,553 INFO L272 TraceCheckUtils]: 0: Hoare triple {1541#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:16,553 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1541#true} is VALID [2022-04-27 16:22:16,553 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:16,553 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1541#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:16,553 INFO L272 TraceCheckUtils]: 4: Hoare triple {1541#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-27 16:22:16,553 INFO L290 TraceCheckUtils]: 5: Hoare triple {1541#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1541#true} is VALID [2022-04-27 16:22:16,554 INFO L290 TraceCheckUtils]: 6: Hoare triple {1541#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1587#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:16,554 INFO L290 TraceCheckUtils]: 7: Hoare triple {1587#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1587#(<= main_~i~0 0)} is VALID [2022-04-27 16:22:16,554 INFO L290 TraceCheckUtils]: 8: Hoare triple {1587#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1594#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:16,555 INFO L290 TraceCheckUtils]: 9: Hoare triple {1594#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1594#(<= main_~i~0 1)} is VALID [2022-04-27 16:22:16,555 INFO L290 TraceCheckUtils]: 10: Hoare triple {1594#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1601#(<= main_~i~0 2)} is VALID [2022-04-27 16:22:16,556 INFO L290 TraceCheckUtils]: 11: Hoare triple {1601#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1605#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:16,557 INFO L290 TraceCheckUtils]: 12: Hoare triple {1605#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1609#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-27 16:22:16,558 INFO L290 TraceCheckUtils]: 13: Hoare triple {1609#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1613#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-27 16:22:16,559 INFO L290 TraceCheckUtils]: 14: Hoare triple {1613#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,559 INFO L290 TraceCheckUtils]: 15: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,565 INFO L272 TraceCheckUtils]: 16: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,565 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,567 INFO L290 TraceCheckUtils]: 19: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,568 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,569 INFO L290 TraceCheckUtils]: 21: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,570 INFO L290 TraceCheckUtils]: 22: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,571 INFO L290 TraceCheckUtils]: 23: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,575 INFO L272 TraceCheckUtils]: 24: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,576 INFO L290 TraceCheckUtils]: 25: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,576 INFO L290 TraceCheckUtils]: 26: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,577 INFO L290 TraceCheckUtils]: 27: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 16:22:16,577 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,578 INFO L290 TraceCheckUtils]: 29: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 16:22:16,579 INFO L290 TraceCheckUtils]: 30: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1668#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} is VALID [2022-04-27 16:22:16,579 INFO L290 TraceCheckUtils]: 31: Hoare triple {1668#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1562#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:16,580 INFO L272 TraceCheckUtils]: 32: Hoare triple {1562#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1675#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:16,580 INFO L290 TraceCheckUtils]: 33: Hoare triple {1675#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1679#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:16,581 INFO L290 TraceCheckUtils]: 34: Hoare triple {1679#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-27 16:22:16,581 INFO L290 TraceCheckUtils]: 35: Hoare triple {1542#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-27 16:22:16,581 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:16,581 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:16,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [516079313] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:16,880 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-27 16:22:16,880 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2022-04-27 16:22:16,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1794776604] [2022-04-27 16:22:16,880 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:16,881 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-27 16:22:16,881 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:16,882 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:17,010 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:17,010 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 16:22:17,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:17,011 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 16:22:17,011 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=663, Unknown=0, NotChecked=0, Total=756 [2022-04-27 16:22:17,011 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:17,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:17,699 INFO L93 Difference]: Finished difference Result 68 states and 70 transitions. [2022-04-27 16:22:17,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-27 16:22:17,699 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-27 16:22:17,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:17,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:17,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 53 transitions. [2022-04-27 16:22:17,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:17,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 53 transitions. [2022-04-27 16:22:17,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 53 transitions. [2022-04-27 16:22:21,795 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 51 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:21,796 INFO L225 Difference]: With dead ends: 68 [2022-04-27 16:22:21,796 INFO L226 Difference]: Without dead ends: 42 [2022-04-27 16:22:21,797 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 373 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=193, Invalid=1529, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 16:22:21,797 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 20 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 170 SdHoareTripleChecker+Invalid, 345 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 158 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:21,798 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 170 Invalid, 345 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 177 Invalid, 0 Unknown, 158 Unchecked, 0.2s Time] [2022-04-27 16:22:21,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-27 16:22:21,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2022-04-27 16:22:21,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:21,800 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:21,800 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:21,801 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:21,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:21,802 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-27 16:22:21,802 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-27 16:22:21,802 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:21,803 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:21,803 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-27 16:22:21,803 INFO L87 Difference]: Start difference. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-27 16:22:21,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:21,804 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-27 16:22:21,805 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-27 16:22:21,805 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:21,805 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:21,805 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:21,805 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:21,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 16:22:21,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 42 transitions. [2022-04-27 16:22:21,806 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 42 transitions. Word has length 36 [2022-04-27 16:22:21,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:21,807 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 42 transitions. [2022-04-27 16:22:21,807 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:21,807 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 42 transitions. [2022-04-27 16:22:21,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-27 16:22:21,807 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:21,808 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:21,827 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:22,011 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:22,012 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:22,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:22,012 INFO L85 PathProgramCache]: Analyzing trace with hash -550020917, now seen corresponding path program 5 times [2022-04-27 16:22:22,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:22,012 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1320942148] [2022-04-27 16:22:22,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:22,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:22,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:22,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:22,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:22,218 INFO L290 TraceCheckUtils]: 0: Hoare triple {1960#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-27 16:22:22,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,218 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-27 16:22:22,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:22,223 INFO L290 TraceCheckUtils]: 0: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-27 16:22:22,223 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,223 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,224 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:22,224 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:22:22,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:22,229 INFO L290 TraceCheckUtils]: 0: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-27 16:22:22,229 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,230 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:22,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {1935#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1960#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:22,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {1960#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-27 16:22:22,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,231 INFO L272 TraceCheckUtils]: 4: Hoare triple {1935#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {1935#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1935#true} is VALID [2022-04-27 16:22:22,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {1935#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1940#(= main_~i~0 0)} is VALID [2022-04-27 16:22:22,232 INFO L290 TraceCheckUtils]: 7: Hoare triple {1940#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1940#(= main_~i~0 0)} is VALID [2022-04-27 16:22:22,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {1940#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:22,233 INFO L290 TraceCheckUtils]: 9: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:22,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:22,234 INFO L290 TraceCheckUtils]: 11: Hoare triple {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:22,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:22:22,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:22,236 INFO L290 TraceCheckUtils]: 14: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:22,237 INFO L290 TraceCheckUtils]: 15: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:22,237 INFO L290 TraceCheckUtils]: 16: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:22,238 INFO L290 TraceCheckUtils]: 17: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:22,238 INFO L272 TraceCheckUtils]: 18: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-27 16:22:22,238 INFO L290 TraceCheckUtils]: 19: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-27 16:22:22,238 INFO L290 TraceCheckUtils]: 20: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,238 INFO L290 TraceCheckUtils]: 21: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,239 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {1935#true} {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:22,239 INFO L290 TraceCheckUtils]: 23: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:22,240 INFO L290 TraceCheckUtils]: 24: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:22,240 INFO L290 TraceCheckUtils]: 25: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:22,241 INFO L272 TraceCheckUtils]: 26: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-27 16:22:22,241 INFO L290 TraceCheckUtils]: 27: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-27 16:22:22,241 INFO L290 TraceCheckUtils]: 28: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,241 INFO L290 TraceCheckUtils]: 29: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:22,242 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1935#true} {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:22,242 INFO L290 TraceCheckUtils]: 31: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:22,243 INFO L290 TraceCheckUtils]: 32: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:22,243 INFO L290 TraceCheckUtils]: 33: Hoare triple {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1957#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:22,244 INFO L272 TraceCheckUtils]: 34: Hoare triple {1957#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1958#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:22:22,244 INFO L290 TraceCheckUtils]: 35: Hoare triple {1958#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1959#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:22:22,245 INFO L290 TraceCheckUtils]: 36: Hoare triple {1959#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-27 16:22:22,245 INFO L290 TraceCheckUtils]: 37: Hoare triple {1936#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-27 16:22:22,245 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:22,245 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:22,245 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1320942148] [2022-04-27 16:22:22,245 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1320942148] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:22,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1837505193] [2022-04-27 16:22:22,246 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 16:22:22,246 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:22,246 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:22,247 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:22,257 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 16:22:22,309 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-27 16:22:22,309 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:22:22,310 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 16:22:22,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:22,326 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:22,396 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:22:22,645 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 16:22:22,646 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 16:22:31,087 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:22:31,144 INFO L272 TraceCheckUtils]: 0: Hoare triple {1935#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:31,144 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-27 16:22:31,144 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:31,144 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:31,144 INFO L272 TraceCheckUtils]: 4: Hoare triple {1935#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:31,145 INFO L290 TraceCheckUtils]: 5: Hoare triple {1935#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1935#true} is VALID [2022-04-27 16:22:31,145 INFO L290 TraceCheckUtils]: 6: Hoare triple {1935#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1940#(= main_~i~0 0)} is VALID [2022-04-27 16:22:31,148 INFO L290 TraceCheckUtils]: 7: Hoare triple {1940#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1940#(= main_~i~0 0)} is VALID [2022-04-27 16:22:31,149 INFO L290 TraceCheckUtils]: 8: Hoare triple {1940#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:31,149 INFO L290 TraceCheckUtils]: 9: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:31,150 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:31,151 INFO L290 TraceCheckUtils]: 11: Hoare triple {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:31,152 INFO L290 TraceCheckUtils]: 12: Hoare triple {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2000#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} is VALID [2022-04-27 16:22:31,155 INFO L290 TraceCheckUtils]: 13: Hoare triple {2000#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:31,156 INFO L290 TraceCheckUtils]: 14: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:31,156 INFO L290 TraceCheckUtils]: 15: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:31,157 INFO L290 TraceCheckUtils]: 16: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:31,157 INFO L290 TraceCheckUtils]: 17: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:31,158 INFO L272 TraceCheckUtils]: 18: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,159 INFO L290 TraceCheckUtils]: 19: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,159 INFO L290 TraceCheckUtils]: 20: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,159 INFO L290 TraceCheckUtils]: 21: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,160 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:31,161 INFO L290 TraceCheckUtils]: 23: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:31,161 INFO L290 TraceCheckUtils]: 24: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:22:31,162 INFO L290 TraceCheckUtils]: 25: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:22:31,163 INFO L272 TraceCheckUtils]: 26: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,163 INFO L290 TraceCheckUtils]: 27: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,164 INFO L290 TraceCheckUtils]: 28: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,164 INFO L290 TraceCheckUtils]: 29: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 16:22:31,165 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:22:31,165 INFO L290 TraceCheckUtils]: 31: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:22:31,166 INFO L290 TraceCheckUtils]: 32: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2063#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:22:31,166 INFO L290 TraceCheckUtils]: 33: Hoare triple {2063#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1957#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:31,167 INFO L272 TraceCheckUtils]: 34: Hoare triple {1957#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:31,167 INFO L290 TraceCheckUtils]: 35: Hoare triple {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2074#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:31,168 INFO L290 TraceCheckUtils]: 36: Hoare triple {2074#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-27 16:22:31,168 INFO L290 TraceCheckUtils]: 37: Hoare triple {1936#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-27 16:22:31,168 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:31,168 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:33,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:22:33,424 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:22:33,498 INFO L290 TraceCheckUtils]: 37: Hoare triple {1936#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-27 16:22:33,499 INFO L290 TraceCheckUtils]: 36: Hoare triple {2074#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-27 16:22:33,500 INFO L290 TraceCheckUtils]: 35: Hoare triple {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2074#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:33,500 INFO L272 TraceCheckUtils]: 34: Hoare triple {1957#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:33,501 INFO L290 TraceCheckUtils]: 33: Hoare triple {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1957#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:33,502 INFO L290 TraceCheckUtils]: 32: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:33,502 INFO L290 TraceCheckUtils]: 31: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:33,503 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1935#true} {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:33,503 INFO L290 TraceCheckUtils]: 29: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,503 INFO L290 TraceCheckUtils]: 28: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,503 INFO L290 TraceCheckUtils]: 27: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-27 16:22:33,503 INFO L272 TraceCheckUtils]: 26: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-27 16:22:33,504 INFO L290 TraceCheckUtils]: 25: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:33,505 INFO L290 TraceCheckUtils]: 24: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:33,505 INFO L290 TraceCheckUtils]: 23: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:33,506 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {1935#true} {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:33,506 INFO L290 TraceCheckUtils]: 21: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,506 INFO L290 TraceCheckUtils]: 20: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,506 INFO L290 TraceCheckUtils]: 19: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-27 16:22:33,506 INFO L272 TraceCheckUtils]: 18: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-27 16:22:33,507 INFO L290 TraceCheckUtils]: 17: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:33,507 INFO L290 TraceCheckUtils]: 16: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:33,508 INFO L290 TraceCheckUtils]: 15: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:33,508 INFO L290 TraceCheckUtils]: 14: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:33,509 INFO L290 TraceCheckUtils]: 13: Hoare triple {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:33,509 INFO L290 TraceCheckUtils]: 12: Hoare triple {2157#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:22:33,510 INFO L290 TraceCheckUtils]: 11: Hoare triple {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2157#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:22:33,511 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:33,511 INFO L290 TraceCheckUtils]: 9: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:33,512 INFO L290 TraceCheckUtils]: 8: Hoare triple {1940#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:33,512 INFO L290 TraceCheckUtils]: 7: Hoare triple {1940#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1940#(= main_~i~0 0)} is VALID [2022-04-27 16:22:33,513 INFO L290 TraceCheckUtils]: 6: Hoare triple {1935#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1940#(= main_~i~0 0)} is VALID [2022-04-27 16:22:33,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {1935#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1935#true} is VALID [2022-04-27 16:22:33,513 INFO L272 TraceCheckUtils]: 4: Hoare triple {1935#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,513 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-27 16:22:33,513 INFO L272 TraceCheckUtils]: 0: Hoare triple {1935#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-27 16:22:33,514 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:33,514 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1837505193] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:22:33,514 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:22:33,514 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 23 [2022-04-27 16:22:33,514 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005920191] [2022-04-27 16:22:33,514 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:33,517 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-27 16:22:33,519 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:33,519 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:33,574 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:33,574 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 16:22:33,574 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:33,575 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 16:22:33,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=436, Unknown=3, NotChecked=0, Total=506 [2022-04-27 16:22:33,576 INFO L87 Difference]: Start difference. First operand 41 states and 42 transitions. Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:35,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:35,531 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 16:22:35,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-27 16:22:35,532 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-27 16:22:35,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:35,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:35,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 55 transitions. [2022-04-27 16:22:35,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:35,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 55 transitions. [2022-04-27 16:22:35,536 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 55 transitions. [2022-04-27 16:22:35,591 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:35,592 INFO L225 Difference]: With dead ends: 69 [2022-04-27 16:22:35,592 INFO L226 Difference]: Without dead ends: 69 [2022-04-27 16:22:35,593 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 67 SyntacticMatches, 9 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 11.7s TimeCoverageRelationStatistics Valid=179, Invalid=1296, Unknown=7, NotChecked=0, Total=1482 [2022-04-27 16:22:35,594 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 47 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 384 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 63 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:35,594 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 93 Invalid, 384 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 306 Invalid, 0 Unknown, 63 Unchecked, 0.3s Time] [2022-04-27 16:22:35,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-27 16:22:35,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 52. [2022-04-27 16:22:35,598 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:35,598 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:35,598 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:35,599 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:35,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:35,601 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 16:22:35,601 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-27 16:22:35,601 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:35,601 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:35,602 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-27 16:22:35,602 INFO L87 Difference]: Start difference. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-27 16:22:35,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:35,604 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 16:22:35,604 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-27 16:22:35,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:35,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:35,604 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:35,604 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:35,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 16:22:35,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-27 16:22:35,606 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 38 [2022-04-27 16:22:35,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:35,606 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-27 16:22:35,607 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:35,607 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-27 16:22:35,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-27 16:22:35,607 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:35,607 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:35,634 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:35,827 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:35,828 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:35,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:35,828 INFO L85 PathProgramCache]: Analyzing trace with hash 838435593, now seen corresponding path program 6 times [2022-04-27 16:22:35,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:35,828 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829049555] [2022-04-27 16:22:35,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:35,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:35,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:36,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:36,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:36,068 INFO L290 TraceCheckUtils]: 0: Hoare triple {2515#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-27 16:22:36,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,068 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,068 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-27 16:22:36,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:36,076 INFO L290 TraceCheckUtils]: 0: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-27 16:22:36,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,076 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,077 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:36,077 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 16:22:36,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:36,081 INFO L290 TraceCheckUtils]: 0: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-27 16:22:36,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,081 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,082 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:36,082 INFO L272 TraceCheckUtils]: 0: Hoare triple {2489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2515#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:36,083 INFO L290 TraceCheckUtils]: 1: Hoare triple {2515#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-27 16:22:36,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,083 INFO L272 TraceCheckUtils]: 4: Hoare triple {2489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,083 INFO L290 TraceCheckUtils]: 5: Hoare triple {2489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2489#true} is VALID [2022-04-27 16:22:36,089 INFO L290 TraceCheckUtils]: 6: Hoare triple {2489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2494#(= main_~i~0 0)} is VALID [2022-04-27 16:22:36,090 INFO L290 TraceCheckUtils]: 7: Hoare triple {2494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2494#(= main_~i~0 0)} is VALID [2022-04-27 16:22:36,090 INFO L290 TraceCheckUtils]: 8: Hoare triple {2494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:36,091 INFO L290 TraceCheckUtils]: 9: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:36,091 INFO L290 TraceCheckUtils]: 10: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:36,092 INFO L290 TraceCheckUtils]: 11: Hoare triple {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:36,093 INFO L290 TraceCheckUtils]: 12: Hoare triple {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:22:36,093 INFO L290 TraceCheckUtils]: 13: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:22:36,094 INFO L290 TraceCheckUtils]: 14: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2499#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:22:36,095 INFO L290 TraceCheckUtils]: 15: Hoare triple {2499#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:36,095 INFO L290 TraceCheckUtils]: 16: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:36,096 INFO L290 TraceCheckUtils]: 17: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:36,096 INFO L290 TraceCheckUtils]: 18: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:36,097 INFO L290 TraceCheckUtils]: 19: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:36,097 INFO L272 TraceCheckUtils]: 20: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-27 16:22:36,097 INFO L290 TraceCheckUtils]: 21: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-27 16:22:36,097 INFO L290 TraceCheckUtils]: 22: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,097 INFO L290 TraceCheckUtils]: 23: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,098 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2489#true} {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:36,098 INFO L290 TraceCheckUtils]: 25: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:36,099 INFO L290 TraceCheckUtils]: 26: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:36,099 INFO L290 TraceCheckUtils]: 27: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:36,099 INFO L272 TraceCheckUtils]: 28: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-27 16:22:36,099 INFO L290 TraceCheckUtils]: 29: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-27 16:22:36,099 INFO L290 TraceCheckUtils]: 30: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,099 INFO L290 TraceCheckUtils]: 31: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:36,100 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2489#true} {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:36,100 INFO L290 TraceCheckUtils]: 33: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:36,101 INFO L290 TraceCheckUtils]: 34: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:36,101 INFO L290 TraceCheckUtils]: 35: Hoare triple {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2512#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:36,102 INFO L272 TraceCheckUtils]: 36: Hoare triple {2512#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2513#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:22:36,102 INFO L290 TraceCheckUtils]: 37: Hoare triple {2513#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2514#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:22:36,102 INFO L290 TraceCheckUtils]: 38: Hoare triple {2514#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-27 16:22:36,103 INFO L290 TraceCheckUtils]: 39: Hoare triple {2490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-27 16:22:36,103 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:36,103 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:36,103 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829049555] [2022-04-27 16:22:36,103 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [829049555] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:36,103 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1148497417] [2022-04-27 16:22:36,103 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 16:22:36,103 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:36,103 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:36,104 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:36,105 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 16:22:36,150 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-27 16:22:36,150 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:22:36,151 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 16:22:36,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:36,173 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:36,232 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:22:36,385 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:22:36,385 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:22:36,455 INFO L356 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2022-04-27 16:22:36,455 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 30 [2022-04-27 16:22:44,954 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:22:45,015 INFO L272 TraceCheckUtils]: 0: Hoare triple {2489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:45,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-27 16:22:45,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:45,016 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:45,016 INFO L272 TraceCheckUtils]: 4: Hoare triple {2489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:45,016 INFO L290 TraceCheckUtils]: 5: Hoare triple {2489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2489#true} is VALID [2022-04-27 16:22:45,017 INFO L290 TraceCheckUtils]: 6: Hoare triple {2489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2494#(= main_~i~0 0)} is VALID [2022-04-27 16:22:45,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {2494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2494#(= main_~i~0 0)} is VALID [2022-04-27 16:22:45,017 INFO L290 TraceCheckUtils]: 8: Hoare triple {2494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:45,018 INFO L290 TraceCheckUtils]: 9: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:45,018 INFO L290 TraceCheckUtils]: 10: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:45,019 INFO L290 TraceCheckUtils]: 11: Hoare triple {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:45,020 INFO L290 TraceCheckUtils]: 12: Hoare triple {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:22:45,021 INFO L290 TraceCheckUtils]: 13: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-27 16:22:45,021 INFO L290 TraceCheckUtils]: 14: Hoare triple {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-27 16:22:45,022 INFO L290 TraceCheckUtils]: 15: Hoare triple {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2565#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} is VALID [2022-04-27 16:22:45,022 INFO L290 TraceCheckUtils]: 16: Hoare triple {2565#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2569#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} is VALID [2022-04-27 16:22:45,023 INFO L290 TraceCheckUtils]: 17: Hoare triple {2569#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:45,023 INFO L290 TraceCheckUtils]: 18: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:45,024 INFO L290 TraceCheckUtils]: 19: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:45,026 INFO L272 TraceCheckUtils]: 20: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,026 INFO L290 TraceCheckUtils]: 21: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,027 INFO L290 TraceCheckUtils]: 22: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,027 INFO L290 TraceCheckUtils]: 23: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,028 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:45,028 INFO L290 TraceCheckUtils]: 25: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:45,029 INFO L290 TraceCheckUtils]: 26: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:22:45,029 INFO L290 TraceCheckUtils]: 27: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:22:45,030 INFO L272 TraceCheckUtils]: 28: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,031 INFO L290 TraceCheckUtils]: 29: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,031 INFO L290 TraceCheckUtils]: 30: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,031 INFO L290 TraceCheckUtils]: 31: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 16:22:45,032 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:22:45,032 INFO L290 TraceCheckUtils]: 33: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:22:45,033 INFO L290 TraceCheckUtils]: 34: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:22:45,033 INFO L290 TraceCheckUtils]: 35: Hoare triple {2626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2512#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:45,034 INFO L272 TraceCheckUtils]: 36: Hoare triple {2512#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:45,035 INFO L290 TraceCheckUtils]: 37: Hoare triple {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2637#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:45,035 INFO L290 TraceCheckUtils]: 38: Hoare triple {2637#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-27 16:22:45,035 INFO L290 TraceCheckUtils]: 39: Hoare triple {2490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-27 16:22:45,036 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:22:45,036 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:22:49,293 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) is different from false [2022-04-27 16:22:49,552 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:22:49,557 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:22:49,610 INFO L290 TraceCheckUtils]: 39: Hoare triple {2490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-27 16:22:49,611 INFO L290 TraceCheckUtils]: 38: Hoare triple {2637#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-27 16:22:49,611 INFO L290 TraceCheckUtils]: 37: Hoare triple {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2637#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:22:49,612 INFO L272 TraceCheckUtils]: 36: Hoare triple {2512#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:22:49,612 INFO L290 TraceCheckUtils]: 35: Hoare triple {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2512#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:49,613 INFO L290 TraceCheckUtils]: 34: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:49,613 INFO L290 TraceCheckUtils]: 33: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:49,614 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2489#true} {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:49,614 INFO L290 TraceCheckUtils]: 31: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,614 INFO L290 TraceCheckUtils]: 30: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,614 INFO L290 TraceCheckUtils]: 29: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-27 16:22:49,614 INFO L272 TraceCheckUtils]: 28: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-27 16:22:49,615 INFO L290 TraceCheckUtils]: 27: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:49,615 INFO L290 TraceCheckUtils]: 26: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:49,616 INFO L290 TraceCheckUtils]: 25: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:49,617 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2489#true} {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:49,617 INFO L290 TraceCheckUtils]: 23: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,617 INFO L290 TraceCheckUtils]: 22: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,617 INFO L290 TraceCheckUtils]: 21: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-27 16:22:49,617 INFO L272 TraceCheckUtils]: 20: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-27 16:22:49,617 INFO L290 TraceCheckUtils]: 19: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:49,618 INFO L290 TraceCheckUtils]: 18: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:49,618 INFO L290 TraceCheckUtils]: 17: Hoare triple {2711#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:22:49,619 INFO L290 TraceCheckUtils]: 16: Hoare triple {2715#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2711#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:22:49,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2715#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} is VALID [2022-04-27 16:22:49,620 INFO L290 TraceCheckUtils]: 14: Hoare triple {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-27 16:22:49,621 INFO L290 TraceCheckUtils]: 13: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-27 16:22:49,621 INFO L290 TraceCheckUtils]: 12: Hoare triple {2729#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:22:49,622 INFO L290 TraceCheckUtils]: 11: Hoare triple {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2729#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:22:49,622 INFO L290 TraceCheckUtils]: 10: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:49,623 INFO L290 TraceCheckUtils]: 9: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:49,623 INFO L290 TraceCheckUtils]: 8: Hoare triple {2494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:49,623 INFO L290 TraceCheckUtils]: 7: Hoare triple {2494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2494#(= main_~i~0 0)} is VALID [2022-04-27 16:22:49,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {2489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2494#(= main_~i~0 0)} is VALID [2022-04-27 16:22:49,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {2489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2489#true} is VALID [2022-04-27 16:22:49,624 INFO L272 TraceCheckUtils]: 4: Hoare triple {2489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-27 16:22:49,624 INFO L272 TraceCheckUtils]: 0: Hoare triple {2489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-27 16:22:49,624 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 9 not checked. [2022-04-27 16:22:49,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1148497417] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:22:49,625 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:22:49,625 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18, 17] total 29 [2022-04-27 16:22:49,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437858576] [2022-04-27 16:22:49,625 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:22:49,626 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-27 16:22:49,627 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:22:49,628 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:49,682 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:49,682 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 16:22:49,682 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:22:49,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 16:22:49,683 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=650, Unknown=4, NotChecked=52, Total=812 [2022-04-27 16:22:49,683 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:52,052 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-27 16:22:54,058 WARN L833 $PredicateComparison]: unable to prove that (and (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0)) is different from false [2022-04-27 16:22:56,088 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 8))) (and (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0))) is different from false [2022-04-27 16:22:57,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:57,337 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2022-04-27 16:22:57,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-04-27 16:22:57,337 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-27 16:22:57,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:22:57,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:57,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 73 transitions. [2022-04-27 16:22:57,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:57,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 73 transitions. [2022-04-27 16:22:57,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 32 states and 73 transitions. [2022-04-27 16:22:57,409 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:22:57,411 INFO L225 Difference]: With dead ends: 101 [2022-04-27 16:22:57,411 INFO L226 Difference]: Without dead ends: 101 [2022-04-27 16:22:57,412 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 68 SyntacticMatches, 10 SemanticMatches, 52 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 560 ImplicationChecksByTransitivity, 19.0s TimeCoverageRelationStatistics Valid=321, Invalid=2137, Unknown=8, NotChecked=396, Total=2862 [2022-04-27 16:22:57,412 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 63 mSDsluCounter, 119 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 725 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 128 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 16:22:57,412 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 144 Invalid, 725 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 552 Invalid, 0 Unknown, 128 Unchecked, 0.5s Time] [2022-04-27 16:22:57,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-27 16:22:57,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 69. [2022-04-27 16:22:57,417 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:22:57,417 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 16:22:57,418 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 16:22:57,418 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 16:22:57,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:57,421 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2022-04-27 16:22:57,421 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 109 transitions. [2022-04-27 16:22:57,422 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:57,422 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:57,422 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 101 states. [2022-04-27 16:22:57,423 INFO L87 Difference]: Start difference. First operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 101 states. [2022-04-27 16:22:57,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:22:57,426 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2022-04-27 16:22:57,426 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 109 transitions. [2022-04-27 16:22:57,427 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:22:57,427 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:22:57,427 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:22:57,427 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:22:57,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 16:22:57,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 75 transitions. [2022-04-27 16:22:57,429 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 75 transitions. Word has length 40 [2022-04-27 16:22:57,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:22:57,429 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 75 transitions. [2022-04-27 16:22:57,430 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:22:57,430 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 75 transitions. [2022-04-27 16:22:57,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-27 16:22:57,430 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:22:57,430 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:22:57,456 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 16:22:57,643 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:57,643 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:22:57,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:22:57,644 INFO L85 PathProgramCache]: Analyzing trace with hash -110930399, now seen corresponding path program 7 times [2022-04-27 16:22:57,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:22:57,644 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694816809] [2022-04-27 16:22:57,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:22:57,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:22:57,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,817 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:22:57,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,821 INFO L290 TraceCheckUtils]: 0: Hoare triple {3224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-27 16:22:57,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,822 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,822 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-27 16:22:57,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,825 INFO L290 TraceCheckUtils]: 0: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:22:57,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,826 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,836 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:57,836 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:22:57,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,841 INFO L290 TraceCheckUtils]: 0: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:22:57,841 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,841 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,842 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:57,842 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 16:22:57,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,846 INFO L290 TraceCheckUtils]: 0: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:22:57,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:57,847 INFO L272 TraceCheckUtils]: 0: Hoare triple {3194#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:22:57,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {3224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-27 16:22:57,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,848 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,848 INFO L272 TraceCheckUtils]: 4: Hoare triple {3194#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {3194#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3194#true} is VALID [2022-04-27 16:22:57,848 INFO L290 TraceCheckUtils]: 6: Hoare triple {3194#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3199#(= main_~i~0 0)} is VALID [2022-04-27 16:22:57,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {3199#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3199#(= main_~i~0 0)} is VALID [2022-04-27 16:22:57,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:57,850 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:22:57,850 INFO L290 TraceCheckUtils]: 10: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:57,851 INFO L290 TraceCheckUtils]: 11: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:22:57,851 INFO L290 TraceCheckUtils]: 12: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:22:57,852 INFO L290 TraceCheckUtils]: 13: Hoare triple {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3203#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:22:57,852 INFO L290 TraceCheckUtils]: 14: Hoare triple {3203#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:22:57,853 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:22:57,853 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:57,854 INFO L290 TraceCheckUtils]: 17: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:57,854 INFO L272 TraceCheckUtils]: 18: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-27 16:22:57,854 INFO L290 TraceCheckUtils]: 19: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:22:57,854 INFO L290 TraceCheckUtils]: 20: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,854 INFO L290 TraceCheckUtils]: 21: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,855 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3194#true} {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:57,855 INFO L290 TraceCheckUtils]: 23: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:22:57,856 INFO L290 TraceCheckUtils]: 24: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:57,856 INFO L290 TraceCheckUtils]: 25: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:57,856 INFO L272 TraceCheckUtils]: 26: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-27 16:22:57,856 INFO L290 TraceCheckUtils]: 27: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:22:57,856 INFO L290 TraceCheckUtils]: 28: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,857 INFO L290 TraceCheckUtils]: 29: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,857 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3194#true} {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:57,858 INFO L290 TraceCheckUtils]: 31: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:22:57,858 INFO L290 TraceCheckUtils]: 32: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:57,859 INFO L290 TraceCheckUtils]: 33: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:57,859 INFO L272 TraceCheckUtils]: 34: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-27 16:22:57,859 INFO L290 TraceCheckUtils]: 35: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:22:57,859 INFO L290 TraceCheckUtils]: 36: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,859 INFO L290 TraceCheckUtils]: 37: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:22:57,860 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3194#true} {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:57,860 INFO L290 TraceCheckUtils]: 39: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:22:57,861 INFO L290 TraceCheckUtils]: 40: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:22:57,861 INFO L290 TraceCheckUtils]: 41: Hoare triple {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3221#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:22:57,862 INFO L272 TraceCheckUtils]: 42: Hoare triple {3221#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3222#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:22:57,862 INFO L290 TraceCheckUtils]: 43: Hoare triple {3222#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3223#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:22:57,862 INFO L290 TraceCheckUtils]: 44: Hoare triple {3223#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-27 16:22:57,863 INFO L290 TraceCheckUtils]: 45: Hoare triple {3195#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-27 16:22:57,863 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 16:22:57,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:22:57,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694816809] [2022-04-27 16:22:57,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1694816809] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:22:57,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2074418720] [2022-04-27 16:22:57,863 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 16:22:57,863 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:22:57,864 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:22:57,868 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:22:57,869 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 16:22:57,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,925 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-27 16:22:57,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:22:57,943 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:22:58,030 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:23:11,356 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:23:11,400 INFO L272 TraceCheckUtils]: 0: Hoare triple {3194#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:11,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-27 16:23:11,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:11,400 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:11,400 INFO L272 TraceCheckUtils]: 4: Hoare triple {3194#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:11,400 INFO L290 TraceCheckUtils]: 5: Hoare triple {3194#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3194#true} is VALID [2022-04-27 16:23:11,401 INFO L290 TraceCheckUtils]: 6: Hoare triple {3194#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3199#(= main_~i~0 0)} is VALID [2022-04-27 16:23:11,401 INFO L290 TraceCheckUtils]: 7: Hoare triple {3199#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3199#(= main_~i~0 0)} is VALID [2022-04-27 16:23:11,401 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:11,402 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:11,402 INFO L290 TraceCheckUtils]: 10: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:11,403 INFO L290 TraceCheckUtils]: 11: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:11,406 INFO L290 TraceCheckUtils]: 12: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:23:11,407 INFO L290 TraceCheckUtils]: 13: Hoare triple {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:23:11,407 INFO L290 TraceCheckUtils]: 14: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:23:11,407 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:23:11,408 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:11,408 INFO L290 TraceCheckUtils]: 17: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:11,409 INFO L272 TraceCheckUtils]: 18: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,410 INFO L290 TraceCheckUtils]: 19: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,410 INFO L290 TraceCheckUtils]: 20: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,411 INFO L290 TraceCheckUtils]: 21: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,411 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:11,412 INFO L290 TraceCheckUtils]: 23: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:11,412 INFO L290 TraceCheckUtils]: 24: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:23:11,412 INFO L290 TraceCheckUtils]: 25: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:23:11,413 INFO L272 TraceCheckUtils]: 26: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,414 INFO L290 TraceCheckUtils]: 27: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,414 INFO L290 TraceCheckUtils]: 28: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,414 INFO L290 TraceCheckUtils]: 29: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,415 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:23:11,415 INFO L290 TraceCheckUtils]: 31: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:23:11,416 INFO L290 TraceCheckUtils]: 32: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 16:23:11,416 INFO L290 TraceCheckUtils]: 33: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 16:23:11,417 INFO L272 TraceCheckUtils]: 34: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,417 INFO L290 TraceCheckUtils]: 35: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,418 INFO L290 TraceCheckUtils]: 36: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,418 INFO L290 TraceCheckUtils]: 37: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 16:23:11,419 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 16:23:11,419 INFO L290 TraceCheckUtils]: 39: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 16:23:11,422 INFO L290 TraceCheckUtils]: 40: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3351#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:23:11,423 INFO L290 TraceCheckUtils]: 41: Hoare triple {3351#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3221#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:11,424 INFO L272 TraceCheckUtils]: 42: Hoare triple {3221#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:23:11,424 INFO L290 TraceCheckUtils]: 43: Hoare triple {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3362#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:23:11,424 INFO L290 TraceCheckUtils]: 44: Hoare triple {3362#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-27 16:23:11,424 INFO L290 TraceCheckUtils]: 45: Hoare triple {3195#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-27 16:23:11,425 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 16:23:11,425 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:23:13,595 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:23:13,600 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:23:13,684 INFO L290 TraceCheckUtils]: 45: Hoare triple {3195#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-27 16:23:13,685 INFO L290 TraceCheckUtils]: 44: Hoare triple {3362#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-27 16:23:13,685 INFO L290 TraceCheckUtils]: 43: Hoare triple {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3362#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:23:13,686 INFO L272 TraceCheckUtils]: 42: Hoare triple {3221#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:23:13,686 INFO L290 TraceCheckUtils]: 41: Hoare triple {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3221#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:13,687 INFO L290 TraceCheckUtils]: 40: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:23:13,687 INFO L290 TraceCheckUtils]: 39: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:13,690 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3194#true} {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:13,690 INFO L290 TraceCheckUtils]: 37: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,690 INFO L290 TraceCheckUtils]: 36: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,690 INFO L290 TraceCheckUtils]: 35: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:23:13,690 INFO L272 TraceCheckUtils]: 34: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-27 16:23:13,691 INFO L290 TraceCheckUtils]: 33: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:13,691 INFO L290 TraceCheckUtils]: 32: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:13,692 INFO L290 TraceCheckUtils]: 31: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:13,692 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3194#true} {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:13,692 INFO L290 TraceCheckUtils]: 29: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,692 INFO L290 TraceCheckUtils]: 28: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,692 INFO L290 TraceCheckUtils]: 27: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:23:13,693 INFO L272 TraceCheckUtils]: 26: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-27 16:23:13,693 INFO L290 TraceCheckUtils]: 25: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:13,694 INFO L290 TraceCheckUtils]: 24: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:13,694 INFO L290 TraceCheckUtils]: 23: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:13,694 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3194#true} {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:13,695 INFO L290 TraceCheckUtils]: 21: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,695 INFO L290 TraceCheckUtils]: 20: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,695 INFO L290 TraceCheckUtils]: 19: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-27 16:23:13,695 INFO L272 TraceCheckUtils]: 18: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-27 16:23:13,695 INFO L290 TraceCheckUtils]: 17: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:13,695 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:13,696 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:23:13,696 INFO L290 TraceCheckUtils]: 14: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:23:13,697 INFO L290 TraceCheckUtils]: 13: Hoare triple {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 16:23:13,697 INFO L290 TraceCheckUtils]: 12: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:23:13,698 INFO L290 TraceCheckUtils]: 11: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:13,698 INFO L290 TraceCheckUtils]: 10: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:13,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:13,699 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:13,699 INFO L290 TraceCheckUtils]: 7: Hoare triple {3199#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3199#(= main_~i~0 0)} is VALID [2022-04-27 16:23:13,699 INFO L290 TraceCheckUtils]: 6: Hoare triple {3194#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3199#(= main_~i~0 0)} is VALID [2022-04-27 16:23:13,699 INFO L290 TraceCheckUtils]: 5: Hoare triple {3194#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3194#true} is VALID [2022-04-27 16:23:13,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {3194#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-27 16:23:13,700 INFO L272 TraceCheckUtils]: 0: Hoare triple {3194#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-27 16:23:13,700 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 16:23:13,700 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2074418720] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:23:13,700 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:23:13,700 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 23 [2022-04-27 16:23:13,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489472429] [2022-04-27 16:23:13,701 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:23:13,703 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-27 16:23:13,704 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:23:13,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 16:23:13,756 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:13,756 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 16:23:13,756 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:23:13,756 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 16:23:13,756 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=441, Unknown=4, NotChecked=0, Total=506 [2022-04-27 16:23:13,757 INFO L87 Difference]: Start difference. First operand 69 states and 75 transitions. Second operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 16:23:14,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:14,731 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2022-04-27 16:23:14,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-27 16:23:14,732 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-27 16:23:14,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:23:14,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 16:23:14,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 57 transitions. [2022-04-27 16:23:14,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 16:23:14,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 57 transitions. [2022-04-27 16:23:14,736 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 57 transitions. [2022-04-27 16:23:14,801 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:14,802 INFO L225 Difference]: With dead ends: 93 [2022-04-27 16:23:14,802 INFO L226 Difference]: Without dead ends: 93 [2022-04-27 16:23:14,803 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 84 SyntacticMatches, 10 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 15.2s TimeCoverageRelationStatistics Valid=162, Invalid=1240, Unknown=4, NotChecked=0, Total=1406 [2022-04-27 16:23:14,804 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 55 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 445 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 540 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 445 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 66 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 16:23:14,804 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 122 Invalid, 540 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 445 Invalid, 0 Unknown, 66 Unchecked, 0.4s Time] [2022-04-27 16:23:14,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-27 16:23:14,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 91. [2022-04-27 16:23:14,809 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:23:14,809 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:23:14,809 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:23:14,810 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:23:14,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:14,814 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2022-04-27 16:23:14,814 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 102 transitions. [2022-04-27 16:23:14,814 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:14,814 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:14,815 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 93 states. [2022-04-27 16:23:14,815 INFO L87 Difference]: Start difference. First operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 93 states. [2022-04-27 16:23:14,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:14,819 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2022-04-27 16:23:14,819 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 102 transitions. [2022-04-27 16:23:14,819 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:14,819 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:14,819 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:23:14,820 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:23:14,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:23:14,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2022-04-27 16:23:14,823 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 100 transitions. Word has length 46 [2022-04-27 16:23:14,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:23:14,824 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 100 transitions. [2022-04-27 16:23:14,824 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 16:23:14,824 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 100 transitions. [2022-04-27 16:23:14,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-27 16:23:14,825 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:23:14,825 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:23:14,856 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 16:23:15,047 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-27 16:23:15,048 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:23:15,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:23:15,048 INFO L85 PathProgramCache]: Analyzing trace with hash -1600260925, now seen corresponding path program 8 times [2022-04-27 16:23:15,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:23:15,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787143258] [2022-04-27 16:23:15,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:23:15,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:23:15,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:15,342 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:23:15,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:15,346 INFO L290 TraceCheckUtils]: 0: Hoare triple {3937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-27 16:23:15,346 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,346 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,346 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:23:15,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:15,350 INFO L290 TraceCheckUtils]: 0: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-27 16:23:15,350 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,350 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,351 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:15,351 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 16:23:15,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:15,364 INFO L290 TraceCheckUtils]: 0: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-27 16:23:15,364 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,365 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,365 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:15,366 INFO L272 TraceCheckUtils]: 0: Hoare triple {3908#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:23:15,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-27 16:23:15,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,367 INFO L272 TraceCheckUtils]: 4: Hoare triple {3908#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,367 INFO L290 TraceCheckUtils]: 5: Hoare triple {3908#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3908#true} is VALID [2022-04-27 16:23:15,367 INFO L290 TraceCheckUtils]: 6: Hoare triple {3908#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3913#(= main_~i~0 0)} is VALID [2022-04-27 16:23:15,367 INFO L290 TraceCheckUtils]: 7: Hoare triple {3913#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3913#(= main_~i~0 0)} is VALID [2022-04-27 16:23:15,368 INFO L290 TraceCheckUtils]: 8: Hoare triple {3913#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:15,368 INFO L290 TraceCheckUtils]: 9: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:15,369 INFO L290 TraceCheckUtils]: 10: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:15,369 INFO L290 TraceCheckUtils]: 11: Hoare triple {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:15,370 INFO L290 TraceCheckUtils]: 12: Hoare triple {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:15,371 INFO L290 TraceCheckUtils]: 13: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:15,371 INFO L290 TraceCheckUtils]: 14: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:15,372 INFO L290 TraceCheckUtils]: 15: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:15,373 INFO L290 TraceCheckUtils]: 16: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-27 16:23:15,373 INFO L290 TraceCheckUtils]: 17: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-27 16:23:15,374 INFO L290 TraceCheckUtils]: 18: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:23:15,374 INFO L290 TraceCheckUtils]: 19: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:23:15,375 INFO L290 TraceCheckUtils]: 20: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:15,376 INFO L290 TraceCheckUtils]: 21: Hoare triple {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:15,376 INFO L290 TraceCheckUtils]: 22: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:15,376 INFO L290 TraceCheckUtils]: 23: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:15,377 INFO L290 TraceCheckUtils]: 24: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:15,377 INFO L290 TraceCheckUtils]: 25: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:15,377 INFO L272 TraceCheckUtils]: 26: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-27 16:23:15,377 INFO L290 TraceCheckUtils]: 27: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-27 16:23:15,378 INFO L290 TraceCheckUtils]: 28: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,378 INFO L290 TraceCheckUtils]: 29: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,378 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3908#true} {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:15,379 INFO L290 TraceCheckUtils]: 31: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:15,379 INFO L290 TraceCheckUtils]: 32: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:15,380 INFO L290 TraceCheckUtils]: 33: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:15,380 INFO L272 TraceCheckUtils]: 34: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-27 16:23:15,380 INFO L290 TraceCheckUtils]: 35: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-27 16:23:15,380 INFO L290 TraceCheckUtils]: 36: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,380 INFO L290 TraceCheckUtils]: 37: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:15,381 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3908#true} {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:15,381 INFO L290 TraceCheckUtils]: 39: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:15,382 INFO L290 TraceCheckUtils]: 40: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:23:15,382 INFO L290 TraceCheckUtils]: 41: Hoare triple {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3934#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:15,383 INFO L272 TraceCheckUtils]: 42: Hoare triple {3934#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3935#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:23:15,383 INFO L290 TraceCheckUtils]: 43: Hoare triple {3935#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3936#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:23:15,384 INFO L290 TraceCheckUtils]: 44: Hoare triple {3936#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-27 16:23:15,384 INFO L290 TraceCheckUtils]: 45: Hoare triple {3909#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-27 16:23:15,384 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 16 proven. 60 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:23:15,384 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:23:15,384 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787143258] [2022-04-27 16:23:15,385 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1787143258] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:23:15,385 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [441117609] [2022-04-27 16:23:15,385 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:23:15,385 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:23:15,385 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:23:15,386 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:23:15,387 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 16:23:15,439 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:23:15,440 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:23:15,441 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-27 16:23:15,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:15,456 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:23:15,507 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:23:15,633 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:23:15,633 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:23:15,705 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:23:15,706 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:23:15,750 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:23:15,751 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:23:15,796 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:23:15,797 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:23:15,864 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:23:15,865 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:23:24,252 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:23:24,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {3908#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:24,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-27 16:23:24,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:24,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:24,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {3908#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:24,312 INFO L290 TraceCheckUtils]: 5: Hoare triple {3908#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3908#true} is VALID [2022-04-27 16:23:24,317 INFO L290 TraceCheckUtils]: 6: Hoare triple {3908#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3913#(= main_~i~0 0)} is VALID [2022-04-27 16:23:24,317 INFO L290 TraceCheckUtils]: 7: Hoare triple {3913#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3913#(= main_~i~0 0)} is VALID [2022-04-27 16:23:24,318 INFO L290 TraceCheckUtils]: 8: Hoare triple {3913#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:24,318 INFO L290 TraceCheckUtils]: 9: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:24,319 INFO L290 TraceCheckUtils]: 10: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:24,320 INFO L290 TraceCheckUtils]: 11: Hoare triple {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:24,320 INFO L290 TraceCheckUtils]: 12: Hoare triple {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:24,321 INFO L290 TraceCheckUtils]: 13: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:24,322 INFO L290 TraceCheckUtils]: 14: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:24,322 INFO L290 TraceCheckUtils]: 15: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:24,323 INFO L290 TraceCheckUtils]: 16: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-27 16:23:24,324 INFO L290 TraceCheckUtils]: 17: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-27 16:23:24,324 INFO L290 TraceCheckUtils]: 18: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:23:24,325 INFO L290 TraceCheckUtils]: 19: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:23:24,326 INFO L290 TraceCheckUtils]: 20: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4001#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:23:24,326 INFO L290 TraceCheckUtils]: 21: Hoare triple {4001#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:24,327 INFO L290 TraceCheckUtils]: 22: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:24,327 INFO L290 TraceCheckUtils]: 23: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:24,327 INFO L290 TraceCheckUtils]: 24: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:24,328 INFO L290 TraceCheckUtils]: 25: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:24,329 INFO L272 TraceCheckUtils]: 26: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,329 INFO L290 TraceCheckUtils]: 27: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,330 INFO L290 TraceCheckUtils]: 28: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,330 INFO L290 TraceCheckUtils]: 29: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,331 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:24,331 INFO L290 TraceCheckUtils]: 31: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:24,332 INFO L290 TraceCheckUtils]: 32: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:23:24,332 INFO L290 TraceCheckUtils]: 33: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:23:24,333 INFO L272 TraceCheckUtils]: 34: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,334 INFO L290 TraceCheckUtils]: 35: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,334 INFO L290 TraceCheckUtils]: 36: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,335 INFO L290 TraceCheckUtils]: 37: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 16:23:24,335 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:23:24,336 INFO L290 TraceCheckUtils]: 39: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:23:24,336 INFO L290 TraceCheckUtils]: 40: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4064#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:24,337 INFO L290 TraceCheckUtils]: 41: Hoare triple {4064#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3934#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:24,337 INFO L272 TraceCheckUtils]: 42: Hoare triple {3934#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:23:24,338 INFO L290 TraceCheckUtils]: 43: Hoare triple {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4075#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:23:24,338 INFO L290 TraceCheckUtils]: 44: Hoare triple {4075#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-27 16:23:24,338 INFO L290 TraceCheckUtils]: 45: Hoare triple {3909#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-27 16:23:24,339 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 16 proven. 60 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:23:24,339 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:23:27,020 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:23:27,027 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:23:27,090 INFO L290 TraceCheckUtils]: 45: Hoare triple {3909#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-27 16:23:27,091 INFO L290 TraceCheckUtils]: 44: Hoare triple {4075#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-27 16:23:27,091 INFO L290 TraceCheckUtils]: 43: Hoare triple {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4075#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:23:27,092 INFO L272 TraceCheckUtils]: 42: Hoare triple {3934#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:23:27,092 INFO L290 TraceCheckUtils]: 41: Hoare triple {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3934#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:27,093 INFO L290 TraceCheckUtils]: 40: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:23:27,094 INFO L290 TraceCheckUtils]: 39: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:27,094 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3908#true} {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:27,094 INFO L290 TraceCheckUtils]: 37: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,094 INFO L290 TraceCheckUtils]: 36: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,095 INFO L290 TraceCheckUtils]: 35: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-27 16:23:27,095 INFO L272 TraceCheckUtils]: 34: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-27 16:23:27,095 INFO L290 TraceCheckUtils]: 33: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:27,096 INFO L290 TraceCheckUtils]: 32: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:27,096 INFO L290 TraceCheckUtils]: 31: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:27,097 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3908#true} {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:27,097 INFO L290 TraceCheckUtils]: 29: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,097 INFO L290 TraceCheckUtils]: 28: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,097 INFO L290 TraceCheckUtils]: 27: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-27 16:23:27,097 INFO L272 TraceCheckUtils]: 26: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-27 16:23:27,098 INFO L290 TraceCheckUtils]: 25: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:27,099 INFO L290 TraceCheckUtils]: 24: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:27,099 INFO L290 TraceCheckUtils]: 23: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:27,099 INFO L290 TraceCheckUtils]: 22: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:27,100 INFO L290 TraceCheckUtils]: 21: Hoare triple {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 16:23:27,101 INFO L290 TraceCheckUtils]: 20: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:27,102 INFO L290 TraceCheckUtils]: 19: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:27,102 INFO L290 TraceCheckUtils]: 18: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:27,103 INFO L290 TraceCheckUtils]: 17: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:27,104 INFO L290 TraceCheckUtils]: 16: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:27,104 INFO L290 TraceCheckUtils]: 15: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:27,105 INFO L290 TraceCheckUtils]: 14: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:27,106 INFO L290 TraceCheckUtils]: 13: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:27,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 16:23:27,107 INFO L290 TraceCheckUtils]: 11: Hoare triple {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 16:23:27,108 INFO L290 TraceCheckUtils]: 10: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:27,108 INFO L290 TraceCheckUtils]: 9: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:27,109 INFO L290 TraceCheckUtils]: 8: Hoare triple {3913#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:27,109 INFO L290 TraceCheckUtils]: 7: Hoare triple {3913#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3913#(= main_~i~0 0)} is VALID [2022-04-27 16:23:27,110 INFO L290 TraceCheckUtils]: 6: Hoare triple {3908#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3913#(= main_~i~0 0)} is VALID [2022-04-27 16:23:27,110 INFO L290 TraceCheckUtils]: 5: Hoare triple {3908#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3908#true} is VALID [2022-04-27 16:23:27,110 INFO L272 TraceCheckUtils]: 4: Hoare triple {3908#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,110 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,110 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,110 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-27 16:23:27,110 INFO L272 TraceCheckUtils]: 0: Hoare triple {3908#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-27 16:23:27,111 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 4 proven. 56 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-04-27 16:23:27,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [441117609] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:23:27,111 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:23:27,111 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 15] total 27 [2022-04-27 16:23:27,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1114647207] [2022-04-27 16:23:27,112 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:23:27,112 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 46 [2022-04-27 16:23:27,120 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:23:27,120 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:23:27,185 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:27,186 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-27 16:23:27,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:23:27,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-27 16:23:27,187 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=598, Unknown=3, NotChecked=0, Total=702 [2022-04-27 16:23:27,187 INFO L87 Difference]: Start difference. First operand 91 states and 100 transitions. Second operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:23:28,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:28,818 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2022-04-27 16:23:28,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 16:23:28,819 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 46 [2022-04-27 16:23:28,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:23:28,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:23:28,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 72 transitions. [2022-04-27 16:23:28,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:23:28,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 72 transitions. [2022-04-27 16:23:28,829 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 72 transitions. [2022-04-27 16:23:28,906 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:28,908 INFO L225 Difference]: With dead ends: 101 [2022-04-27 16:23:28,908 INFO L226 Difference]: Without dead ends: 101 [2022-04-27 16:23:28,909 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 82 SyntacticMatches, 17 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 718 ImplicationChecksByTransitivity, 11.0s TimeCoverageRelationStatistics Valid=341, Invalid=2007, Unknown=4, NotChecked=0, Total=2352 [2022-04-27 16:23:28,910 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 64 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 626 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 112 SdHoareTripleChecker+Invalid, 712 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 626 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 57 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 16:23:28,910 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 112 Invalid, 712 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 626 Invalid, 0 Unknown, 57 Unchecked, 0.5s Time] [2022-04-27 16:23:28,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-27 16:23:28,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 87. [2022-04-27 16:23:28,917 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:23:28,918 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:28,918 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:28,918 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:28,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:28,920 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2022-04-27 16:23:28,920 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 110 transitions. [2022-04-27 16:23:28,921 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:28,921 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:28,921 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 101 states. [2022-04-27 16:23:28,921 INFO L87 Difference]: Start difference. First operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 101 states. [2022-04-27 16:23:28,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:28,923 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2022-04-27 16:23:28,923 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 110 transitions. [2022-04-27 16:23:28,924 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:28,924 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:28,924 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:23:28,924 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:23:28,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:28,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 94 transitions. [2022-04-27 16:23:28,926 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 94 transitions. Word has length 46 [2022-04-27 16:23:28,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:23:28,926 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 94 transitions. [2022-04-27 16:23:28,926 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 16:23:28,926 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 94 transitions. [2022-04-27 16:23:28,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-27 16:23:28,932 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:23:28,932 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:23:28,959 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 16:23:29,156 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:23:29,157 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:23:29,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:23:29,157 INFO L85 PathProgramCache]: Analyzing trace with hash 692034935, now seen corresponding path program 9 times [2022-04-27 16:23:29,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:23:29,157 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802032958] [2022-04-27 16:23:29,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:23:29,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:23:29,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:23:29,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,296 INFO L290 TraceCheckUtils]: 0: Hoare triple {4692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-27 16:23:29,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,296 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-27 16:23:29,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,300 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,300 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,300 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,301 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 16:23:29,301 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:23:29,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,304 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4676#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:29,305 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 16:23:29,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,311 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,311 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4681#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:29,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 16:23:29,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,317 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4686#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:29,318 INFO L272 TraceCheckUtils]: 0: Hoare triple {4660#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:23:29,318 INFO L290 TraceCheckUtils]: 1: Hoare triple {4692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-27 16:23:29,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,318 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,318 INFO L272 TraceCheckUtils]: 4: Hoare triple {4660#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,318 INFO L290 TraceCheckUtils]: 5: Hoare triple {4660#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4660#true} is VALID [2022-04-27 16:23:29,318 INFO L290 TraceCheckUtils]: 6: Hoare triple {4660#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4665#(= main_~i~0 0)} is VALID [2022-04-27 16:23:29,319 INFO L290 TraceCheckUtils]: 7: Hoare triple {4665#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4665#(= main_~i~0 0)} is VALID [2022-04-27 16:23:29,319 INFO L290 TraceCheckUtils]: 8: Hoare triple {4665#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4666#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:29,320 INFO L290 TraceCheckUtils]: 9: Hoare triple {4666#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4666#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:29,320 INFO L290 TraceCheckUtils]: 10: Hoare triple {4666#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4667#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:29,320 INFO L290 TraceCheckUtils]: 11: Hoare triple {4667#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4667#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:29,321 INFO L290 TraceCheckUtils]: 12: Hoare triple {4667#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4668#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:29,321 INFO L290 TraceCheckUtils]: 13: Hoare triple {4668#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4668#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:29,322 INFO L290 TraceCheckUtils]: 14: Hoare triple {4668#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4669#(<= main_~i~0 4)} is VALID [2022-04-27 16:23:29,322 INFO L290 TraceCheckUtils]: 15: Hoare triple {4669#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4670#(<= main_~n~0 4)} is VALID [2022-04-27 16:23:29,322 INFO L290 TraceCheckUtils]: 16: Hoare triple {4670#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 16:23:29,323 INFO L290 TraceCheckUtils]: 17: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 16:23:29,323 INFO L272 TraceCheckUtils]: 18: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,323 INFO L290 TraceCheckUtils]: 19: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,323 INFO L290 TraceCheckUtils]: 20: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,323 INFO L290 TraceCheckUtils]: 21: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,324 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {4660#true} {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 16:23:29,324 INFO L290 TraceCheckUtils]: 23: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 16:23:29,325 INFO L290 TraceCheckUtils]: 24: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:29,325 INFO L290 TraceCheckUtils]: 25: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:29,325 INFO L272 TraceCheckUtils]: 26: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,325 INFO L290 TraceCheckUtils]: 27: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,325 INFO L290 TraceCheckUtils]: 28: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,325 INFO L290 TraceCheckUtils]: 29: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,326 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4660#true} {4676#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:29,326 INFO L290 TraceCheckUtils]: 31: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:29,327 INFO L290 TraceCheckUtils]: 32: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:29,327 INFO L290 TraceCheckUtils]: 33: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:29,327 INFO L272 TraceCheckUtils]: 34: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,327 INFO L290 TraceCheckUtils]: 35: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,328 INFO L290 TraceCheckUtils]: 36: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,328 INFO L290 TraceCheckUtils]: 37: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,328 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4660#true} {4681#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:29,328 INFO L290 TraceCheckUtils]: 39: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:29,329 INFO L290 TraceCheckUtils]: 40: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:29,329 INFO L290 TraceCheckUtils]: 41: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:29,329 INFO L272 TraceCheckUtils]: 42: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,329 INFO L290 TraceCheckUtils]: 43: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,330 INFO L290 TraceCheckUtils]: 44: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,330 INFO L290 TraceCheckUtils]: 45: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,330 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {4660#true} {4686#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:29,330 INFO L290 TraceCheckUtils]: 47: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:29,331 INFO L290 TraceCheckUtils]: 48: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4691#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:23:29,331 INFO L290 TraceCheckUtils]: 49: Hoare triple {4691#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4661#false} is VALID [2022-04-27 16:23:29,331 INFO L272 TraceCheckUtils]: 50: Hoare triple {4661#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4661#false} is VALID [2022-04-27 16:23:29,332 INFO L290 TraceCheckUtils]: 51: Hoare triple {4661#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4661#false} is VALID [2022-04-27 16:23:29,332 INFO L290 TraceCheckUtils]: 52: Hoare triple {4661#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-27 16:23:29,332 INFO L290 TraceCheckUtils]: 53: Hoare triple {4661#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-27 16:23:29,332 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 27 proven. 29 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:23:29,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:23:29,332 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802032958] [2022-04-27 16:23:29,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [802032958] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:23:29,333 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [265240491] [2022-04-27 16:23:29,333 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:23:29,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:23:29,333 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:23:29,334 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:23:29,365 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 16:23:29,410 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-27 16:23:29,411 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:23:29,412 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 16:23:29,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:29,425 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:23:29,795 INFO L272 TraceCheckUtils]: 0: Hoare triple {4660#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,795 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-27 16:23:29,795 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,795 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,795 INFO L272 TraceCheckUtils]: 4: Hoare triple {4660#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,795 INFO L290 TraceCheckUtils]: 5: Hoare triple {4660#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4660#true} is VALID [2022-04-27 16:23:29,796 INFO L290 TraceCheckUtils]: 6: Hoare triple {4660#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4714#(<= main_~i~0 0)} is VALID [2022-04-27 16:23:29,797 INFO L290 TraceCheckUtils]: 7: Hoare triple {4714#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4714#(<= main_~i~0 0)} is VALID [2022-04-27 16:23:29,797 INFO L290 TraceCheckUtils]: 8: Hoare triple {4714#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4666#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:29,798 INFO L290 TraceCheckUtils]: 9: Hoare triple {4666#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4666#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:29,798 INFO L290 TraceCheckUtils]: 10: Hoare triple {4666#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4667#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:29,798 INFO L290 TraceCheckUtils]: 11: Hoare triple {4667#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4667#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:29,799 INFO L290 TraceCheckUtils]: 12: Hoare triple {4667#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4668#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:29,799 INFO L290 TraceCheckUtils]: 13: Hoare triple {4668#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4668#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:29,799 INFO L290 TraceCheckUtils]: 14: Hoare triple {4668#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4669#(<= main_~i~0 4)} is VALID [2022-04-27 16:23:29,800 INFO L290 TraceCheckUtils]: 15: Hoare triple {4669#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4670#(<= main_~n~0 4)} is VALID [2022-04-27 16:23:29,800 INFO L290 TraceCheckUtils]: 16: Hoare triple {4670#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,801 INFO L290 TraceCheckUtils]: 17: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,801 INFO L272 TraceCheckUtils]: 18: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,801 INFO L290 TraceCheckUtils]: 19: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,801 INFO L290 TraceCheckUtils]: 20: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,801 INFO L290 TraceCheckUtils]: 21: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,801 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {4660#true} {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,802 INFO L290 TraceCheckUtils]: 23: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,802 INFO L290 TraceCheckUtils]: 24: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,803 INFO L290 TraceCheckUtils]: 25: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,803 INFO L272 TraceCheckUtils]: 26: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,803 INFO L290 TraceCheckUtils]: 27: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,803 INFO L290 TraceCheckUtils]: 28: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,803 INFO L290 TraceCheckUtils]: 29: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,803 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4660#true} {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,804 INFO L290 TraceCheckUtils]: 31: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,804 INFO L290 TraceCheckUtils]: 32: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,805 INFO L290 TraceCheckUtils]: 33: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,805 INFO L272 TraceCheckUtils]: 34: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,805 INFO L290 TraceCheckUtils]: 35: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,805 INFO L290 TraceCheckUtils]: 36: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,805 INFO L290 TraceCheckUtils]: 37: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,805 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4660#true} {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,806 INFO L290 TraceCheckUtils]: 39: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,806 INFO L290 TraceCheckUtils]: 40: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,807 INFO L290 TraceCheckUtils]: 41: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,807 INFO L272 TraceCheckUtils]: 42: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:29,807 INFO L290 TraceCheckUtils]: 43: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:29,807 INFO L290 TraceCheckUtils]: 44: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,807 INFO L290 TraceCheckUtils]: 45: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:29,807 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {4660#true} {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,808 INFO L290 TraceCheckUtils]: 47: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,808 INFO L290 TraceCheckUtils]: 48: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4845#(and (<= 4 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 16:23:29,809 INFO L290 TraceCheckUtils]: 49: Hoare triple {4845#(and (<= 4 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4661#false} is VALID [2022-04-27 16:23:29,809 INFO L272 TraceCheckUtils]: 50: Hoare triple {4661#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4661#false} is VALID [2022-04-27 16:23:29,809 INFO L290 TraceCheckUtils]: 51: Hoare triple {4661#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4661#false} is VALID [2022-04-27 16:23:29,809 INFO L290 TraceCheckUtils]: 52: Hoare triple {4661#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-27 16:23:29,809 INFO L290 TraceCheckUtils]: 53: Hoare triple {4661#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-27 16:23:29,809 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:23:29,809 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:23:30,057 INFO L290 TraceCheckUtils]: 53: Hoare triple {4661#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-27 16:23:30,057 INFO L290 TraceCheckUtils]: 52: Hoare triple {4661#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-27 16:23:30,057 INFO L290 TraceCheckUtils]: 51: Hoare triple {4661#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4661#false} is VALID [2022-04-27 16:23:30,057 INFO L272 TraceCheckUtils]: 50: Hoare triple {4661#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4661#false} is VALID [2022-04-27 16:23:30,057 INFO L290 TraceCheckUtils]: 49: Hoare triple {4691#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4661#false} is VALID [2022-04-27 16:23:30,058 INFO L290 TraceCheckUtils]: 48: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4691#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:23:30,058 INFO L290 TraceCheckUtils]: 47: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:30,059 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {4660#true} {4686#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:30,059 INFO L290 TraceCheckUtils]: 45: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,059 INFO L290 TraceCheckUtils]: 44: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,059 INFO L290 TraceCheckUtils]: 43: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:30,059 INFO L272 TraceCheckUtils]: 42: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:30,059 INFO L290 TraceCheckUtils]: 41: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:30,060 INFO L290 TraceCheckUtils]: 40: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:23:30,060 INFO L290 TraceCheckUtils]: 39: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:30,061 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4660#true} {4681#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:30,061 INFO L290 TraceCheckUtils]: 37: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,061 INFO L290 TraceCheckUtils]: 36: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,061 INFO L290 TraceCheckUtils]: 35: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:30,061 INFO L272 TraceCheckUtils]: 34: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:30,061 INFO L290 TraceCheckUtils]: 33: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:30,062 INFO L290 TraceCheckUtils]: 32: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:23:30,062 INFO L290 TraceCheckUtils]: 31: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:30,062 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4660#true} {4676#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:30,063 INFO L290 TraceCheckUtils]: 29: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,063 INFO L290 TraceCheckUtils]: 28: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,063 INFO L290 TraceCheckUtils]: 27: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:30,063 INFO L272 TraceCheckUtils]: 26: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:30,063 INFO L290 TraceCheckUtils]: 25: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:30,064 INFO L290 TraceCheckUtils]: 24: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:23:30,064 INFO L290 TraceCheckUtils]: 23: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:23:30,064 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {4660#true} {4948#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:23:30,064 INFO L290 TraceCheckUtils]: 21: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,064 INFO L290 TraceCheckUtils]: 20: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,065 INFO L290 TraceCheckUtils]: 19: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-27 16:23:30,065 INFO L272 TraceCheckUtils]: 18: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-27 16:23:30,065 INFO L290 TraceCheckUtils]: 17: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:23:30,065 INFO L290 TraceCheckUtils]: 16: Hoare triple {4670#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:23:30,066 INFO L290 TraceCheckUtils]: 15: Hoare triple {4669#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4670#(<= main_~n~0 4)} is VALID [2022-04-27 16:23:30,066 INFO L290 TraceCheckUtils]: 14: Hoare triple {4668#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4669#(<= main_~i~0 4)} is VALID [2022-04-27 16:23:30,066 INFO L290 TraceCheckUtils]: 13: Hoare triple {4668#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4668#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:30,067 INFO L290 TraceCheckUtils]: 12: Hoare triple {4667#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4668#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:30,067 INFO L290 TraceCheckUtils]: 11: Hoare triple {4667#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4667#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:30,067 INFO L290 TraceCheckUtils]: 10: Hoare triple {4666#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4667#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:30,068 INFO L290 TraceCheckUtils]: 9: Hoare triple {4666#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4666#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:30,068 INFO L290 TraceCheckUtils]: 8: Hoare triple {4714#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4666#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:30,068 INFO L290 TraceCheckUtils]: 7: Hoare triple {4714#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4714#(<= main_~i~0 0)} is VALID [2022-04-27 16:23:30,069 INFO L290 TraceCheckUtils]: 6: Hoare triple {4660#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4714#(<= main_~i~0 0)} is VALID [2022-04-27 16:23:30,069 INFO L290 TraceCheckUtils]: 5: Hoare triple {4660#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4660#true} is VALID [2022-04-27 16:23:30,069 INFO L272 TraceCheckUtils]: 4: Hoare triple {4660#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,069 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,069 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-27 16:23:30,069 INFO L272 TraceCheckUtils]: 0: Hoare triple {4660#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-27 16:23:30,070 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:23:30,070 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [265240491] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:23:30,070 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:23:30,070 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 21 [2022-04-27 16:23:30,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002741195] [2022-04-27 16:23:30,070 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:23:30,071 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-27 16:23:30,071 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:23:30,071 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:30,124 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:30,124 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-27 16:23:30,124 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:23:30,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-27 16:23:30,125 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=323, Unknown=0, NotChecked=0, Total=420 [2022-04-27 16:23:30,125 INFO L87 Difference]: Start difference. First operand 87 states and 94 transitions. Second operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:30,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:30,602 INFO L93 Difference]: Finished difference Result 98 states and 106 transitions. [2022-04-27 16:23:30,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 16:23:30,602 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-27 16:23:30,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:23:30,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:30,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-27 16:23:30,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:30,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-27 16:23:30,605 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 54 transitions. [2022-04-27 16:23:30,649 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:30,656 INFO L225 Difference]: With dead ends: 98 [2022-04-27 16:23:30,656 INFO L226 Difference]: Without dead ends: 76 [2022-04-27 16:23:30,656 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2022-04-27 16:23:30,657 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 39 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 221 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 250 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 221 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:23:30,657 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 58 Invalid, 250 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 221 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 16:23:30,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-04-27 16:23:30,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-04-27 16:23:30,661 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:23:30,661 INFO L82 GeneralOperation]: Start isEquivalent. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:30,661 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:30,661 INFO L87 Difference]: Start difference. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:30,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:30,663 INFO L93 Difference]: Finished difference Result 76 states and 81 transitions. [2022-04-27 16:23:30,663 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-04-27 16:23:30,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:30,664 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:30,664 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-27 16:23:30,665 INFO L87 Difference]: Start difference. First operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-27 16:23:30,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:30,666 INFO L93 Difference]: Finished difference Result 76 states and 81 transitions. [2022-04-27 16:23:30,666 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-04-27 16:23:30,667 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:30,667 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:30,667 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:23:30,667 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:23:30,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:30,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2022-04-27 16:23:30,668 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 54 [2022-04-27 16:23:30,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:23:30,669 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2022-04-27 16:23:30,669 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:23:30,669 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-04-27 16:23:30,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-27 16:23:30,669 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:23:30,670 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:23:30,692 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 16:23:30,883 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-27 16:23:30,883 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:23:30,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:23:30,884 INFO L85 PathProgramCache]: Analyzing trace with hash 529632181, now seen corresponding path program 10 times [2022-04-27 16:23:30,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:23:30,884 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341505206] [2022-04-27 16:23:30,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:23:30,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:23:30,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,127 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:23:31,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,137 INFO L290 TraceCheckUtils]: 0: Hoare triple {5407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5371#true} is VALID [2022-04-27 16:23:31,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,137 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5371#true} {5371#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,137 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-27 16:23:31,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,149 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,149 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,149 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,150 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:31,150 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 16:23:31,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,155 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,156 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,156 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,157 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:31,157 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 16:23:31,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,161 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:31,162 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-27 16:23:31,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,166 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,166 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:31,167 INFO L272 TraceCheckUtils]: 0: Hoare triple {5371#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:23:31,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {5407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5371#true} is VALID [2022-04-27 16:23:31,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,168 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5371#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,168 INFO L272 TraceCheckUtils]: 4: Hoare triple {5371#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,168 INFO L290 TraceCheckUtils]: 5: Hoare triple {5371#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5371#true} is VALID [2022-04-27 16:23:31,168 INFO L290 TraceCheckUtils]: 6: Hoare triple {5371#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5376#(= main_~i~0 0)} is VALID [2022-04-27 16:23:31,168 INFO L290 TraceCheckUtils]: 7: Hoare triple {5376#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5376#(= main_~i~0 0)} is VALID [2022-04-27 16:23:31,169 INFO L290 TraceCheckUtils]: 8: Hoare triple {5376#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:31,169 INFO L290 TraceCheckUtils]: 9: Hoare triple {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:31,170 INFO L290 TraceCheckUtils]: 10: Hoare triple {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:31,170 INFO L290 TraceCheckUtils]: 11: Hoare triple {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:31,171 INFO L290 TraceCheckUtils]: 12: Hoare triple {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:23:31,171 INFO L290 TraceCheckUtils]: 13: Hoare triple {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:23:31,172 INFO L290 TraceCheckUtils]: 14: Hoare triple {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5380#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:31,173 INFO L290 TraceCheckUtils]: 15: Hoare triple {5380#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5381#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:31,173 INFO L290 TraceCheckUtils]: 16: Hoare triple {5381#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:23:31,174 INFO L290 TraceCheckUtils]: 17: Hoare triple {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:23:31,174 INFO L290 TraceCheckUtils]: 18: Hoare triple {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:31,175 INFO L290 TraceCheckUtils]: 19: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:31,175 INFO L272 TraceCheckUtils]: 20: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-27 16:23:31,175 INFO L290 TraceCheckUtils]: 21: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,175 INFO L290 TraceCheckUtils]: 22: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,175 INFO L290 TraceCheckUtils]: 23: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,176 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {5371#true} {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:31,176 INFO L290 TraceCheckUtils]: 25: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:31,177 INFO L290 TraceCheckUtils]: 26: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:31,177 INFO L290 TraceCheckUtils]: 27: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:31,177 INFO L272 TraceCheckUtils]: 28: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-27 16:23:31,177 INFO L290 TraceCheckUtils]: 29: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,177 INFO L290 TraceCheckUtils]: 30: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,177 INFO L290 TraceCheckUtils]: 31: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,178 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {5371#true} {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:31,179 INFO L290 TraceCheckUtils]: 33: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:31,179 INFO L290 TraceCheckUtils]: 34: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:31,180 INFO L290 TraceCheckUtils]: 35: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:31,180 INFO L272 TraceCheckUtils]: 36: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-27 16:23:31,180 INFO L290 TraceCheckUtils]: 37: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,180 INFO L290 TraceCheckUtils]: 38: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,180 INFO L290 TraceCheckUtils]: 39: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,181 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {5371#true} {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:31,181 INFO L290 TraceCheckUtils]: 41: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:31,182 INFO L290 TraceCheckUtils]: 42: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:31,182 INFO L290 TraceCheckUtils]: 43: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:31,183 INFO L272 TraceCheckUtils]: 44: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-27 16:23:31,183 INFO L290 TraceCheckUtils]: 45: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-27 16:23:31,183 INFO L290 TraceCheckUtils]: 46: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,183 INFO L290 TraceCheckUtils]: 47: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:31,184 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {5371#true} {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:31,184 INFO L290 TraceCheckUtils]: 49: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:31,185 INFO L290 TraceCheckUtils]: 50: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5403#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:23:31,185 INFO L290 TraceCheckUtils]: 51: Hoare triple {5403#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5404#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:31,186 INFO L272 TraceCheckUtils]: 52: Hoare triple {5404#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5405#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:23:31,186 INFO L290 TraceCheckUtils]: 53: Hoare triple {5405#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5406#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:23:31,186 INFO L290 TraceCheckUtils]: 54: Hoare triple {5406#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-27 16:23:31,186 INFO L290 TraceCheckUtils]: 55: Hoare triple {5372#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-27 16:23:31,187 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:23:31,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:23:31,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341505206] [2022-04-27 16:23:31,187 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [341505206] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:23:31,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1583253386] [2022-04-27 16:23:31,187 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:23:31,187 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:23:31,188 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:23:31,189 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:23:31,190 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 16:23:31,254 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:23:31,254 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:23:31,255 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-27 16:23:31,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:31,271 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:23:31,411 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:23:35,670 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-27 16:23:35,671 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-27 16:23:35,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {5371#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:35,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5371#true} is VALID [2022-04-27 16:23:35,757 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:35,757 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5371#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:35,757 INFO L272 TraceCheckUtils]: 4: Hoare triple {5371#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-27 16:23:35,757 INFO L290 TraceCheckUtils]: 5: Hoare triple {5371#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5371#true} is VALID [2022-04-27 16:23:35,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {5371#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5429#(<= main_~i~0 0)} is VALID [2022-04-27 16:23:35,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {5429#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5429#(<= main_~i~0 0)} is VALID [2022-04-27 16:23:35,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {5429#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5436#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:35,758 INFO L290 TraceCheckUtils]: 9: Hoare triple {5436#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5436#(<= main_~i~0 1)} is VALID [2022-04-27 16:23:35,759 INFO L290 TraceCheckUtils]: 10: Hoare triple {5436#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5443#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:35,759 INFO L290 TraceCheckUtils]: 11: Hoare triple {5443#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5443#(<= main_~i~0 2)} is VALID [2022-04-27 16:23:35,760 INFO L290 TraceCheckUtils]: 12: Hoare triple {5443#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5450#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:35,760 INFO L290 TraceCheckUtils]: 13: Hoare triple {5450#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5450#(<= main_~i~0 3)} is VALID [2022-04-27 16:23:35,760 INFO L290 TraceCheckUtils]: 14: Hoare triple {5450#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5457#(<= main_~i~0 4)} is VALID [2022-04-27 16:23:35,761 INFO L290 TraceCheckUtils]: 15: Hoare triple {5457#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5461#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4))} is VALID [2022-04-27 16:23:35,762 INFO L290 TraceCheckUtils]: 16: Hoare triple {5461#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5465#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~i~0 (+ v_main_~i~0_79 1))))} is VALID [2022-04-27 16:23:35,763 INFO L290 TraceCheckUtils]: 17: Hoare triple {5465#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~i~0 (+ v_main_~i~0_79 1))))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5469#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1))))} is VALID [2022-04-27 16:23:35,763 INFO L290 TraceCheckUtils]: 18: Hoare triple {5469#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1))))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-27 16:23:35,764 INFO L290 TraceCheckUtils]: 19: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-27 16:23:35,770 INFO L272 TraceCheckUtils]: 20: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,770 INFO L290 TraceCheckUtils]: 21: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,771 INFO L290 TraceCheckUtils]: 22: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,771 INFO L290 TraceCheckUtils]: 23: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,772 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-27 16:23:35,772 INFO L290 TraceCheckUtils]: 25: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-27 16:23:35,773 INFO L290 TraceCheckUtils]: 26: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-27 16:23:35,773 INFO L290 TraceCheckUtils]: 27: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-27 16:23:35,776 INFO L272 TraceCheckUtils]: 28: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,776 INFO L290 TraceCheckUtils]: 29: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,776 INFO L290 TraceCheckUtils]: 30: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,777 INFO L290 TraceCheckUtils]: 31: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,777 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-27 16:23:35,778 INFO L290 TraceCheckUtils]: 33: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-27 16:23:35,778 INFO L290 TraceCheckUtils]: 34: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-27 16:23:35,779 INFO L290 TraceCheckUtils]: 35: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-27 16:23:35,785 INFO L272 TraceCheckUtils]: 36: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,785 INFO L290 TraceCheckUtils]: 37: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,786 INFO L290 TraceCheckUtils]: 38: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,786 INFO L290 TraceCheckUtils]: 39: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,787 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-27 16:23:35,788 INFO L290 TraceCheckUtils]: 41: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-27 16:23:35,788 INFO L290 TraceCheckUtils]: 42: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-27 16:23:35,789 INFO L290 TraceCheckUtils]: 43: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-27 16:23:35,794 INFO L272 TraceCheckUtils]: 44: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,794 INFO L290 TraceCheckUtils]: 45: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,795 INFO L290 TraceCheckUtils]: 46: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,795 INFO L290 TraceCheckUtils]: 47: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-27 16:23:35,796 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-27 16:23:35,796 INFO L290 TraceCheckUtils]: 49: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-27 16:23:35,797 INFO L290 TraceCheckUtils]: 50: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5574#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 4 main_~i~1))} is VALID [2022-04-27 16:23:35,797 INFO L290 TraceCheckUtils]: 51: Hoare triple {5574#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5404#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:35,798 INFO L272 TraceCheckUtils]: 52: Hoare triple {5404#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5581#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:23:35,798 INFO L290 TraceCheckUtils]: 53: Hoare triple {5581#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5585#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:23:35,799 INFO L290 TraceCheckUtils]: 54: Hoare triple {5585#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-27 16:23:35,799 INFO L290 TraceCheckUtils]: 55: Hoare triple {5372#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-27 16:23:35,799 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 28 proven. 37 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:23:35,799 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:23:36,084 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1583253386] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:23:36,084 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-27 16:23:36,084 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19] total 34 [2022-04-27 16:23:36,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722889929] [2022-04-27 16:23:36,085 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-27 16:23:36,085 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) Word has length 56 [2022-04-27 16:23:36,085 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:23:36,086 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:23:36,190 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:36,190 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 16:23:36,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:23:36,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 16:23:36,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=1122, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 16:23:36,191 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:23:37,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:37,201 INFO L93 Difference]: Finished difference Result 118 states and 123 transitions. [2022-04-27 16:23:37,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 16:23:37,201 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) Word has length 56 [2022-04-27 16:23:37,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:23:37,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:23:37,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 66 transitions. [2022-04-27 16:23:37,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:23:37,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 66 transitions. [2022-04-27 16:23:37,205 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 66 transitions. [2022-04-27 16:23:45,301 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 62 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-27 16:23:45,302 INFO L225 Difference]: With dead ends: 118 [2022-04-27 16:23:45,302 INFO L226 Difference]: Without dead ends: 76 [2022-04-27 16:23:45,302 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 56 SyntacticMatches, 8 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 679 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=301, Invalid=2779, Unknown=0, NotChecked=0, Total=3080 [2022-04-27 16:23:45,303 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 20 mSDsluCounter, 293 mSDsCounter, 0 mSdLazyCounter, 326 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 521 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 326 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 183 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:23:45,303 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 322 Invalid, 521 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 326 Invalid, 0 Unknown, 183 Unchecked, 0.2s Time] [2022-04-27 16:23:45,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-04-27 16:23:45,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-04-27 16:23:45,306 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:23:45,307 INFO L82 GeneralOperation]: Start isEquivalent. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:45,307 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:45,307 INFO L87 Difference]: Start difference. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:45,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:45,309 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2022-04-27 16:23:45,309 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2022-04-27 16:23:45,309 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:45,309 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:45,309 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-27 16:23:45,309 INFO L87 Difference]: Start difference. First operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-27 16:23:45,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:23:45,311 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2022-04-27 16:23:45,311 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2022-04-27 16:23:45,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:23:45,312 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:23:45,312 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:23:45,312 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:23:45,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 16:23:45,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 80 transitions. [2022-04-27 16:23:45,313 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 80 transitions. Word has length 56 [2022-04-27 16:23:45,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:23:45,314 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 80 transitions. [2022-04-27 16:23:45,314 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:23:45,314 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2022-04-27 16:23:45,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-04-27 16:23:45,315 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:23:45,315 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:23:45,340 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-27 16:23:45,538 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 16:23:45,538 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:23:45,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:23:45,538 INFO L85 PathProgramCache]: Analyzing trace with hash -920591757, now seen corresponding path program 11 times [2022-04-27 16:23:45,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:23:45,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272403259] [2022-04-27 16:23:45,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:23:45,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:23:45,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,818 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:23:45,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,822 INFO L290 TraceCheckUtils]: 0: Hoare triple {6048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-27 16:23:45,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,823 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 16:23:45,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,830 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,830 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,830 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,831 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:45,831 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 16:23:45,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,835 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,835 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,835 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,836 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:45,836 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 16:23:45,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,843 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,843 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,844 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:45,844 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 16:23:45,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,848 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,849 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,849 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,850 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:45,850 INFO L272 TraceCheckUtils]: 0: Hoare triple {6011#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:23:45,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {6048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-27 16:23:45,850 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {6011#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {6011#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6011#true} is VALID [2022-04-27 16:23:45,851 INFO L290 TraceCheckUtils]: 6: Hoare triple {6011#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6016#(= main_~i~0 0)} is VALID [2022-04-27 16:23:45,851 INFO L290 TraceCheckUtils]: 7: Hoare triple {6016#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6016#(= main_~i~0 0)} is VALID [2022-04-27 16:23:45,852 INFO L290 TraceCheckUtils]: 8: Hoare triple {6016#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:45,852 INFO L290 TraceCheckUtils]: 9: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:23:45,853 INFO L290 TraceCheckUtils]: 10: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:45,853 INFO L290 TraceCheckUtils]: 11: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:23:45,854 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:23:45,854 INFO L290 TraceCheckUtils]: 13: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:23:45,854 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:45,855 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:23:45,855 INFO L290 TraceCheckUtils]: 16: Hoare triple {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:23:45,856 INFO L290 TraceCheckUtils]: 17: Hoare triple {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:23:45,856 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:23:45,857 INFO L290 TraceCheckUtils]: 19: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:23:45,857 INFO L290 TraceCheckUtils]: 20: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:45,858 INFO L290 TraceCheckUtils]: 21: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:45,858 INFO L272 TraceCheckUtils]: 22: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:23:45,858 INFO L290 TraceCheckUtils]: 23: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,858 INFO L290 TraceCheckUtils]: 24: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,858 INFO L290 TraceCheckUtils]: 25: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,858 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6011#true} {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:45,859 INFO L290 TraceCheckUtils]: 27: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:23:45,859 INFO L290 TraceCheckUtils]: 28: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:45,860 INFO L290 TraceCheckUtils]: 29: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:45,860 INFO L272 TraceCheckUtils]: 30: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:23:45,860 INFO L290 TraceCheckUtils]: 31: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,860 INFO L290 TraceCheckUtils]: 32: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,860 INFO L290 TraceCheckUtils]: 33: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,860 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {6011#true} {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:45,861 INFO L290 TraceCheckUtils]: 35: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:23:45,861 INFO L290 TraceCheckUtils]: 36: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:45,862 INFO L290 TraceCheckUtils]: 37: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:45,862 INFO L272 TraceCheckUtils]: 38: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:23:45,862 INFO L290 TraceCheckUtils]: 39: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,862 INFO L290 TraceCheckUtils]: 40: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,862 INFO L290 TraceCheckUtils]: 41: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,862 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6011#true} {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:45,863 INFO L290 TraceCheckUtils]: 43: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:23:45,863 INFO L290 TraceCheckUtils]: 44: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:45,864 INFO L290 TraceCheckUtils]: 45: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:45,864 INFO L272 TraceCheckUtils]: 46: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:23:45,864 INFO L290 TraceCheckUtils]: 47: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:23:45,864 INFO L290 TraceCheckUtils]: 48: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,864 INFO L290 TraceCheckUtils]: 49: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:23:45,865 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {6011#true} {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:45,865 INFO L290 TraceCheckUtils]: 51: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:23:45,866 INFO L290 TraceCheckUtils]: 52: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:23:45,866 INFO L290 TraceCheckUtils]: 53: Hoare triple {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6045#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:23:45,867 INFO L272 TraceCheckUtils]: 54: Hoare triple {6045#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6046#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:23:45,867 INFO L290 TraceCheckUtils]: 55: Hoare triple {6046#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6047#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:23:45,867 INFO L290 TraceCheckUtils]: 56: Hoare triple {6047#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-27 16:23:45,867 INFO L290 TraceCheckUtils]: 57: Hoare triple {6012#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-27 16:23:45,868 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 8 proven. 68 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:23:45,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:23:45,869 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272403259] [2022-04-27 16:23:45,869 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [272403259] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:23:45,869 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1824893559] [2022-04-27 16:23:45,869 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 16:23:45,869 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:23:45,870 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:23:45,870 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:23:45,871 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 16:23:45,934 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-04-27 16:23:45,934 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:23:45,935 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-27 16:23:45,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:23:45,948 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:23:46,031 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:23:46,248 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 16:23:46,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 16:24:15,634 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:24:15,681 INFO L272 TraceCheckUtils]: 0: Hoare triple {6011#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:15,681 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-27 16:24:15,682 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:15,682 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:15,682 INFO L272 TraceCheckUtils]: 4: Hoare triple {6011#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:15,682 INFO L290 TraceCheckUtils]: 5: Hoare triple {6011#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6011#true} is VALID [2022-04-27 16:24:15,682 INFO L290 TraceCheckUtils]: 6: Hoare triple {6011#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6016#(= main_~i~0 0)} is VALID [2022-04-27 16:24:15,682 INFO L290 TraceCheckUtils]: 7: Hoare triple {6016#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6016#(= main_~i~0 0)} is VALID [2022-04-27 16:24:15,683 INFO L290 TraceCheckUtils]: 8: Hoare triple {6016#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:15,683 INFO L290 TraceCheckUtils]: 9: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:15,684 INFO L290 TraceCheckUtils]: 10: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:15,684 INFO L290 TraceCheckUtils]: 11: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:15,685 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:15,685 INFO L290 TraceCheckUtils]: 13: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:15,686 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:15,687 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:15,688 INFO L290 TraceCheckUtils]: 16: Hoare triple {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6100#(exists ((v_main_~i~0_84 Int)) (and (<= 4 v_main_~i~0_84) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_84 4))) 0) (<= (+ v_main_~i~0_84 1) main_~i~0) (<= v_main_~i~0_84 4)))} is VALID [2022-04-27 16:24:15,689 INFO L290 TraceCheckUtils]: 17: Hoare triple {6100#(exists ((v_main_~i~0_84 Int)) (and (<= 4 v_main_~i~0_84) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_84 4))) 0) (<= (+ v_main_~i~0_84 1) main_~i~0) (<= v_main_~i~0_84 4)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:15,689 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:15,690 INFO L290 TraceCheckUtils]: 19: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:15,690 INFO L290 TraceCheckUtils]: 20: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:15,691 INFO L290 TraceCheckUtils]: 21: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:15,692 INFO L272 TraceCheckUtils]: 22: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,692 INFO L290 TraceCheckUtils]: 23: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,692 INFO L290 TraceCheckUtils]: 24: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,693 INFO L290 TraceCheckUtils]: 25: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,694 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:15,694 INFO L290 TraceCheckUtils]: 27: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:15,695 INFO L290 TraceCheckUtils]: 28: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,695 INFO L290 TraceCheckUtils]: 29: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,696 INFO L272 TraceCheckUtils]: 30: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,697 INFO L290 TraceCheckUtils]: 31: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,697 INFO L290 TraceCheckUtils]: 32: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,698 INFO L290 TraceCheckUtils]: 33: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,699 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,699 INFO L290 TraceCheckUtils]: 35: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,700 INFO L290 TraceCheckUtils]: 36: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,700 INFO L290 TraceCheckUtils]: 37: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,701 INFO L272 TraceCheckUtils]: 38: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,702 INFO L290 TraceCheckUtils]: 39: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,702 INFO L290 TraceCheckUtils]: 40: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,703 INFO L290 TraceCheckUtils]: 41: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,703 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,704 INFO L290 TraceCheckUtils]: 43: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,704 INFO L290 TraceCheckUtils]: 44: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:15,705 INFO L290 TraceCheckUtils]: 45: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:15,706 INFO L272 TraceCheckUtils]: 46: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,707 INFO L290 TraceCheckUtils]: 47: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,707 INFO L290 TraceCheckUtils]: 48: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,707 INFO L290 TraceCheckUtils]: 49: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-27 16:24:15,708 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:15,709 INFO L290 TraceCheckUtils]: 51: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:15,709 INFO L290 TraceCheckUtils]: 52: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6213#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:15,710 INFO L290 TraceCheckUtils]: 53: Hoare triple {6213#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6045#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:24:15,711 INFO L272 TraceCheckUtils]: 54: Hoare triple {6045#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:24:15,711 INFO L290 TraceCheckUtils]: 55: Hoare triple {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6224#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:24:15,711 INFO L290 TraceCheckUtils]: 56: Hoare triple {6224#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-27 16:24:15,712 INFO L290 TraceCheckUtils]: 57: Hoare triple {6012#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-27 16:24:15,712 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 76 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:24:15,712 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:24:17,983 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:24:17,987 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:24:18,077 INFO L290 TraceCheckUtils]: 57: Hoare triple {6012#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-27 16:24:18,078 INFO L290 TraceCheckUtils]: 56: Hoare triple {6224#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-27 16:24:18,079 INFO L290 TraceCheckUtils]: 55: Hoare triple {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6224#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:24:18,079 INFO L272 TraceCheckUtils]: 54: Hoare triple {6045#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:24:18,079 INFO L290 TraceCheckUtils]: 53: Hoare triple {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6045#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:24:18,080 INFO L290 TraceCheckUtils]: 52: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:24:18,080 INFO L290 TraceCheckUtils]: 51: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:18,081 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {6011#true} {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:18,081 INFO L290 TraceCheckUtils]: 49: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,081 INFO L290 TraceCheckUtils]: 48: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,081 INFO L290 TraceCheckUtils]: 47: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:24:18,081 INFO L272 TraceCheckUtils]: 46: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:24:18,082 INFO L290 TraceCheckUtils]: 45: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:18,082 INFO L290 TraceCheckUtils]: 44: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:18,083 INFO L290 TraceCheckUtils]: 43: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:18,083 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6011#true} {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:18,083 INFO L290 TraceCheckUtils]: 41: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,083 INFO L290 TraceCheckUtils]: 40: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,083 INFO L290 TraceCheckUtils]: 39: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:24:18,083 INFO L272 TraceCheckUtils]: 38: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:24:18,084 INFO L290 TraceCheckUtils]: 37: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:18,084 INFO L290 TraceCheckUtils]: 36: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:18,085 INFO L290 TraceCheckUtils]: 35: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:18,085 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {6011#true} {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:18,085 INFO L290 TraceCheckUtils]: 33: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,085 INFO L290 TraceCheckUtils]: 32: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,085 INFO L290 TraceCheckUtils]: 31: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:24:18,086 INFO L272 TraceCheckUtils]: 30: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:24:18,086 INFO L290 TraceCheckUtils]: 29: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:18,086 INFO L290 TraceCheckUtils]: 28: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:18,087 INFO L290 TraceCheckUtils]: 27: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:24:18,087 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6011#true} {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:24:18,087 INFO L290 TraceCheckUtils]: 25: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,087 INFO L290 TraceCheckUtils]: 24: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,088 INFO L290 TraceCheckUtils]: 23: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-27 16:24:18,088 INFO L272 TraceCheckUtils]: 22: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-27 16:24:18,088 INFO L290 TraceCheckUtils]: 21: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:24:18,088 INFO L290 TraceCheckUtils]: 20: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:24:18,089 INFO L290 TraceCheckUtils]: 19: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:18,089 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:18,090 INFO L290 TraceCheckUtils]: 17: Hoare triple {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:18,090 INFO L290 TraceCheckUtils]: 16: Hoare triple {6355#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:18,091 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6355#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:18,091 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:18,091 INFO L290 TraceCheckUtils]: 13: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:18,092 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:18,092 INFO L290 TraceCheckUtils]: 11: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:18,093 INFO L290 TraceCheckUtils]: 10: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:18,093 INFO L290 TraceCheckUtils]: 9: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:18,094 INFO L290 TraceCheckUtils]: 8: Hoare triple {6016#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:18,094 INFO L290 TraceCheckUtils]: 7: Hoare triple {6016#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6016#(= main_~i~0 0)} is VALID [2022-04-27 16:24:18,095 INFO L290 TraceCheckUtils]: 6: Hoare triple {6011#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6016#(= main_~i~0 0)} is VALID [2022-04-27 16:24:18,095 INFO L290 TraceCheckUtils]: 5: Hoare triple {6011#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6011#true} is VALID [2022-04-27 16:24:18,095 INFO L272 TraceCheckUtils]: 4: Hoare triple {6011#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,095 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,095 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,095 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-27 16:24:18,095 INFO L272 TraceCheckUtils]: 0: Hoare triple {6011#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-27 16:24:18,096 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 8 proven. 68 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:24:18,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1824893559] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:24:18,096 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:24:18,096 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 18] total 29 [2022-04-27 16:24:18,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050287670] [2022-04-27 16:24:18,096 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:24:18,097 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 58 [2022-04-27 16:24:18,098 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:24:18,098 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:24:18,173 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:24:18,174 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 16:24:18,174 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:24:18,174 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 16:24:18,175 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=722, Unknown=5, NotChecked=0, Total=812 [2022-04-27 16:24:18,175 INFO L87 Difference]: Start difference. First operand 76 states and 80 transitions. Second operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:24:26,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:24:26,049 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2022-04-27 16:24:26,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 16:24:26,049 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 58 [2022-04-27 16:24:26,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:24:26,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:24:26,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 68 transitions. [2022-04-27 16:24:26,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:24:26,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 68 transitions. [2022-04-27 16:24:26,053 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 68 transitions. [2022-04-27 16:24:26,127 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:24:26,128 INFO L225 Difference]: With dead ends: 117 [2022-04-27 16:24:26,128 INFO L226 Difference]: Without dead ends: 117 [2022-04-27 16:24:26,129 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 106 SyntacticMatches, 13 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 37.8s TimeCoverageRelationStatistics Valid=218, Invalid=2029, Unknown=9, NotChecked=0, Total=2256 [2022-04-27 16:24:26,130 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 56 mSDsluCounter, 161 mSDsCounter, 0 mSdLazyCounter, 736 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 187 SdHoareTripleChecker+Invalid, 851 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 736 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 96 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 16:24:26,130 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 187 Invalid, 851 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 736 Invalid, 0 Unknown, 96 Unchecked, 0.6s Time] [2022-04-27 16:24:26,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-04-27 16:24:26,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 91. [2022-04-27 16:24:26,133 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:24:26,133 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:24:26,134 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:24:26,134 INFO L87 Difference]: Start difference. First operand 117 states. Second operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:24:26,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:24:26,136 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2022-04-27 16:24:26,136 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2022-04-27 16:24:26,137 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:24:26,137 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:24:26,137 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 117 states. [2022-04-27 16:24:26,137 INFO L87 Difference]: Start difference. First operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 117 states. [2022-04-27 16:24:26,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:24:26,139 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2022-04-27 16:24:26,139 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2022-04-27 16:24:26,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:24:26,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:24:26,140 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:24:26,140 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:24:26,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:24:26,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 95 transitions. [2022-04-27 16:24:26,142 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 95 transitions. Word has length 58 [2022-04-27 16:24:26,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:24:26,142 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 95 transitions. [2022-04-27 16:24:26,142 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:24:26,142 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 95 transitions. [2022-04-27 16:24:26,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-04-27 16:24:26,143 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:24:26,143 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:24:26,168 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 16:24:26,355 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 16:24:26,355 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:24:26,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:24:26,356 INFO L85 PathProgramCache]: Analyzing trace with hash 1278575025, now seen corresponding path program 12 times [2022-04-27 16:24:26,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:24:26,356 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466949452] [2022-04-27 16:24:26,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:24:26,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:24:26,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,605 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:24:26,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,608 INFO L290 TraceCheckUtils]: 0: Hoare triple {6927#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-27 16:24:26,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,608 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,608 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 16:24:26,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,616 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,617 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:26,617 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 16:24:26,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,620 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:26,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 16:24:26,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:26,624 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 16:24:26,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,632 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,633 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:26,634 INFO L272 TraceCheckUtils]: 0: Hoare triple {6889#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6927#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:24:26,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {6927#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-27 16:24:26,634 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,634 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,634 INFO L272 TraceCheckUtils]: 4: Hoare triple {6889#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,635 INFO L290 TraceCheckUtils]: 5: Hoare triple {6889#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6889#true} is VALID [2022-04-27 16:24:26,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {6889#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6894#(= main_~i~0 0)} is VALID [2022-04-27 16:24:26,635 INFO L290 TraceCheckUtils]: 7: Hoare triple {6894#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6894#(= main_~i~0 0)} is VALID [2022-04-27 16:24:26,636 INFO L290 TraceCheckUtils]: 8: Hoare triple {6894#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:26,636 INFO L290 TraceCheckUtils]: 9: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:26,637 INFO L290 TraceCheckUtils]: 10: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:26,637 INFO L290 TraceCheckUtils]: 11: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:26,638 INFO L290 TraceCheckUtils]: 12: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:26,638 INFO L290 TraceCheckUtils]: 13: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:26,638 INFO L290 TraceCheckUtils]: 14: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:26,639 INFO L290 TraceCheckUtils]: 15: Hoare triple {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:26,640 INFO L290 TraceCheckUtils]: 16: Hoare triple {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:26,640 INFO L290 TraceCheckUtils]: 17: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:26,641 INFO L290 TraceCheckUtils]: 18: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:26,641 INFO L290 TraceCheckUtils]: 19: Hoare triple {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:26,641 INFO L290 TraceCheckUtils]: 20: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:26,642 INFO L290 TraceCheckUtils]: 21: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:26,642 INFO L290 TraceCheckUtils]: 22: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:26,643 INFO L290 TraceCheckUtils]: 23: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:26,643 INFO L272 TraceCheckUtils]: 24: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:24:26,643 INFO L290 TraceCheckUtils]: 25: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,643 INFO L290 TraceCheckUtils]: 26: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,643 INFO L290 TraceCheckUtils]: 27: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,643 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {6889#true} {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:26,644 INFO L290 TraceCheckUtils]: 29: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:26,644 INFO L290 TraceCheckUtils]: 30: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:26,645 INFO L290 TraceCheckUtils]: 31: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:26,645 INFO L272 TraceCheckUtils]: 32: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:24:26,645 INFO L290 TraceCheckUtils]: 33: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,645 INFO L290 TraceCheckUtils]: 34: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,645 INFO L290 TraceCheckUtils]: 35: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,645 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {6889#true} {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:26,646 INFO L290 TraceCheckUtils]: 37: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:24:26,646 INFO L290 TraceCheckUtils]: 38: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:26,647 INFO L290 TraceCheckUtils]: 39: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:26,647 INFO L272 TraceCheckUtils]: 40: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:24:26,647 INFO L290 TraceCheckUtils]: 41: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,647 INFO L290 TraceCheckUtils]: 42: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,647 INFO L290 TraceCheckUtils]: 43: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,648 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {6889#true} {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:26,648 INFO L290 TraceCheckUtils]: 45: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:24:26,648 INFO L290 TraceCheckUtils]: 46: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:26,649 INFO L290 TraceCheckUtils]: 47: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:26,649 INFO L272 TraceCheckUtils]: 48: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:24:26,649 INFO L290 TraceCheckUtils]: 49: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:24:26,649 INFO L290 TraceCheckUtils]: 50: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,649 INFO L290 TraceCheckUtils]: 51: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:26,650 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {6889#true} {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:26,650 INFO L290 TraceCheckUtils]: 53: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:24:26,650 INFO L290 TraceCheckUtils]: 54: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:24:26,651 INFO L290 TraceCheckUtils]: 55: Hoare triple {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6924#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:24:26,651 INFO L272 TraceCheckUtils]: 56: Hoare triple {6924#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6925#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:24:26,652 INFO L290 TraceCheckUtils]: 57: Hoare triple {6925#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6926#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:24:26,652 INFO L290 TraceCheckUtils]: 58: Hoare triple {6926#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-27 16:24:26,652 INFO L290 TraceCheckUtils]: 59: Hoare triple {6890#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-27 16:24:26,652 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 8 proven. 81 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:24:26,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:24:26,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466949452] [2022-04-27 16:24:26,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1466949452] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:24:26,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042702556] [2022-04-27 16:24:26,653 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 16:24:26,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:24:26,653 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:24:26,654 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:24:26,654 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 16:24:26,720 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-27 16:24:26,720 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:24:26,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-27 16:24:26,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:24:26,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:24:26,808 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:24:26,902 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:24:26,902 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:24:26,976 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:24:26,977 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:24:58,005 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:24:58,053 INFO L272 TraceCheckUtils]: 0: Hoare triple {6889#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:58,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-27 16:24:58,053 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:58,053 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:58,053 INFO L272 TraceCheckUtils]: 4: Hoare triple {6889#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:24:58,054 INFO L290 TraceCheckUtils]: 5: Hoare triple {6889#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6889#true} is VALID [2022-04-27 16:24:58,054 INFO L290 TraceCheckUtils]: 6: Hoare triple {6889#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6894#(= main_~i~0 0)} is VALID [2022-04-27 16:24:58,054 INFO L290 TraceCheckUtils]: 7: Hoare triple {6894#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6894#(= main_~i~0 0)} is VALID [2022-04-27 16:24:58,054 INFO L290 TraceCheckUtils]: 8: Hoare triple {6894#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:58,055 INFO L290 TraceCheckUtils]: 9: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:24:58,055 INFO L290 TraceCheckUtils]: 10: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:58,056 INFO L290 TraceCheckUtils]: 11: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:24:58,056 INFO L290 TraceCheckUtils]: 12: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:58,057 INFO L290 TraceCheckUtils]: 13: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:24:58,057 INFO L290 TraceCheckUtils]: 14: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:58,058 INFO L290 TraceCheckUtils]: 15: Hoare triple {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:24:58,058 INFO L290 TraceCheckUtils]: 16: Hoare triple {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,059 INFO L290 TraceCheckUtils]: 17: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,059 INFO L290 TraceCheckUtils]: 18: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6985#(and (<= 6 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,060 INFO L290 TraceCheckUtils]: 19: Hoare triple {6985#(and (<= 6 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:58,060 INFO L290 TraceCheckUtils]: 20: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:58,060 INFO L290 TraceCheckUtils]: 21: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:24:58,061 INFO L290 TraceCheckUtils]: 22: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:58,061 INFO L290 TraceCheckUtils]: 23: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:58,062 INFO L272 TraceCheckUtils]: 24: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,062 INFO L290 TraceCheckUtils]: 25: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,063 INFO L290 TraceCheckUtils]: 26: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,063 INFO L290 TraceCheckUtils]: 27: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,063 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:58,064 INFO L290 TraceCheckUtils]: 29: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:24:58,064 INFO L290 TraceCheckUtils]: 30: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,065 INFO L290 TraceCheckUtils]: 31: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,065 INFO L272 TraceCheckUtils]: 32: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,066 INFO L290 TraceCheckUtils]: 33: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,066 INFO L290 TraceCheckUtils]: 34: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,066 INFO L290 TraceCheckUtils]: 35: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,067 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,067 INFO L290 TraceCheckUtils]: 37: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,068 INFO L290 TraceCheckUtils]: 38: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,068 INFO L290 TraceCheckUtils]: 39: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,069 INFO L272 TraceCheckUtils]: 40: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,069 INFO L290 TraceCheckUtils]: 41: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,069 INFO L290 TraceCheckUtils]: 42: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,070 INFO L290 TraceCheckUtils]: 43: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,070 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,071 INFO L290 TraceCheckUtils]: 45: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,071 INFO L290 TraceCheckUtils]: 46: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:58,071 INFO L290 TraceCheckUtils]: 47: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:58,072 INFO L272 TraceCheckUtils]: 48: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,072 INFO L290 TraceCheckUtils]: 49: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,073 INFO L290 TraceCheckUtils]: 50: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,073 INFO L290 TraceCheckUtils]: 51: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-27 16:24:58,074 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:58,074 INFO L290 TraceCheckUtils]: 53: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:24:58,074 INFO L290 TraceCheckUtils]: 54: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7098#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:24:58,075 INFO L290 TraceCheckUtils]: 55: Hoare triple {7098#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6924#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:24:58,075 INFO L272 TraceCheckUtils]: 56: Hoare triple {6924#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:24:58,076 INFO L290 TraceCheckUtils]: 57: Hoare triple {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7109#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:24:58,076 INFO L290 TraceCheckUtils]: 58: Hoare triple {7109#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-27 16:24:58,076 INFO L290 TraceCheckUtils]: 59: Hoare triple {6890#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-27 16:24:58,076 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 1 proven. 88 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 16:24:58,076 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:25:00,425 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:25:00,429 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:25:00,511 INFO L290 TraceCheckUtils]: 59: Hoare triple {6890#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-27 16:25:00,512 INFO L290 TraceCheckUtils]: 58: Hoare triple {7109#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-27 16:25:00,512 INFO L290 TraceCheckUtils]: 57: Hoare triple {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7109#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:25:00,513 INFO L272 TraceCheckUtils]: 56: Hoare triple {6924#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:25:00,513 INFO L290 TraceCheckUtils]: 55: Hoare triple {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6924#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:25:00,514 INFO L290 TraceCheckUtils]: 54: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:00,514 INFO L290 TraceCheckUtils]: 53: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:00,515 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {6889#true} {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:00,515 INFO L290 TraceCheckUtils]: 51: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,515 INFO L290 TraceCheckUtils]: 50: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,516 INFO L290 TraceCheckUtils]: 49: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:25:00,516 INFO L272 TraceCheckUtils]: 48: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:25:00,516 INFO L290 TraceCheckUtils]: 47: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:00,517 INFO L290 TraceCheckUtils]: 46: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:00,517 INFO L290 TraceCheckUtils]: 45: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:00,518 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {6889#true} {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:00,518 INFO L290 TraceCheckUtils]: 43: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,518 INFO L290 TraceCheckUtils]: 42: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,519 INFO L290 TraceCheckUtils]: 41: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:25:00,519 INFO L272 TraceCheckUtils]: 40: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:25:00,519 INFO L290 TraceCheckUtils]: 39: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:00,520 INFO L290 TraceCheckUtils]: 38: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:00,520 INFO L290 TraceCheckUtils]: 37: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:00,521 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {6889#true} {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:00,521 INFO L290 TraceCheckUtils]: 35: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,522 INFO L290 TraceCheckUtils]: 34: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,522 INFO L290 TraceCheckUtils]: 33: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:25:00,522 INFO L272 TraceCheckUtils]: 32: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:25:00,522 INFO L290 TraceCheckUtils]: 31: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:00,523 INFO L290 TraceCheckUtils]: 30: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:00,524 INFO L290 TraceCheckUtils]: 29: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:00,524 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {6889#true} {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:00,524 INFO L290 TraceCheckUtils]: 27: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,524 INFO L290 TraceCheckUtils]: 26: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,525 INFO L290 TraceCheckUtils]: 25: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-27 16:25:00,525 INFO L272 TraceCheckUtils]: 24: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-27 16:25:00,525 INFO L290 TraceCheckUtils]: 23: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:00,526 INFO L290 TraceCheckUtils]: 22: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:00,526 INFO L290 TraceCheckUtils]: 21: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:25:00,527 INFO L290 TraceCheckUtils]: 20: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:25:00,527 INFO L290 TraceCheckUtils]: 19: Hoare triple {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 16:25:00,528 INFO L290 TraceCheckUtils]: 18: Hoare triple {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:25:00,529 INFO L290 TraceCheckUtils]: 17: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:25:00,529 INFO L290 TraceCheckUtils]: 16: Hoare triple {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:25:00,530 INFO L290 TraceCheckUtils]: 15: Hoare triple {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 16:25:00,531 INFO L290 TraceCheckUtils]: 14: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:00,531 INFO L290 TraceCheckUtils]: 13: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:00,532 INFO L290 TraceCheckUtils]: 12: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:00,532 INFO L290 TraceCheckUtils]: 11: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:00,533 INFO L290 TraceCheckUtils]: 10: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:00,534 INFO L290 TraceCheckUtils]: 9: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:00,534 INFO L290 TraceCheckUtils]: 8: Hoare triple {6894#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:00,534 INFO L290 TraceCheckUtils]: 7: Hoare triple {6894#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6894#(= main_~i~0 0)} is VALID [2022-04-27 16:25:00,535 INFO L290 TraceCheckUtils]: 6: Hoare triple {6889#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6894#(= main_~i~0 0)} is VALID [2022-04-27 16:25:00,535 INFO L290 TraceCheckUtils]: 5: Hoare triple {6889#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6889#true} is VALID [2022-04-27 16:25:00,535 INFO L272 TraceCheckUtils]: 4: Hoare triple {6889#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,535 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,536 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-27 16:25:00,536 INFO L272 TraceCheckUtils]: 0: Hoare triple {6889#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-27 16:25:00,536 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 8 proven. 80 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-27 16:25:00,536 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042702556] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:25:00,536 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:25:00,536 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 19] total 30 [2022-04-27 16:25:00,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068449031] [2022-04-27 16:25:00,537 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:25:00,537 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 60 [2022-04-27 16:25:00,539 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:25:00,539 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:25:00,616 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:25:00,616 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 16:25:00,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:25:00,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 16:25:00,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=773, Unknown=5, NotChecked=0, Total=870 [2022-04-27 16:25:00,617 INFO L87 Difference]: Start difference. First operand 91 states and 95 transitions. Second operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:25:02,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:25:02,049 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-04-27 16:25:02,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-27 16:25:02,050 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 60 [2022-04-27 16:25:02,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:25:02,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:25:02,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 65 transitions. [2022-04-27 16:25:02,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:25:02,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 65 transitions. [2022-04-27 16:25:02,052 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 65 transitions. [2022-04-27 16:25:02,121 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:25:02,124 INFO L225 Difference]: With dead ends: 117 [2022-04-27 16:25:02,124 INFO L226 Difference]: Without dead ends: 117 [2022-04-27 16:25:02,125 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 106 SyntacticMatches, 15 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 33.1s TimeCoverageRelationStatistics Valid=240, Invalid=2107, Unknown=5, NotChecked=0, Total=2352 [2022-04-27 16:25:02,125 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 65 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 715 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 827 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 715 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 72 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 16:25:02,126 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 169 Invalid, 827 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 715 Invalid, 0 Unknown, 72 Unchecked, 0.6s Time] [2022-04-27 16:25:02,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-04-27 16:25:02,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 107. [2022-04-27 16:25:02,129 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:25:02,129 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:25:02,129 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:25:02,130 INFO L87 Difference]: Start difference. First operand 117 states. Second operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:25:02,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:25:02,132 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-04-27 16:25:02,132 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2022-04-27 16:25:02,132 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:25:02,132 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:25:02,132 INFO L74 IsIncluded]: Start isIncluded. First operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) Second operand 117 states. [2022-04-27 16:25:02,133 INFO L87 Difference]: Start difference. First operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) Second operand 117 states. [2022-04-27 16:25:02,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:25:02,135 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-04-27 16:25:02,135 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2022-04-27 16:25:02,136 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:25:02,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:25:02,136 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:25:02,136 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:25:02,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:25:02,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 113 transitions. [2022-04-27 16:25:02,138 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 113 transitions. Word has length 60 [2022-04-27 16:25:02,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:25:02,138 INFO L495 AbstractCegarLoop]: Abstraction has 107 states and 113 transitions. [2022-04-27 16:25:02,138 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 16:25:02,138 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 113 transitions. [2022-04-27 16:25:02,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-27 16:25:02,139 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:25:02,139 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:25:02,164 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 16:25:02,360 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 16:25:02,361 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:25:02,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:25:02,361 INFO L85 PathProgramCache]: Analyzing trace with hash -694372407, now seen corresponding path program 13 times [2022-04-27 16:25:02,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:25:02,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132741789] [2022-04-27 16:25:02,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:25:02,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:25:02,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:25:02,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,604 INFO L290 TraceCheckUtils]: 0: Hoare triple {7835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-27 16:25:02,604 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,604 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,604 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 16:25:02,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,607 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,608 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:02,608 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 16:25:02,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,611 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,611 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,611 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:02,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 16:25:02,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:02,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 16:25:02,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,619 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,619 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,619 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:02,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 16:25:02,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:02,624 INFO L272 TraceCheckUtils]: 0: Hoare triple {7793#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:25:02,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {7835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-27 16:25:02,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,625 INFO L272 TraceCheckUtils]: 4: Hoare triple {7793#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,625 INFO L290 TraceCheckUtils]: 5: Hoare triple {7793#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7793#true} is VALID [2022-04-27 16:25:02,625 INFO L290 TraceCheckUtils]: 6: Hoare triple {7793#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7798#(= main_~i~0 0)} is VALID [2022-04-27 16:25:02,625 INFO L290 TraceCheckUtils]: 7: Hoare triple {7798#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7798#(= main_~i~0 0)} is VALID [2022-04-27 16:25:02,626 INFO L290 TraceCheckUtils]: 8: Hoare triple {7798#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:02,626 INFO L290 TraceCheckUtils]: 9: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:02,627 INFO L290 TraceCheckUtils]: 10: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:02,627 INFO L290 TraceCheckUtils]: 11: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:02,628 INFO L290 TraceCheckUtils]: 12: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:02,628 INFO L290 TraceCheckUtils]: 13: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:02,629 INFO L290 TraceCheckUtils]: 14: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:02,629 INFO L290 TraceCheckUtils]: 15: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:02,630 INFO L290 TraceCheckUtils]: 16: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:25:02,631 INFO L290 TraceCheckUtils]: 17: Hoare triple {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7804#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:25:02,631 INFO L290 TraceCheckUtils]: 18: Hoare triple {7804#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:02,631 INFO L290 TraceCheckUtils]: 19: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:02,632 INFO L290 TraceCheckUtils]: 20: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:02,632 INFO L290 TraceCheckUtils]: 21: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:02,632 INFO L272 TraceCheckUtils]: 22: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:02,633 INFO L290 TraceCheckUtils]: 23: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,633 INFO L290 TraceCheckUtils]: 24: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,633 INFO L290 TraceCheckUtils]: 25: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,633 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7793#true} {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:02,634 INFO L290 TraceCheckUtils]: 27: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:02,634 INFO L290 TraceCheckUtils]: 28: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:02,635 INFO L290 TraceCheckUtils]: 29: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:02,635 INFO L272 TraceCheckUtils]: 30: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:02,635 INFO L290 TraceCheckUtils]: 31: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,635 INFO L290 TraceCheckUtils]: 32: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,635 INFO L290 TraceCheckUtils]: 33: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,636 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7793#true} {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:02,636 INFO L290 TraceCheckUtils]: 35: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:02,637 INFO L290 TraceCheckUtils]: 36: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:02,637 INFO L290 TraceCheckUtils]: 37: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:02,637 INFO L272 TraceCheckUtils]: 38: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:02,637 INFO L290 TraceCheckUtils]: 39: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,638 INFO L290 TraceCheckUtils]: 40: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,638 INFO L290 TraceCheckUtils]: 41: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,638 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7793#true} {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:02,639 INFO L290 TraceCheckUtils]: 43: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:02,639 INFO L290 TraceCheckUtils]: 44: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:02,640 INFO L290 TraceCheckUtils]: 45: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:02,640 INFO L272 TraceCheckUtils]: 46: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:02,640 INFO L290 TraceCheckUtils]: 47: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,640 INFO L290 TraceCheckUtils]: 48: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,640 INFO L290 TraceCheckUtils]: 49: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,641 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7793#true} {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:02,641 INFO L290 TraceCheckUtils]: 51: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:02,642 INFO L290 TraceCheckUtils]: 52: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:02,642 INFO L290 TraceCheckUtils]: 53: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:02,642 INFO L272 TraceCheckUtils]: 54: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:02,642 INFO L290 TraceCheckUtils]: 55: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:02,642 INFO L290 TraceCheckUtils]: 56: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,642 INFO L290 TraceCheckUtils]: 57: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:02,643 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {7793#true} {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:02,643 INFO L290 TraceCheckUtils]: 59: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:02,644 INFO L290 TraceCheckUtils]: 60: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:02,644 INFO L290 TraceCheckUtils]: 61: Hoare triple {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7832#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:25:02,645 INFO L272 TraceCheckUtils]: 62: Hoare triple {7832#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7833#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:25:02,645 INFO L290 TraceCheckUtils]: 63: Hoare triple {7833#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7834#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:25:02,646 INFO L290 TraceCheckUtils]: 64: Hoare triple {7834#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-27 16:25:02,646 INFO L290 TraceCheckUtils]: 65: Hoare triple {7794#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-27 16:25:02,646 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:25:02,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:25:02,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132741789] [2022-04-27 16:25:02,647 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132741789] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:25:02,647 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [134881601] [2022-04-27 16:25:02,647 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 16:25:02,647 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:25:02,647 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:25:02,648 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:25:02,665 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 16:25:02,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,725 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 16:25:02,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:02,737 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:25:02,868 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:25:36,793 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:25:36,840 INFO L272 TraceCheckUtils]: 0: Hoare triple {7793#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:36,841 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-27 16:25:36,841 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:36,841 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:36,841 INFO L272 TraceCheckUtils]: 4: Hoare triple {7793#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:36,841 INFO L290 TraceCheckUtils]: 5: Hoare triple {7793#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7793#true} is VALID [2022-04-27 16:25:36,841 INFO L290 TraceCheckUtils]: 6: Hoare triple {7793#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7798#(= main_~i~0 0)} is VALID [2022-04-27 16:25:36,842 INFO L290 TraceCheckUtils]: 7: Hoare triple {7798#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7798#(= main_~i~0 0)} is VALID [2022-04-27 16:25:36,842 INFO L290 TraceCheckUtils]: 8: Hoare triple {7798#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:36,842 INFO L290 TraceCheckUtils]: 9: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:36,843 INFO L290 TraceCheckUtils]: 10: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:36,843 INFO L290 TraceCheckUtils]: 11: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:36,844 INFO L290 TraceCheckUtils]: 12: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:36,844 INFO L290 TraceCheckUtils]: 13: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:36,845 INFO L290 TraceCheckUtils]: 14: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:36,846 INFO L290 TraceCheckUtils]: 15: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:36,846 INFO L290 TraceCheckUtils]: 16: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:25:36,847 INFO L290 TraceCheckUtils]: 17: Hoare triple {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:36,847 INFO L290 TraceCheckUtils]: 18: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:36,847 INFO L290 TraceCheckUtils]: 19: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:36,848 INFO L290 TraceCheckUtils]: 20: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:36,848 INFO L290 TraceCheckUtils]: 21: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:36,849 INFO L272 TraceCheckUtils]: 22: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,850 INFO L290 TraceCheckUtils]: 23: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,850 INFO L290 TraceCheckUtils]: 24: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,850 INFO L290 TraceCheckUtils]: 25: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,851 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:36,851 INFO L290 TraceCheckUtils]: 27: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:36,851 INFO L290 TraceCheckUtils]: 28: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:25:36,852 INFO L290 TraceCheckUtils]: 29: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:25:36,853 INFO L272 TraceCheckUtils]: 30: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,853 INFO L290 TraceCheckUtils]: 31: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,853 INFO L290 TraceCheckUtils]: 32: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,853 INFO L290 TraceCheckUtils]: 33: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,854 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:25:36,854 INFO L290 TraceCheckUtils]: 35: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:25:36,855 INFO L290 TraceCheckUtils]: 36: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:25:36,855 INFO L290 TraceCheckUtils]: 37: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:25:36,856 INFO L272 TraceCheckUtils]: 38: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,856 INFO L290 TraceCheckUtils]: 39: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,857 INFO L290 TraceCheckUtils]: 40: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,857 INFO L290 TraceCheckUtils]: 41: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,857 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:25:36,858 INFO L290 TraceCheckUtils]: 43: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:25:36,858 INFO L290 TraceCheckUtils]: 44: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,858 INFO L290 TraceCheckUtils]: 45: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,859 INFO L272 TraceCheckUtils]: 46: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,860 INFO L290 TraceCheckUtils]: 47: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,860 INFO L290 TraceCheckUtils]: 48: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,860 INFO L290 TraceCheckUtils]: 49: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,861 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,861 INFO L290 TraceCheckUtils]: 51: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,861 INFO L290 TraceCheckUtils]: 52: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,862 INFO L290 TraceCheckUtils]: 53: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,863 INFO L272 TraceCheckUtils]: 54: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,863 INFO L290 TraceCheckUtils]: 55: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,863 INFO L290 TraceCheckUtils]: 56: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,863 INFO L290 TraceCheckUtils]: 57: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-27 16:25:36,864 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,864 INFO L290 TraceCheckUtils]: 59: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:36,865 INFO L290 TraceCheckUtils]: 60: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 16:25:36,865 INFO L290 TraceCheckUtils]: 61: Hoare triple {8024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7832#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:25:36,866 INFO L272 TraceCheckUtils]: 62: Hoare triple {7832#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:25:36,866 INFO L290 TraceCheckUtils]: 63: Hoare triple {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8035#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:25:36,866 INFO L290 TraceCheckUtils]: 64: Hoare triple {8035#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-27 16:25:36,866 INFO L290 TraceCheckUtils]: 65: Hoare triple {7794#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-27 16:25:36,867 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 96 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:25:36,867 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:25:39,076 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:25:39,080 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:25:39,174 INFO L290 TraceCheckUtils]: 65: Hoare triple {7794#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-27 16:25:39,175 INFO L290 TraceCheckUtils]: 64: Hoare triple {8035#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-27 16:25:39,176 INFO L290 TraceCheckUtils]: 63: Hoare triple {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8035#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:25:39,176 INFO L272 TraceCheckUtils]: 62: Hoare triple {7832#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:25:39,176 INFO L290 TraceCheckUtils]: 61: Hoare triple {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7832#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:25:39,177 INFO L290 TraceCheckUtils]: 60: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:39,177 INFO L290 TraceCheckUtils]: 59: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:39,178 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {7793#true} {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:39,178 INFO L290 TraceCheckUtils]: 57: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,178 INFO L290 TraceCheckUtils]: 56: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,178 INFO L290 TraceCheckUtils]: 55: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:39,178 INFO L272 TraceCheckUtils]: 54: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:39,179 INFO L290 TraceCheckUtils]: 53: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:39,179 INFO L290 TraceCheckUtils]: 52: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:39,179 INFO L290 TraceCheckUtils]: 51: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:39,180 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7793#true} {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:39,180 INFO L290 TraceCheckUtils]: 49: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,180 INFO L290 TraceCheckUtils]: 48: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,180 INFO L290 TraceCheckUtils]: 47: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:39,180 INFO L272 TraceCheckUtils]: 46: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:39,181 INFO L290 TraceCheckUtils]: 45: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:39,181 INFO L290 TraceCheckUtils]: 44: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:39,182 INFO L290 TraceCheckUtils]: 43: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:39,182 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7793#true} {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:39,182 INFO L290 TraceCheckUtils]: 41: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,182 INFO L290 TraceCheckUtils]: 40: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,182 INFO L290 TraceCheckUtils]: 39: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:39,183 INFO L272 TraceCheckUtils]: 38: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:39,187 INFO L290 TraceCheckUtils]: 37: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:39,188 INFO L290 TraceCheckUtils]: 36: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:39,188 INFO L290 TraceCheckUtils]: 35: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:39,189 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7793#true} {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:39,189 INFO L290 TraceCheckUtils]: 33: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,189 INFO L290 TraceCheckUtils]: 32: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,189 INFO L290 TraceCheckUtils]: 31: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:39,189 INFO L272 TraceCheckUtils]: 30: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:39,190 INFO L290 TraceCheckUtils]: 29: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:39,191 INFO L290 TraceCheckUtils]: 28: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:39,191 INFO L290 TraceCheckUtils]: 27: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:25:39,192 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7793#true} {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:25:39,192 INFO L290 TraceCheckUtils]: 25: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,192 INFO L290 TraceCheckUtils]: 24: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,192 INFO L290 TraceCheckUtils]: 23: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-27 16:25:39,192 INFO L272 TraceCheckUtils]: 22: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-27 16:25:39,193 INFO L290 TraceCheckUtils]: 21: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:25:39,193 INFO L290 TraceCheckUtils]: 20: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:25:39,194 INFO L290 TraceCheckUtils]: 19: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:39,194 INFO L290 TraceCheckUtils]: 18: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:39,194 INFO L290 TraceCheckUtils]: 17: Hoare triple {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:39,195 INFO L290 TraceCheckUtils]: 16: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:25:39,195 INFO L290 TraceCheckUtils]: 15: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:39,196 INFO L290 TraceCheckUtils]: 14: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:39,196 INFO L290 TraceCheckUtils]: 13: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:39,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:39,197 INFO L290 TraceCheckUtils]: 11: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:39,198 INFO L290 TraceCheckUtils]: 10: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:39,199 INFO L290 TraceCheckUtils]: 9: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:39,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {7798#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:39,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {7798#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7798#(= main_~i~0 0)} is VALID [2022-04-27 16:25:39,200 INFO L290 TraceCheckUtils]: 6: Hoare triple {7793#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7798#(= main_~i~0 0)} is VALID [2022-04-27 16:25:39,200 INFO L290 TraceCheckUtils]: 5: Hoare triple {7793#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7793#true} is VALID [2022-04-27 16:25:39,200 INFO L272 TraceCheckUtils]: 4: Hoare triple {7793#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,200 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,200 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,200 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-27 16:25:39,200 INFO L272 TraceCheckUtils]: 0: Hoare triple {7793#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-27 16:25:39,201 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:25:39,201 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [134881601] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:25:39,201 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:25:39,201 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 18] total 29 [2022-04-27 16:25:39,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231196077] [2022-04-27 16:25:39,201 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:25:39,202 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-27 16:25:39,202 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:25:39,202 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:25:39,266 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:25:39,266 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 16:25:39,266 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:25:39,267 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 16:25:39,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=727, Unknown=6, NotChecked=0, Total=812 [2022-04-27 16:25:39,267 INFO L87 Difference]: Start difference. First operand 107 states and 113 transitions. Second operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:25:40,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:25:40,917 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2022-04-27 16:25:40,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-27 16:25:40,917 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-27 16:25:40,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:25:40,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:25:40,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 72 transitions. [2022-04-27 16:25:40,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:25:40,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 72 transitions. [2022-04-27 16:25:40,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 72 transitions. [2022-04-27 16:25:40,978 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:25:40,979 INFO L225 Difference]: With dead ends: 132 [2022-04-27 16:25:40,979 INFO L226 Difference]: Without dead ends: 132 [2022-04-27 16:25:40,980 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 126 SyntacticMatches, 14 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 35.8s TimeCoverageRelationStatistics Valid=211, Invalid=2135, Unknown=6, NotChecked=0, Total=2352 [2022-04-27 16:25:40,981 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 54 mSDsluCounter, 194 mSDsCounter, 0 mSdLazyCounter, 911 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 223 SdHoareTripleChecker+Invalid, 1019 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 911 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 89 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 16:25:40,981 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 223 Invalid, 1019 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 911 Invalid, 0 Unknown, 89 Unchecked, 0.7s Time] [2022-04-27 16:25:40,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2022-04-27 16:25:40,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 99. [2022-04-27 16:25:40,984 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:25:40,984 INFO L82 GeneralOperation]: Start isEquivalent. First operand 132 states. Second operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:25:40,984 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:25:40,984 INFO L87 Difference]: Start difference. First operand 132 states. Second operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:25:40,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:25:40,987 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2022-04-27 16:25:40,987 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2022-04-27 16:25:40,987 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:25:40,987 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:25:40,987 INFO L74 IsIncluded]: Start isIncluded. First operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 132 states. [2022-04-27 16:25:40,987 INFO L87 Difference]: Start difference. First operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 132 states. [2022-04-27 16:25:40,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:25:40,990 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2022-04-27 16:25:40,990 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2022-04-27 16:25:40,990 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:25:40,990 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:25:40,990 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:25:40,990 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:25:40,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:25:40,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2022-04-27 16:25:40,992 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 66 [2022-04-27 16:25:40,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:25:40,992 INFO L495 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2022-04-27 16:25:40,992 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:25:40,992 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2022-04-27 16:25:40,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-27 16:25:40,997 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:25:40,998 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:25:41,016 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 16:25:41,207 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:25:41,207 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:25:41,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:25:41,208 INFO L85 PathProgramCache]: Analyzing trace with hash 1865758983, now seen corresponding path program 14 times [2022-04-27 16:25:41,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:25:41,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963113954] [2022-04-27 16:25:41,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:25:41,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:25:41,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,493 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:25:41,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,496 INFO L290 TraceCheckUtils]: 0: Hoare triple {8823#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-27 16:25:41,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,496 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 16:25:41,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,499 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,499 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,500 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:41,500 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 16:25:41,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,508 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:41,509 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 16:25:41,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,515 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,515 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,516 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:41,516 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 16:25:41,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,519 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:41,520 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-27 16:25:41,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,522 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,522 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,523 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,523 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:41,524 INFO L272 TraceCheckUtils]: 0: Hoare triple {8780#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8823#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:25:41,524 INFO L290 TraceCheckUtils]: 1: Hoare triple {8823#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-27 16:25:41,524 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,524 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,524 INFO L272 TraceCheckUtils]: 4: Hoare triple {8780#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,524 INFO L290 TraceCheckUtils]: 5: Hoare triple {8780#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8780#true} is VALID [2022-04-27 16:25:41,525 INFO L290 TraceCheckUtils]: 6: Hoare triple {8780#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8785#(= main_~i~0 0)} is VALID [2022-04-27 16:25:41,525 INFO L290 TraceCheckUtils]: 7: Hoare triple {8785#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8785#(= main_~i~0 0)} is VALID [2022-04-27 16:25:41,525 INFO L290 TraceCheckUtils]: 8: Hoare triple {8785#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:41,526 INFO L290 TraceCheckUtils]: 9: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:25:41,526 INFO L290 TraceCheckUtils]: 10: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:41,527 INFO L290 TraceCheckUtils]: 11: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:25:41,527 INFO L290 TraceCheckUtils]: 12: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:41,528 INFO L290 TraceCheckUtils]: 13: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:25:41,528 INFO L290 TraceCheckUtils]: 14: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:41,529 INFO L290 TraceCheckUtils]: 15: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:25:41,529 INFO L290 TraceCheckUtils]: 16: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:25:41,530 INFO L290 TraceCheckUtils]: 17: Hoare triple {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:25:41,530 INFO L290 TraceCheckUtils]: 18: Hoare triple {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:25:41,531 INFO L290 TraceCheckUtils]: 19: Hoare triple {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:41,531 INFO L290 TraceCheckUtils]: 20: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:41,532 INFO L290 TraceCheckUtils]: 21: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:25:41,532 INFO L290 TraceCheckUtils]: 22: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:41,533 INFO L290 TraceCheckUtils]: 23: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:41,533 INFO L272 TraceCheckUtils]: 24: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:25:41,533 INFO L290 TraceCheckUtils]: 25: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,533 INFO L290 TraceCheckUtils]: 26: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,533 INFO L290 TraceCheckUtils]: 27: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,534 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8780#true} {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:41,534 INFO L290 TraceCheckUtils]: 29: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:25:41,534 INFO L290 TraceCheckUtils]: 30: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:41,535 INFO L290 TraceCheckUtils]: 31: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:41,535 INFO L272 TraceCheckUtils]: 32: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:25:41,535 INFO L290 TraceCheckUtils]: 33: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,535 INFO L290 TraceCheckUtils]: 34: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,535 INFO L290 TraceCheckUtils]: 35: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,536 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8780#true} {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:41,536 INFO L290 TraceCheckUtils]: 37: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:41,537 INFO L290 TraceCheckUtils]: 38: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:41,537 INFO L290 TraceCheckUtils]: 39: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:41,537 INFO L272 TraceCheckUtils]: 40: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:25:41,538 INFO L290 TraceCheckUtils]: 41: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,538 INFO L290 TraceCheckUtils]: 42: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,538 INFO L290 TraceCheckUtils]: 43: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,538 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8780#true} {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:41,539 INFO L290 TraceCheckUtils]: 45: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:25:41,539 INFO L290 TraceCheckUtils]: 46: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:41,540 INFO L290 TraceCheckUtils]: 47: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:41,540 INFO L272 TraceCheckUtils]: 48: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:25:41,540 INFO L290 TraceCheckUtils]: 49: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,540 INFO L290 TraceCheckUtils]: 50: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,540 INFO L290 TraceCheckUtils]: 51: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,541 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8780#true} {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:41,541 INFO L290 TraceCheckUtils]: 53: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:25:41,542 INFO L290 TraceCheckUtils]: 54: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:41,542 INFO L290 TraceCheckUtils]: 55: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:41,542 INFO L272 TraceCheckUtils]: 56: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:25:41,542 INFO L290 TraceCheckUtils]: 57: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:25:41,542 INFO L290 TraceCheckUtils]: 58: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,543 INFO L290 TraceCheckUtils]: 59: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:25:41,543 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {8780#true} {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:41,544 INFO L290 TraceCheckUtils]: 61: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:25:41,544 INFO L290 TraceCheckUtils]: 62: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:25:41,545 INFO L290 TraceCheckUtils]: 63: Hoare triple {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8820#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:25:41,545 INFO L272 TraceCheckUtils]: 64: Hoare triple {8820#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8821#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:25:41,545 INFO L290 TraceCheckUtils]: 65: Hoare triple {8821#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8822#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:25:41,546 INFO L290 TraceCheckUtils]: 66: Hoare triple {8822#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-27 16:25:41,546 INFO L290 TraceCheckUtils]: 67: Hoare triple {8781#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-27 16:25:41,546 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:25:41,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:25:41,546 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963113954] [2022-04-27 16:25:41,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1963113954] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:25:41,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [7032623] [2022-04-27 16:25:41,547 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:25:41,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:25:41,547 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:25:41,548 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:25:41,551 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 16:25:41,627 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:25:41,627 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:25:41,628 INFO L263 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-27 16:25:41,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:25:41,643 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:25:41,739 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:25:42,010 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 16:25:42,011 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 16:26:15,559 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:26:15,609 INFO L272 TraceCheckUtils]: 0: Hoare triple {8780#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:15,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-27 16:26:15,610 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:15,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:15,610 INFO L272 TraceCheckUtils]: 4: Hoare triple {8780#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:15,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {8780#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8780#true} is VALID [2022-04-27 16:26:15,610 INFO L290 TraceCheckUtils]: 6: Hoare triple {8780#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8785#(= main_~i~0 0)} is VALID [2022-04-27 16:26:15,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {8785#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8785#(= main_~i~0 0)} is VALID [2022-04-27 16:26:15,611 INFO L290 TraceCheckUtils]: 8: Hoare triple {8785#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:15,611 INFO L290 TraceCheckUtils]: 9: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:15,612 INFO L290 TraceCheckUtils]: 10: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:15,615 INFO L290 TraceCheckUtils]: 11: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:15,615 INFO L290 TraceCheckUtils]: 12: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:15,616 INFO L290 TraceCheckUtils]: 13: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:15,616 INFO L290 TraceCheckUtils]: 14: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:15,616 INFO L290 TraceCheckUtils]: 15: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:15,617 INFO L290 TraceCheckUtils]: 16: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:15,617 INFO L290 TraceCheckUtils]: 17: Hoare triple {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:15,619 INFO L290 TraceCheckUtils]: 18: Hoare triple {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8881#(exists ((v_main_~i~0_123 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_123))) 0) (<= v_main_~i~0_123 5) (<= 5 v_main_~i~0_123) (<= (+ v_main_~i~0_123 1) main_~i~0)))} is VALID [2022-04-27 16:26:15,619 INFO L290 TraceCheckUtils]: 19: Hoare triple {8881#(exists ((v_main_~i~0_123 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_123))) 0) (<= v_main_~i~0_123 5) (<= 5 v_main_~i~0_123) (<= (+ v_main_~i~0_123 1) main_~i~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:15,620 INFO L290 TraceCheckUtils]: 20: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:15,620 INFO L290 TraceCheckUtils]: 21: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:15,623 INFO L290 TraceCheckUtils]: 22: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:15,624 INFO L290 TraceCheckUtils]: 23: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:15,625 INFO L272 TraceCheckUtils]: 24: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,626 INFO L290 TraceCheckUtils]: 25: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,627 INFO L290 TraceCheckUtils]: 26: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,627 INFO L290 TraceCheckUtils]: 27: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,630 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:15,631 INFO L290 TraceCheckUtils]: 29: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:15,631 INFO L290 TraceCheckUtils]: 30: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:26:15,632 INFO L290 TraceCheckUtils]: 31: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:26:15,633 INFO L272 TraceCheckUtils]: 32: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,633 INFO L290 TraceCheckUtils]: 33: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,633 INFO L290 TraceCheckUtils]: 34: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,634 INFO L290 TraceCheckUtils]: 35: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,634 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:26:15,634 INFO L290 TraceCheckUtils]: 37: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:26:15,635 INFO L290 TraceCheckUtils]: 38: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,635 INFO L290 TraceCheckUtils]: 39: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,636 INFO L272 TraceCheckUtils]: 40: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,636 INFO L290 TraceCheckUtils]: 41: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,637 INFO L290 TraceCheckUtils]: 42: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,637 INFO L290 TraceCheckUtils]: 43: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,637 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,638 INFO L290 TraceCheckUtils]: 45: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,638 INFO L290 TraceCheckUtils]: 46: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:26:15,639 INFO L290 TraceCheckUtils]: 47: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:26:15,639 INFO L272 TraceCheckUtils]: 48: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,640 INFO L290 TraceCheckUtils]: 49: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,640 INFO L290 TraceCheckUtils]: 50: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,640 INFO L290 TraceCheckUtils]: 51: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,641 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:26:15,641 INFO L290 TraceCheckUtils]: 53: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:26:15,642 INFO L290 TraceCheckUtils]: 54: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,642 INFO L290 TraceCheckUtils]: 55: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,643 INFO L272 TraceCheckUtils]: 56: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,643 INFO L290 TraceCheckUtils]: 57: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,643 INFO L290 TraceCheckUtils]: 58: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,644 INFO L290 TraceCheckUtils]: 59: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-27 16:26:15,644 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,644 INFO L290 TraceCheckUtils]: 61: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:15,645 INFO L290 TraceCheckUtils]: 62: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9019#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-27 16:26:15,645 INFO L290 TraceCheckUtils]: 63: Hoare triple {9019#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 5)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8820#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:26:15,646 INFO L272 TraceCheckUtils]: 64: Hoare triple {8820#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:26:15,646 INFO L290 TraceCheckUtils]: 65: Hoare triple {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9030#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:26:15,646 INFO L290 TraceCheckUtils]: 66: Hoare triple {9030#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-27 16:26:15,646 INFO L290 TraceCheckUtils]: 67: Hoare triple {8781#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-27 16:26:15,647 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 109 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:26:15,647 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:26:16,818 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:26:16,822 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:26:16,915 INFO L290 TraceCheckUtils]: 67: Hoare triple {8781#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-27 16:26:16,916 INFO L290 TraceCheckUtils]: 66: Hoare triple {9030#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-27 16:26:16,916 INFO L290 TraceCheckUtils]: 65: Hoare triple {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9030#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:26:16,916 INFO L272 TraceCheckUtils]: 64: Hoare triple {8820#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:26:16,917 INFO L290 TraceCheckUtils]: 63: Hoare triple {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8820#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:26:16,917 INFO L290 TraceCheckUtils]: 62: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:16,918 INFO L290 TraceCheckUtils]: 61: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:16,918 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {8780#true} {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:16,918 INFO L290 TraceCheckUtils]: 59: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,919 INFO L290 TraceCheckUtils]: 58: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,919 INFO L290 TraceCheckUtils]: 57: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:26:16,919 INFO L272 TraceCheckUtils]: 56: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:26:16,919 INFO L290 TraceCheckUtils]: 55: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:16,920 INFO L290 TraceCheckUtils]: 54: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:16,920 INFO L290 TraceCheckUtils]: 53: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:16,921 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8780#true} {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:16,921 INFO L290 TraceCheckUtils]: 51: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,921 INFO L290 TraceCheckUtils]: 50: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,921 INFO L290 TraceCheckUtils]: 49: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:26:16,921 INFO L272 TraceCheckUtils]: 48: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:26:16,921 INFO L290 TraceCheckUtils]: 47: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:16,922 INFO L290 TraceCheckUtils]: 46: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:16,922 INFO L290 TraceCheckUtils]: 45: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:16,923 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8780#true} {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:16,923 INFO L290 TraceCheckUtils]: 43: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,923 INFO L290 TraceCheckUtils]: 42: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,923 INFO L290 TraceCheckUtils]: 41: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:26:16,923 INFO L272 TraceCheckUtils]: 40: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:26:16,923 INFO L290 TraceCheckUtils]: 39: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:16,924 INFO L290 TraceCheckUtils]: 38: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:16,924 INFO L290 TraceCheckUtils]: 37: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:16,925 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8780#true} {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:16,925 INFO L290 TraceCheckUtils]: 35: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,925 INFO L290 TraceCheckUtils]: 34: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,925 INFO L290 TraceCheckUtils]: 33: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:26:16,925 INFO L272 TraceCheckUtils]: 32: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:26:16,926 INFO L290 TraceCheckUtils]: 31: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:16,926 INFO L290 TraceCheckUtils]: 30: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:16,926 INFO L290 TraceCheckUtils]: 29: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:16,927 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8780#true} {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:16,927 INFO L290 TraceCheckUtils]: 27: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,927 INFO L290 TraceCheckUtils]: 26: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,927 INFO L290 TraceCheckUtils]: 25: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-27 16:26:16,927 INFO L272 TraceCheckUtils]: 24: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-27 16:26:16,928 INFO L290 TraceCheckUtils]: 23: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:16,928 INFO L290 TraceCheckUtils]: 22: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:16,928 INFO L290 TraceCheckUtils]: 21: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:16,929 INFO L290 TraceCheckUtils]: 20: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:16,929 INFO L290 TraceCheckUtils]: 19: Hoare triple {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:16,930 INFO L290 TraceCheckUtils]: 18: Hoare triple {9185#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:16,930 INFO L290 TraceCheckUtils]: 17: Hoare triple {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9185#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-27 16:26:16,930 INFO L290 TraceCheckUtils]: 16: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:16,931 INFO L290 TraceCheckUtils]: 15: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:16,931 INFO L290 TraceCheckUtils]: 14: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:16,932 INFO L290 TraceCheckUtils]: 13: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:16,932 INFO L290 TraceCheckUtils]: 12: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:16,933 INFO L290 TraceCheckUtils]: 11: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:16,933 INFO L290 TraceCheckUtils]: 10: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:16,933 INFO L290 TraceCheckUtils]: 9: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:16,934 INFO L290 TraceCheckUtils]: 8: Hoare triple {8785#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:16,934 INFO L290 TraceCheckUtils]: 7: Hoare triple {8785#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8785#(= main_~i~0 0)} is VALID [2022-04-27 16:26:16,934 INFO L290 TraceCheckUtils]: 6: Hoare triple {8780#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8785#(= main_~i~0 0)} is VALID [2022-04-27 16:26:16,934 INFO L290 TraceCheckUtils]: 5: Hoare triple {8780#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8780#true} is VALID [2022-04-27 16:26:16,934 INFO L272 TraceCheckUtils]: 4: Hoare triple {8780#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,935 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,935 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,935 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-27 16:26:16,935 INFO L272 TraceCheckUtils]: 0: Hoare triple {8780#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-27 16:26:16,935 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:26:16,935 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [7032623] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:26:16,936 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:26:16,936 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 20] total 32 [2022-04-27 16:26:16,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377255867] [2022-04-27 16:26:16,936 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:26:16,937 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-27 16:26:16,937 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:26:16,938 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:26:17,024 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:26:17,024 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 16:26:17,024 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:26:17,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 16:26:17,025 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=892, Unknown=6, NotChecked=0, Total=992 [2022-04-27 16:26:17,025 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:26:18,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:26:18,783 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2022-04-27 16:26:18,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-27 16:26:18,783 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-27 16:26:18,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:26:18,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:26:18,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 76 transitions. [2022-04-27 16:26:18,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:26:18,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 76 transitions. [2022-04-27 16:26:18,786 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 76 transitions. [2022-04-27 16:26:18,849 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:26:18,851 INFO L225 Difference]: With dead ends: 161 [2022-04-27 16:26:18,851 INFO L226 Difference]: Without dead ends: 161 [2022-04-27 16:26:18,852 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 126 SyntacticMatches, 15 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 612 ImplicationChecksByTransitivity, 34.5s TimeCoverageRelationStatistics Valid=237, Invalid=2513, Unknown=6, NotChecked=0, Total=2756 [2022-04-27 16:26:18,852 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 52 mSDsluCounter, 211 mSDsCounter, 0 mSdLazyCounter, 831 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 943 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 831 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 90 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 16:26:18,853 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [53 Valid, 239 Invalid, 943 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 831 Invalid, 0 Unknown, 90 Unchecked, 0.6s Time] [2022-04-27 16:26:18,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-04-27 16:26:18,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 135. [2022-04-27 16:26:18,856 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:26:18,856 INFO L82 GeneralOperation]: Start isEquivalent. First operand 161 states. Second operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:26:18,856 INFO L74 IsIncluded]: Start isIncluded. First operand 161 states. Second operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:26:18,857 INFO L87 Difference]: Start difference. First operand 161 states. Second operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:26:18,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:26:18,859 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2022-04-27 16:26:18,860 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 166 transitions. [2022-04-27 16:26:18,860 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:26:18,860 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:26:18,860 INFO L74 IsIncluded]: Start isIncluded. First operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 161 states. [2022-04-27 16:26:18,861 INFO L87 Difference]: Start difference. First operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 161 states. [2022-04-27 16:26:18,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:26:18,863 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2022-04-27 16:26:18,863 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 166 transitions. [2022-04-27 16:26:18,864 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:26:18,864 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:26:18,864 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:26:18,864 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:26:18,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:26:18,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2022-04-27 16:26:18,866 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 68 [2022-04-27 16:26:18,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:26:18,867 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2022-04-27 16:26:18,867 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:26:18,867 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2022-04-27 16:26:18,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-27 16:26:18,868 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:26:18,868 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:26:18,893 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 16:26:19,090 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 16:26:19,091 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:26:19,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:26:19,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1135764165, now seen corresponding path program 15 times [2022-04-27 16:26:19,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:26:19,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564575672] [2022-04-27 16:26:19,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:26:19,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:26:19,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:26:19,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,428 INFO L290 TraceCheckUtils]: 0: Hoare triple {9950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-27 16:26:19,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,428 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,428 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:26:19,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,432 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,432 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,432 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:19,433 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 16:26:19,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,435 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,435 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,436 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,436 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:19,436 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 16:26:19,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,439 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,439 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,440 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:19,440 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-27 16:26:19,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,442 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,442 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,442 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,443 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:19,443 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-27 16:26:19,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,446 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,446 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,446 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,451 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:19,452 INFO L272 TraceCheckUtils]: 0: Hoare triple {9906#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:26:19,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {9950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-27 16:26:19,452 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,452 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,452 INFO L272 TraceCheckUtils]: 4: Hoare triple {9906#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,452 INFO L290 TraceCheckUtils]: 5: Hoare triple {9906#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9906#true} is VALID [2022-04-27 16:26:19,453 INFO L290 TraceCheckUtils]: 6: Hoare triple {9906#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9911#(= main_~i~0 0)} is VALID [2022-04-27 16:26:19,453 INFO L290 TraceCheckUtils]: 7: Hoare triple {9911#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9911#(= main_~i~0 0)} is VALID [2022-04-27 16:26:19,453 INFO L290 TraceCheckUtils]: 8: Hoare triple {9911#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:19,454 INFO L290 TraceCheckUtils]: 9: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:19,454 INFO L290 TraceCheckUtils]: 10: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:19,455 INFO L290 TraceCheckUtils]: 11: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:19,455 INFO L290 TraceCheckUtils]: 12: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:19,456 INFO L290 TraceCheckUtils]: 13: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:19,456 INFO L290 TraceCheckUtils]: 14: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:19,457 INFO L290 TraceCheckUtils]: 15: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:19,457 INFO L290 TraceCheckUtils]: 16: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:19,458 INFO L290 TraceCheckUtils]: 17: Hoare triple {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:19,458 INFO L290 TraceCheckUtils]: 18: Hoare triple {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:26:19,459 INFO L290 TraceCheckUtils]: 19: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:26:19,459 INFO L290 TraceCheckUtils]: 20: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:19,460 INFO L290 TraceCheckUtils]: 21: Hoare triple {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:19,460 INFO L290 TraceCheckUtils]: 22: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:19,461 INFO L290 TraceCheckUtils]: 23: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:19,461 INFO L290 TraceCheckUtils]: 24: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:19,461 INFO L290 TraceCheckUtils]: 25: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:19,461 INFO L272 TraceCheckUtils]: 26: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:19,462 INFO L290 TraceCheckUtils]: 27: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,462 INFO L290 TraceCheckUtils]: 28: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,462 INFO L290 TraceCheckUtils]: 29: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,462 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {9906#true} {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:19,463 INFO L290 TraceCheckUtils]: 31: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:19,463 INFO L290 TraceCheckUtils]: 32: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:19,464 INFO L290 TraceCheckUtils]: 33: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:19,464 INFO L272 TraceCheckUtils]: 34: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:19,464 INFO L290 TraceCheckUtils]: 35: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,464 INFO L290 TraceCheckUtils]: 36: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,465 INFO L290 TraceCheckUtils]: 37: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,465 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {9906#true} {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:19,465 INFO L290 TraceCheckUtils]: 39: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:19,466 INFO L290 TraceCheckUtils]: 40: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:19,467 INFO L290 TraceCheckUtils]: 41: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:19,467 INFO L272 TraceCheckUtils]: 42: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:19,467 INFO L290 TraceCheckUtils]: 43: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,467 INFO L290 TraceCheckUtils]: 44: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,467 INFO L290 TraceCheckUtils]: 45: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,468 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {9906#true} {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:19,468 INFO L290 TraceCheckUtils]: 47: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:19,468 INFO L290 TraceCheckUtils]: 48: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:19,469 INFO L290 TraceCheckUtils]: 49: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:19,469 INFO L272 TraceCheckUtils]: 50: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:19,469 INFO L290 TraceCheckUtils]: 51: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,469 INFO L290 TraceCheckUtils]: 52: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,469 INFO L290 TraceCheckUtils]: 53: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,470 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {9906#true} {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:19,470 INFO L290 TraceCheckUtils]: 55: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:19,471 INFO L290 TraceCheckUtils]: 56: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:19,471 INFO L290 TraceCheckUtils]: 57: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:19,471 INFO L272 TraceCheckUtils]: 58: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:19,472 INFO L290 TraceCheckUtils]: 59: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:19,472 INFO L290 TraceCheckUtils]: 60: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,472 INFO L290 TraceCheckUtils]: 61: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:19,472 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {9906#true} {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:19,473 INFO L290 TraceCheckUtils]: 63: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:19,473 INFO L290 TraceCheckUtils]: 64: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:19,474 INFO L290 TraceCheckUtils]: 65: Hoare triple {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9947#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:26:19,474 INFO L272 TraceCheckUtils]: 66: Hoare triple {9947#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9948#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:26:19,475 INFO L290 TraceCheckUtils]: 67: Hoare triple {9948#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9949#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:26:19,475 INFO L290 TraceCheckUtils]: 68: Hoare triple {9949#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-27 16:26:19,475 INFO L290 TraceCheckUtils]: 69: Hoare triple {9907#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-27 16:26:19,475 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 114 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:26:19,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:26:19,476 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564575672] [2022-04-27 16:26:19,476 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564575672] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:26:19,476 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116462884] [2022-04-27 16:26:19,476 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:26:19,476 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:26:19,476 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:26:19,477 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:26:19,500 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 16:26:19,569 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-27 16:26:19,569 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:26:19,570 INFO L263 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-27 16:26:19,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:26:19,586 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:26:19,680 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:26:19,777 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:26:19,778 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:26:19,844 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:26:19,845 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:26:55,196 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:26:55,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {9906#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:55,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-27 16:26:55,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:55,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:55,249 INFO L272 TraceCheckUtils]: 4: Hoare triple {9906#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:55,249 INFO L290 TraceCheckUtils]: 5: Hoare triple {9906#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9906#true} is VALID [2022-04-27 16:26:55,249 INFO L290 TraceCheckUtils]: 6: Hoare triple {9906#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9911#(= main_~i~0 0)} is VALID [2022-04-27 16:26:55,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {9911#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9911#(= main_~i~0 0)} is VALID [2022-04-27 16:26:55,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {9911#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:55,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:55,251 INFO L290 TraceCheckUtils]: 10: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:55,251 INFO L290 TraceCheckUtils]: 11: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:55,251 INFO L290 TraceCheckUtils]: 12: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:55,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:55,252 INFO L290 TraceCheckUtils]: 14: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:55,253 INFO L290 TraceCheckUtils]: 15: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:55,253 INFO L290 TraceCheckUtils]: 16: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:55,254 INFO L290 TraceCheckUtils]: 17: Hoare triple {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:55,254 INFO L290 TraceCheckUtils]: 18: Hoare triple {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:26:55,255 INFO L290 TraceCheckUtils]: 19: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:26:55,255 INFO L290 TraceCheckUtils]: 20: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10014#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:26:55,256 INFO L290 TraceCheckUtils]: 21: Hoare triple {10014#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:55,256 INFO L290 TraceCheckUtils]: 22: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:55,256 INFO L290 TraceCheckUtils]: 23: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:55,257 INFO L290 TraceCheckUtils]: 24: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:55,257 INFO L290 TraceCheckUtils]: 25: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:55,258 INFO L272 TraceCheckUtils]: 26: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,258 INFO L290 TraceCheckUtils]: 27: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,258 INFO L290 TraceCheckUtils]: 28: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,259 INFO L290 TraceCheckUtils]: 29: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,259 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:55,260 INFO L290 TraceCheckUtils]: 31: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:26:55,260 INFO L290 TraceCheckUtils]: 32: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:26:55,260 INFO L290 TraceCheckUtils]: 33: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:26:55,261 INFO L272 TraceCheckUtils]: 34: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,261 INFO L290 TraceCheckUtils]: 35: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,262 INFO L290 TraceCheckUtils]: 36: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,262 INFO L290 TraceCheckUtils]: 37: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,263 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:26:55,263 INFO L290 TraceCheckUtils]: 39: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-27 16:26:55,263 INFO L290 TraceCheckUtils]: 40: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,264 INFO L290 TraceCheckUtils]: 41: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,265 INFO L272 TraceCheckUtils]: 42: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,265 INFO L290 TraceCheckUtils]: 43: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,265 INFO L290 TraceCheckUtils]: 44: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,265 INFO L290 TraceCheckUtils]: 45: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,266 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,266 INFO L290 TraceCheckUtils]: 47: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,267 INFO L290 TraceCheckUtils]: 48: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,267 INFO L290 TraceCheckUtils]: 49: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,268 INFO L272 TraceCheckUtils]: 50: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,268 INFO L290 TraceCheckUtils]: 51: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,269 INFO L290 TraceCheckUtils]: 52: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,269 INFO L290 TraceCheckUtils]: 53: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,269 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,270 INFO L290 TraceCheckUtils]: 55: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:55,270 INFO L290 TraceCheckUtils]: 56: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 16:26:55,270 INFO L290 TraceCheckUtils]: 57: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 16:26:55,271 INFO L272 TraceCheckUtils]: 58: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,272 INFO L290 TraceCheckUtils]: 59: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,272 INFO L290 TraceCheckUtils]: 60: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,272 INFO L290 TraceCheckUtils]: 61: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-27 16:26:55,273 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 16:26:55,273 INFO L290 TraceCheckUtils]: 63: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 16:26:55,273 INFO L290 TraceCheckUtils]: 64: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10152#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 16:26:55,274 INFO L290 TraceCheckUtils]: 65: Hoare triple {10152#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9947#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:26:55,274 INFO L272 TraceCheckUtils]: 66: Hoare triple {9947#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:26:55,275 INFO L290 TraceCheckUtils]: 67: Hoare triple {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10163#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:26:55,275 INFO L290 TraceCheckUtils]: 68: Hoare triple {10163#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-27 16:26:55,275 INFO L290 TraceCheckUtils]: 69: Hoare triple {9907#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-27 16:26:55,275 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 1 proven. 123 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 16:26:55,275 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:26:57,680 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:26:57,686 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:26:57,781 INFO L290 TraceCheckUtils]: 69: Hoare triple {9907#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-27 16:26:57,782 INFO L290 TraceCheckUtils]: 68: Hoare triple {10163#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-27 16:26:57,782 INFO L290 TraceCheckUtils]: 67: Hoare triple {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10163#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:26:57,782 INFO L272 TraceCheckUtils]: 66: Hoare triple {9947#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:26:57,783 INFO L290 TraceCheckUtils]: 65: Hoare triple {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9947#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:26:57,783 INFO L290 TraceCheckUtils]: 64: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:57,784 INFO L290 TraceCheckUtils]: 63: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:57,784 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {9906#true} {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:57,784 INFO L290 TraceCheckUtils]: 61: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,784 INFO L290 TraceCheckUtils]: 60: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,785 INFO L290 TraceCheckUtils]: 59: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:57,785 INFO L272 TraceCheckUtils]: 58: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:57,785 INFO L290 TraceCheckUtils]: 57: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:57,785 INFO L290 TraceCheckUtils]: 56: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:26:57,786 INFO L290 TraceCheckUtils]: 55: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:57,786 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {9906#true} {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:57,786 INFO L290 TraceCheckUtils]: 53: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,787 INFO L290 TraceCheckUtils]: 52: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,787 INFO L290 TraceCheckUtils]: 51: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:57,787 INFO L272 TraceCheckUtils]: 50: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:57,787 INFO L290 TraceCheckUtils]: 49: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:57,788 INFO L290 TraceCheckUtils]: 48: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:26:57,788 INFO L290 TraceCheckUtils]: 47: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:57,788 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {9906#true} {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:57,788 INFO L290 TraceCheckUtils]: 45: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,789 INFO L290 TraceCheckUtils]: 44: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,789 INFO L290 TraceCheckUtils]: 43: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:57,789 INFO L272 TraceCheckUtils]: 42: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:57,795 INFO L290 TraceCheckUtils]: 41: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:57,796 INFO L290 TraceCheckUtils]: 40: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:26:57,796 INFO L290 TraceCheckUtils]: 39: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:57,797 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {9906#true} {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:57,797 INFO L290 TraceCheckUtils]: 37: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,797 INFO L290 TraceCheckUtils]: 36: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,797 INFO L290 TraceCheckUtils]: 35: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:57,797 INFO L272 TraceCheckUtils]: 34: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:57,798 INFO L290 TraceCheckUtils]: 33: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:57,798 INFO L290 TraceCheckUtils]: 32: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:26:57,799 INFO L290 TraceCheckUtils]: 31: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:57,799 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {9906#true} {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:57,799 INFO L290 TraceCheckUtils]: 29: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,799 INFO L290 TraceCheckUtils]: 28: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,799 INFO L290 TraceCheckUtils]: 27: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-27 16:26:57,799 INFO L272 TraceCheckUtils]: 26: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-27 16:26:57,800 INFO L290 TraceCheckUtils]: 25: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:57,800 INFO L290 TraceCheckUtils]: 24: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:26:57,801 INFO L290 TraceCheckUtils]: 23: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:57,801 INFO L290 TraceCheckUtils]: 22: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:57,802 INFO L290 TraceCheckUtils]: 21: Hoare triple {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 16:26:57,802 INFO L290 TraceCheckUtils]: 20: Hoare triple {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 16:26:57,805 INFO L290 TraceCheckUtils]: 19: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-27 16:26:57,806 INFO L290 TraceCheckUtils]: 18: Hoare triple {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 16:26:57,806 INFO L290 TraceCheckUtils]: 17: Hoare triple {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-27 16:26:57,807 INFO L290 TraceCheckUtils]: 16: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:26:57,807 INFO L290 TraceCheckUtils]: 15: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:57,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:26:57,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:57,808 INFO L290 TraceCheckUtils]: 12: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:26:57,809 INFO L290 TraceCheckUtils]: 11: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:57,809 INFO L290 TraceCheckUtils]: 10: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:26:57,809 INFO L290 TraceCheckUtils]: 9: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:57,810 INFO L290 TraceCheckUtils]: 8: Hoare triple {9911#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:26:57,810 INFO L290 TraceCheckUtils]: 7: Hoare triple {9911#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9911#(= main_~i~0 0)} is VALID [2022-04-27 16:26:57,810 INFO L290 TraceCheckUtils]: 6: Hoare triple {9906#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9911#(= main_~i~0 0)} is VALID [2022-04-27 16:26:57,811 INFO L290 TraceCheckUtils]: 5: Hoare triple {9906#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9906#true} is VALID [2022-04-27 16:26:57,811 INFO L272 TraceCheckUtils]: 4: Hoare triple {9906#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,811 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,811 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,811 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-27 16:26:57,811 INFO L272 TraceCheckUtils]: 0: Hoare triple {9906#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-27 16:26:57,811 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 113 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-04-27 16:26:57,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2116462884] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:26:57,811 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:26:57,812 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 21] total 33 [2022-04-27 16:26:57,812 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944802229] [2022-04-27 16:26:57,812 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:26:57,812 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 70 [2022-04-27 16:26:57,814 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:26:57,814 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:26:57,885 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:26:57,885 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-27 16:26:57,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:26:57,886 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-27 16:26:57,886 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=949, Unknown=6, NotChecked=0, Total=1056 [2022-04-27 16:26:57,886 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:27:00,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:00,001 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2022-04-27 16:27:00,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-27 16:27:00,001 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 70 [2022-04-27 16:27:00,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:27:00,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:27:00,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-27 16:27:00,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:27:00,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-27 16:27:00,004 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 77 transitions. [2022-04-27 16:27:00,082 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:27:00,084 INFO L225 Difference]: With dead ends: 157 [2022-04-27 16:27:00,084 INFO L226 Difference]: Without dead ends: 157 [2022-04-27 16:27:00,085 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 125 SyntacticMatches, 17 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 688 ImplicationChecksByTransitivity, 37.4s TimeCoverageRelationStatistics Valid=277, Invalid=2687, Unknown=6, NotChecked=0, Total=2970 [2022-04-27 16:27:00,086 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 70 mSDsluCounter, 214 mSDsCounter, 0 mSdLazyCounter, 1152 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 242 SdHoareTripleChecker+Invalid, 1286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 1152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 89 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 16:27:00,086 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 242 Invalid, 1286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 1152 Invalid, 0 Unknown, 89 Unchecked, 0.9s Time] [2022-04-27 16:27:00,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2022-04-27 16:27:00,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 147. [2022-04-27 16:27:00,090 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:27:00,090 INFO L82 GeneralOperation]: Start isEquivalent. First operand 157 states. Second operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:27:00,091 INFO L74 IsIncluded]: Start isIncluded. First operand 157 states. Second operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:27:00,091 INFO L87 Difference]: Start difference. First operand 157 states. Second operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:27:00,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:00,097 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2022-04-27 16:27:00,097 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 163 transitions. [2022-04-27 16:27:00,097 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:27:00,097 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:27:00,098 INFO L74 IsIncluded]: Start isIncluded. First operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 157 states. [2022-04-27 16:27:00,098 INFO L87 Difference]: Start difference. First operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 157 states. [2022-04-27 16:27:00,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:00,101 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2022-04-27 16:27:00,101 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 163 transitions. [2022-04-27 16:27:00,101 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:27:00,101 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:27:00,101 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:27:00,101 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:27:00,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:27:00,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 153 transitions. [2022-04-27 16:27:00,105 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 153 transitions. Word has length 70 [2022-04-27 16:27:00,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:27:00,105 INFO L495 AbstractCegarLoop]: Abstraction has 147 states and 153 transitions. [2022-04-27 16:27:00,105 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 16:27:00,105 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 153 transitions. [2022-04-27 16:27:00,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-27 16:27:00,106 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:27:00,106 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:27:00,132 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 16:27:00,330 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 16:27:00,330 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:27:00,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:27:00,331 INFO L85 PathProgramCache]: Analyzing trace with hash -126822625, now seen corresponding path program 16 times [2022-04-27 16:27:00,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:27:00,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986949416] [2022-04-27 16:27:00,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:27:00,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:27:00,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,482 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:27:00,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,488 INFO L290 TraceCheckUtils]: 0: Hoare triple {11087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-27 16:27:00,489 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,489 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,489 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 16:27:00,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 16:27:00,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 16:27:00,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,501 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,501 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,502 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11061#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:00,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 16:27:00,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,506 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,506 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,506 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,506 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11066#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:00,507 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 16:27:00,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,510 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,510 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,511 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11071#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:00,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 16:27:00,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,514 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,514 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,514 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,515 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11076#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:00,515 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-27 16:27:00,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,518 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11081#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:00,519 INFO L272 TraceCheckUtils]: 0: Hoare triple {11043#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:27:00,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {11087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-27 16:27:00,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,520 INFO L272 TraceCheckUtils]: 4: Hoare triple {11043#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,520 INFO L290 TraceCheckUtils]: 5: Hoare triple {11043#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11043#true} is VALID [2022-04-27 16:27:00,520 INFO L290 TraceCheckUtils]: 6: Hoare triple {11043#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11048#(= main_~i~0 0)} is VALID [2022-04-27 16:27:00,520 INFO L290 TraceCheckUtils]: 7: Hoare triple {11048#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11048#(= main_~i~0 0)} is VALID [2022-04-27 16:27:00,521 INFO L290 TraceCheckUtils]: 8: Hoare triple {11048#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11049#(<= main_~i~0 1)} is VALID [2022-04-27 16:27:00,521 INFO L290 TraceCheckUtils]: 9: Hoare triple {11049#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11049#(<= main_~i~0 1)} is VALID [2022-04-27 16:27:00,522 INFO L290 TraceCheckUtils]: 10: Hoare triple {11049#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11050#(<= main_~i~0 2)} is VALID [2022-04-27 16:27:00,522 INFO L290 TraceCheckUtils]: 11: Hoare triple {11050#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11050#(<= main_~i~0 2)} is VALID [2022-04-27 16:27:00,522 INFO L290 TraceCheckUtils]: 12: Hoare triple {11050#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11051#(<= main_~i~0 3)} is VALID [2022-04-27 16:27:00,523 INFO L290 TraceCheckUtils]: 13: Hoare triple {11051#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11051#(<= main_~i~0 3)} is VALID [2022-04-27 16:27:00,523 INFO L290 TraceCheckUtils]: 14: Hoare triple {11051#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11052#(<= main_~i~0 4)} is VALID [2022-04-27 16:27:00,524 INFO L290 TraceCheckUtils]: 15: Hoare triple {11052#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11052#(<= main_~i~0 4)} is VALID [2022-04-27 16:27:00,524 INFO L290 TraceCheckUtils]: 16: Hoare triple {11052#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11053#(<= main_~i~0 5)} is VALID [2022-04-27 16:27:00,524 INFO L290 TraceCheckUtils]: 17: Hoare triple {11053#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11053#(<= main_~i~0 5)} is VALID [2022-04-27 16:27:00,525 INFO L290 TraceCheckUtils]: 18: Hoare triple {11053#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11054#(<= main_~i~0 6)} is VALID [2022-04-27 16:27:00,525 INFO L290 TraceCheckUtils]: 19: Hoare triple {11054#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11055#(<= main_~n~0 6)} is VALID [2022-04-27 16:27:00,526 INFO L290 TraceCheckUtils]: 20: Hoare triple {11055#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 16:27:00,526 INFO L290 TraceCheckUtils]: 21: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 16:27:00,526 INFO L272 TraceCheckUtils]: 22: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:00,527 INFO L290 TraceCheckUtils]: 23: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,527 INFO L290 TraceCheckUtils]: 24: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,527 INFO L290 TraceCheckUtils]: 25: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,527 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11043#true} {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 16:27:00,528 INFO L290 TraceCheckUtils]: 27: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 16:27:00,528 INFO L290 TraceCheckUtils]: 28: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:00,529 INFO L290 TraceCheckUtils]: 29: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:00,529 INFO L272 TraceCheckUtils]: 30: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:00,529 INFO L290 TraceCheckUtils]: 31: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,529 INFO L290 TraceCheckUtils]: 32: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,529 INFO L290 TraceCheckUtils]: 33: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,529 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11043#true} {11061#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:00,530 INFO L290 TraceCheckUtils]: 35: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:00,530 INFO L290 TraceCheckUtils]: 36: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:00,531 INFO L290 TraceCheckUtils]: 37: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:00,531 INFO L272 TraceCheckUtils]: 38: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:00,531 INFO L290 TraceCheckUtils]: 39: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,531 INFO L290 TraceCheckUtils]: 40: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,531 INFO L290 TraceCheckUtils]: 41: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,532 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11043#true} {11066#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:00,532 INFO L290 TraceCheckUtils]: 43: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:00,532 INFO L290 TraceCheckUtils]: 44: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:00,533 INFO L290 TraceCheckUtils]: 45: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:00,533 INFO L272 TraceCheckUtils]: 46: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:00,533 INFO L290 TraceCheckUtils]: 47: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,533 INFO L290 TraceCheckUtils]: 48: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,533 INFO L290 TraceCheckUtils]: 49: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,534 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11043#true} {11071#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:00,535 INFO L290 TraceCheckUtils]: 51: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:00,536 INFO L290 TraceCheckUtils]: 52: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:00,536 INFO L290 TraceCheckUtils]: 53: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:00,536 INFO L272 TraceCheckUtils]: 54: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:00,536 INFO L290 TraceCheckUtils]: 55: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,536 INFO L290 TraceCheckUtils]: 56: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,536 INFO L290 TraceCheckUtils]: 57: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,537 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11043#true} {11076#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:00,537 INFO L290 TraceCheckUtils]: 59: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:00,538 INFO L290 TraceCheckUtils]: 60: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:00,538 INFO L290 TraceCheckUtils]: 61: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:00,538 INFO L272 TraceCheckUtils]: 62: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:00,538 INFO L290 TraceCheckUtils]: 63: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:00,539 INFO L290 TraceCheckUtils]: 64: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,539 INFO L290 TraceCheckUtils]: 65: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:00,539 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11043#true} {11081#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:00,539 INFO L290 TraceCheckUtils]: 67: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:00,540 INFO L290 TraceCheckUtils]: 68: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11086#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:27:00,540 INFO L290 TraceCheckUtils]: 69: Hoare triple {11086#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11044#false} is VALID [2022-04-27 16:27:00,541 INFO L272 TraceCheckUtils]: 70: Hoare triple {11044#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11044#false} is VALID [2022-04-27 16:27:00,541 INFO L290 TraceCheckUtils]: 71: Hoare triple {11044#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11044#false} is VALID [2022-04-27 16:27:00,541 INFO L290 TraceCheckUtils]: 72: Hoare triple {11044#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-27 16:27:00,541 INFO L290 TraceCheckUtils]: 73: Hoare triple {11044#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-27 16:27:00,541 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 63 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:27:00,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:27:00,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [986949416] [2022-04-27 16:27:00,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [986949416] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:27:00,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1446644097] [2022-04-27 16:27:00,542 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:27:00,542 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:27:00,542 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:27:00,544 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:27:00,555 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 16:27:00,655 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:27:00,655 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:27:00,657 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 16:27:00,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:00,673 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:27:01,164 INFO L272 TraceCheckUtils]: 0: Hoare triple {11043#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-27 16:27:01,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,165 INFO L272 TraceCheckUtils]: 4: Hoare triple {11043#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,165 INFO L290 TraceCheckUtils]: 5: Hoare triple {11043#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11043#true} is VALID [2022-04-27 16:27:01,165 INFO L290 TraceCheckUtils]: 6: Hoare triple {11043#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11109#(<= main_~i~0 0)} is VALID [2022-04-27 16:27:01,166 INFO L290 TraceCheckUtils]: 7: Hoare triple {11109#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11109#(<= main_~i~0 0)} is VALID [2022-04-27 16:27:01,166 INFO L290 TraceCheckUtils]: 8: Hoare triple {11109#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11049#(<= main_~i~0 1)} is VALID [2022-04-27 16:27:01,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {11049#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11049#(<= main_~i~0 1)} is VALID [2022-04-27 16:27:01,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {11049#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11050#(<= main_~i~0 2)} is VALID [2022-04-27 16:27:01,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {11050#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11050#(<= main_~i~0 2)} is VALID [2022-04-27 16:27:01,168 INFO L290 TraceCheckUtils]: 12: Hoare triple {11050#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11051#(<= main_~i~0 3)} is VALID [2022-04-27 16:27:01,168 INFO L290 TraceCheckUtils]: 13: Hoare triple {11051#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11051#(<= main_~i~0 3)} is VALID [2022-04-27 16:27:01,168 INFO L290 TraceCheckUtils]: 14: Hoare triple {11051#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11052#(<= main_~i~0 4)} is VALID [2022-04-27 16:27:01,169 INFO L290 TraceCheckUtils]: 15: Hoare triple {11052#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11052#(<= main_~i~0 4)} is VALID [2022-04-27 16:27:01,169 INFO L290 TraceCheckUtils]: 16: Hoare triple {11052#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11053#(<= main_~i~0 5)} is VALID [2022-04-27 16:27:01,169 INFO L290 TraceCheckUtils]: 17: Hoare triple {11053#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11053#(<= main_~i~0 5)} is VALID [2022-04-27 16:27:01,170 INFO L290 TraceCheckUtils]: 18: Hoare triple {11053#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11054#(<= main_~i~0 6)} is VALID [2022-04-27 16:27:01,170 INFO L290 TraceCheckUtils]: 19: Hoare triple {11054#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11055#(<= main_~n~0 6)} is VALID [2022-04-27 16:27:01,170 INFO L290 TraceCheckUtils]: 20: Hoare triple {11055#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 16:27:01,171 INFO L290 TraceCheckUtils]: 21: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 16:27:01,171 INFO L272 TraceCheckUtils]: 22: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,171 INFO L290 TraceCheckUtils]: 23: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,171 INFO L290 TraceCheckUtils]: 24: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,171 INFO L290 TraceCheckUtils]: 25: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,172 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11043#true} {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 16:27:01,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 16:27:01,172 INFO L290 TraceCheckUtils]: 28: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 16:27:01,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 16:27:01,173 INFO L272 TraceCheckUtils]: 30: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,173 INFO L290 TraceCheckUtils]: 31: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,173 INFO L290 TraceCheckUtils]: 32: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,173 INFO L290 TraceCheckUtils]: 33: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,174 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11043#true} {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 16:27:01,174 INFO L290 TraceCheckUtils]: 35: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 16:27:01,174 INFO L290 TraceCheckUtils]: 36: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 16:27:01,175 INFO L290 TraceCheckUtils]: 37: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 16:27:01,175 INFO L272 TraceCheckUtils]: 38: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,175 INFO L290 TraceCheckUtils]: 39: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,175 INFO L290 TraceCheckUtils]: 40: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,175 INFO L290 TraceCheckUtils]: 41: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,175 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11043#true} {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 16:27:01,176 INFO L290 TraceCheckUtils]: 43: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 16:27:01,176 INFO L290 TraceCheckUtils]: 44: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 16:27:01,177 INFO L290 TraceCheckUtils]: 45: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 16:27:01,177 INFO L272 TraceCheckUtils]: 46: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,177 INFO L290 TraceCheckUtils]: 47: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,177 INFO L290 TraceCheckUtils]: 48: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,177 INFO L290 TraceCheckUtils]: 49: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,177 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11043#true} {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 16:27:01,178 INFO L290 TraceCheckUtils]: 51: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 16:27:01,178 INFO L290 TraceCheckUtils]: 52: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 16:27:01,179 INFO L290 TraceCheckUtils]: 53: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 16:27:01,179 INFO L272 TraceCheckUtils]: 54: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,179 INFO L290 TraceCheckUtils]: 55: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,179 INFO L290 TraceCheckUtils]: 56: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,179 INFO L290 TraceCheckUtils]: 57: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,179 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11043#true} {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 16:27:01,180 INFO L290 TraceCheckUtils]: 59: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 16:27:01,180 INFO L290 TraceCheckUtils]: 60: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 16:27:01,180 INFO L290 TraceCheckUtils]: 61: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 16:27:01,181 INFO L272 TraceCheckUtils]: 62: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,181 INFO L290 TraceCheckUtils]: 63: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,181 INFO L290 TraceCheckUtils]: 64: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,181 INFO L290 TraceCheckUtils]: 65: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,181 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11043#true} {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 16:27:01,182 INFO L290 TraceCheckUtils]: 67: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 16:27:01,182 INFO L290 TraceCheckUtils]: 68: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11302#(and (<= main_~n~0 6) (<= 6 main_~i~1))} is VALID [2022-04-27 16:27:01,182 INFO L290 TraceCheckUtils]: 69: Hoare triple {11302#(and (<= main_~n~0 6) (<= 6 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11044#false} is VALID [2022-04-27 16:27:01,183 INFO L272 TraceCheckUtils]: 70: Hoare triple {11044#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11044#false} is VALID [2022-04-27 16:27:01,183 INFO L290 TraceCheckUtils]: 71: Hoare triple {11044#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11044#false} is VALID [2022-04-27 16:27:01,183 INFO L290 TraceCheckUtils]: 72: Hoare triple {11044#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-27 16:27:01,183 INFO L290 TraceCheckUtils]: 73: Hoare triple {11044#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-27 16:27:01,183 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:27:01,183 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:27:01,540 INFO L290 TraceCheckUtils]: 73: Hoare triple {11044#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-27 16:27:01,540 INFO L290 TraceCheckUtils]: 72: Hoare triple {11044#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-27 16:27:01,540 INFO L290 TraceCheckUtils]: 71: Hoare triple {11044#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11044#false} is VALID [2022-04-27 16:27:01,540 INFO L272 TraceCheckUtils]: 70: Hoare triple {11044#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11044#false} is VALID [2022-04-27 16:27:01,541 INFO L290 TraceCheckUtils]: 69: Hoare triple {11086#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11044#false} is VALID [2022-04-27 16:27:01,541 INFO L290 TraceCheckUtils]: 68: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11086#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:27:01,542 INFO L290 TraceCheckUtils]: 67: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:01,542 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11043#true} {11081#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:01,542 INFO L290 TraceCheckUtils]: 65: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,542 INFO L290 TraceCheckUtils]: 64: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,542 INFO L290 TraceCheckUtils]: 63: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,542 INFO L272 TraceCheckUtils]: 62: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,543 INFO L290 TraceCheckUtils]: 61: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:01,543 INFO L290 TraceCheckUtils]: 60: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:27:01,543 INFO L290 TraceCheckUtils]: 59: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:01,544 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11043#true} {11076#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:01,544 INFO L290 TraceCheckUtils]: 57: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,544 INFO L290 TraceCheckUtils]: 56: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,544 INFO L290 TraceCheckUtils]: 55: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,544 INFO L272 TraceCheckUtils]: 54: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,544 INFO L290 TraceCheckUtils]: 53: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:01,545 INFO L290 TraceCheckUtils]: 52: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:27:01,545 INFO L290 TraceCheckUtils]: 51: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:01,546 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11043#true} {11071#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:01,546 INFO L290 TraceCheckUtils]: 49: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,546 INFO L290 TraceCheckUtils]: 48: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,546 INFO L290 TraceCheckUtils]: 47: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,546 INFO L272 TraceCheckUtils]: 46: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,546 INFO L290 TraceCheckUtils]: 45: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:01,547 INFO L290 TraceCheckUtils]: 44: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:27:01,547 INFO L290 TraceCheckUtils]: 43: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:01,547 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11043#true} {11066#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:01,547 INFO L290 TraceCheckUtils]: 41: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,548 INFO L290 TraceCheckUtils]: 40: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,548 INFO L290 TraceCheckUtils]: 39: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,548 INFO L272 TraceCheckUtils]: 38: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,548 INFO L290 TraceCheckUtils]: 37: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:01,548 INFO L290 TraceCheckUtils]: 36: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:27:01,549 INFO L290 TraceCheckUtils]: 35: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:01,549 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11043#true} {11061#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:01,549 INFO L290 TraceCheckUtils]: 33: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,549 INFO L290 TraceCheckUtils]: 32: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,549 INFO L290 TraceCheckUtils]: 31: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,549 INFO L272 TraceCheckUtils]: 30: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,550 INFO L290 TraceCheckUtils]: 29: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:01,550 INFO L290 TraceCheckUtils]: 28: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:27:01,550 INFO L290 TraceCheckUtils]: 27: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:27:01,551 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11043#true} {11453#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:27:01,551 INFO L290 TraceCheckUtils]: 25: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,551 INFO L290 TraceCheckUtils]: 24: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,551 INFO L290 TraceCheckUtils]: 23: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-27 16:27:01,551 INFO L272 TraceCheckUtils]: 22: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-27 16:27:01,552 INFO L290 TraceCheckUtils]: 21: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:27:01,552 INFO L290 TraceCheckUtils]: 20: Hoare triple {11055#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:27:01,555 INFO L290 TraceCheckUtils]: 19: Hoare triple {11054#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11055#(<= main_~n~0 6)} is VALID [2022-04-27 16:27:01,556 INFO L290 TraceCheckUtils]: 18: Hoare triple {11053#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11054#(<= main_~i~0 6)} is VALID [2022-04-27 16:27:01,556 INFO L290 TraceCheckUtils]: 17: Hoare triple {11053#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11053#(<= main_~i~0 5)} is VALID [2022-04-27 16:27:01,557 INFO L290 TraceCheckUtils]: 16: Hoare triple {11052#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11053#(<= main_~i~0 5)} is VALID [2022-04-27 16:27:01,557 INFO L290 TraceCheckUtils]: 15: Hoare triple {11052#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11052#(<= main_~i~0 4)} is VALID [2022-04-27 16:27:01,558 INFO L290 TraceCheckUtils]: 14: Hoare triple {11051#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11052#(<= main_~i~0 4)} is VALID [2022-04-27 16:27:01,558 INFO L290 TraceCheckUtils]: 13: Hoare triple {11051#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11051#(<= main_~i~0 3)} is VALID [2022-04-27 16:27:01,559 INFO L290 TraceCheckUtils]: 12: Hoare triple {11050#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11051#(<= main_~i~0 3)} is VALID [2022-04-27 16:27:01,559 INFO L290 TraceCheckUtils]: 11: Hoare triple {11050#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11050#(<= main_~i~0 2)} is VALID [2022-04-27 16:27:01,560 INFO L290 TraceCheckUtils]: 10: Hoare triple {11049#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11050#(<= main_~i~0 2)} is VALID [2022-04-27 16:27:01,560 INFO L290 TraceCheckUtils]: 9: Hoare triple {11049#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11049#(<= main_~i~0 1)} is VALID [2022-04-27 16:27:01,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {11109#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11049#(<= main_~i~0 1)} is VALID [2022-04-27 16:27:01,561 INFO L290 TraceCheckUtils]: 7: Hoare triple {11109#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11109#(<= main_~i~0 0)} is VALID [2022-04-27 16:27:01,562 INFO L290 TraceCheckUtils]: 6: Hoare triple {11043#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11109#(<= main_~i~0 0)} is VALID [2022-04-27 16:27:01,562 INFO L290 TraceCheckUtils]: 5: Hoare triple {11043#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11043#true} is VALID [2022-04-27 16:27:01,562 INFO L272 TraceCheckUtils]: 4: Hoare triple {11043#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,562 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,562 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,562 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-27 16:27:01,562 INFO L272 TraceCheckUtils]: 0: Hoare triple {11043#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-27 16:27:01,563 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:27:01,563 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1446644097] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:27:01,563 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:27:01,563 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 27 [2022-04-27 16:27:01,563 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736505879] [2022-04-27 16:27:01,563 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:27:01,564 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-27 16:27:01,564 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:27:01,564 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:01,633 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:27:01,633 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-27 16:27:01,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:27:01,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-27 16:27:01,634 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=543, Unknown=0, NotChecked=0, Total=702 [2022-04-27 16:27:01,634 INFO L87 Difference]: Start difference. First operand 147 states and 153 transitions. Second operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:02,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:02,449 INFO L93 Difference]: Finished difference Result 154 states and 160 transitions. [2022-04-27 16:27:02,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 16:27:02,449 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-27 16:27:02,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:27:02,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:02,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 68 transitions. [2022-04-27 16:27:02,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:02,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 68 transitions. [2022-04-27 16:27:02,452 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 68 transitions. [2022-04-27 16:27:02,519 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:27:02,521 INFO L225 Difference]: With dead ends: 154 [2022-04-27 16:27:02,521 INFO L226 Difference]: Without dead ends: 116 [2022-04-27 16:27:02,522 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 152 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 435 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=357, Invalid=1365, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 16:27:02,522 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 43 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 395 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 430 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 395 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 16:27:02,522 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 72 Invalid, 430 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 395 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 16:27:02,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-04-27 16:27:02,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-04-27 16:27:02,525 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:27:02,526 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:27:02,526 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:27:02,526 INFO L87 Difference]: Start difference. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:27:02,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:02,528 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-27 16:27:02,528 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-27 16:27:02,528 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:27:02,528 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:27:02,528 INFO L74 IsIncluded]: Start isIncluded. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-27 16:27:02,529 INFO L87 Difference]: Start difference. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-27 16:27:02,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:02,531 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-27 16:27:02,531 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-27 16:27:02,531 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:27:02,531 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:27:02,531 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:27:02,531 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:27:02,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 16:27:02,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 119 transitions. [2022-04-27 16:27:02,533 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 119 transitions. Word has length 74 [2022-04-27 16:27:02,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:27:02,533 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 119 transitions. [2022-04-27 16:27:02,533 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:02,533 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-27 16:27:02,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-27 16:27:02,534 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:27:02,534 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:27:02,559 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-27 16:27:02,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:27:02,747 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:27:02,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:27:02,748 INFO L85 PathProgramCache]: Analyzing trace with hash -578078115, now seen corresponding path program 17 times [2022-04-27 16:27:02,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:27:02,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021940924] [2022-04-27 16:27:02,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:27:02,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:27:02,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,064 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:27:03,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,068 INFO L290 TraceCheckUtils]: 0: Hoare triple {12120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-27 16:27:03,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,069 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,069 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 16:27:03,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,073 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,074 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:03,074 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 16:27:03,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,084 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,085 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:03,085 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 16:27:03,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,089 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,089 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,089 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:03,090 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 16:27:03,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,094 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,094 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,094 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,095 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:03,095 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-27 16:27:03,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,101 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,101 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,102 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:03,102 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-27 16:27:03,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,106 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,107 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:03,108 INFO L272 TraceCheckUtils]: 0: Hoare triple {12072#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:27:03,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {12120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-27 16:27:03,108 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,108 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,108 INFO L272 TraceCheckUtils]: 4: Hoare triple {12072#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,108 INFO L290 TraceCheckUtils]: 5: Hoare triple {12072#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12072#true} is VALID [2022-04-27 16:27:03,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {12072#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12077#(= main_~i~0 0)} is VALID [2022-04-27 16:27:03,109 INFO L290 TraceCheckUtils]: 7: Hoare triple {12077#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12077#(= main_~i~0 0)} is VALID [2022-04-27 16:27:03,109 INFO L290 TraceCheckUtils]: 8: Hoare triple {12077#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:27:03,110 INFO L290 TraceCheckUtils]: 9: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:27:03,110 INFO L290 TraceCheckUtils]: 10: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:27:03,111 INFO L290 TraceCheckUtils]: 11: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:27:03,111 INFO L290 TraceCheckUtils]: 12: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:27:03,112 INFO L290 TraceCheckUtils]: 13: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:27:03,112 INFO L290 TraceCheckUtils]: 14: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:27:03,113 INFO L290 TraceCheckUtils]: 15: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:27:03,113 INFO L290 TraceCheckUtils]: 16: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:27:03,113 INFO L290 TraceCheckUtils]: 17: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:27:03,114 INFO L290 TraceCheckUtils]: 18: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:27:03,115 INFO L290 TraceCheckUtils]: 19: Hoare triple {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:27:03,115 INFO L290 TraceCheckUtils]: 20: Hoare triple {12084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:03,116 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:03,116 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:03,116 INFO L290 TraceCheckUtils]: 23: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:03,117 INFO L272 TraceCheckUtils]: 24: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:03,117 INFO L290 TraceCheckUtils]: 25: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,117 INFO L290 TraceCheckUtils]: 26: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,117 INFO L290 TraceCheckUtils]: 27: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,118 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12072#true} {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:03,118 INFO L290 TraceCheckUtils]: 29: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:03,118 INFO L290 TraceCheckUtils]: 30: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:03,119 INFO L290 TraceCheckUtils]: 31: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:03,119 INFO L272 TraceCheckUtils]: 32: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:03,119 INFO L290 TraceCheckUtils]: 33: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,119 INFO L290 TraceCheckUtils]: 34: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,119 INFO L290 TraceCheckUtils]: 35: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,120 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12072#true} {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:03,120 INFO L290 TraceCheckUtils]: 37: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:03,121 INFO L290 TraceCheckUtils]: 38: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:03,121 INFO L290 TraceCheckUtils]: 39: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:03,122 INFO L272 TraceCheckUtils]: 40: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:03,122 INFO L290 TraceCheckUtils]: 41: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,122 INFO L290 TraceCheckUtils]: 42: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,122 INFO L290 TraceCheckUtils]: 43: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,123 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12072#true} {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:03,123 INFO L290 TraceCheckUtils]: 45: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:03,124 INFO L290 TraceCheckUtils]: 46: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:03,124 INFO L290 TraceCheckUtils]: 47: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:03,125 INFO L272 TraceCheckUtils]: 48: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:03,125 INFO L290 TraceCheckUtils]: 49: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,125 INFO L290 TraceCheckUtils]: 50: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,125 INFO L290 TraceCheckUtils]: 51: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,126 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12072#true} {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:03,126 INFO L290 TraceCheckUtils]: 53: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:03,127 INFO L290 TraceCheckUtils]: 54: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:03,127 INFO L290 TraceCheckUtils]: 55: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:03,127 INFO L272 TraceCheckUtils]: 56: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:03,127 INFO L290 TraceCheckUtils]: 57: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,128 INFO L290 TraceCheckUtils]: 58: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,128 INFO L290 TraceCheckUtils]: 59: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,128 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12072#true} {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:03,129 INFO L290 TraceCheckUtils]: 61: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:03,130 INFO L290 TraceCheckUtils]: 62: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:03,130 INFO L290 TraceCheckUtils]: 63: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:03,130 INFO L272 TraceCheckUtils]: 64: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:03,130 INFO L290 TraceCheckUtils]: 65: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:03,130 INFO L290 TraceCheckUtils]: 66: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,131 INFO L290 TraceCheckUtils]: 67: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:03,131 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12072#true} {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:03,132 INFO L290 TraceCheckUtils]: 69: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:03,133 INFO L290 TraceCheckUtils]: 70: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:03,133 INFO L290 TraceCheckUtils]: 71: Hoare triple {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12117#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:27:03,134 INFO L272 TraceCheckUtils]: 72: Hoare triple {12117#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12118#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:27:03,134 INFO L290 TraceCheckUtils]: 73: Hoare triple {12118#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12119#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:27:03,134 INFO L290 TraceCheckUtils]: 74: Hoare triple {12119#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-27 16:27:03,135 INFO L290 TraceCheckUtils]: 75: Hoare triple {12073#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-27 16:27:03,135 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:27:03,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:27:03,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021940924] [2022-04-27 16:27:03,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2021940924] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:27:03,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1716696354] [2022-04-27 16:27:03,136 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 16:27:03,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:27:03,136 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:27:03,140 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:27:03,157 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 16:27:03,229 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-04-27 16:27:03,230 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:27:03,232 INFO L263 TraceCheckSpWp]: Trace formula consists of 213 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-27 16:27:03,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:27:03,248 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:27:03,381 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:27:55,355 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:27:55,410 INFO L272 TraceCheckUtils]: 0: Hoare triple {12072#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:55,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-27 16:27:55,411 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:55,411 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:55,411 INFO L272 TraceCheckUtils]: 4: Hoare triple {12072#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:55,411 INFO L290 TraceCheckUtils]: 5: Hoare triple {12072#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12072#true} is VALID [2022-04-27 16:27:55,411 INFO L290 TraceCheckUtils]: 6: Hoare triple {12072#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12077#(= main_~i~0 0)} is VALID [2022-04-27 16:27:55,412 INFO L290 TraceCheckUtils]: 7: Hoare triple {12077#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12077#(= main_~i~0 0)} is VALID [2022-04-27 16:27:55,412 INFO L290 TraceCheckUtils]: 8: Hoare triple {12077#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:27:55,412 INFO L290 TraceCheckUtils]: 9: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:27:55,413 INFO L290 TraceCheckUtils]: 10: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:27:55,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:27:55,414 INFO L290 TraceCheckUtils]: 12: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:27:55,414 INFO L290 TraceCheckUtils]: 13: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:27:55,414 INFO L290 TraceCheckUtils]: 14: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:27:55,415 INFO L290 TraceCheckUtils]: 15: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:27:55,415 INFO L290 TraceCheckUtils]: 16: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:27:55,416 INFO L290 TraceCheckUtils]: 17: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:27:55,416 INFO L290 TraceCheckUtils]: 18: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:27:55,417 INFO L290 TraceCheckUtils]: 19: Hoare triple {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:55,417 INFO L290 TraceCheckUtils]: 20: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:55,417 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:55,418 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,418 INFO L290 TraceCheckUtils]: 23: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,419 INFO L272 TraceCheckUtils]: 24: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,419 INFO L290 TraceCheckUtils]: 25: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,419 INFO L290 TraceCheckUtils]: 26: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,421 INFO L290 TraceCheckUtils]: 27: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,421 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,422 INFO L290 TraceCheckUtils]: 29: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,422 INFO L290 TraceCheckUtils]: 30: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,422 INFO L290 TraceCheckUtils]: 31: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,423 INFO L272 TraceCheckUtils]: 32: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,423 INFO L290 TraceCheckUtils]: 33: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,424 INFO L290 TraceCheckUtils]: 34: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,424 INFO L290 TraceCheckUtils]: 35: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,425 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,425 INFO L290 TraceCheckUtils]: 37: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,425 INFO L290 TraceCheckUtils]: 38: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,426 INFO L290 TraceCheckUtils]: 39: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,426 INFO L272 TraceCheckUtils]: 40: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,427 INFO L290 TraceCheckUtils]: 41: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,427 INFO L290 TraceCheckUtils]: 42: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,427 INFO L290 TraceCheckUtils]: 43: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,428 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,428 INFO L290 TraceCheckUtils]: 45: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,429 INFO L290 TraceCheckUtils]: 46: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,429 INFO L290 TraceCheckUtils]: 47: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,430 INFO L272 TraceCheckUtils]: 48: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,430 INFO L290 TraceCheckUtils]: 49: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,430 INFO L290 TraceCheckUtils]: 50: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,431 INFO L290 TraceCheckUtils]: 51: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,431 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,432 INFO L290 TraceCheckUtils]: 53: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,432 INFO L290 TraceCheckUtils]: 54: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,432 INFO L290 TraceCheckUtils]: 55: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,433 INFO L272 TraceCheckUtils]: 56: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,433 INFO L290 TraceCheckUtils]: 57: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,434 INFO L290 TraceCheckUtils]: 58: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,434 INFO L290 TraceCheckUtils]: 59: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,435 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,435 INFO L290 TraceCheckUtils]: 61: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,435 INFO L290 TraceCheckUtils]: 62: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,436 INFO L290 TraceCheckUtils]: 63: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,436 INFO L272 TraceCheckUtils]: 64: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,437 INFO L290 TraceCheckUtils]: 65: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,437 INFO L290 TraceCheckUtils]: 66: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,437 INFO L290 TraceCheckUtils]: 67: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-27 16:27:55,438 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,438 INFO L290 TraceCheckUtils]: 69: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,439 INFO L290 TraceCheckUtils]: 70: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12340#(and (= (+ (- 2) main_~i~1) 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 16:27:55,439 INFO L290 TraceCheckUtils]: 71: Hoare triple {12340#(and (= (+ (- 2) main_~i~1) 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12117#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:27:55,439 INFO L272 TraceCheckUtils]: 72: Hoare triple {12117#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:27:55,440 INFO L290 TraceCheckUtils]: 73: Hoare triple {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12351#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:27:55,440 INFO L290 TraceCheckUtils]: 74: Hoare triple {12351#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-27 16:27:55,440 INFO L290 TraceCheckUtils]: 75: Hoare triple {12073#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-27 16:27:55,441 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 133 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:27:55,441 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:27:57,719 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:27:57,723 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:27:57,827 INFO L290 TraceCheckUtils]: 75: Hoare triple {12073#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-27 16:27:57,828 INFO L290 TraceCheckUtils]: 74: Hoare triple {12351#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-27 16:27:57,828 INFO L290 TraceCheckUtils]: 73: Hoare triple {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12351#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:27:57,828 INFO L272 TraceCheckUtils]: 72: Hoare triple {12117#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:27:57,829 INFO L290 TraceCheckUtils]: 71: Hoare triple {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12117#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:27:57,829 INFO L290 TraceCheckUtils]: 70: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:57,830 INFO L290 TraceCheckUtils]: 69: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:57,830 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12072#true} {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:57,830 INFO L290 TraceCheckUtils]: 67: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,830 INFO L290 TraceCheckUtils]: 66: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,831 INFO L290 TraceCheckUtils]: 65: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:57,831 INFO L272 TraceCheckUtils]: 64: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:57,831 INFO L290 TraceCheckUtils]: 63: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:57,832 INFO L290 TraceCheckUtils]: 62: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:27:57,832 INFO L290 TraceCheckUtils]: 61: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:57,832 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12072#true} {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:57,832 INFO L290 TraceCheckUtils]: 59: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,833 INFO L290 TraceCheckUtils]: 58: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,833 INFO L290 TraceCheckUtils]: 57: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:57,833 INFO L272 TraceCheckUtils]: 56: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:57,833 INFO L290 TraceCheckUtils]: 55: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:57,834 INFO L290 TraceCheckUtils]: 54: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:27:57,834 INFO L290 TraceCheckUtils]: 53: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:57,834 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12072#true} {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:57,835 INFO L290 TraceCheckUtils]: 51: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,835 INFO L290 TraceCheckUtils]: 50: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,835 INFO L290 TraceCheckUtils]: 49: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:57,835 INFO L272 TraceCheckUtils]: 48: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:57,835 INFO L290 TraceCheckUtils]: 47: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:57,836 INFO L290 TraceCheckUtils]: 46: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:27:57,836 INFO L290 TraceCheckUtils]: 45: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:57,836 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12072#true} {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:57,837 INFO L290 TraceCheckUtils]: 43: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,837 INFO L290 TraceCheckUtils]: 42: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,837 INFO L290 TraceCheckUtils]: 41: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:57,837 INFO L272 TraceCheckUtils]: 40: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:57,837 INFO L290 TraceCheckUtils]: 39: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:57,838 INFO L290 TraceCheckUtils]: 38: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:27:57,838 INFO L290 TraceCheckUtils]: 37: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:57,839 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12072#true} {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:57,839 INFO L290 TraceCheckUtils]: 35: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,839 INFO L290 TraceCheckUtils]: 34: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,839 INFO L290 TraceCheckUtils]: 33: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:57,839 INFO L272 TraceCheckUtils]: 32: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:57,839 INFO L290 TraceCheckUtils]: 31: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:57,840 INFO L290 TraceCheckUtils]: 30: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:27:57,840 INFO L290 TraceCheckUtils]: 29: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:27:57,841 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12072#true} {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:27:57,841 INFO L290 TraceCheckUtils]: 27: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,841 INFO L290 TraceCheckUtils]: 26: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,841 INFO L290 TraceCheckUtils]: 25: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-27 16:27:57,841 INFO L272 TraceCheckUtils]: 24: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-27 16:27:57,841 INFO L290 TraceCheckUtils]: 23: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:27:57,842 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:27:57,842 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:57,842 INFO L290 TraceCheckUtils]: 20: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:57,843 INFO L290 TraceCheckUtils]: 19: Hoare triple {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 16:27:57,843 INFO L290 TraceCheckUtils]: 18: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:27:57,843 INFO L290 TraceCheckUtils]: 17: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:27:57,844 INFO L290 TraceCheckUtils]: 16: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:27:57,844 INFO L290 TraceCheckUtils]: 15: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:27:57,845 INFO L290 TraceCheckUtils]: 14: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:27:57,845 INFO L290 TraceCheckUtils]: 13: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:27:57,846 INFO L290 TraceCheckUtils]: 12: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:27:57,846 INFO L290 TraceCheckUtils]: 11: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:27:57,846 INFO L290 TraceCheckUtils]: 10: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:27:57,847 INFO L290 TraceCheckUtils]: 9: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:27:57,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {12077#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:27:57,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {12077#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12077#(= main_~i~0 0)} is VALID [2022-04-27 16:27:57,848 INFO L290 TraceCheckUtils]: 6: Hoare triple {12072#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12077#(= main_~i~0 0)} is VALID [2022-04-27 16:27:57,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {12072#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12072#true} is VALID [2022-04-27 16:27:57,848 INFO L272 TraceCheckUtils]: 4: Hoare triple {12072#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,848 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-27 16:27:57,848 INFO L272 TraceCheckUtils]: 0: Hoare triple {12072#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-27 16:27:57,848 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 16:27:57,849 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1716696354] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:27:57,849 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:27:57,849 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 20] total 32 [2022-04-27 16:27:57,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956562333] [2022-04-27 16:27:57,849 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:27:57,849 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-27 16:27:57,850 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:27:57,850 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 16:27:57,958 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:27:57,958 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 16:27:57,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:27:57,958 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 16:27:57,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=897, Unknown=7, NotChecked=0, Total=992 [2022-04-27 16:27:57,959 INFO L87 Difference]: Start difference. First operand 116 states and 119 transitions. Second operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 16:27:59,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:59,684 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-27 16:27:59,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-27 16:27:59,685 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-27 16:27:59,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:27:59,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 16:27:59,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-27 16:27:59,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 16:27:59,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-27 16:27:59,695 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 77 transitions. [2022-04-27 16:27:59,778 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:27:59,780 INFO L225 Difference]: With dead ends: 126 [2022-04-27 16:27:59,780 INFO L226 Difference]: Without dead ends: 126 [2022-04-27 16:27:59,781 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 208 GetRequests, 141 SyntacticMatches, 16 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 588 ImplicationChecksByTransitivity, 53.8s TimeCoverageRelationStatistics Valid=228, Invalid=2521, Unknown=7, NotChecked=0, Total=2756 [2022-04-27 16:27:59,781 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 66 mSDsluCounter, 200 mSDsCounter, 0 mSdLazyCounter, 940 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 1073 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 940 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 88 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 16:27:59,781 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 229 Invalid, 1073 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 940 Invalid, 0 Unknown, 88 Unchecked, 0.7s Time] [2022-04-27 16:27:59,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-04-27 16:27:59,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2022-04-27 16:27:59,784 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:27:59,784 INFO L82 GeneralOperation]: Start isEquivalent. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:59,785 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:59,785 INFO L87 Difference]: Start difference. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:59,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:59,790 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-27 16:27:59,790 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2022-04-27 16:27:59,791 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:27:59,791 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:27:59,791 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) Second operand 126 states. [2022-04-27 16:27:59,792 INFO L87 Difference]: Start difference. First operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) Second operand 126 states. [2022-04-27 16:27:59,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:27:59,795 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-27 16:27:59,795 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2022-04-27 16:27:59,795 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:27:59,795 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:27:59,795 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:27:59,795 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:27:59,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 16:27:59,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 127 transitions. [2022-04-27 16:27:59,800 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 127 transitions. Word has length 76 [2022-04-27 16:27:59,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:27:59,800 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 127 transitions. [2022-04-27 16:27:59,801 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 16:27:59,801 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 127 transitions. [2022-04-27 16:27:59,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-04-27 16:27:59,801 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:27:59,801 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:27:59,827 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-27 16:28:00,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:28:00,023 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:28:00,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:28:00,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1454537293, now seen corresponding path program 18 times [2022-04-27 16:28:00,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:28:00,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555250374] [2022-04-27 16:28:00,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:28:00,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:28:00,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,231 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:28:00,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,234 INFO L290 TraceCheckUtils]: 0: Hoare triple {13181#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-27 16:28:00,234 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,234 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,235 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 16:28:00,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,239 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,240 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 16:28:00,240 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 16:28:00,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,243 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,243 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13150#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:00,244 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 16:28:00,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,249 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,250 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13155#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:00,250 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 16:28:00,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,254 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13160#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:00,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-27 16:28:00,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,259 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,259 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,259 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,260 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13165#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:00,260 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-27 16:28:00,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,263 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,263 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,264 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13170#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:00,264 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2022-04-27 16:28:00,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,271 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,271 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,272 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13175#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:00,272 INFO L272 TraceCheckUtils]: 0: Hoare triple {13131#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13181#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:28:00,272 INFO L290 TraceCheckUtils]: 1: Hoare triple {13181#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-27 16:28:00,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,273 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,273 INFO L272 TraceCheckUtils]: 4: Hoare triple {13131#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,273 INFO L290 TraceCheckUtils]: 5: Hoare triple {13131#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {13131#true} is VALID [2022-04-27 16:28:00,273 INFO L290 TraceCheckUtils]: 6: Hoare triple {13131#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {13136#(= main_~i~0 0)} is VALID [2022-04-27 16:28:00,273 INFO L290 TraceCheckUtils]: 7: Hoare triple {13136#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13136#(= main_~i~0 0)} is VALID [2022-04-27 16:28:00,274 INFO L290 TraceCheckUtils]: 8: Hoare triple {13136#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13137#(<= main_~i~0 1)} is VALID [2022-04-27 16:28:00,274 INFO L290 TraceCheckUtils]: 9: Hoare triple {13137#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13137#(<= main_~i~0 1)} is VALID [2022-04-27 16:28:00,275 INFO L290 TraceCheckUtils]: 10: Hoare triple {13137#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13138#(<= main_~i~0 2)} is VALID [2022-04-27 16:28:00,275 INFO L290 TraceCheckUtils]: 11: Hoare triple {13138#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13138#(<= main_~i~0 2)} is VALID [2022-04-27 16:28:00,276 INFO L290 TraceCheckUtils]: 12: Hoare triple {13138#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13139#(<= main_~i~0 3)} is VALID [2022-04-27 16:28:00,276 INFO L290 TraceCheckUtils]: 13: Hoare triple {13139#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13139#(<= main_~i~0 3)} is VALID [2022-04-27 16:28:00,276 INFO L290 TraceCheckUtils]: 14: Hoare triple {13139#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13140#(<= main_~i~0 4)} is VALID [2022-04-27 16:28:00,277 INFO L290 TraceCheckUtils]: 15: Hoare triple {13140#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13140#(<= main_~i~0 4)} is VALID [2022-04-27 16:28:00,277 INFO L290 TraceCheckUtils]: 16: Hoare triple {13140#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13141#(<= main_~i~0 5)} is VALID [2022-04-27 16:28:00,277 INFO L290 TraceCheckUtils]: 17: Hoare triple {13141#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13141#(<= main_~i~0 5)} is VALID [2022-04-27 16:28:00,278 INFO L290 TraceCheckUtils]: 18: Hoare triple {13141#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13142#(<= main_~i~0 6)} is VALID [2022-04-27 16:28:00,278 INFO L290 TraceCheckUtils]: 19: Hoare triple {13142#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13142#(<= main_~i~0 6)} is VALID [2022-04-27 16:28:00,279 INFO L290 TraceCheckUtils]: 20: Hoare triple {13142#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13143#(<= main_~i~0 7)} is VALID [2022-04-27 16:28:00,279 INFO L290 TraceCheckUtils]: 21: Hoare triple {13143#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {13144#(<= main_~n~0 7)} is VALID [2022-04-27 16:28:00,280 INFO L290 TraceCheckUtils]: 22: Hoare triple {13144#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 16:28:00,280 INFO L290 TraceCheckUtils]: 23: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 16:28:00,280 INFO L272 TraceCheckUtils]: 24: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,280 INFO L290 TraceCheckUtils]: 25: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,280 INFO L290 TraceCheckUtils]: 26: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,280 INFO L290 TraceCheckUtils]: 27: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,281 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13131#true} {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 16:28:00,281 INFO L290 TraceCheckUtils]: 29: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 16:28:00,282 INFO L290 TraceCheckUtils]: 30: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:00,282 INFO L290 TraceCheckUtils]: 31: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:00,282 INFO L272 TraceCheckUtils]: 32: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,282 INFO L290 TraceCheckUtils]: 33: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,282 INFO L290 TraceCheckUtils]: 34: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,282 INFO L290 TraceCheckUtils]: 35: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,283 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13131#true} {13150#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:00,283 INFO L290 TraceCheckUtils]: 37: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:00,284 INFO L290 TraceCheckUtils]: 38: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:00,284 INFO L290 TraceCheckUtils]: 39: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:00,284 INFO L272 TraceCheckUtils]: 40: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,284 INFO L290 TraceCheckUtils]: 41: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,284 INFO L290 TraceCheckUtils]: 42: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,285 INFO L290 TraceCheckUtils]: 43: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,285 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13131#true} {13155#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:00,285 INFO L290 TraceCheckUtils]: 45: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:00,286 INFO L290 TraceCheckUtils]: 46: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:00,286 INFO L290 TraceCheckUtils]: 47: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:00,286 INFO L272 TraceCheckUtils]: 48: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,286 INFO L290 TraceCheckUtils]: 49: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,286 INFO L290 TraceCheckUtils]: 50: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,287 INFO L290 TraceCheckUtils]: 51: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,287 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13131#true} {13160#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:00,287 INFO L290 TraceCheckUtils]: 53: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:00,288 INFO L290 TraceCheckUtils]: 54: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:00,288 INFO L290 TraceCheckUtils]: 55: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:00,288 INFO L272 TraceCheckUtils]: 56: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,289 INFO L290 TraceCheckUtils]: 57: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,289 INFO L290 TraceCheckUtils]: 58: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,289 INFO L290 TraceCheckUtils]: 59: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,289 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13131#true} {13165#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:00,290 INFO L290 TraceCheckUtils]: 61: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:00,290 INFO L290 TraceCheckUtils]: 62: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:00,290 INFO L290 TraceCheckUtils]: 63: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:00,291 INFO L272 TraceCheckUtils]: 64: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,291 INFO L290 TraceCheckUtils]: 65: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,291 INFO L290 TraceCheckUtils]: 66: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,291 INFO L290 TraceCheckUtils]: 67: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,291 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13131#true} {13170#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:00,292 INFO L290 TraceCheckUtils]: 69: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:00,292 INFO L290 TraceCheckUtils]: 70: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:00,292 INFO L290 TraceCheckUtils]: 71: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:00,293 INFO L272 TraceCheckUtils]: 72: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:00,293 INFO L290 TraceCheckUtils]: 73: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:00,293 INFO L290 TraceCheckUtils]: 74: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,293 INFO L290 TraceCheckUtils]: 75: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,293 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {13131#true} {13175#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:00,294 INFO L290 TraceCheckUtils]: 77: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:00,294 INFO L290 TraceCheckUtils]: 78: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13180#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:28:00,295 INFO L290 TraceCheckUtils]: 79: Hoare triple {13180#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13132#false} is VALID [2022-04-27 16:28:00,295 INFO L272 TraceCheckUtils]: 80: Hoare triple {13132#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13132#false} is VALID [2022-04-27 16:28:00,295 INFO L290 TraceCheckUtils]: 81: Hoare triple {13132#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13132#false} is VALID [2022-04-27 16:28:00,295 INFO L290 TraceCheckUtils]: 82: Hoare triple {13132#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-27 16:28:00,295 INFO L290 TraceCheckUtils]: 83: Hoare triple {13132#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-27 16:28:00,295 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 87 proven. 74 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:28:00,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:28:00,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555250374] [2022-04-27 16:28:00,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [555250374] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:28:00,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [592356475] [2022-04-27 16:28:00,296 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 16:28:00,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:28:00,296 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:28:00,297 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:28:00,301 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 16:28:00,402 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-27 16:28:00,403 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:28:00,404 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 16:28:00,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:00,422 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:28:00,998 INFO L272 TraceCheckUtils]: 0: Hoare triple {13131#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,998 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-27 16:28:00,998 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,998 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,998 INFO L272 TraceCheckUtils]: 4: Hoare triple {13131#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:00,998 INFO L290 TraceCheckUtils]: 5: Hoare triple {13131#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {13131#true} is VALID [2022-04-27 16:28:00,999 INFO L290 TraceCheckUtils]: 6: Hoare triple {13131#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {13203#(<= main_~i~0 0)} is VALID [2022-04-27 16:28:00,999 INFO L290 TraceCheckUtils]: 7: Hoare triple {13203#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13203#(<= main_~i~0 0)} is VALID [2022-04-27 16:28:01,000 INFO L290 TraceCheckUtils]: 8: Hoare triple {13203#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13137#(<= main_~i~0 1)} is VALID [2022-04-27 16:28:01,000 INFO L290 TraceCheckUtils]: 9: Hoare triple {13137#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13137#(<= main_~i~0 1)} is VALID [2022-04-27 16:28:01,000 INFO L290 TraceCheckUtils]: 10: Hoare triple {13137#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13138#(<= main_~i~0 2)} is VALID [2022-04-27 16:28:01,001 INFO L290 TraceCheckUtils]: 11: Hoare triple {13138#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13138#(<= main_~i~0 2)} is VALID [2022-04-27 16:28:01,001 INFO L290 TraceCheckUtils]: 12: Hoare triple {13138#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13139#(<= main_~i~0 3)} is VALID [2022-04-27 16:28:01,001 INFO L290 TraceCheckUtils]: 13: Hoare triple {13139#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13139#(<= main_~i~0 3)} is VALID [2022-04-27 16:28:01,002 INFO L290 TraceCheckUtils]: 14: Hoare triple {13139#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13140#(<= main_~i~0 4)} is VALID [2022-04-27 16:28:01,002 INFO L290 TraceCheckUtils]: 15: Hoare triple {13140#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13140#(<= main_~i~0 4)} is VALID [2022-04-27 16:28:01,003 INFO L290 TraceCheckUtils]: 16: Hoare triple {13140#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13141#(<= main_~i~0 5)} is VALID [2022-04-27 16:28:01,003 INFO L290 TraceCheckUtils]: 17: Hoare triple {13141#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13141#(<= main_~i~0 5)} is VALID [2022-04-27 16:28:01,003 INFO L290 TraceCheckUtils]: 18: Hoare triple {13141#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13142#(<= main_~i~0 6)} is VALID [2022-04-27 16:28:01,004 INFO L290 TraceCheckUtils]: 19: Hoare triple {13142#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13142#(<= main_~i~0 6)} is VALID [2022-04-27 16:28:01,004 INFO L290 TraceCheckUtils]: 20: Hoare triple {13142#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13143#(<= main_~i~0 7)} is VALID [2022-04-27 16:28:01,004 INFO L290 TraceCheckUtils]: 21: Hoare triple {13143#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {13144#(<= main_~n~0 7)} is VALID [2022-04-27 16:28:01,005 INFO L290 TraceCheckUtils]: 22: Hoare triple {13144#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,005 INFO L290 TraceCheckUtils]: 23: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,005 INFO L272 TraceCheckUtils]: 24: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,005 INFO L290 TraceCheckUtils]: 25: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,005 INFO L290 TraceCheckUtils]: 26: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,005 INFO L290 TraceCheckUtils]: 27: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,006 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13131#true} {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,006 INFO L290 TraceCheckUtils]: 29: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,007 INFO L290 TraceCheckUtils]: 30: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,007 INFO L290 TraceCheckUtils]: 31: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,007 INFO L272 TraceCheckUtils]: 32: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,007 INFO L290 TraceCheckUtils]: 33: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,007 INFO L290 TraceCheckUtils]: 34: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,007 INFO L290 TraceCheckUtils]: 35: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,008 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13131#true} {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,008 INFO L290 TraceCheckUtils]: 37: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,009 INFO L290 TraceCheckUtils]: 38: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 16:28:01,009 INFO L290 TraceCheckUtils]: 39: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 16:28:01,009 INFO L272 TraceCheckUtils]: 40: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,009 INFO L290 TraceCheckUtils]: 41: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,009 INFO L290 TraceCheckUtils]: 42: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,009 INFO L290 TraceCheckUtils]: 43: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,010 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13131#true} {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 16:28:01,010 INFO L290 TraceCheckUtils]: 45: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 16:28:01,010 INFO L290 TraceCheckUtils]: 46: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 16:28:01,011 INFO L290 TraceCheckUtils]: 47: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 16:28:01,011 INFO L272 TraceCheckUtils]: 48: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,011 INFO L290 TraceCheckUtils]: 49: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,011 INFO L290 TraceCheckUtils]: 50: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,011 INFO L290 TraceCheckUtils]: 51: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,012 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13131#true} {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 16:28:01,012 INFO L290 TraceCheckUtils]: 53: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 16:28:01,012 INFO L290 TraceCheckUtils]: 54: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 16:28:01,013 INFO L290 TraceCheckUtils]: 55: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 16:28:01,013 INFO L272 TraceCheckUtils]: 56: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,013 INFO L290 TraceCheckUtils]: 57: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,013 INFO L290 TraceCheckUtils]: 58: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,013 INFO L290 TraceCheckUtils]: 59: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,014 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13131#true} {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 16:28:01,014 INFO L290 TraceCheckUtils]: 61: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 16:28:01,014 INFO L290 TraceCheckUtils]: 62: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,015 INFO L290 TraceCheckUtils]: 63: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,015 INFO L272 TraceCheckUtils]: 64: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,015 INFO L290 TraceCheckUtils]: 65: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,015 INFO L290 TraceCheckUtils]: 66: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,015 INFO L290 TraceCheckUtils]: 67: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,016 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13131#true} {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,016 INFO L290 TraceCheckUtils]: 69: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,016 INFO L290 TraceCheckUtils]: 70: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,017 INFO L290 TraceCheckUtils]: 71: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,017 INFO L272 TraceCheckUtils]: 72: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,017 INFO L290 TraceCheckUtils]: 73: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,017 INFO L290 TraceCheckUtils]: 74: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,017 INFO L290 TraceCheckUtils]: 75: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,017 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {13131#true} {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,018 INFO L290 TraceCheckUtils]: 77: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,018 INFO L290 TraceCheckUtils]: 78: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13427#(and (<= 7 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 16:28:01,019 INFO L290 TraceCheckUtils]: 79: Hoare triple {13427#(and (<= 7 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13132#false} is VALID [2022-04-27 16:28:01,019 INFO L272 TraceCheckUtils]: 80: Hoare triple {13132#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13132#false} is VALID [2022-04-27 16:28:01,019 INFO L290 TraceCheckUtils]: 81: Hoare triple {13132#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13132#false} is VALID [2022-04-27 16:28:01,019 INFO L290 TraceCheckUtils]: 82: Hoare triple {13132#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-27 16:28:01,019 INFO L290 TraceCheckUtils]: 83: Hoare triple {13132#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-27 16:28:01,019 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:28:01,019 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:28:01,389 INFO L290 TraceCheckUtils]: 83: Hoare triple {13132#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-27 16:28:01,389 INFO L290 TraceCheckUtils]: 82: Hoare triple {13132#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-27 16:28:01,389 INFO L290 TraceCheckUtils]: 81: Hoare triple {13132#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13132#false} is VALID [2022-04-27 16:28:01,389 INFO L272 TraceCheckUtils]: 80: Hoare triple {13132#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13132#false} is VALID [2022-04-27 16:28:01,390 INFO L290 TraceCheckUtils]: 79: Hoare triple {13180#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13132#false} is VALID [2022-04-27 16:28:01,390 INFO L290 TraceCheckUtils]: 78: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13180#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:28:01,391 INFO L290 TraceCheckUtils]: 77: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:01,391 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {13131#true} {13175#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:01,391 INFO L290 TraceCheckUtils]: 75: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,391 INFO L290 TraceCheckUtils]: 74: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,391 INFO L290 TraceCheckUtils]: 73: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,391 INFO L272 TraceCheckUtils]: 72: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,392 INFO L290 TraceCheckUtils]: 71: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:01,392 INFO L290 TraceCheckUtils]: 70: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:28:01,392 INFO L290 TraceCheckUtils]: 69: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:01,393 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13131#true} {13170#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:01,393 INFO L290 TraceCheckUtils]: 67: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,393 INFO L290 TraceCheckUtils]: 66: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,393 INFO L290 TraceCheckUtils]: 65: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,393 INFO L272 TraceCheckUtils]: 64: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,393 INFO L290 TraceCheckUtils]: 63: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:01,394 INFO L290 TraceCheckUtils]: 62: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:28:01,394 INFO L290 TraceCheckUtils]: 61: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:01,395 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13131#true} {13165#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:01,395 INFO L290 TraceCheckUtils]: 59: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,395 INFO L290 TraceCheckUtils]: 58: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,395 INFO L290 TraceCheckUtils]: 57: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,395 INFO L272 TraceCheckUtils]: 56: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,395 INFO L290 TraceCheckUtils]: 55: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:01,396 INFO L290 TraceCheckUtils]: 54: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:28:01,396 INFO L290 TraceCheckUtils]: 53: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:01,396 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13131#true} {13160#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:01,396 INFO L290 TraceCheckUtils]: 51: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,396 INFO L290 TraceCheckUtils]: 50: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,397 INFO L290 TraceCheckUtils]: 49: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,397 INFO L272 TraceCheckUtils]: 48: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,397 INFO L290 TraceCheckUtils]: 47: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:01,397 INFO L290 TraceCheckUtils]: 46: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:28:01,398 INFO L290 TraceCheckUtils]: 45: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:01,398 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13131#true} {13155#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:01,398 INFO L290 TraceCheckUtils]: 43: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,398 INFO L290 TraceCheckUtils]: 42: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,398 INFO L290 TraceCheckUtils]: 41: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,398 INFO L272 TraceCheckUtils]: 40: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,399 INFO L290 TraceCheckUtils]: 39: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:01,399 INFO L290 TraceCheckUtils]: 38: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:28:01,399 INFO L290 TraceCheckUtils]: 37: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:01,400 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13131#true} {13150#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:01,400 INFO L290 TraceCheckUtils]: 35: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,400 INFO L290 TraceCheckUtils]: 34: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,400 INFO L290 TraceCheckUtils]: 33: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,400 INFO L272 TraceCheckUtils]: 32: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,400 INFO L290 TraceCheckUtils]: 31: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:01,401 INFO L290 TraceCheckUtils]: 30: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:28:01,401 INFO L290 TraceCheckUtils]: 29: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:28:01,401 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13131#true} {13602#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:28:01,402 INFO L290 TraceCheckUtils]: 27: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,402 INFO L290 TraceCheckUtils]: 26: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,402 INFO L290 TraceCheckUtils]: 25: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-27 16:28:01,402 INFO L272 TraceCheckUtils]: 24: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-27 16:28:01,402 INFO L290 TraceCheckUtils]: 23: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:28:01,402 INFO L290 TraceCheckUtils]: 22: Hoare triple {13144#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:28:01,403 INFO L290 TraceCheckUtils]: 21: Hoare triple {13143#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {13144#(<= main_~n~0 7)} is VALID [2022-04-27 16:28:01,403 INFO L290 TraceCheckUtils]: 20: Hoare triple {13142#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13143#(<= main_~i~0 7)} is VALID [2022-04-27 16:28:01,403 INFO L290 TraceCheckUtils]: 19: Hoare triple {13142#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13142#(<= main_~i~0 6)} is VALID [2022-04-27 16:28:01,404 INFO L290 TraceCheckUtils]: 18: Hoare triple {13141#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13142#(<= main_~i~0 6)} is VALID [2022-04-27 16:28:01,404 INFO L290 TraceCheckUtils]: 17: Hoare triple {13141#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13141#(<= main_~i~0 5)} is VALID [2022-04-27 16:28:01,404 INFO L290 TraceCheckUtils]: 16: Hoare triple {13140#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13141#(<= main_~i~0 5)} is VALID [2022-04-27 16:28:01,405 INFO L290 TraceCheckUtils]: 15: Hoare triple {13140#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13140#(<= main_~i~0 4)} is VALID [2022-04-27 16:28:01,405 INFO L290 TraceCheckUtils]: 14: Hoare triple {13139#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13140#(<= main_~i~0 4)} is VALID [2022-04-27 16:28:01,405 INFO L290 TraceCheckUtils]: 13: Hoare triple {13139#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13139#(<= main_~i~0 3)} is VALID [2022-04-27 16:28:01,406 INFO L290 TraceCheckUtils]: 12: Hoare triple {13138#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13139#(<= main_~i~0 3)} is VALID [2022-04-27 16:28:01,406 INFO L290 TraceCheckUtils]: 11: Hoare triple {13138#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13138#(<= main_~i~0 2)} is VALID [2022-04-27 16:28:01,406 INFO L290 TraceCheckUtils]: 10: Hoare triple {13137#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13138#(<= main_~i~0 2)} is VALID [2022-04-27 16:28:01,407 INFO L290 TraceCheckUtils]: 9: Hoare triple {13137#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13137#(<= main_~i~0 1)} is VALID [2022-04-27 16:28:01,407 INFO L290 TraceCheckUtils]: 8: Hoare triple {13203#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13137#(<= main_~i~0 1)} is VALID [2022-04-27 16:28:01,407 INFO L290 TraceCheckUtils]: 7: Hoare triple {13203#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13203#(<= main_~i~0 0)} is VALID [2022-04-27 16:28:01,408 INFO L290 TraceCheckUtils]: 6: Hoare triple {13131#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {13203#(<= main_~i~0 0)} is VALID [2022-04-27 16:28:01,408 INFO L290 TraceCheckUtils]: 5: Hoare triple {13131#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {13131#true} is VALID [2022-04-27 16:28:01,408 INFO L272 TraceCheckUtils]: 4: Hoare triple {13131#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,408 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,408 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-27 16:28:01,408 INFO L272 TraceCheckUtils]: 0: Hoare triple {13131#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-27 16:28:01,409 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:28:01,409 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [592356475] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:28:01,409 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:28:01,409 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 30 [2022-04-27 16:28:01,409 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850807676] [2022-04-27 16:28:01,409 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:28:01,409 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-27 16:28:01,410 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:28:01,410 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:28:01,481 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:28:01,481 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 16:28:01,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:28:01,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 16:28:01,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=674, Unknown=0, NotChecked=0, Total=870 [2022-04-27 16:28:01,482 INFO L87 Difference]: Start difference. First operand 124 states and 127 transitions. Second operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:28:02,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:28:02,325 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2022-04-27 16:28:02,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-27 16:28:02,325 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-27 16:28:02,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:28:02,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:28:02,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 75 transitions. [2022-04-27 16:28:02,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:28:02,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 75 transitions. [2022-04-27 16:28:02,328 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 75 transitions. [2022-04-27 16:28:02,399 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:28:02,401 INFO L225 Difference]: With dead ends: 136 [2022-04-27 16:28:02,401 INFO L226 Difference]: Without dead ends: 90 [2022-04-27 16:28:02,402 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 173 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 555 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=441, Invalid=1721, Unknown=0, NotChecked=0, Total=2162 [2022-04-27 16:28:02,402 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 45 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 374 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 414 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 374 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 16:28:02,402 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 74 Invalid, 414 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 374 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 16:28:02,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-27 16:28:02,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2022-04-27 16:28:02,404 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:28:02,405 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:28:02,405 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:28:02,405 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:28:02,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:28:02,406 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2022-04-27 16:28:02,406 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2022-04-27 16:28:02,407 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:28:02,407 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:28:02,407 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 90 states. [2022-04-27 16:28:02,407 INFO L87 Difference]: Start difference. First operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 90 states. [2022-04-27 16:28:02,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:28:02,408 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2022-04-27 16:28:02,408 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2022-04-27 16:28:02,408 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:28:02,408 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:28:02,409 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:28:02,409 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:28:02,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 16:28:02,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 90 transitions. [2022-04-27 16:28:02,410 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 90 transitions. Word has length 84 [2022-04-27 16:28:02,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:28:02,410 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 90 transitions. [2022-04-27 16:28:02,410 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:28:02,410 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 90 transitions. [2022-04-27 16:28:02,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-04-27 16:28:02,411 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:28:02,411 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:28:02,437 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 16:28:02,630 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:28:02,630 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:28:02,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:28:02,631 INFO L85 PathProgramCache]: Analyzing trace with hash -160730255, now seen corresponding path program 19 times [2022-04-27 16:28:02,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:28:02,631 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605429511] [2022-04-27 16:28:02,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:28:02,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:28:02,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,000 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:28:03,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,004 INFO L290 TraceCheckUtils]: 0: Hoare triple {14188#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-27 16:28:03,004 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,004 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,004 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:28:03,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,007 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,008 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:28:03,008 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 16:28:03,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,012 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,012 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,013 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:28:03,013 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 16:28:03,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,016 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,017 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:28:03,017 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-27 16:28:03,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,021 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,022 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:28:03,022 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-27 16:28:03,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,025 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,026 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,026 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,027 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:28:03,027 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-27 16:28:03,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,030 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,030 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,031 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:28:03,031 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-27 16:28:03,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,034 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,034 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,034 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,035 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:28:03,036 INFO L272 TraceCheckUtils]: 0: Hoare triple {14134#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14188#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:28:03,036 INFO L290 TraceCheckUtils]: 1: Hoare triple {14188#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-27 16:28:03,036 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,036 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,036 INFO L272 TraceCheckUtils]: 4: Hoare triple {14134#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,036 INFO L290 TraceCheckUtils]: 5: Hoare triple {14134#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14134#true} is VALID [2022-04-27 16:28:03,037 INFO L290 TraceCheckUtils]: 6: Hoare triple {14134#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14139#(= main_~i~0 0)} is VALID [2022-04-27 16:28:03,037 INFO L290 TraceCheckUtils]: 7: Hoare triple {14139#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14139#(= main_~i~0 0)} is VALID [2022-04-27 16:28:03,037 INFO L290 TraceCheckUtils]: 8: Hoare triple {14139#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:28:03,038 INFO L290 TraceCheckUtils]: 9: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:28:03,038 INFO L290 TraceCheckUtils]: 10: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:28:03,039 INFO L290 TraceCheckUtils]: 11: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:28:03,039 INFO L290 TraceCheckUtils]: 12: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:28:03,040 INFO L290 TraceCheckUtils]: 13: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:28:03,040 INFO L290 TraceCheckUtils]: 14: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:28:03,041 INFO L290 TraceCheckUtils]: 15: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:28:03,041 INFO L290 TraceCheckUtils]: 16: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:28:03,042 INFO L290 TraceCheckUtils]: 17: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:28:03,042 INFO L290 TraceCheckUtils]: 18: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:28:03,043 INFO L290 TraceCheckUtils]: 19: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:28:03,043 INFO L290 TraceCheckUtils]: 20: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:28:03,044 INFO L290 TraceCheckUtils]: 21: Hoare triple {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14147#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:28:03,045 INFO L290 TraceCheckUtils]: 22: Hoare triple {14147#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:28:03,045 INFO L290 TraceCheckUtils]: 23: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:28:03,045 INFO L290 TraceCheckUtils]: 24: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:28:03,046 INFO L290 TraceCheckUtils]: 25: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:28:03,046 INFO L272 TraceCheckUtils]: 26: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,046 INFO L290 TraceCheckUtils]: 27: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,046 INFO L290 TraceCheckUtils]: 28: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,046 INFO L290 TraceCheckUtils]: 29: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,047 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14134#true} {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:28:03,047 INFO L290 TraceCheckUtils]: 31: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:28:03,048 INFO L290 TraceCheckUtils]: 32: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:28:03,048 INFO L290 TraceCheckUtils]: 33: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:28:03,048 INFO L272 TraceCheckUtils]: 34: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,048 INFO L290 TraceCheckUtils]: 35: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,048 INFO L290 TraceCheckUtils]: 36: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,049 INFO L290 TraceCheckUtils]: 37: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,049 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14134#true} {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:28:03,050 INFO L290 TraceCheckUtils]: 39: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:28:03,050 INFO L290 TraceCheckUtils]: 40: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:28:03,051 INFO L290 TraceCheckUtils]: 41: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:28:03,051 INFO L272 TraceCheckUtils]: 42: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,051 INFO L290 TraceCheckUtils]: 43: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,051 INFO L290 TraceCheckUtils]: 44: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,051 INFO L290 TraceCheckUtils]: 45: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,052 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14134#true} {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:28:03,052 INFO L290 TraceCheckUtils]: 47: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:28:03,053 INFO L290 TraceCheckUtils]: 48: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:28:03,053 INFO L290 TraceCheckUtils]: 49: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:28:03,053 INFO L272 TraceCheckUtils]: 50: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,054 INFO L290 TraceCheckUtils]: 51: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,054 INFO L290 TraceCheckUtils]: 52: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,054 INFO L290 TraceCheckUtils]: 53: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,054 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14134#true} {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:28:03,055 INFO L290 TraceCheckUtils]: 55: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:28:03,056 INFO L290 TraceCheckUtils]: 56: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:28:03,056 INFO L290 TraceCheckUtils]: 57: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:28:03,056 INFO L272 TraceCheckUtils]: 58: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,056 INFO L290 TraceCheckUtils]: 59: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,056 INFO L290 TraceCheckUtils]: 60: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,056 INFO L290 TraceCheckUtils]: 61: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,057 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14134#true} {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:28:03,058 INFO L290 TraceCheckUtils]: 63: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:28:03,058 INFO L290 TraceCheckUtils]: 64: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:28:03,059 INFO L290 TraceCheckUtils]: 65: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:28:03,059 INFO L272 TraceCheckUtils]: 66: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,059 INFO L290 TraceCheckUtils]: 67: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,059 INFO L290 TraceCheckUtils]: 68: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,059 INFO L290 TraceCheckUtils]: 69: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,060 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14134#true} {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:28:03,060 INFO L290 TraceCheckUtils]: 71: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:28:03,061 INFO L290 TraceCheckUtils]: 72: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:28:03,061 INFO L290 TraceCheckUtils]: 73: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:28:03,062 INFO L272 TraceCheckUtils]: 74: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:28:03,062 INFO L290 TraceCheckUtils]: 75: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:28:03,062 INFO L290 TraceCheckUtils]: 76: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,062 INFO L290 TraceCheckUtils]: 77: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:28:03,063 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14134#true} {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:28:03,063 INFO L290 TraceCheckUtils]: 79: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:28:03,064 INFO L290 TraceCheckUtils]: 80: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:28:03,064 INFO L290 TraceCheckUtils]: 81: Hoare triple {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14185#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:28:03,065 INFO L272 TraceCheckUtils]: 82: Hoare triple {14185#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14186#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:28:03,065 INFO L290 TraceCheckUtils]: 83: Hoare triple {14186#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14187#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:28:03,065 INFO L290 TraceCheckUtils]: 84: Hoare triple {14187#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-27 16:28:03,065 INFO L290 TraceCheckUtils]: 85: Hoare triple {14135#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-27 16:28:03,066 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:28:03,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:28:03,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605429511] [2022-04-27 16:28:03,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [605429511] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:28:03,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1770638841] [2022-04-27 16:28:03,066 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 16:28:03,067 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:28:03,067 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:28:03,068 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:28:03,069 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 16:28:03,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,152 INFO L263 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 41 conjunts are in the unsatisfiable core [2022-04-27 16:28:03,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:28:03,168 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:28:03,300 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:29:29,994 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:29:30,050 INFO L272 TraceCheckUtils]: 0: Hoare triple {14134#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:30,050 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-27 16:29:30,050 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:30,050 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:30,050 INFO L272 TraceCheckUtils]: 4: Hoare triple {14134#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:30,050 INFO L290 TraceCheckUtils]: 5: Hoare triple {14134#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14134#true} is VALID [2022-04-27 16:29:30,051 INFO L290 TraceCheckUtils]: 6: Hoare triple {14134#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14139#(= main_~i~0 0)} is VALID [2022-04-27 16:29:30,051 INFO L290 TraceCheckUtils]: 7: Hoare triple {14139#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14139#(= main_~i~0 0)} is VALID [2022-04-27 16:29:30,051 INFO L290 TraceCheckUtils]: 8: Hoare triple {14139#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:29:30,052 INFO L290 TraceCheckUtils]: 9: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:29:30,052 INFO L290 TraceCheckUtils]: 10: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:29:30,053 INFO L290 TraceCheckUtils]: 11: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:29:30,053 INFO L290 TraceCheckUtils]: 12: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:29:30,054 INFO L290 TraceCheckUtils]: 13: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:29:30,054 INFO L290 TraceCheckUtils]: 14: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:29:30,054 INFO L290 TraceCheckUtils]: 15: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:29:30,055 INFO L290 TraceCheckUtils]: 16: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:29:30,055 INFO L290 TraceCheckUtils]: 17: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:29:30,056 INFO L290 TraceCheckUtils]: 18: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:29:30,056 INFO L290 TraceCheckUtils]: 19: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:29:30,056 INFO L290 TraceCheckUtils]: 20: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:29:30,057 INFO L290 TraceCheckUtils]: 21: Hoare triple {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:30,057 INFO L290 TraceCheckUtils]: 22: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:30,058 INFO L290 TraceCheckUtils]: 23: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:30,058 INFO L290 TraceCheckUtils]: 24: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:30,058 INFO L290 TraceCheckUtils]: 25: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:30,059 INFO L272 TraceCheckUtils]: 26: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,060 INFO L290 TraceCheckUtils]: 27: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,060 INFO L290 TraceCheckUtils]: 28: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,060 INFO L290 TraceCheckUtils]: 29: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,061 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:30,061 INFO L290 TraceCheckUtils]: 31: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:30,062 INFO L290 TraceCheckUtils]: 32: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:29:30,062 INFO L290 TraceCheckUtils]: 33: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:29:30,063 INFO L272 TraceCheckUtils]: 34: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,063 INFO L290 TraceCheckUtils]: 35: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,064 INFO L290 TraceCheckUtils]: 36: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,064 INFO L290 TraceCheckUtils]: 37: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,064 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:29:30,065 INFO L290 TraceCheckUtils]: 39: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:29:30,065 INFO L290 TraceCheckUtils]: 40: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 16:29:30,066 INFO L290 TraceCheckUtils]: 41: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 16:29:30,066 INFO L272 TraceCheckUtils]: 42: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,067 INFO L290 TraceCheckUtils]: 43: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,067 INFO L290 TraceCheckUtils]: 44: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,068 INFO L290 TraceCheckUtils]: 45: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,068 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 16:29:30,068 INFO L290 TraceCheckUtils]: 47: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 16:29:30,069 INFO L290 TraceCheckUtils]: 48: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:29:30,069 INFO L290 TraceCheckUtils]: 49: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:29:30,070 INFO L272 TraceCheckUtils]: 50: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,070 INFO L290 TraceCheckUtils]: 51: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,071 INFO L290 TraceCheckUtils]: 52: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,071 INFO L290 TraceCheckUtils]: 53: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,072 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:29:30,072 INFO L290 TraceCheckUtils]: 55: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 16:29:30,072 INFO L290 TraceCheckUtils]: 56: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-27 16:29:30,073 INFO L290 TraceCheckUtils]: 57: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-27 16:29:30,074 INFO L272 TraceCheckUtils]: 58: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,074 INFO L290 TraceCheckUtils]: 59: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,074 INFO L290 TraceCheckUtils]: 60: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,076 INFO L290 TraceCheckUtils]: 61: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,077 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-27 16:29:30,077 INFO L290 TraceCheckUtils]: 63: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-27 16:29:30,077 INFO L290 TraceCheckUtils]: 64: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-27 16:29:30,078 INFO L290 TraceCheckUtils]: 65: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-27 16:29:30,079 INFO L272 TraceCheckUtils]: 66: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,079 INFO L290 TraceCheckUtils]: 67: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,079 INFO L290 TraceCheckUtils]: 68: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,080 INFO L290 TraceCheckUtils]: 69: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,080 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-27 16:29:30,081 INFO L290 TraceCheckUtils]: 71: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-27 16:29:30,081 INFO L290 TraceCheckUtils]: 72: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-27 16:29:30,081 INFO L290 TraceCheckUtils]: 73: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-27 16:29:30,082 INFO L272 TraceCheckUtils]: 74: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,083 INFO L290 TraceCheckUtils]: 75: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,083 INFO L290 TraceCheckUtils]: 76: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,083 INFO L290 TraceCheckUtils]: 77: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-27 16:29:30,084 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-27 16:29:30,084 INFO L290 TraceCheckUtils]: 79: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-27 16:29:30,085 INFO L290 TraceCheckUtils]: 80: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14439#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 7)) 0))} is VALID [2022-04-27 16:29:30,085 INFO L290 TraceCheckUtils]: 81: Hoare triple {14439#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 7)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14185#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:29:30,085 INFO L272 TraceCheckUtils]: 82: Hoare triple {14185#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:29:30,086 INFO L290 TraceCheckUtils]: 83: Hoare triple {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14450#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:29:30,086 INFO L290 TraceCheckUtils]: 84: Hoare triple {14450#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-27 16:29:30,086 INFO L290 TraceCheckUtils]: 85: Hoare triple {14135#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-27 16:29:30,087 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:29:30,087 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:29:32,356 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:29:32,360 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:29:32,497 INFO L290 TraceCheckUtils]: 85: Hoare triple {14135#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-27 16:29:32,497 INFO L290 TraceCheckUtils]: 84: Hoare triple {14450#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-27 16:29:32,497 INFO L290 TraceCheckUtils]: 83: Hoare triple {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14450#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:29:32,498 INFO L272 TraceCheckUtils]: 82: Hoare triple {14185#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:29:32,498 INFO L290 TraceCheckUtils]: 81: Hoare triple {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14185#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:29:32,499 INFO L290 TraceCheckUtils]: 80: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:32,499 INFO L290 TraceCheckUtils]: 79: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:32,500 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14134#true} {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:32,500 INFO L290 TraceCheckUtils]: 77: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,500 INFO L290 TraceCheckUtils]: 76: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,500 INFO L290 TraceCheckUtils]: 75: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,500 INFO L272 TraceCheckUtils]: 74: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,501 INFO L290 TraceCheckUtils]: 73: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:32,501 INFO L290 TraceCheckUtils]: 72: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:32,501 INFO L290 TraceCheckUtils]: 71: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:32,502 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14134#true} {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:32,502 INFO L290 TraceCheckUtils]: 69: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,502 INFO L290 TraceCheckUtils]: 68: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,502 INFO L290 TraceCheckUtils]: 67: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,502 INFO L272 TraceCheckUtils]: 66: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,503 INFO L290 TraceCheckUtils]: 65: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:32,503 INFO L290 TraceCheckUtils]: 64: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:32,503 INFO L290 TraceCheckUtils]: 63: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:32,504 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14134#true} {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:32,504 INFO L290 TraceCheckUtils]: 61: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,504 INFO L290 TraceCheckUtils]: 60: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,504 INFO L290 TraceCheckUtils]: 59: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,504 INFO L272 TraceCheckUtils]: 58: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,505 INFO L290 TraceCheckUtils]: 57: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:32,505 INFO L290 TraceCheckUtils]: 56: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:32,506 INFO L290 TraceCheckUtils]: 55: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:32,506 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14134#true} {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:32,506 INFO L290 TraceCheckUtils]: 53: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,506 INFO L290 TraceCheckUtils]: 52: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,506 INFO L290 TraceCheckUtils]: 51: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,507 INFO L272 TraceCheckUtils]: 50: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,519 INFO L290 TraceCheckUtils]: 49: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:32,520 INFO L290 TraceCheckUtils]: 48: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:32,521 INFO L290 TraceCheckUtils]: 47: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:32,522 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14134#true} {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:32,522 INFO L290 TraceCheckUtils]: 45: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,522 INFO L290 TraceCheckUtils]: 44: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,522 INFO L290 TraceCheckUtils]: 43: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,522 INFO L272 TraceCheckUtils]: 42: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,522 INFO L290 TraceCheckUtils]: 41: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:32,523 INFO L290 TraceCheckUtils]: 40: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:32,524 INFO L290 TraceCheckUtils]: 39: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:32,524 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14134#true} {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:32,524 INFO L290 TraceCheckUtils]: 37: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,524 INFO L290 TraceCheckUtils]: 36: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,525 INFO L290 TraceCheckUtils]: 35: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,525 INFO L272 TraceCheckUtils]: 34: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,525 INFO L290 TraceCheckUtils]: 33: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:32,526 INFO L290 TraceCheckUtils]: 32: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:32,526 INFO L290 TraceCheckUtils]: 31: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:29:32,527 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14134#true} {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:29:32,527 INFO L290 TraceCheckUtils]: 29: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,527 INFO L290 TraceCheckUtils]: 28: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,527 INFO L290 TraceCheckUtils]: 27: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-27 16:29:32,527 INFO L272 TraceCheckUtils]: 26: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-27 16:29:32,528 INFO L290 TraceCheckUtils]: 25: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:29:32,528 INFO L290 TraceCheckUtils]: 24: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:29:32,529 INFO L290 TraceCheckUtils]: 23: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:32,529 INFO L290 TraceCheckUtils]: 22: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:32,530 INFO L290 TraceCheckUtils]: 21: Hoare triple {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:32,530 INFO L290 TraceCheckUtils]: 20: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:29:32,531 INFO L290 TraceCheckUtils]: 19: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:29:32,531 INFO L290 TraceCheckUtils]: 18: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:29:32,532 INFO L290 TraceCheckUtils]: 17: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:29:32,532 INFO L290 TraceCheckUtils]: 16: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:29:32,533 INFO L290 TraceCheckUtils]: 15: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:29:32,533 INFO L290 TraceCheckUtils]: 14: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:29:32,534 INFO L290 TraceCheckUtils]: 13: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:29:32,534 INFO L290 TraceCheckUtils]: 12: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:29:32,535 INFO L290 TraceCheckUtils]: 11: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:29:32,535 INFO L290 TraceCheckUtils]: 10: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:29:32,536 INFO L290 TraceCheckUtils]: 9: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:29:32,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {14139#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:29:32,537 INFO L290 TraceCheckUtils]: 7: Hoare triple {14139#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14139#(= main_~i~0 0)} is VALID [2022-04-27 16:29:32,537 INFO L290 TraceCheckUtils]: 6: Hoare triple {14134#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14139#(= main_~i~0 0)} is VALID [2022-04-27 16:29:32,537 INFO L290 TraceCheckUtils]: 5: Hoare triple {14134#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14134#true} is VALID [2022-04-27 16:29:32,537 INFO L272 TraceCheckUtils]: 4: Hoare triple {14134#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,537 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-27 16:29:32,538 INFO L272 TraceCheckUtils]: 0: Hoare triple {14134#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-27 16:29:32,538 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:29:32,538 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1770638841] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:29:32,538 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:29:32,539 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 22] total 35 [2022-04-27 16:29:32,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463027966] [2022-04-27 16:29:32,539 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:29:32,539 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 86 [2022-04-27 16:29:32,540 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:29:32,540 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:29:32,639 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:29:32,640 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-27 16:29:32,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:29:32,640 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-27 16:29:32,641 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1085, Unknown=8, NotChecked=0, Total=1190 [2022-04-27 16:29:32,641 INFO L87 Difference]: Start difference. First operand 89 states and 90 transitions. Second operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:29:34,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:29:34,845 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2022-04-27 16:29:34,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-04-27 16:29:34,846 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 86 [2022-04-27 16:29:34,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:29:34,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:29:34,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 87 transitions. [2022-04-27 16:29:34,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:29:34,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 87 transitions. [2022-04-27 16:29:34,849 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 33 states and 87 transitions. [2022-04-27 16:29:34,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:29:34,942 INFO L225 Difference]: With dead ends: 156 [2022-04-27 16:29:34,942 INFO L226 Difference]: Without dead ends: 156 [2022-04-27 16:29:34,943 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 168 SyntacticMatches, 18 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 711 ImplicationChecksByTransitivity, 88.5s TimeCoverageRelationStatistics Valid=250, Invalid=3048, Unknown=8, NotChecked=0, Total=3306 [2022-04-27 16:29:34,944 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 77 mSDsluCounter, 234 mSDsCounter, 0 mSdLazyCounter, 1187 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 267 SdHoareTripleChecker+Invalid, 1329 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 1187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 117 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 16:29:34,944 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [78 Valid, 267 Invalid, 1329 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 1187 Invalid, 0 Unknown, 117 Unchecked, 0.9s Time] [2022-04-27 16:29:34,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2022-04-27 16:29:34,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 100. [2022-04-27 16:29:34,947 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:29:34,947 INFO L82 GeneralOperation]: Start isEquivalent. First operand 156 states. Second operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:29:34,947 INFO L74 IsIncluded]: Start isIncluded. First operand 156 states. Second operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:29:34,947 INFO L87 Difference]: Start difference. First operand 156 states. Second operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:29:34,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:29:34,949 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2022-04-27 16:29:34,950 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 158 transitions. [2022-04-27 16:29:34,950 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:29:34,950 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:29:34,950 INFO L74 IsIncluded]: Start isIncluded. First operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 156 states. [2022-04-27 16:29:34,950 INFO L87 Difference]: Start difference. First operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 156 states. [2022-04-27 16:29:34,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:29:34,952 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2022-04-27 16:29:34,953 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 158 transitions. [2022-04-27 16:29:34,953 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:29:34,953 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:29:34,953 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:29:34,953 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:29:34,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 16:29:34,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2022-04-27 16:29:34,954 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 86 [2022-04-27 16:29:34,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:29:34,955 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2022-04-27 16:29:34,957 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:29:34,957 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2022-04-27 16:29:34,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-04-27 16:29:34,957 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:29:34,957 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:29:34,985 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-27 16:29:35,179 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-04-27 16:29:35,180 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:29:35,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:29:35,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1942284719, now seen corresponding path program 20 times [2022-04-27 16:29:35,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:29:35,180 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874121462] [2022-04-27 16:29:35,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:29:35,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:29:35,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,580 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:29:35,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,583 INFO L290 TraceCheckUtils]: 0: Hoare triple {15393#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-27 16:29:35,583 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,583 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,584 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 16:29:35,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,587 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,587 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,587 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,588 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:35,588 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 16:29:35,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,591 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,592 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:35,592 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-27 16:29:35,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,595 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,596 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:35,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-27 16:29:35,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,599 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,600 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:35,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-27 16:29:35,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,603 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,604 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,604 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:35,605 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-27 16:29:35,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,608 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,608 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:35,610 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-04-27 16:29:35,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,613 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,613 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,613 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,614 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:35,615 INFO L272 TraceCheckUtils]: 0: Hoare triple {15338#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15393#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:29:35,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {15393#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-27 16:29:35,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,615 INFO L272 TraceCheckUtils]: 4: Hoare triple {15338#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,615 INFO L290 TraceCheckUtils]: 5: Hoare triple {15338#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15338#true} is VALID [2022-04-27 16:29:35,616 INFO L290 TraceCheckUtils]: 6: Hoare triple {15338#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15343#(= main_~i~0 0)} is VALID [2022-04-27 16:29:35,616 INFO L290 TraceCheckUtils]: 7: Hoare triple {15343#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15343#(= main_~i~0 0)} is VALID [2022-04-27 16:29:35,616 INFO L290 TraceCheckUtils]: 8: Hoare triple {15343#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:29:35,617 INFO L290 TraceCheckUtils]: 9: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:29:35,617 INFO L290 TraceCheckUtils]: 10: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:29:35,618 INFO L290 TraceCheckUtils]: 11: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:29:35,618 INFO L290 TraceCheckUtils]: 12: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:29:35,619 INFO L290 TraceCheckUtils]: 13: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:29:35,619 INFO L290 TraceCheckUtils]: 14: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:29:35,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:29:35,620 INFO L290 TraceCheckUtils]: 16: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:29:35,621 INFO L290 TraceCheckUtils]: 17: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:29:35,621 INFO L290 TraceCheckUtils]: 18: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:29:35,622 INFO L290 TraceCheckUtils]: 19: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:29:35,622 INFO L290 TraceCheckUtils]: 20: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:29:35,623 INFO L290 TraceCheckUtils]: 21: Hoare triple {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:29:35,623 INFO L290 TraceCheckUtils]: 22: Hoare triple {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 16:29:35,624 INFO L290 TraceCheckUtils]: 23: Hoare triple {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:35,624 INFO L290 TraceCheckUtils]: 24: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:35,625 INFO L290 TraceCheckUtils]: 25: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:29:35,625 INFO L290 TraceCheckUtils]: 26: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:35,626 INFO L290 TraceCheckUtils]: 27: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:35,626 INFO L272 TraceCheckUtils]: 28: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,626 INFO L290 TraceCheckUtils]: 29: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,626 INFO L290 TraceCheckUtils]: 30: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,626 INFO L290 TraceCheckUtils]: 31: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,627 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15338#true} {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:35,627 INFO L290 TraceCheckUtils]: 33: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:29:35,628 INFO L290 TraceCheckUtils]: 34: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:35,628 INFO L290 TraceCheckUtils]: 35: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:35,628 INFO L272 TraceCheckUtils]: 36: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,628 INFO L290 TraceCheckUtils]: 37: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,628 INFO L290 TraceCheckUtils]: 38: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,628 INFO L290 TraceCheckUtils]: 39: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,629 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15338#true} {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:35,630 INFO L290 TraceCheckUtils]: 41: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:29:35,630 INFO L290 TraceCheckUtils]: 42: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:35,631 INFO L290 TraceCheckUtils]: 43: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:35,631 INFO L272 TraceCheckUtils]: 44: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,631 INFO L290 TraceCheckUtils]: 45: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,631 INFO L290 TraceCheckUtils]: 46: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,631 INFO L290 TraceCheckUtils]: 47: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,632 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15338#true} {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:35,632 INFO L290 TraceCheckUtils]: 49: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:29:35,633 INFO L290 TraceCheckUtils]: 50: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:35,633 INFO L290 TraceCheckUtils]: 51: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:35,634 INFO L272 TraceCheckUtils]: 52: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,634 INFO L290 TraceCheckUtils]: 53: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,634 INFO L290 TraceCheckUtils]: 54: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,634 INFO L290 TraceCheckUtils]: 55: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,635 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15338#true} {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:35,635 INFO L290 TraceCheckUtils]: 57: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:35,636 INFO L290 TraceCheckUtils]: 58: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:35,636 INFO L290 TraceCheckUtils]: 59: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:35,636 INFO L272 TraceCheckUtils]: 60: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,636 INFO L290 TraceCheckUtils]: 61: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,636 INFO L290 TraceCheckUtils]: 62: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,637 INFO L290 TraceCheckUtils]: 63: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,637 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15338#true} {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:35,638 INFO L290 TraceCheckUtils]: 65: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:29:35,638 INFO L290 TraceCheckUtils]: 66: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:35,639 INFO L290 TraceCheckUtils]: 67: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:35,639 INFO L272 TraceCheckUtils]: 68: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,639 INFO L290 TraceCheckUtils]: 69: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,639 INFO L290 TraceCheckUtils]: 70: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,639 INFO L290 TraceCheckUtils]: 71: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,640 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15338#true} {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:35,640 INFO L290 TraceCheckUtils]: 73: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:29:35,641 INFO L290 TraceCheckUtils]: 74: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:35,641 INFO L290 TraceCheckUtils]: 75: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:35,641 INFO L272 TraceCheckUtils]: 76: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:29:35,642 INFO L290 TraceCheckUtils]: 77: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:29:35,642 INFO L290 TraceCheckUtils]: 78: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,642 INFO L290 TraceCheckUtils]: 79: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:29:35,642 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {15338#true} {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:35,643 INFO L290 TraceCheckUtils]: 81: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:29:35,643 INFO L290 TraceCheckUtils]: 82: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:29:35,644 INFO L290 TraceCheckUtils]: 83: Hoare triple {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15390#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:29:35,645 INFO L272 TraceCheckUtils]: 84: Hoare triple {15390#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15391#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:29:35,645 INFO L290 TraceCheckUtils]: 85: Hoare triple {15391#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15392#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:29:35,645 INFO L290 TraceCheckUtils]: 86: Hoare triple {15392#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-27 16:29:35,645 INFO L290 TraceCheckUtils]: 87: Hoare triple {15339#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-27 16:29:35,646 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 14 proven. 179 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:29:35,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:29:35,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874121462] [2022-04-27 16:29:35,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1874121462] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:29:35,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [308421903] [2022-04-27 16:29:35,646 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:29:35,646 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:29:35,647 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:29:35,648 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:29:35,679 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 16:29:35,757 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:29:35,758 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:29:35,759 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 44 conjunts are in the unsatisfiable core [2022-04-27 16:29:35,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:29:35,777 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:29:35,908 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:29:36,137 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 16:29:36,137 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 16:31:11,969 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:31:12,025 INFO L272 TraceCheckUtils]: 0: Hoare triple {15338#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:12,026 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-27 16:31:12,026 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:12,026 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:12,026 INFO L272 TraceCheckUtils]: 4: Hoare triple {15338#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:12,026 INFO L290 TraceCheckUtils]: 5: Hoare triple {15338#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15338#true} is VALID [2022-04-27 16:31:12,026 INFO L290 TraceCheckUtils]: 6: Hoare triple {15338#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15343#(= main_~i~0 0)} is VALID [2022-04-27 16:31:12,027 INFO L290 TraceCheckUtils]: 7: Hoare triple {15343#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15343#(= main_~i~0 0)} is VALID [2022-04-27 16:31:12,027 INFO L290 TraceCheckUtils]: 8: Hoare triple {15343#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:31:12,027 INFO L290 TraceCheckUtils]: 9: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:31:12,028 INFO L290 TraceCheckUtils]: 10: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:31:12,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:31:12,029 INFO L290 TraceCheckUtils]: 12: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:31:12,029 INFO L290 TraceCheckUtils]: 13: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:31:12,029 INFO L290 TraceCheckUtils]: 14: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:31:12,030 INFO L290 TraceCheckUtils]: 15: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:31:12,030 INFO L290 TraceCheckUtils]: 16: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:31:12,031 INFO L290 TraceCheckUtils]: 17: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:31:12,031 INFO L290 TraceCheckUtils]: 18: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:31:12,032 INFO L290 TraceCheckUtils]: 19: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:31:12,032 INFO L290 TraceCheckUtils]: 20: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:31:12,032 INFO L290 TraceCheckUtils]: 21: Hoare triple {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:31:12,034 INFO L290 TraceCheckUtils]: 22: Hoare triple {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15463#(exists ((v_main_~i~0_213 Int)) (and (<= (+ v_main_~i~0_213 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_213))) 0) (<= v_main_~i~0_213 7) (<= 7 v_main_~i~0_213)))} is VALID [2022-04-27 16:31:12,034 INFO L290 TraceCheckUtils]: 23: Hoare triple {15463#(exists ((v_main_~i~0_213 Int)) (and (<= (+ v_main_~i~0_213 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_213))) 0) (<= v_main_~i~0_213 7) (<= 7 v_main_~i~0_213)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:12,035 INFO L290 TraceCheckUtils]: 24: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:12,035 INFO L290 TraceCheckUtils]: 25: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:12,035 INFO L290 TraceCheckUtils]: 26: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:12,036 INFO L290 TraceCheckUtils]: 27: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:12,037 INFO L272 TraceCheckUtils]: 28: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,037 INFO L290 TraceCheckUtils]: 29: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,038 INFO L290 TraceCheckUtils]: 30: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,038 INFO L290 TraceCheckUtils]: 31: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,039 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:12,040 INFO L290 TraceCheckUtils]: 33: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:12,040 INFO L290 TraceCheckUtils]: 34: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,041 INFO L290 TraceCheckUtils]: 35: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,042 INFO L272 TraceCheckUtils]: 36: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,042 INFO L290 TraceCheckUtils]: 37: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,042 INFO L290 TraceCheckUtils]: 38: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,043 INFO L290 TraceCheckUtils]: 39: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,043 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,044 INFO L290 TraceCheckUtils]: 41: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,044 INFO L290 TraceCheckUtils]: 42: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:31:12,045 INFO L290 TraceCheckUtils]: 43: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:31:12,045 INFO L272 TraceCheckUtils]: 44: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,046 INFO L290 TraceCheckUtils]: 45: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,046 INFO L290 TraceCheckUtils]: 46: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,046 INFO L290 TraceCheckUtils]: 47: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,047 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:31:12,047 INFO L290 TraceCheckUtils]: 49: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:31:12,048 INFO L290 TraceCheckUtils]: 50: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,048 INFO L290 TraceCheckUtils]: 51: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,049 INFO L272 TraceCheckUtils]: 52: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,049 INFO L290 TraceCheckUtils]: 53: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,049 INFO L290 TraceCheckUtils]: 54: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,050 INFO L290 TraceCheckUtils]: 55: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,050 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,051 INFO L290 TraceCheckUtils]: 57: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,051 INFO L290 TraceCheckUtils]: 58: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-27 16:31:12,051 INFO L290 TraceCheckUtils]: 59: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-27 16:31:12,052 INFO L272 TraceCheckUtils]: 60: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,052 INFO L290 TraceCheckUtils]: 61: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,053 INFO L290 TraceCheckUtils]: 62: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,053 INFO L290 TraceCheckUtils]: 63: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,054 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-27 16:31:12,054 INFO L290 TraceCheckUtils]: 65: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-27 16:31:12,054 INFO L290 TraceCheckUtils]: 66: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-27 16:31:12,055 INFO L290 TraceCheckUtils]: 67: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-27 16:31:12,055 INFO L272 TraceCheckUtils]: 68: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,056 INFO L290 TraceCheckUtils]: 69: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,056 INFO L290 TraceCheckUtils]: 70: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,056 INFO L290 TraceCheckUtils]: 71: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,057 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-27 16:31:12,057 INFO L290 TraceCheckUtils]: 73: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-27 16:31:12,058 INFO L290 TraceCheckUtils]: 74: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-27 16:31:12,058 INFO L290 TraceCheckUtils]: 75: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-27 16:31:12,059 INFO L272 TraceCheckUtils]: 76: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,059 INFO L290 TraceCheckUtils]: 77: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,059 INFO L290 TraceCheckUtils]: 78: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,060 INFO L290 TraceCheckUtils]: 79: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-27 16:31:12,060 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-27 16:31:12,061 INFO L290 TraceCheckUtils]: 81: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-27 16:31:12,061 INFO L290 TraceCheckUtils]: 82: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15651#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 6 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:31:12,061 INFO L290 TraceCheckUtils]: 83: Hoare triple {15651#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 6 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15390#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:31:12,062 INFO L272 TraceCheckUtils]: 84: Hoare triple {15390#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:31:12,062 INFO L290 TraceCheckUtils]: 85: Hoare triple {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15662#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:31:12,062 INFO L290 TraceCheckUtils]: 86: Hoare triple {15662#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-27 16:31:12,063 INFO L290 TraceCheckUtils]: 87: Hoare triple {15339#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-27 16:31:12,063 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 0 proven. 193 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:31:12,063 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:31:14,412 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:31:14,416 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:31:14,540 INFO L290 TraceCheckUtils]: 87: Hoare triple {15339#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-27 16:31:14,540 INFO L290 TraceCheckUtils]: 86: Hoare triple {15662#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-27 16:31:14,541 INFO L290 TraceCheckUtils]: 85: Hoare triple {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15662#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:31:14,541 INFO L272 TraceCheckUtils]: 84: Hoare triple {15390#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:31:14,541 INFO L290 TraceCheckUtils]: 83: Hoare triple {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15390#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:31:14,542 INFO L290 TraceCheckUtils]: 82: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:14,542 INFO L290 TraceCheckUtils]: 81: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:14,543 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {15338#true} {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:14,543 INFO L290 TraceCheckUtils]: 79: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,543 INFO L290 TraceCheckUtils]: 78: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,543 INFO L290 TraceCheckUtils]: 77: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,543 INFO L272 TraceCheckUtils]: 76: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,544 INFO L290 TraceCheckUtils]: 75: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:14,544 INFO L290 TraceCheckUtils]: 74: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:14,544 INFO L290 TraceCheckUtils]: 73: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:14,545 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15338#true} {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:14,545 INFO L290 TraceCheckUtils]: 71: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,545 INFO L290 TraceCheckUtils]: 70: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,545 INFO L290 TraceCheckUtils]: 69: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,545 INFO L272 TraceCheckUtils]: 68: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,546 INFO L290 TraceCheckUtils]: 67: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:14,546 INFO L290 TraceCheckUtils]: 66: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:14,547 INFO L290 TraceCheckUtils]: 65: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:14,547 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15338#true} {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:14,547 INFO L290 TraceCheckUtils]: 63: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,547 INFO L290 TraceCheckUtils]: 62: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,547 INFO L290 TraceCheckUtils]: 61: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,547 INFO L272 TraceCheckUtils]: 60: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,548 INFO L290 TraceCheckUtils]: 59: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:14,548 INFO L290 TraceCheckUtils]: 58: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:14,549 INFO L290 TraceCheckUtils]: 57: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:14,549 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15338#true} {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:14,549 INFO L290 TraceCheckUtils]: 55: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,549 INFO L290 TraceCheckUtils]: 54: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,549 INFO L290 TraceCheckUtils]: 53: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,549 INFO L272 TraceCheckUtils]: 52: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,550 INFO L290 TraceCheckUtils]: 51: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:14,550 INFO L290 TraceCheckUtils]: 50: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:14,551 INFO L290 TraceCheckUtils]: 49: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:14,551 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15338#true} {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:14,551 INFO L290 TraceCheckUtils]: 47: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,551 INFO L290 TraceCheckUtils]: 46: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,551 INFO L290 TraceCheckUtils]: 45: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,552 INFO L272 TraceCheckUtils]: 44: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,552 INFO L290 TraceCheckUtils]: 43: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:14,553 INFO L290 TraceCheckUtils]: 42: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:14,553 INFO L290 TraceCheckUtils]: 41: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:14,554 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15338#true} {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:14,554 INFO L290 TraceCheckUtils]: 39: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,554 INFO L290 TraceCheckUtils]: 38: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,554 INFO L290 TraceCheckUtils]: 37: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,554 INFO L272 TraceCheckUtils]: 36: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,554 INFO L290 TraceCheckUtils]: 35: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:14,555 INFO L290 TraceCheckUtils]: 34: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:14,559 INFO L290 TraceCheckUtils]: 33: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:31:14,559 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15338#true} {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:31:14,559 INFO L290 TraceCheckUtils]: 31: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,559 INFO L290 TraceCheckUtils]: 30: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,559 INFO L290 TraceCheckUtils]: 29: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-27 16:31:14,559 INFO L272 TraceCheckUtils]: 28: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-27 16:31:14,560 INFO L290 TraceCheckUtils]: 27: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:31:14,560 INFO L290 TraceCheckUtils]: 26: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:31:14,561 INFO L290 TraceCheckUtils]: 25: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:14,561 INFO L290 TraceCheckUtils]: 24: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:14,562 INFO L290 TraceCheckUtils]: 23: Hoare triple {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:14,563 INFO L290 TraceCheckUtils]: 22: Hoare triple {15865#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 16:31:14,563 INFO L290 TraceCheckUtils]: 21: Hoare triple {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15865#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-27 16:31:14,564 INFO L290 TraceCheckUtils]: 20: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:31:14,564 INFO L290 TraceCheckUtils]: 19: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:31:14,565 INFO L290 TraceCheckUtils]: 18: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:31:14,565 INFO L290 TraceCheckUtils]: 17: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:31:14,565 INFO L290 TraceCheckUtils]: 16: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:31:14,566 INFO L290 TraceCheckUtils]: 15: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:31:14,566 INFO L290 TraceCheckUtils]: 14: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:31:14,567 INFO L290 TraceCheckUtils]: 13: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:31:14,567 INFO L290 TraceCheckUtils]: 12: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:31:14,568 INFO L290 TraceCheckUtils]: 11: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:31:14,568 INFO L290 TraceCheckUtils]: 10: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:31:14,568 INFO L290 TraceCheckUtils]: 9: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:31:14,569 INFO L290 TraceCheckUtils]: 8: Hoare triple {15343#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:31:14,569 INFO L290 TraceCheckUtils]: 7: Hoare triple {15343#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15343#(= main_~i~0 0)} is VALID [2022-04-27 16:31:14,569 INFO L290 TraceCheckUtils]: 6: Hoare triple {15338#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15343#(= main_~i~0 0)} is VALID [2022-04-27 16:31:14,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {15338#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15338#true} is VALID [2022-04-27 16:31:14,570 INFO L272 TraceCheckUtils]: 4: Hoare triple {15338#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,570 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,570 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,571 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-27 16:31:14,571 INFO L272 TraceCheckUtils]: 0: Hoare triple {15338#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-27 16:31:14,572 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 14 proven. 179 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:31:14,572 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [308421903] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:31:14,572 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:31:14,572 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 24] total 38 [2022-04-27 16:31:14,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062084267] [2022-04-27 16:31:14,574 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:31:14,575 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 88 [2022-04-27 16:31:14,576 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:31:14,587 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:31:14,698 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:31:14,699 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 16:31:14,699 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:31:14,699 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 16:31:14,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=1286, Unknown=8, NotChecked=0, Total=1406 [2022-04-27 16:31:14,700 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:31:17,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:31:17,077 INFO L93 Difference]: Finished difference Result 201 states and 211 transitions. [2022-04-27 16:31:17,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-27 16:31:17,077 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 88 [2022-04-27 16:31:17,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:31:17,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:31:17,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 95 transitions. [2022-04-27 16:31:17,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:31:17,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 95 transitions. [2022-04-27 16:31:17,080 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 95 transitions. [2022-04-27 16:31:17,177 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:31:17,180 INFO L225 Difference]: With dead ends: 201 [2022-04-27 16:31:17,180 INFO L226 Difference]: Without dead ends: 201 [2022-04-27 16:31:17,181 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 160 SyntacticMatches, 19 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 804 ImplicationChecksByTransitivity, 97.7s TimeCoverageRelationStatistics Valid=271, Invalid=3381, Unknown=8, NotChecked=0, Total=3660 [2022-04-27 16:31:17,181 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 53 mSDsluCounter, 291 mSDsCounter, 0 mSdLazyCounter, 1287 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 1428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 1287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 101 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:31:17,182 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [54 Valid, 322 Invalid, 1428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 1287 Invalid, 0 Unknown, 101 Unchecked, 1.0s Time] [2022-04-27 16:31:17,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2022-04-27 16:31:17,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 171. [2022-04-27 16:31:17,185 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:31:17,186 INFO L82 GeneralOperation]: Start isEquivalent. First operand 201 states. Second operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-27 16:31:17,186 INFO L74 IsIncluded]: Start isIncluded. First operand 201 states. Second operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-27 16:31:17,186 INFO L87 Difference]: Start difference. First operand 201 states. Second operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-27 16:31:17,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:31:17,190 INFO L93 Difference]: Finished difference Result 201 states and 211 transitions. [2022-04-27 16:31:17,190 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 211 transitions. [2022-04-27 16:31:17,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:31:17,190 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:31:17,190 INFO L74 IsIncluded]: Start isIncluded. First operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) Second operand 201 states. [2022-04-27 16:31:17,191 INFO L87 Difference]: Start difference. First operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) Second operand 201 states. [2022-04-27 16:31:17,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:31:17,194 INFO L93 Difference]: Finished difference Result 201 states and 211 transitions. [2022-04-27 16:31:17,194 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 211 transitions. [2022-04-27 16:31:17,195 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:31:17,195 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:31:17,195 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:31:17,195 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:31:17,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-27 16:31:17,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 180 transitions. [2022-04-27 16:31:17,197 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 180 transitions. Word has length 88 [2022-04-27 16:31:17,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:31:17,198 INFO L495 AbstractCegarLoop]: Abstraction has 171 states and 180 transitions. [2022-04-27 16:31:17,198 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:31:17,198 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 180 transitions. [2022-04-27 16:31:17,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-04-27 16:31:17,199 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:31:17,199 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:31:17,219 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-27 16:31:17,415 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-27 16:31:17,416 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:31:17,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:31:17,416 INFO L85 PathProgramCache]: Analyzing trace with hash 10078317, now seen corresponding path program 21 times [2022-04-27 16:31:17,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:31:17,416 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313279812] [2022-04-27 16:31:17,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:31:17,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:31:17,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,799 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:31:17,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,805 INFO L290 TraceCheckUtils]: 0: Hoare triple {16810#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-27 16:31:17,805 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,805 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,805 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 16:31:17,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,810 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,810 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,811 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:17,812 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 16:31:17,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,814 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,814 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,814 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,814 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:17,815 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 16:31:17,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,820 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,820 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,820 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,821 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:17,821 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 16:31:17,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,824 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,824 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,824 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,825 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:17,825 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-27 16:31:17,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,828 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:17,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-04-27 16:31:17,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,832 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,832 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,832 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:17,833 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-04-27 16:31:17,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:17,835 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,835 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,835 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,836 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:17,836 INFO L272 TraceCheckUtils]: 0: Hoare triple {16754#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16810#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:31:17,836 INFO L290 TraceCheckUtils]: 1: Hoare triple {16810#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-27 16:31:17,837 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,837 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,837 INFO L272 TraceCheckUtils]: 4: Hoare triple {16754#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,837 INFO L290 TraceCheckUtils]: 5: Hoare triple {16754#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16754#true} is VALID [2022-04-27 16:31:17,837 INFO L290 TraceCheckUtils]: 6: Hoare triple {16754#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16759#(= main_~i~0 0)} is VALID [2022-04-27 16:31:17,838 INFO L290 TraceCheckUtils]: 7: Hoare triple {16759#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16759#(= main_~i~0 0)} is VALID [2022-04-27 16:31:17,838 INFO L290 TraceCheckUtils]: 8: Hoare triple {16759#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:31:17,838 INFO L290 TraceCheckUtils]: 9: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:31:17,839 INFO L290 TraceCheckUtils]: 10: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:31:17,839 INFO L290 TraceCheckUtils]: 11: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:31:17,840 INFO L290 TraceCheckUtils]: 12: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:31:17,840 INFO L290 TraceCheckUtils]: 13: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:31:17,841 INFO L290 TraceCheckUtils]: 14: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:31:17,841 INFO L290 TraceCheckUtils]: 15: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:31:17,842 INFO L290 TraceCheckUtils]: 16: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:31:17,842 INFO L290 TraceCheckUtils]: 17: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:31:17,843 INFO L290 TraceCheckUtils]: 18: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:31:17,843 INFO L290 TraceCheckUtils]: 19: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:31:17,844 INFO L290 TraceCheckUtils]: 20: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:31:17,845 INFO L290 TraceCheckUtils]: 21: Hoare triple {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:31:17,845 INFO L290 TraceCheckUtils]: 22: Hoare triple {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-27 16:31:17,846 INFO L290 TraceCheckUtils]: 23: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-27 16:31:17,846 INFO L290 TraceCheckUtils]: 24: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 16:31:17,847 INFO L290 TraceCheckUtils]: 25: Hoare triple {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:17,847 INFO L290 TraceCheckUtils]: 26: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:17,848 INFO L290 TraceCheckUtils]: 27: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:31:17,848 INFO L290 TraceCheckUtils]: 28: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:17,849 INFO L290 TraceCheckUtils]: 29: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:17,849 INFO L272 TraceCheckUtils]: 30: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,849 INFO L290 TraceCheckUtils]: 31: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,849 INFO L290 TraceCheckUtils]: 32: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,849 INFO L290 TraceCheckUtils]: 33: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,850 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16754#true} {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:17,850 INFO L290 TraceCheckUtils]: 35: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:31:17,851 INFO L290 TraceCheckUtils]: 36: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:17,851 INFO L290 TraceCheckUtils]: 37: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:17,851 INFO L272 TraceCheckUtils]: 38: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,851 INFO L290 TraceCheckUtils]: 39: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,851 INFO L290 TraceCheckUtils]: 40: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,851 INFO L290 TraceCheckUtils]: 41: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,852 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {16754#true} {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:17,852 INFO L290 TraceCheckUtils]: 43: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:31:17,853 INFO L290 TraceCheckUtils]: 44: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:17,853 INFO L290 TraceCheckUtils]: 45: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:17,853 INFO L272 TraceCheckUtils]: 46: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,854 INFO L290 TraceCheckUtils]: 47: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,854 INFO L290 TraceCheckUtils]: 48: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,854 INFO L290 TraceCheckUtils]: 49: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,854 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {16754#true} {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:17,855 INFO L290 TraceCheckUtils]: 51: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:31:17,855 INFO L290 TraceCheckUtils]: 52: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:17,856 INFO L290 TraceCheckUtils]: 53: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:17,856 INFO L272 TraceCheckUtils]: 54: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,856 INFO L290 TraceCheckUtils]: 55: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,856 INFO L290 TraceCheckUtils]: 56: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,856 INFO L290 TraceCheckUtils]: 57: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,857 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {16754#true} {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:17,857 INFO L290 TraceCheckUtils]: 59: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:17,858 INFO L290 TraceCheckUtils]: 60: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:17,858 INFO L290 TraceCheckUtils]: 61: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:17,858 INFO L272 TraceCheckUtils]: 62: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,859 INFO L290 TraceCheckUtils]: 63: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,859 INFO L290 TraceCheckUtils]: 64: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,859 INFO L290 TraceCheckUtils]: 65: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,859 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {16754#true} {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:17,860 INFO L290 TraceCheckUtils]: 67: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:31:17,860 INFO L290 TraceCheckUtils]: 68: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:17,861 INFO L290 TraceCheckUtils]: 69: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:17,861 INFO L272 TraceCheckUtils]: 70: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,861 INFO L290 TraceCheckUtils]: 71: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,861 INFO L290 TraceCheckUtils]: 72: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,861 INFO L290 TraceCheckUtils]: 73: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,862 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {16754#true} {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:17,862 INFO L290 TraceCheckUtils]: 75: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:31:17,863 INFO L290 TraceCheckUtils]: 76: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:17,863 INFO L290 TraceCheckUtils]: 77: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:17,863 INFO L272 TraceCheckUtils]: 78: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:31:17,863 INFO L290 TraceCheckUtils]: 79: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:31:17,864 INFO L290 TraceCheckUtils]: 80: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,864 INFO L290 TraceCheckUtils]: 81: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:31:17,864 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {16754#true} {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:17,865 INFO L290 TraceCheckUtils]: 83: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:31:17,865 INFO L290 TraceCheckUtils]: 84: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:31:17,866 INFO L290 TraceCheckUtils]: 85: Hoare triple {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16807#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:31:17,866 INFO L272 TraceCheckUtils]: 86: Hoare triple {16807#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16808#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:31:17,867 INFO L290 TraceCheckUtils]: 87: Hoare triple {16808#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16809#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:31:17,867 INFO L290 TraceCheckUtils]: 88: Hoare triple {16809#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-27 16:31:17,867 INFO L290 TraceCheckUtils]: 89: Hoare triple {16755#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-27 16:31:17,868 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 14 proven. 198 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:31:17,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:31:17,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313279812] [2022-04-27 16:31:17,868 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [313279812] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:31:17,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1779309618] [2022-04-27 16:31:17,868 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:31:17,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:31:17,868 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:31:17,872 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:31:17,875 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 16:31:18,032 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-04-27 16:31:18,032 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:31:18,034 INFO L263 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-27 16:31:18,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:31:18,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:31:18,205 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:31:18,318 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:31:18,318 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:31:18,390 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 16:31:18,390 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 16:32:52,073 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:32:52,132 INFO L272 TraceCheckUtils]: 0: Hoare triple {16754#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:52,132 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-27 16:32:52,132 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:52,132 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:52,132 INFO L272 TraceCheckUtils]: 4: Hoare triple {16754#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:52,132 INFO L290 TraceCheckUtils]: 5: Hoare triple {16754#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16754#true} is VALID [2022-04-27 16:32:52,133 INFO L290 TraceCheckUtils]: 6: Hoare triple {16754#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16759#(= main_~i~0 0)} is VALID [2022-04-27 16:32:52,133 INFO L290 TraceCheckUtils]: 7: Hoare triple {16759#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16759#(= main_~i~0 0)} is VALID [2022-04-27 16:32:52,133 INFO L290 TraceCheckUtils]: 8: Hoare triple {16759#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:32:52,134 INFO L290 TraceCheckUtils]: 9: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:32:52,134 INFO L290 TraceCheckUtils]: 10: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:32:52,135 INFO L290 TraceCheckUtils]: 11: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:32:52,135 INFO L290 TraceCheckUtils]: 12: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:32:52,135 INFO L290 TraceCheckUtils]: 13: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:32:52,136 INFO L290 TraceCheckUtils]: 14: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:32:52,136 INFO L290 TraceCheckUtils]: 15: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:32:52,137 INFO L290 TraceCheckUtils]: 16: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:32:52,137 INFO L290 TraceCheckUtils]: 17: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:32:52,138 INFO L290 TraceCheckUtils]: 18: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:32:52,138 INFO L290 TraceCheckUtils]: 19: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:32:52,138 INFO L290 TraceCheckUtils]: 20: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:32:52,139 INFO L290 TraceCheckUtils]: 21: Hoare triple {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 16:32:52,139 INFO L290 TraceCheckUtils]: 22: Hoare triple {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-27 16:32:52,140 INFO L290 TraceCheckUtils]: 23: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-27 16:32:52,140 INFO L290 TraceCheckUtils]: 24: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16886#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 9 main_~i~0))} is VALID [2022-04-27 16:32:52,141 INFO L290 TraceCheckUtils]: 25: Hoare triple {16886#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 9 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:32:52,141 INFO L290 TraceCheckUtils]: 26: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:32:52,142 INFO L290 TraceCheckUtils]: 27: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:32:52,142 INFO L290 TraceCheckUtils]: 28: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:32:52,142 INFO L290 TraceCheckUtils]: 29: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:32:52,143 INFO L272 TraceCheckUtils]: 30: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,143 INFO L290 TraceCheckUtils]: 31: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,144 INFO L290 TraceCheckUtils]: 32: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,144 INFO L290 TraceCheckUtils]: 33: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,145 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:32:52,145 INFO L290 TraceCheckUtils]: 35: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:32:52,145 INFO L290 TraceCheckUtils]: 36: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,146 INFO L290 TraceCheckUtils]: 37: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,146 INFO L272 TraceCheckUtils]: 38: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,147 INFO L290 TraceCheckUtils]: 39: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,147 INFO L290 TraceCheckUtils]: 40: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,147 INFO L290 TraceCheckUtils]: 41: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,148 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,148 INFO L290 TraceCheckUtils]: 43: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,148 INFO L290 TraceCheckUtils]: 44: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:32:52,149 INFO L290 TraceCheckUtils]: 45: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:32:52,150 INFO L272 TraceCheckUtils]: 46: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,150 INFO L290 TraceCheckUtils]: 47: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,150 INFO L290 TraceCheckUtils]: 48: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,150 INFO L290 TraceCheckUtils]: 49: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,151 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:32:52,151 INFO L290 TraceCheckUtils]: 51: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-27 16:32:52,152 INFO L290 TraceCheckUtils]: 52: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 16:32:52,152 INFO L290 TraceCheckUtils]: 53: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 16:32:52,153 INFO L272 TraceCheckUtils]: 54: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,153 INFO L290 TraceCheckUtils]: 55: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,153 INFO L290 TraceCheckUtils]: 56: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,154 INFO L290 TraceCheckUtils]: 57: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,154 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 16:32:52,155 INFO L290 TraceCheckUtils]: 59: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 16:32:52,155 INFO L290 TraceCheckUtils]: 60: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,155 INFO L290 TraceCheckUtils]: 61: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,156 INFO L272 TraceCheckUtils]: 62: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,156 INFO L290 TraceCheckUtils]: 63: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,157 INFO L290 TraceCheckUtils]: 64: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,157 INFO L290 TraceCheckUtils]: 65: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,157 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,158 INFO L290 TraceCheckUtils]: 67: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,158 INFO L290 TraceCheckUtils]: 68: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 16:32:52,159 INFO L290 TraceCheckUtils]: 69: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 16:32:52,159 INFO L272 TraceCheckUtils]: 70: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,160 INFO L290 TraceCheckUtils]: 71: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,160 INFO L290 TraceCheckUtils]: 72: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,160 INFO L290 TraceCheckUtils]: 73: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,161 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 16:32:52,161 INFO L290 TraceCheckUtils]: 75: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 16:32:52,161 INFO L290 TraceCheckUtils]: 76: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,162 INFO L290 TraceCheckUtils]: 77: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,162 INFO L272 TraceCheckUtils]: 78: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,163 INFO L290 TraceCheckUtils]: 79: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,163 INFO L290 TraceCheckUtils]: 80: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,163 INFO L290 TraceCheckUtils]: 81: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-27 16:32:52,164 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,164 INFO L290 TraceCheckUtils]: 83: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 16:32:52,165 INFO L290 TraceCheckUtils]: 84: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17074#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 5))} is VALID [2022-04-27 16:32:52,165 INFO L290 TraceCheckUtils]: 85: Hoare triple {17074#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16807#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:32:52,165 INFO L272 TraceCheckUtils]: 86: Hoare triple {16807#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:32:52,166 INFO L290 TraceCheckUtils]: 87: Hoare triple {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17085#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:32:52,166 INFO L290 TraceCheckUtils]: 88: Hoare triple {17085#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-27 16:32:52,166 INFO L290 TraceCheckUtils]: 89: Hoare triple {16755#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-27 16:32:52,167 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 1 proven. 211 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 16:32:52,167 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:32:54,615 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:32:54,619 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:32:54,741 INFO L290 TraceCheckUtils]: 89: Hoare triple {16755#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-27 16:32:54,741 INFO L290 TraceCheckUtils]: 88: Hoare triple {17085#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-27 16:32:54,742 INFO L290 TraceCheckUtils]: 87: Hoare triple {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17085#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:32:54,742 INFO L272 TraceCheckUtils]: 86: Hoare triple {16807#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:32:54,743 INFO L290 TraceCheckUtils]: 85: Hoare triple {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16807#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:32:54,744 INFO L290 TraceCheckUtils]: 84: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:32:54,744 INFO L290 TraceCheckUtils]: 83: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:32:54,745 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {16754#true} {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:32:54,745 INFO L290 TraceCheckUtils]: 81: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,745 INFO L290 TraceCheckUtils]: 80: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,745 INFO L290 TraceCheckUtils]: 79: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,745 INFO L272 TraceCheckUtils]: 78: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,746 INFO L290 TraceCheckUtils]: 77: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:32:54,747 INFO L290 TraceCheckUtils]: 76: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:32:54,747 INFO L290 TraceCheckUtils]: 75: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:32:54,748 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {16754#true} {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:32:54,748 INFO L290 TraceCheckUtils]: 73: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,748 INFO L290 TraceCheckUtils]: 72: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,748 INFO L290 TraceCheckUtils]: 71: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,748 INFO L272 TraceCheckUtils]: 70: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,749 INFO L290 TraceCheckUtils]: 69: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:32:54,749 INFO L290 TraceCheckUtils]: 68: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:32:54,750 INFO L290 TraceCheckUtils]: 67: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:32:54,751 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {16754#true} {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:32:54,751 INFO L290 TraceCheckUtils]: 65: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,751 INFO L290 TraceCheckUtils]: 64: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,751 INFO L290 TraceCheckUtils]: 63: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,751 INFO L272 TraceCheckUtils]: 62: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,752 INFO L290 TraceCheckUtils]: 61: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:32:54,752 INFO L290 TraceCheckUtils]: 60: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:32:54,753 INFO L290 TraceCheckUtils]: 59: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:32:54,754 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {16754#true} {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:32:54,754 INFO L290 TraceCheckUtils]: 57: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,754 INFO L290 TraceCheckUtils]: 56: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,754 INFO L290 TraceCheckUtils]: 55: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,754 INFO L272 TraceCheckUtils]: 54: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,754 INFO L290 TraceCheckUtils]: 53: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:32:54,755 INFO L290 TraceCheckUtils]: 52: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:32:54,756 INFO L290 TraceCheckUtils]: 51: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:32:54,756 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {16754#true} {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:32:54,757 INFO L290 TraceCheckUtils]: 49: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,757 INFO L290 TraceCheckUtils]: 48: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,757 INFO L290 TraceCheckUtils]: 47: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,757 INFO L272 TraceCheckUtils]: 46: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,757 INFO L290 TraceCheckUtils]: 45: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:32:54,758 INFO L290 TraceCheckUtils]: 44: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:32:54,758 INFO L290 TraceCheckUtils]: 43: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:32:54,759 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {16754#true} {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:32:54,759 INFO L290 TraceCheckUtils]: 41: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,759 INFO L290 TraceCheckUtils]: 40: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,759 INFO L290 TraceCheckUtils]: 39: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,759 INFO L272 TraceCheckUtils]: 38: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,760 INFO L290 TraceCheckUtils]: 37: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:32:54,760 INFO L290 TraceCheckUtils]: 36: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:32:54,761 INFO L290 TraceCheckUtils]: 35: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:32:54,762 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16754#true} {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:32:54,762 INFO L290 TraceCheckUtils]: 33: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,762 INFO L290 TraceCheckUtils]: 32: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,762 INFO L290 TraceCheckUtils]: 31: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-27 16:32:54,762 INFO L272 TraceCheckUtils]: 30: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-27 16:32:54,762 INFO L290 TraceCheckUtils]: 29: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:32:54,763 INFO L290 TraceCheckUtils]: 28: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:32:54,763 INFO L290 TraceCheckUtils]: 27: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:32:54,763 INFO L290 TraceCheckUtils]: 26: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:32:54,764 INFO L290 TraceCheckUtils]: 25: Hoare triple {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 16:32:54,764 INFO L290 TraceCheckUtils]: 24: Hoare triple {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 16:32:54,765 INFO L290 TraceCheckUtils]: 23: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-27 16:32:54,765 INFO L290 TraceCheckUtils]: 22: Hoare triple {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-27 16:32:54,766 INFO L290 TraceCheckUtils]: 21: Hoare triple {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-27 16:32:54,767 INFO L290 TraceCheckUtils]: 20: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:32:54,767 INFO L290 TraceCheckUtils]: 19: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:32:54,768 INFO L290 TraceCheckUtils]: 18: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:32:54,768 INFO L290 TraceCheckUtils]: 17: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:32:54,768 INFO L290 TraceCheckUtils]: 16: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:32:54,769 INFO L290 TraceCheckUtils]: 15: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:32:54,769 INFO L290 TraceCheckUtils]: 14: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:32:54,770 INFO L290 TraceCheckUtils]: 13: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:32:54,770 INFO L290 TraceCheckUtils]: 12: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:32:54,770 INFO L290 TraceCheckUtils]: 11: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:32:54,771 INFO L290 TraceCheckUtils]: 10: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:32:54,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:32:54,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {16759#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:32:54,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {16759#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16759#(= main_~i~0 0)} is VALID [2022-04-27 16:32:54,772 INFO L290 TraceCheckUtils]: 6: Hoare triple {16754#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16759#(= main_~i~0 0)} is VALID [2022-04-27 16:32:54,772 INFO L290 TraceCheckUtils]: 5: Hoare triple {16754#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16754#true} is VALID [2022-04-27 16:32:54,772 INFO L272 TraceCheckUtils]: 4: Hoare triple {16754#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,772 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-27 16:32:54,773 INFO L272 TraceCheckUtils]: 0: Hoare triple {16754#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-27 16:32:54,773 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 14 proven. 197 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2022-04-27 16:32:54,773 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1779309618] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:32:54,773 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:32:54,773 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25] total 39 [2022-04-27 16:32:54,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693049557] [2022-04-27 16:32:54,774 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:32:54,774 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 90 [2022-04-27 16:32:54,775 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:32:54,776 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:32:54,859 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:32:54,859 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-04-27 16:32:54,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:32:54,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-04-27 16:32:54,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1355, Unknown=8, NotChecked=0, Total=1482 [2022-04-27 16:32:54,860 INFO L87 Difference]: Start difference. First operand 171 states and 180 transitions. Second operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:32:57,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:32:57,416 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2022-04-27 16:32:57,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-27 16:32:57,416 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 90 [2022-04-27 16:32:57,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:32:57,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:32:57,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 90 transitions. [2022-04-27 16:32:57,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:32:57,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 90 transitions. [2022-04-27 16:32:57,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 90 transitions. [2022-04-27 16:32:57,490 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:32:57,493 INFO L225 Difference]: With dead ends: 193 [2022-04-27 16:32:57,493 INFO L226 Difference]: Without dead ends: 193 [2022-04-27 16:32:57,494 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 164 SyntacticMatches, 21 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1004 ImplicationChecksByTransitivity, 95.7s TimeCoverageRelationStatistics Valid=326, Invalid=3956, Unknown=8, NotChecked=0, Total=4290 [2022-04-27 16:32:57,495 INFO L413 NwaCegarLoop]: 32 mSDtfsCounter, 75 mSDsluCounter, 277 mSDsCounter, 0 mSdLazyCounter, 1434 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 309 SdHoareTripleChecker+Invalid, 1579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 1434 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 91 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:32:57,495 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 309 Invalid, 1579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 1434 Invalid, 0 Unknown, 91 Unchecked, 1.1s Time] [2022-04-27 16:32:57,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2022-04-27 16:32:57,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 183. [2022-04-27 16:32:57,499 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:32:57,499 INFO L82 GeneralOperation]: Start isEquivalent. First operand 193 states. Second operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-27 16:32:57,500 INFO L74 IsIncluded]: Start isIncluded. First operand 193 states. Second operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-27 16:32:57,500 INFO L87 Difference]: Start difference. First operand 193 states. Second operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-27 16:32:57,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:32:57,503 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2022-04-27 16:32:57,503 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 203 transitions. [2022-04-27 16:32:57,504 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:32:57,504 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:32:57,504 INFO L74 IsIncluded]: Start isIncluded. First operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) Second operand 193 states. [2022-04-27 16:32:57,504 INFO L87 Difference]: Start difference. First operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) Second operand 193 states. [2022-04-27 16:32:57,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:32:57,507 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2022-04-27 16:32:57,508 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 203 transitions. [2022-04-27 16:32:57,508 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:32:57,508 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:32:57,508 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:32:57,508 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:32:57,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-27 16:32:57,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 193 transitions. [2022-04-27 16:32:57,511 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 193 transitions. Word has length 90 [2022-04-27 16:32:57,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:32:57,511 INFO L495 AbstractCegarLoop]: Abstraction has 183 states and 193 transitions. [2022-04-27 16:32:57,511 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 16:32:57,511 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 193 transitions. [2022-04-27 16:32:57,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-04-27 16:32:57,512 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:32:57,512 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:32:57,535 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-27 16:32:57,735 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:32:57,736 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:32:57,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:32:57,736 INFO L85 PathProgramCache]: Analyzing trace with hash -1271043385, now seen corresponding path program 22 times [2022-04-27 16:32:57,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:32:57,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459522212] [2022-04-27 16:32:57,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:32:57,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:32:57,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,966 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:32:57,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,970 INFO L290 TraceCheckUtils]: 0: Hoare triple {18236#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-27 16:32:57,970 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,970 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,970 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 16:32:57,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,973 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,973 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,974 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 16:32:57,974 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 16:32:57,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,977 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18200#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:57,977 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 16:32:57,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,980 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,980 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,980 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,981 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18205#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:57,981 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-27 16:32:57,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,984 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,984 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,984 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,985 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18210#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:57,985 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-27 16:32:57,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,988 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,988 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,989 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18215#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:57,989 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-27 16:32:57,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,992 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,992 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,992 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,993 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18220#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:57,993 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-27 16:32:57,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:57,996 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:57,996 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,996 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:57,997 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18225#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:57,997 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-04-27 16:32:57,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:58,001 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,001 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18230#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:58,002 INFO L272 TraceCheckUtils]: 0: Hoare triple {18180#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18236#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:32:58,003 INFO L290 TraceCheckUtils]: 1: Hoare triple {18236#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-27 16:32:58,003 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,003 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,003 INFO L272 TraceCheckUtils]: 4: Hoare triple {18180#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,003 INFO L290 TraceCheckUtils]: 5: Hoare triple {18180#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18180#true} is VALID [2022-04-27 16:32:58,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {18180#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18185#(= main_~i~0 0)} is VALID [2022-04-27 16:32:58,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {18185#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18185#(= main_~i~0 0)} is VALID [2022-04-27 16:32:58,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {18185#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18186#(<= main_~i~0 1)} is VALID [2022-04-27 16:32:58,004 INFO L290 TraceCheckUtils]: 9: Hoare triple {18186#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18186#(<= main_~i~0 1)} is VALID [2022-04-27 16:32:58,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {18186#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18187#(<= main_~i~0 2)} is VALID [2022-04-27 16:32:58,005 INFO L290 TraceCheckUtils]: 11: Hoare triple {18187#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18187#(<= main_~i~0 2)} is VALID [2022-04-27 16:32:58,006 INFO L290 TraceCheckUtils]: 12: Hoare triple {18187#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18188#(<= main_~i~0 3)} is VALID [2022-04-27 16:32:58,006 INFO L290 TraceCheckUtils]: 13: Hoare triple {18188#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18188#(<= main_~i~0 3)} is VALID [2022-04-27 16:32:58,006 INFO L290 TraceCheckUtils]: 14: Hoare triple {18188#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18189#(<= main_~i~0 4)} is VALID [2022-04-27 16:32:58,007 INFO L290 TraceCheckUtils]: 15: Hoare triple {18189#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18189#(<= main_~i~0 4)} is VALID [2022-04-27 16:32:58,007 INFO L290 TraceCheckUtils]: 16: Hoare triple {18189#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18190#(<= main_~i~0 5)} is VALID [2022-04-27 16:32:58,007 INFO L290 TraceCheckUtils]: 17: Hoare triple {18190#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18190#(<= main_~i~0 5)} is VALID [2022-04-27 16:32:58,008 INFO L290 TraceCheckUtils]: 18: Hoare triple {18190#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18191#(<= main_~i~0 6)} is VALID [2022-04-27 16:32:58,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {18191#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18191#(<= main_~i~0 6)} is VALID [2022-04-27 16:32:58,009 INFO L290 TraceCheckUtils]: 20: Hoare triple {18191#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18192#(<= main_~i~0 7)} is VALID [2022-04-27 16:32:58,009 INFO L290 TraceCheckUtils]: 21: Hoare triple {18192#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18192#(<= main_~i~0 7)} is VALID [2022-04-27 16:32:58,009 INFO L290 TraceCheckUtils]: 22: Hoare triple {18192#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18193#(<= main_~i~0 8)} is VALID [2022-04-27 16:32:58,010 INFO L290 TraceCheckUtils]: 23: Hoare triple {18193#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18194#(<= main_~n~0 8)} is VALID [2022-04-27 16:32:58,010 INFO L290 TraceCheckUtils]: 24: Hoare triple {18194#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 16:32:58,011 INFO L290 TraceCheckUtils]: 25: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 16:32:58,011 INFO L272 TraceCheckUtils]: 26: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,011 INFO L290 TraceCheckUtils]: 27: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,011 INFO L290 TraceCheckUtils]: 28: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,011 INFO L290 TraceCheckUtils]: 29: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,012 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18180#true} {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 16:32:58,012 INFO L290 TraceCheckUtils]: 31: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 16:32:58,012 INFO L290 TraceCheckUtils]: 32: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:58,013 INFO L290 TraceCheckUtils]: 33: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:58,013 INFO L272 TraceCheckUtils]: 34: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,013 INFO L290 TraceCheckUtils]: 35: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,013 INFO L290 TraceCheckUtils]: 36: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,013 INFO L290 TraceCheckUtils]: 37: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,014 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18180#true} {18200#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:58,014 INFO L290 TraceCheckUtils]: 39: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:58,014 INFO L290 TraceCheckUtils]: 40: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:58,015 INFO L290 TraceCheckUtils]: 41: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:58,015 INFO L272 TraceCheckUtils]: 42: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,015 INFO L290 TraceCheckUtils]: 43: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,015 INFO L290 TraceCheckUtils]: 44: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,015 INFO L290 TraceCheckUtils]: 45: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,016 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18180#true} {18205#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:58,016 INFO L290 TraceCheckUtils]: 47: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:58,016 INFO L290 TraceCheckUtils]: 48: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:58,017 INFO L290 TraceCheckUtils]: 49: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:58,017 INFO L272 TraceCheckUtils]: 50: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,017 INFO L290 TraceCheckUtils]: 51: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,017 INFO L290 TraceCheckUtils]: 52: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,017 INFO L290 TraceCheckUtils]: 53: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,018 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18180#true} {18210#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:58,018 INFO L290 TraceCheckUtils]: 55: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:58,018 INFO L290 TraceCheckUtils]: 56: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:58,019 INFO L290 TraceCheckUtils]: 57: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:58,019 INFO L272 TraceCheckUtils]: 58: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,019 INFO L290 TraceCheckUtils]: 59: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,019 INFO L290 TraceCheckUtils]: 60: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,019 INFO L290 TraceCheckUtils]: 61: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,020 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18180#true} {18215#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:58,020 INFO L290 TraceCheckUtils]: 63: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:58,020 INFO L290 TraceCheckUtils]: 64: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:58,021 INFO L290 TraceCheckUtils]: 65: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:58,021 INFO L272 TraceCheckUtils]: 66: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,021 INFO L290 TraceCheckUtils]: 67: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,021 INFO L290 TraceCheckUtils]: 68: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,021 INFO L290 TraceCheckUtils]: 69: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,022 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18180#true} {18220#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:58,022 INFO L290 TraceCheckUtils]: 71: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:58,023 INFO L290 TraceCheckUtils]: 72: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:58,023 INFO L290 TraceCheckUtils]: 73: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:58,023 INFO L272 TraceCheckUtils]: 74: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,023 INFO L290 TraceCheckUtils]: 75: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,023 INFO L290 TraceCheckUtils]: 76: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,023 INFO L290 TraceCheckUtils]: 77: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,024 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18180#true} {18225#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:58,024 INFO L290 TraceCheckUtils]: 79: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:58,025 INFO L290 TraceCheckUtils]: 80: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:58,025 INFO L290 TraceCheckUtils]: 81: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:58,025 INFO L272 TraceCheckUtils]: 82: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,025 INFO L290 TraceCheckUtils]: 83: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,025 INFO L290 TraceCheckUtils]: 84: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,025 INFO L290 TraceCheckUtils]: 85: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,026 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {18180#true} {18230#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:58,026 INFO L290 TraceCheckUtils]: 87: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:58,027 INFO L290 TraceCheckUtils]: 88: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18235#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:32:58,027 INFO L290 TraceCheckUtils]: 89: Hoare triple {18235#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18181#false} is VALID [2022-04-27 16:32:58,027 INFO L272 TraceCheckUtils]: 90: Hoare triple {18181#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18181#false} is VALID [2022-04-27 16:32:58,027 INFO L290 TraceCheckUtils]: 91: Hoare triple {18181#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18181#false} is VALID [2022-04-27 16:32:58,027 INFO L290 TraceCheckUtils]: 92: Hoare triple {18181#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-27 16:32:58,027 INFO L290 TraceCheckUtils]: 93: Hoare triple {18181#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-27 16:32:58,028 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 115 proven. 93 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:32:58,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:32:58,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459522212] [2022-04-27 16:32:58,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1459522212] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:32:58,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [57336021] [2022-04-27 16:32:58,028 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:32:58,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:32:58,029 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:32:58,032 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:32:58,036 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 16:32:58,228 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:32:58,229 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:32:58,230 INFO L263 TraceCheckSpWp]: Trace formula consists of 250 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 16:32:58,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:32:58,269 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:32:58,930 INFO L272 TraceCheckUtils]: 0: Hoare triple {18180#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,931 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-27 16:32:58,931 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,931 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,931 INFO L272 TraceCheckUtils]: 4: Hoare triple {18180#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,931 INFO L290 TraceCheckUtils]: 5: Hoare triple {18180#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18180#true} is VALID [2022-04-27 16:32:58,931 INFO L290 TraceCheckUtils]: 6: Hoare triple {18180#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18258#(<= main_~i~0 0)} is VALID [2022-04-27 16:32:58,932 INFO L290 TraceCheckUtils]: 7: Hoare triple {18258#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18258#(<= main_~i~0 0)} is VALID [2022-04-27 16:32:58,932 INFO L290 TraceCheckUtils]: 8: Hoare triple {18258#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18186#(<= main_~i~0 1)} is VALID [2022-04-27 16:32:58,932 INFO L290 TraceCheckUtils]: 9: Hoare triple {18186#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18186#(<= main_~i~0 1)} is VALID [2022-04-27 16:32:58,933 INFO L290 TraceCheckUtils]: 10: Hoare triple {18186#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18187#(<= main_~i~0 2)} is VALID [2022-04-27 16:32:58,933 INFO L290 TraceCheckUtils]: 11: Hoare triple {18187#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18187#(<= main_~i~0 2)} is VALID [2022-04-27 16:32:58,933 INFO L290 TraceCheckUtils]: 12: Hoare triple {18187#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18188#(<= main_~i~0 3)} is VALID [2022-04-27 16:32:58,934 INFO L290 TraceCheckUtils]: 13: Hoare triple {18188#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18188#(<= main_~i~0 3)} is VALID [2022-04-27 16:32:58,934 INFO L290 TraceCheckUtils]: 14: Hoare triple {18188#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18189#(<= main_~i~0 4)} is VALID [2022-04-27 16:32:58,934 INFO L290 TraceCheckUtils]: 15: Hoare triple {18189#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18189#(<= main_~i~0 4)} is VALID [2022-04-27 16:32:58,935 INFO L290 TraceCheckUtils]: 16: Hoare triple {18189#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18190#(<= main_~i~0 5)} is VALID [2022-04-27 16:32:58,935 INFO L290 TraceCheckUtils]: 17: Hoare triple {18190#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18190#(<= main_~i~0 5)} is VALID [2022-04-27 16:32:58,935 INFO L290 TraceCheckUtils]: 18: Hoare triple {18190#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18191#(<= main_~i~0 6)} is VALID [2022-04-27 16:32:58,936 INFO L290 TraceCheckUtils]: 19: Hoare triple {18191#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18191#(<= main_~i~0 6)} is VALID [2022-04-27 16:32:58,936 INFO L290 TraceCheckUtils]: 20: Hoare triple {18191#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18192#(<= main_~i~0 7)} is VALID [2022-04-27 16:32:58,936 INFO L290 TraceCheckUtils]: 21: Hoare triple {18192#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18192#(<= main_~i~0 7)} is VALID [2022-04-27 16:32:58,937 INFO L290 TraceCheckUtils]: 22: Hoare triple {18192#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18193#(<= main_~i~0 8)} is VALID [2022-04-27 16:32:58,937 INFO L290 TraceCheckUtils]: 23: Hoare triple {18193#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18194#(<= main_~n~0 8)} is VALID [2022-04-27 16:32:58,938 INFO L290 TraceCheckUtils]: 24: Hoare triple {18194#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,938 INFO L290 TraceCheckUtils]: 25: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,938 INFO L272 TraceCheckUtils]: 26: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,938 INFO L290 TraceCheckUtils]: 27: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,938 INFO L290 TraceCheckUtils]: 28: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,938 INFO L290 TraceCheckUtils]: 29: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,939 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18180#true} {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,939 INFO L290 TraceCheckUtils]: 31: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,939 INFO L290 TraceCheckUtils]: 32: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,940 INFO L290 TraceCheckUtils]: 33: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,940 INFO L272 TraceCheckUtils]: 34: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,940 INFO L290 TraceCheckUtils]: 35: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,940 INFO L290 TraceCheckUtils]: 36: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,940 INFO L290 TraceCheckUtils]: 37: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,941 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18180#true} {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,941 INFO L290 TraceCheckUtils]: 39: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,941 INFO L290 TraceCheckUtils]: 40: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 16:32:58,942 INFO L290 TraceCheckUtils]: 41: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 16:32:58,942 INFO L272 TraceCheckUtils]: 42: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,942 INFO L290 TraceCheckUtils]: 43: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,942 INFO L290 TraceCheckUtils]: 44: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,942 INFO L290 TraceCheckUtils]: 45: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,942 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18180#true} {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 16:32:58,943 INFO L290 TraceCheckUtils]: 47: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 16:32:58,943 INFO L290 TraceCheckUtils]: 48: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 16:32:58,944 INFO L290 TraceCheckUtils]: 49: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 16:32:58,944 INFO L272 TraceCheckUtils]: 50: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,944 INFO L290 TraceCheckUtils]: 51: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,944 INFO L290 TraceCheckUtils]: 52: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,944 INFO L290 TraceCheckUtils]: 53: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,944 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18180#true} {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 16:32:58,945 INFO L290 TraceCheckUtils]: 55: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 16:32:58,945 INFO L290 TraceCheckUtils]: 56: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 16:32:58,945 INFO L290 TraceCheckUtils]: 57: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 16:32:58,945 INFO L272 TraceCheckUtils]: 58: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,946 INFO L290 TraceCheckUtils]: 59: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,946 INFO L290 TraceCheckUtils]: 60: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,946 INFO L290 TraceCheckUtils]: 61: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,946 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18180#true} {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 16:32:58,946 INFO L290 TraceCheckUtils]: 63: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 16:32:58,947 INFO L290 TraceCheckUtils]: 64: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 16:32:58,947 INFO L290 TraceCheckUtils]: 65: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 16:32:58,947 INFO L272 TraceCheckUtils]: 66: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,947 INFO L290 TraceCheckUtils]: 67: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,947 INFO L290 TraceCheckUtils]: 68: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,948 INFO L290 TraceCheckUtils]: 69: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,948 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18180#true} {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 16:32:58,949 INFO L290 TraceCheckUtils]: 71: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 16:32:58,949 INFO L290 TraceCheckUtils]: 72: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,950 INFO L290 TraceCheckUtils]: 73: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,950 INFO L272 TraceCheckUtils]: 74: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,950 INFO L290 TraceCheckUtils]: 75: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,950 INFO L290 TraceCheckUtils]: 76: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,950 INFO L290 TraceCheckUtils]: 77: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,950 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18180#true} {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,951 INFO L290 TraceCheckUtils]: 79: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,951 INFO L290 TraceCheckUtils]: 80: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,951 INFO L290 TraceCheckUtils]: 81: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,952 INFO L272 TraceCheckUtils]: 82: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:58,952 INFO L290 TraceCheckUtils]: 83: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:58,952 INFO L290 TraceCheckUtils]: 84: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,952 INFO L290 TraceCheckUtils]: 85: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:58,952 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {18180#true} {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,953 INFO L290 TraceCheckUtils]: 87: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 16:32:58,953 INFO L290 TraceCheckUtils]: 88: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18513#(and (<= main_~n~0 8) (<= 8 main_~i~1))} is VALID [2022-04-27 16:32:58,953 INFO L290 TraceCheckUtils]: 89: Hoare triple {18513#(and (<= main_~n~0 8) (<= 8 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18181#false} is VALID [2022-04-27 16:32:58,953 INFO L272 TraceCheckUtils]: 90: Hoare triple {18181#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18181#false} is VALID [2022-04-27 16:32:58,954 INFO L290 TraceCheckUtils]: 91: Hoare triple {18181#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18181#false} is VALID [2022-04-27 16:32:58,954 INFO L290 TraceCheckUtils]: 92: Hoare triple {18181#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-27 16:32:58,954 INFO L290 TraceCheckUtils]: 93: Hoare triple {18181#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-27 16:32:58,954 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 144 proven. 64 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:32:58,954 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:32:59,363 INFO L290 TraceCheckUtils]: 93: Hoare triple {18181#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-27 16:32:59,363 INFO L290 TraceCheckUtils]: 92: Hoare triple {18181#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-27 16:32:59,363 INFO L290 TraceCheckUtils]: 91: Hoare triple {18181#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18181#false} is VALID [2022-04-27 16:32:59,364 INFO L272 TraceCheckUtils]: 90: Hoare triple {18181#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18181#false} is VALID [2022-04-27 16:32:59,364 INFO L290 TraceCheckUtils]: 89: Hoare triple {18235#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18181#false} is VALID [2022-04-27 16:32:59,364 INFO L290 TraceCheckUtils]: 88: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18235#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 16:32:59,365 INFO L290 TraceCheckUtils]: 87: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:59,365 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {18180#true} {18230#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:59,365 INFO L290 TraceCheckUtils]: 85: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,365 INFO L290 TraceCheckUtils]: 84: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,365 INFO L290 TraceCheckUtils]: 83: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,365 INFO L272 TraceCheckUtils]: 82: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,366 INFO L290 TraceCheckUtils]: 81: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:59,366 INFO L290 TraceCheckUtils]: 80: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 16:32:59,366 INFO L290 TraceCheckUtils]: 79: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:59,367 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18180#true} {18225#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:59,367 INFO L290 TraceCheckUtils]: 77: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,367 INFO L290 TraceCheckUtils]: 76: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,367 INFO L290 TraceCheckUtils]: 75: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,367 INFO L272 TraceCheckUtils]: 74: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,367 INFO L290 TraceCheckUtils]: 73: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:59,368 INFO L290 TraceCheckUtils]: 72: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 16:32:59,368 INFO L290 TraceCheckUtils]: 71: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:59,369 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18180#true} {18220#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:59,369 INFO L290 TraceCheckUtils]: 69: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,369 INFO L290 TraceCheckUtils]: 68: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,369 INFO L290 TraceCheckUtils]: 67: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,369 INFO L272 TraceCheckUtils]: 66: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,369 INFO L290 TraceCheckUtils]: 65: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:59,370 INFO L290 TraceCheckUtils]: 64: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 16:32:59,370 INFO L290 TraceCheckUtils]: 63: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:59,370 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18180#true} {18215#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:59,370 INFO L290 TraceCheckUtils]: 61: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,370 INFO L290 TraceCheckUtils]: 60: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,371 INFO L290 TraceCheckUtils]: 59: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,371 INFO L272 TraceCheckUtils]: 58: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,371 INFO L290 TraceCheckUtils]: 57: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:59,371 INFO L290 TraceCheckUtils]: 56: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 16:32:59,372 INFO L290 TraceCheckUtils]: 55: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:59,372 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18180#true} {18210#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:59,372 INFO L290 TraceCheckUtils]: 53: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,372 INFO L290 TraceCheckUtils]: 52: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,372 INFO L290 TraceCheckUtils]: 51: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,372 INFO L272 TraceCheckUtils]: 50: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,373 INFO L290 TraceCheckUtils]: 49: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:59,373 INFO L290 TraceCheckUtils]: 48: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 16:32:59,373 INFO L290 TraceCheckUtils]: 47: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:59,374 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18180#true} {18205#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:59,374 INFO L290 TraceCheckUtils]: 45: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,374 INFO L290 TraceCheckUtils]: 44: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,374 INFO L290 TraceCheckUtils]: 43: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,374 INFO L272 TraceCheckUtils]: 42: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,374 INFO L290 TraceCheckUtils]: 41: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:59,375 INFO L290 TraceCheckUtils]: 40: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 16:32:59,375 INFO L290 TraceCheckUtils]: 39: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:59,375 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18180#true} {18200#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:59,375 INFO L290 TraceCheckUtils]: 37: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,376 INFO L290 TraceCheckUtils]: 36: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,376 INFO L290 TraceCheckUtils]: 35: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,376 INFO L272 TraceCheckUtils]: 34: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,376 INFO L290 TraceCheckUtils]: 33: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:59,376 INFO L290 TraceCheckUtils]: 32: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 16:32:59,377 INFO L290 TraceCheckUtils]: 31: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 16:32:59,377 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18180#true} {18712#(<= main_~n~0 (+ main_~i~1 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 16:32:59,377 INFO L290 TraceCheckUtils]: 29: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,377 INFO L290 TraceCheckUtils]: 28: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,377 INFO L290 TraceCheckUtils]: 27: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-27 16:32:59,377 INFO L272 TraceCheckUtils]: 26: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-27 16:32:59,378 INFO L290 TraceCheckUtils]: 25: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 16:32:59,378 INFO L290 TraceCheckUtils]: 24: Hoare triple {18194#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 16:32:59,378 INFO L290 TraceCheckUtils]: 23: Hoare triple {18193#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18194#(<= main_~n~0 8)} is VALID [2022-04-27 16:32:59,379 INFO L290 TraceCheckUtils]: 22: Hoare triple {18192#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18193#(<= main_~i~0 8)} is VALID [2022-04-27 16:32:59,379 INFO L290 TraceCheckUtils]: 21: Hoare triple {18192#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18192#(<= main_~i~0 7)} is VALID [2022-04-27 16:32:59,379 INFO L290 TraceCheckUtils]: 20: Hoare triple {18191#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18192#(<= main_~i~0 7)} is VALID [2022-04-27 16:32:59,380 INFO L290 TraceCheckUtils]: 19: Hoare triple {18191#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18191#(<= main_~i~0 6)} is VALID [2022-04-27 16:32:59,380 INFO L290 TraceCheckUtils]: 18: Hoare triple {18190#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18191#(<= main_~i~0 6)} is VALID [2022-04-27 16:32:59,380 INFO L290 TraceCheckUtils]: 17: Hoare triple {18190#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18190#(<= main_~i~0 5)} is VALID [2022-04-27 16:32:59,381 INFO L290 TraceCheckUtils]: 16: Hoare triple {18189#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18190#(<= main_~i~0 5)} is VALID [2022-04-27 16:32:59,381 INFO L290 TraceCheckUtils]: 15: Hoare triple {18189#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18189#(<= main_~i~0 4)} is VALID [2022-04-27 16:32:59,381 INFO L290 TraceCheckUtils]: 14: Hoare triple {18188#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18189#(<= main_~i~0 4)} is VALID [2022-04-27 16:32:59,382 INFO L290 TraceCheckUtils]: 13: Hoare triple {18188#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18188#(<= main_~i~0 3)} is VALID [2022-04-27 16:32:59,382 INFO L290 TraceCheckUtils]: 12: Hoare triple {18187#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18188#(<= main_~i~0 3)} is VALID [2022-04-27 16:32:59,382 INFO L290 TraceCheckUtils]: 11: Hoare triple {18187#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18187#(<= main_~i~0 2)} is VALID [2022-04-27 16:32:59,383 INFO L290 TraceCheckUtils]: 10: Hoare triple {18186#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18187#(<= main_~i~0 2)} is VALID [2022-04-27 16:32:59,383 INFO L290 TraceCheckUtils]: 9: Hoare triple {18186#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18186#(<= main_~i~0 1)} is VALID [2022-04-27 16:32:59,383 INFO L290 TraceCheckUtils]: 8: Hoare triple {18258#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18186#(<= main_~i~0 1)} is VALID [2022-04-27 16:32:59,384 INFO L290 TraceCheckUtils]: 7: Hoare triple {18258#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18258#(<= main_~i~0 0)} is VALID [2022-04-27 16:32:59,384 INFO L290 TraceCheckUtils]: 6: Hoare triple {18180#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18258#(<= main_~i~0 0)} is VALID [2022-04-27 16:32:59,384 INFO L290 TraceCheckUtils]: 5: Hoare triple {18180#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18180#true} is VALID [2022-04-27 16:32:59,384 INFO L272 TraceCheckUtils]: 4: Hoare triple {18180#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,384 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-27 16:32:59,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {18180#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-27 16:32:59,385 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 144 proven. 64 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:32:59,385 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [57336021] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:32:59,385 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:32:59,385 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 33 [2022-04-27 16:32:59,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482667995] [2022-04-27 16:32:59,385 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:32:59,386 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) Word has length 94 [2022-04-27 16:32:59,386 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:32:59,386 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:32:59,461 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:32:59,461 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-27 16:32:59,461 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:32:59,462 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-27 16:32:59,462 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=819, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 16:32:59,462 INFO L87 Difference]: Start difference. First operand 183 states and 193 transitions. Second operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:33:00,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:33:00,432 INFO L93 Difference]: Finished difference Result 190 states and 200 transitions. [2022-04-27 16:33:00,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-27 16:33:00,432 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) Word has length 94 [2022-04-27 16:33:00,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:33:00,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:33:00,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-27 16:33:00,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:33:00,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-27 16:33:00,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 82 transitions. [2022-04-27 16:33:00,514 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:33:00,516 INFO L225 Difference]: With dead ends: 190 [2022-04-27 16:33:00,516 INFO L226 Difference]: Without dead ends: 152 [2022-04-27 16:33:00,517 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 194 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 689 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=534, Invalid=2118, Unknown=0, NotChecked=0, Total=2652 [2022-04-27 16:33:00,517 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 47 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 477 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 521 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 477 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 16:33:00,517 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 76 Invalid, 521 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 477 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 16:33:00,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-04-27 16:33:00,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2022-04-27 16:33:00,521 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:33:00,521 INFO L82 GeneralOperation]: Start isEquivalent. First operand 152 states. Second operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 16:33:00,521 INFO L74 IsIncluded]: Start isIncluded. First operand 152 states. Second operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 16:33:00,521 INFO L87 Difference]: Start difference. First operand 152 states. Second operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 16:33:00,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:33:00,523 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2022-04-27 16:33:00,523 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 155 transitions. [2022-04-27 16:33:00,524 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:33:00,524 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:33:00,524 INFO L74 IsIncluded]: Start isIncluded. First operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) Second operand 152 states. [2022-04-27 16:33:00,524 INFO L87 Difference]: Start difference. First operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) Second operand 152 states. [2022-04-27 16:33:00,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:33:00,526 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2022-04-27 16:33:00,526 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 155 transitions. [2022-04-27 16:33:00,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:33:00,527 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:33:00,527 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:33:00,527 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:33:00,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 16:33:00,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 155 transitions. [2022-04-27 16:33:00,529 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 155 transitions. Word has length 94 [2022-04-27 16:33:00,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:33:00,529 INFO L495 AbstractCegarLoop]: Abstraction has 152 states and 155 transitions. [2022-04-27 16:33:00,529 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 16:33:00,529 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 155 transitions. [2022-04-27 16:33:00,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2022-04-27 16:33:00,530 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:33:00,530 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:33:00,553 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-04-27 16:33:00,743 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:33:00,743 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:33:00,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:33:00,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1012122373, now seen corresponding path program 23 times [2022-04-27 16:33:00,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:33:00,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82748929] [2022-04-27 16:33:00,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:33:00,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:33:00,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,101 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:33:01,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,112 INFO L290 TraceCheckUtils]: 0: Hoare triple {19555#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-27 16:33:01,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,112 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,112 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 16:33:01,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,114 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,114 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,114 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,115 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:33:01,115 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 16:33:01,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,117 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,118 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,118 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:33:01,118 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-27 16:33:01,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,121 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,122 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:33:01,122 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-27 16:33:01,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,124 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,124 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,125 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:33:01,125 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-27 16:33:01,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,128 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,128 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,128 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,128 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:33:01,129 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-27 16:33:01,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,132 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,133 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,133 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:33:01,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-04-27 16:33:01,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,136 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,136 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,136 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,137 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:33:01,137 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2022-04-27 16:33:01,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,139 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,139 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,140 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:33:01,141 INFO L272 TraceCheckUtils]: 0: Hoare triple {19495#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19555#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:33:01,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {19555#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-27 16:33:01,141 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,141 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,141 INFO L272 TraceCheckUtils]: 4: Hoare triple {19495#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,141 INFO L290 TraceCheckUtils]: 5: Hoare triple {19495#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19495#true} is VALID [2022-04-27 16:33:01,141 INFO L290 TraceCheckUtils]: 6: Hoare triple {19495#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19500#(= main_~i~0 0)} is VALID [2022-04-27 16:33:01,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {19500#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19500#(= main_~i~0 0)} is VALID [2022-04-27 16:33:01,142 INFO L290 TraceCheckUtils]: 8: Hoare triple {19500#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:33:01,143 INFO L290 TraceCheckUtils]: 9: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:33:01,143 INFO L290 TraceCheckUtils]: 10: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:33:01,144 INFO L290 TraceCheckUtils]: 11: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:33:01,144 INFO L290 TraceCheckUtils]: 12: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:33:01,144 INFO L290 TraceCheckUtils]: 13: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:33:01,145 INFO L290 TraceCheckUtils]: 14: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:33:01,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:33:01,146 INFO L290 TraceCheckUtils]: 16: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:33:01,146 INFO L290 TraceCheckUtils]: 17: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:33:01,147 INFO L290 TraceCheckUtils]: 18: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:33:01,147 INFO L290 TraceCheckUtils]: 19: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:33:01,148 INFO L290 TraceCheckUtils]: 20: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:33:01,148 INFO L290 TraceCheckUtils]: 21: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:33:01,149 INFO L290 TraceCheckUtils]: 22: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 16:33:01,149 INFO L290 TraceCheckUtils]: 23: Hoare triple {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19509#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 16:33:01,150 INFO L290 TraceCheckUtils]: 24: Hoare triple {19509#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:33:01,150 INFO L290 TraceCheckUtils]: 25: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:33:01,151 INFO L290 TraceCheckUtils]: 26: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:33:01,151 INFO L290 TraceCheckUtils]: 27: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:33:01,151 INFO L272 TraceCheckUtils]: 28: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,151 INFO L290 TraceCheckUtils]: 29: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,151 INFO L290 TraceCheckUtils]: 30: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,151 INFO L290 TraceCheckUtils]: 31: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,152 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19495#true} {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:33:01,152 INFO L290 TraceCheckUtils]: 33: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:33:01,153 INFO L290 TraceCheckUtils]: 34: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:33:01,153 INFO L290 TraceCheckUtils]: 35: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:33:01,153 INFO L272 TraceCheckUtils]: 36: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,154 INFO L290 TraceCheckUtils]: 37: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,154 INFO L290 TraceCheckUtils]: 38: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,154 INFO L290 TraceCheckUtils]: 39: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,154 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19495#true} {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:33:01,155 INFO L290 TraceCheckUtils]: 41: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:33:01,155 INFO L290 TraceCheckUtils]: 42: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:33:01,156 INFO L290 TraceCheckUtils]: 43: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:33:01,156 INFO L272 TraceCheckUtils]: 44: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,156 INFO L290 TraceCheckUtils]: 45: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,156 INFO L290 TraceCheckUtils]: 46: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,156 INFO L290 TraceCheckUtils]: 47: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,156 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19495#true} {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:33:01,157 INFO L290 TraceCheckUtils]: 49: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:33:01,157 INFO L290 TraceCheckUtils]: 50: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:33:01,158 INFO L290 TraceCheckUtils]: 51: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:33:01,158 INFO L272 TraceCheckUtils]: 52: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,158 INFO L290 TraceCheckUtils]: 53: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,158 INFO L290 TraceCheckUtils]: 54: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,158 INFO L290 TraceCheckUtils]: 55: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,159 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19495#true} {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:33:01,159 INFO L290 TraceCheckUtils]: 57: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:33:01,160 INFO L290 TraceCheckUtils]: 58: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:33:01,160 INFO L290 TraceCheckUtils]: 59: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:33:01,160 INFO L272 TraceCheckUtils]: 60: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,160 INFO L290 TraceCheckUtils]: 61: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,160 INFO L290 TraceCheckUtils]: 62: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,161 INFO L290 TraceCheckUtils]: 63: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,161 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19495#true} {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:33:01,161 INFO L290 TraceCheckUtils]: 65: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:33:01,162 INFO L290 TraceCheckUtils]: 66: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:33:01,162 INFO L290 TraceCheckUtils]: 67: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:33:01,163 INFO L272 TraceCheckUtils]: 68: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,163 INFO L290 TraceCheckUtils]: 69: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,163 INFO L290 TraceCheckUtils]: 70: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,163 INFO L290 TraceCheckUtils]: 71: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,163 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19495#true} {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:33:01,164 INFO L290 TraceCheckUtils]: 73: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:33:01,164 INFO L290 TraceCheckUtils]: 74: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:33:01,165 INFO L290 TraceCheckUtils]: 75: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:33:01,165 INFO L272 TraceCheckUtils]: 76: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,165 INFO L290 TraceCheckUtils]: 77: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,165 INFO L290 TraceCheckUtils]: 78: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,165 INFO L290 TraceCheckUtils]: 79: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,166 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19495#true} {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:33:01,166 INFO L290 TraceCheckUtils]: 81: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:33:01,167 INFO L290 TraceCheckUtils]: 82: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:33:01,167 INFO L290 TraceCheckUtils]: 83: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:33:01,167 INFO L272 TraceCheckUtils]: 84: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:33:01,167 INFO L290 TraceCheckUtils]: 85: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:33:01,167 INFO L290 TraceCheckUtils]: 86: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,167 INFO L290 TraceCheckUtils]: 87: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:33:01,168 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {19495#true} {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:33:01,168 INFO L290 TraceCheckUtils]: 89: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:33:01,169 INFO L290 TraceCheckUtils]: 90: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:33:01,169 INFO L290 TraceCheckUtils]: 91: Hoare triple {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19552#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:33:01,170 INFO L272 TraceCheckUtils]: 92: Hoare triple {19552#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19553#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:33:01,170 INFO L290 TraceCheckUtils]: 93: Hoare triple {19553#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19554#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:33:01,171 INFO L290 TraceCheckUtils]: 94: Hoare triple {19554#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-27 16:33:01,171 INFO L290 TraceCheckUtils]: 95: Hoare triple {19496#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-27 16:33:01,171 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 16 proven. 209 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:33:01,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:33:01,171 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82748929] [2022-04-27 16:33:01,172 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [82748929] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:33:01,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1068914146] [2022-04-27 16:33:01,172 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 16:33:01,172 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:33:01,172 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:33:01,176 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:33:01,210 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-27 16:33:01,340 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2022-04-27 16:33:01,340 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:33:01,342 INFO L263 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-27 16:33:01,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:33:01,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:33:01,519 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:34:40,015 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 16:34:40,076 INFO L272 TraceCheckUtils]: 0: Hoare triple {19495#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:40,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-27 16:34:40,076 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:40,076 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:40,076 INFO L272 TraceCheckUtils]: 4: Hoare triple {19495#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:40,076 INFO L290 TraceCheckUtils]: 5: Hoare triple {19495#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19495#true} is VALID [2022-04-27 16:34:40,077 INFO L290 TraceCheckUtils]: 6: Hoare triple {19495#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19500#(= main_~i~0 0)} is VALID [2022-04-27 16:34:40,077 INFO L290 TraceCheckUtils]: 7: Hoare triple {19500#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19500#(= main_~i~0 0)} is VALID [2022-04-27 16:34:40,077 INFO L290 TraceCheckUtils]: 8: Hoare triple {19500#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:34:40,078 INFO L290 TraceCheckUtils]: 9: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:34:40,078 INFO L290 TraceCheckUtils]: 10: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:34:40,078 INFO L290 TraceCheckUtils]: 11: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:34:40,079 INFO L290 TraceCheckUtils]: 12: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:34:40,079 INFO L290 TraceCheckUtils]: 13: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:34:40,080 INFO L290 TraceCheckUtils]: 14: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:34:40,080 INFO L290 TraceCheckUtils]: 15: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:34:40,081 INFO L290 TraceCheckUtils]: 16: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:34:40,081 INFO L290 TraceCheckUtils]: 17: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:34:40,081 INFO L290 TraceCheckUtils]: 18: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:34:40,082 INFO L290 TraceCheckUtils]: 19: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:34:40,082 INFO L290 TraceCheckUtils]: 20: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:34:40,083 INFO L290 TraceCheckUtils]: 21: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:34:40,083 INFO L290 TraceCheckUtils]: 22: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 16:34:40,083 INFO L290 TraceCheckUtils]: 23: Hoare triple {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:40,084 INFO L290 TraceCheckUtils]: 24: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:40,084 INFO L290 TraceCheckUtils]: 25: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:40,084 INFO L290 TraceCheckUtils]: 26: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:40,085 INFO L290 TraceCheckUtils]: 27: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:40,086 INFO L272 TraceCheckUtils]: 28: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,086 INFO L290 TraceCheckUtils]: 29: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,086 INFO L290 TraceCheckUtils]: 30: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,087 INFO L290 TraceCheckUtils]: 31: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,087 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:40,087 INFO L290 TraceCheckUtils]: 33: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:40,088 INFO L290 TraceCheckUtils]: 34: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,088 INFO L290 TraceCheckUtils]: 35: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,089 INFO L272 TraceCheckUtils]: 36: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,089 INFO L290 TraceCheckUtils]: 37: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,090 INFO L290 TraceCheckUtils]: 38: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,090 INFO L290 TraceCheckUtils]: 39: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,090 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,091 INFO L290 TraceCheckUtils]: 41: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,091 INFO L290 TraceCheckUtils]: 42: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,092 INFO L290 TraceCheckUtils]: 43: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,092 INFO L272 TraceCheckUtils]: 44: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,093 INFO L290 TraceCheckUtils]: 45: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,093 INFO L290 TraceCheckUtils]: 46: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,093 INFO L290 TraceCheckUtils]: 47: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,094 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,094 INFO L290 TraceCheckUtils]: 49: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,095 INFO L290 TraceCheckUtils]: 50: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,095 INFO L290 TraceCheckUtils]: 51: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,096 INFO L272 TraceCheckUtils]: 52: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,096 INFO L290 TraceCheckUtils]: 53: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,096 INFO L290 TraceCheckUtils]: 54: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,097 INFO L290 TraceCheckUtils]: 55: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,097 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,097 INFO L290 TraceCheckUtils]: 57: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,098 INFO L290 TraceCheckUtils]: 58: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,098 INFO L290 TraceCheckUtils]: 59: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,099 INFO L272 TraceCheckUtils]: 60: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,099 INFO L290 TraceCheckUtils]: 61: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,100 INFO L290 TraceCheckUtils]: 62: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,100 INFO L290 TraceCheckUtils]: 63: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,100 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,101 INFO L290 TraceCheckUtils]: 65: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,101 INFO L290 TraceCheckUtils]: 66: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,102 INFO L290 TraceCheckUtils]: 67: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,102 INFO L272 TraceCheckUtils]: 68: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,103 INFO L290 TraceCheckUtils]: 69: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,103 INFO L290 TraceCheckUtils]: 70: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,103 INFO L290 TraceCheckUtils]: 71: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,104 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,104 INFO L290 TraceCheckUtils]: 73: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,105 INFO L290 TraceCheckUtils]: 74: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,105 INFO L290 TraceCheckUtils]: 75: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,106 INFO L272 TraceCheckUtils]: 76: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,106 INFO L290 TraceCheckUtils]: 77: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,106 INFO L290 TraceCheckUtils]: 78: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,107 INFO L290 TraceCheckUtils]: 79: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,107 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,108 INFO L290 TraceCheckUtils]: 81: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,108 INFO L290 TraceCheckUtils]: 82: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,108 INFO L290 TraceCheckUtils]: 83: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,109 INFO L272 TraceCheckUtils]: 84: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,109 INFO L290 TraceCheckUtils]: 85: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,110 INFO L290 TraceCheckUtils]: 86: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,110 INFO L290 TraceCheckUtils]: 87: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-27 16:34:40,110 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,111 INFO L290 TraceCheckUtils]: 89: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,111 INFO L290 TraceCheckUtils]: 90: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19837#(and (= main_~i~1 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:40,112 INFO L290 TraceCheckUtils]: 91: Hoare triple {19837#(and (= main_~i~1 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19552#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:34:40,112 INFO L272 TraceCheckUtils]: 92: Hoare triple {19552#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:34:40,113 INFO L290 TraceCheckUtils]: 93: Hoare triple {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19848#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:34:40,113 INFO L290 TraceCheckUtils]: 94: Hoare triple {19848#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-27 16:34:40,113 INFO L290 TraceCheckUtils]: 95: Hoare triple {19496#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-27 16:34:40,114 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:34:40,114 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:34:42,436 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 16:34:42,439 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 16:34:42,573 INFO L290 TraceCheckUtils]: 95: Hoare triple {19496#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-27 16:34:42,574 INFO L290 TraceCheckUtils]: 94: Hoare triple {19848#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-27 16:34:42,575 INFO L290 TraceCheckUtils]: 93: Hoare triple {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19848#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:34:42,575 INFO L272 TraceCheckUtils]: 92: Hoare triple {19552#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:34:42,576 INFO L290 TraceCheckUtils]: 91: Hoare triple {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19552#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:34:42,576 INFO L290 TraceCheckUtils]: 90: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,577 INFO L290 TraceCheckUtils]: 89: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:42,577 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {19495#true} {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:42,577 INFO L290 TraceCheckUtils]: 87: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,577 INFO L290 TraceCheckUtils]: 86: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,577 INFO L290 TraceCheckUtils]: 85: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,577 INFO L272 TraceCheckUtils]: 84: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,578 INFO L290 TraceCheckUtils]: 83: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:42,578 INFO L290 TraceCheckUtils]: 82: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:42,579 INFO L290 TraceCheckUtils]: 81: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:42,579 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19495#true} {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:42,579 INFO L290 TraceCheckUtils]: 79: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,579 INFO L290 TraceCheckUtils]: 78: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,579 INFO L290 TraceCheckUtils]: 77: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,579 INFO L272 TraceCheckUtils]: 76: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,580 INFO L290 TraceCheckUtils]: 75: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:42,580 INFO L290 TraceCheckUtils]: 74: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:42,581 INFO L290 TraceCheckUtils]: 73: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:42,581 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19495#true} {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:42,581 INFO L290 TraceCheckUtils]: 71: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,581 INFO L290 TraceCheckUtils]: 70: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,581 INFO L290 TraceCheckUtils]: 69: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,581 INFO L272 TraceCheckUtils]: 68: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,582 INFO L290 TraceCheckUtils]: 67: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:42,582 INFO L290 TraceCheckUtils]: 66: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:42,583 INFO L290 TraceCheckUtils]: 65: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,583 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19495#true} {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,583 INFO L290 TraceCheckUtils]: 63: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,583 INFO L290 TraceCheckUtils]: 62: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,583 INFO L290 TraceCheckUtils]: 61: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,584 INFO L272 TraceCheckUtils]: 60: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,584 INFO L290 TraceCheckUtils]: 59: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,584 INFO L290 TraceCheckUtils]: 58: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,585 INFO L290 TraceCheckUtils]: 57: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:42,585 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19495#true} {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:42,585 INFO L290 TraceCheckUtils]: 55: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,585 INFO L290 TraceCheckUtils]: 54: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,585 INFO L290 TraceCheckUtils]: 53: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,586 INFO L272 TraceCheckUtils]: 52: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,586 INFO L290 TraceCheckUtils]: 51: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:42,586 INFO L290 TraceCheckUtils]: 50: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:42,587 INFO L290 TraceCheckUtils]: 49: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:42,587 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19495#true} {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:42,587 INFO L290 TraceCheckUtils]: 47: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,587 INFO L290 TraceCheckUtils]: 46: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,587 INFO L290 TraceCheckUtils]: 45: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,588 INFO L272 TraceCheckUtils]: 44: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,588 INFO L290 TraceCheckUtils]: 43: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:42,588 INFO L290 TraceCheckUtils]: 42: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:42,589 INFO L290 TraceCheckUtils]: 41: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:42,589 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19495#true} {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:42,589 INFO L290 TraceCheckUtils]: 39: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,589 INFO L290 TraceCheckUtils]: 38: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,589 INFO L290 TraceCheckUtils]: 37: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,590 INFO L272 TraceCheckUtils]: 36: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,590 INFO L290 TraceCheckUtils]: 35: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:42,590 INFO L290 TraceCheckUtils]: 34: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:42,591 INFO L290 TraceCheckUtils]: 33: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,591 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19495#true} {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,591 INFO L290 TraceCheckUtils]: 31: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,591 INFO L290 TraceCheckUtils]: 30: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,592 INFO L290 TraceCheckUtils]: 29: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-27 16:34:42,592 INFO L272 TraceCheckUtils]: 28: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-27 16:34:42,592 INFO L290 TraceCheckUtils]: 27: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,592 INFO L290 TraceCheckUtils]: 26: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:42,593 INFO L290 TraceCheckUtils]: 25: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:42,593 INFO L290 TraceCheckUtils]: 24: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:42,594 INFO L290 TraceCheckUtils]: 23: Hoare triple {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:42,594 INFO L290 TraceCheckUtils]: 22: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 16:34:42,594 INFO L290 TraceCheckUtils]: 21: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:34:42,595 INFO L290 TraceCheckUtils]: 20: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:34:42,595 INFO L290 TraceCheckUtils]: 19: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:34:42,596 INFO L290 TraceCheckUtils]: 18: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:34:42,596 INFO L290 TraceCheckUtils]: 17: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:34:42,596 INFO L290 TraceCheckUtils]: 16: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:34:42,597 INFO L290 TraceCheckUtils]: 15: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:34:42,597 INFO L290 TraceCheckUtils]: 14: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:34:42,598 INFO L290 TraceCheckUtils]: 13: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:34:42,598 INFO L290 TraceCheckUtils]: 12: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:34:42,598 INFO L290 TraceCheckUtils]: 11: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:34:42,599 INFO L290 TraceCheckUtils]: 10: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:34:42,599 INFO L290 TraceCheckUtils]: 9: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:34:42,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {19500#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:34:42,600 INFO L290 TraceCheckUtils]: 7: Hoare triple {19500#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19500#(= main_~i~0 0)} is VALID [2022-04-27 16:34:42,600 INFO L290 TraceCheckUtils]: 6: Hoare triple {19495#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19500#(= main_~i~0 0)} is VALID [2022-04-27 16:34:42,600 INFO L290 TraceCheckUtils]: 5: Hoare triple {19495#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19495#true} is VALID [2022-04-27 16:34:42,600 INFO L272 TraceCheckUtils]: 4: Hoare triple {19495#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,601 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,601 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-27 16:34:42,601 INFO L272 TraceCheckUtils]: 0: Hoare triple {19495#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-27 16:34:42,601 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 16 proven. 209 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:34:42,601 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1068914146] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:34:42,602 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:34:42,602 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 24] total 38 [2022-04-27 16:34:42,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708769790] [2022-04-27 16:34:42,602 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:34:42,602 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) Word has length 96 [2022-04-27 16:34:42,603 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:34:42,603 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-27 16:34:42,690 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:34:42,690 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 16:34:42,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:34:42,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 16:34:42,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1291, Unknown=9, NotChecked=0, Total=1406 [2022-04-27 16:34:42,691 INFO L87 Difference]: Start difference. First operand 152 states and 155 transitions. Second operand has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-27 16:34:53,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:34:53,063 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2022-04-27 16:34:53,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-27 16:34:53,064 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) Word has length 96 [2022-04-27 16:34:53,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:34:53,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-27 16:34:53,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 94 transitions. [2022-04-27 16:34:53,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-27 16:34:53,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 94 transitions. [2022-04-27 16:34:53,067 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 94 transitions. [2022-04-27 16:34:53,160 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:34:53,162 INFO L225 Difference]: With dead ends: 174 [2022-04-27 16:34:53,162 INFO L226 Difference]: Without dead ends: 174 [2022-04-27 16:34:53,162 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 186 SyntacticMatches, 20 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 921 ImplicationChecksByTransitivity, 108.3s TimeCoverageRelationStatistics Valid=285, Invalid=3862, Unknown=13, NotChecked=0, Total=4160 [2022-04-27 16:34:53,163 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 69 mSDsluCounter, 302 mSDsCounter, 0 mSdLazyCounter, 1342 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 337 SdHoareTripleChecker+Invalid, 1485 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 1342 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 117 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:34:53,163 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 337 Invalid, 1485 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 1342 Invalid, 0 Unknown, 117 Unchecked, 1.0s Time] [2022-04-27 16:34:53,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-04-27 16:34:53,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 110. [2022-04-27 16:34:53,167 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:34:53,167 INFO L82 GeneralOperation]: Start isEquivalent. First operand 174 states. Second operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:34:53,167 INFO L74 IsIncluded]: Start isIncluded. First operand 174 states. Second operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:34:53,167 INFO L87 Difference]: Start difference. First operand 174 states. Second operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:34:53,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:34:53,170 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2022-04-27 16:34:53,170 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 176 transitions. [2022-04-27 16:34:53,170 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:34:53,170 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:34:53,170 INFO L74 IsIncluded]: Start isIncluded. First operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) Second operand 174 states. [2022-04-27 16:34:53,170 INFO L87 Difference]: Start difference. First operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) Second operand 174 states. [2022-04-27 16:34:53,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:34:53,173 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2022-04-27 16:34:53,173 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 176 transitions. [2022-04-27 16:34:53,173 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:34:53,173 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:34:53,173 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:34:53,173 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:34:53,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-27 16:34:53,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 112 transitions. [2022-04-27 16:34:53,175 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 112 transitions. Word has length 96 [2022-04-27 16:34:53,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:34:53,175 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 112 transitions. [2022-04-27 16:34:53,175 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-27 16:34:53,175 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2022-04-27 16:34:53,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-04-27 16:34:53,176 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:34:53,176 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:34:53,200 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-27 16:34:53,376 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-27 16:34:53,377 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:34:53,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:34:53,377 INFO L85 PathProgramCache]: Analyzing trace with hash 406127555, now seen corresponding path program 24 times [2022-04-27 16:34:53,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:34:53,377 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115331306] [2022-04-27 16:34:53,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:34:53,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:34:53,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,828 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:34:53,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,831 INFO L290 TraceCheckUtils]: 0: Hoare triple {20898#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20837#true} is VALID [2022-04-27 16:34:53,831 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,831 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20837#true} {20837#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,831 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 16:34:53,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,833 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,833 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,834 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:53,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 16:34:53,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,844 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,844 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,845 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:53,845 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 16:34:53,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,848 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,849 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:53,849 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 16:34:53,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,851 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,852 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,852 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:53,852 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-27 16:34:53,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,854 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,854 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,854 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,855 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:53,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-04-27 16:34:53,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,857 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,857 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,857 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,857 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:53,857 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-04-27 16:34:53,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,860 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,860 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,860 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,861 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:53,861 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-04-27 16:34:53,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:53,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,864 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:53,864 INFO L272 TraceCheckUtils]: 0: Hoare triple {20837#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20898#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:34:53,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {20898#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20837#true} is VALID [2022-04-27 16:34:53,865 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,865 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20837#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,865 INFO L272 TraceCheckUtils]: 4: Hoare triple {20837#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,865 INFO L290 TraceCheckUtils]: 5: Hoare triple {20837#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {20837#true} is VALID [2022-04-27 16:34:53,865 INFO L290 TraceCheckUtils]: 6: Hoare triple {20837#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {20842#(= main_~i~0 0)} is VALID [2022-04-27 16:34:53,866 INFO L290 TraceCheckUtils]: 7: Hoare triple {20842#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20842#(= main_~i~0 0)} is VALID [2022-04-27 16:34:53,866 INFO L290 TraceCheckUtils]: 8: Hoare triple {20842#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:34:53,866 INFO L290 TraceCheckUtils]: 9: Hoare triple {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 16:34:53,867 INFO L290 TraceCheckUtils]: 10: Hoare triple {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:34:53,867 INFO L290 TraceCheckUtils]: 11: Hoare triple {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 16:34:53,868 INFO L290 TraceCheckUtils]: 12: Hoare triple {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:34:53,868 INFO L290 TraceCheckUtils]: 13: Hoare triple {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 16:34:53,869 INFO L290 TraceCheckUtils]: 14: Hoare triple {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:34:53,869 INFO L290 TraceCheckUtils]: 15: Hoare triple {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 16:34:53,870 INFO L290 TraceCheckUtils]: 16: Hoare triple {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:34:53,870 INFO L290 TraceCheckUtils]: 17: Hoare triple {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 16:34:53,871 INFO L290 TraceCheckUtils]: 18: Hoare triple {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:34:53,871 INFO L290 TraceCheckUtils]: 19: Hoare triple {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 16:34:53,872 INFO L290 TraceCheckUtils]: 20: Hoare triple {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:34:53,872 INFO L290 TraceCheckUtils]: 21: Hoare triple {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 16:34:53,873 INFO L290 TraceCheckUtils]: 22: Hoare triple {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20850#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 16:34:53,873 INFO L290 TraceCheckUtils]: 23: Hoare triple {20850#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20851#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 16:34:53,874 INFO L290 TraceCheckUtils]: 24: Hoare triple {20851#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20852#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 32))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 16:34:53,875 INFO L290 TraceCheckUtils]: 25: Hoare triple {20852#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 32))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:53,875 INFO L290 TraceCheckUtils]: 26: Hoare triple {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:53,876 INFO L290 TraceCheckUtils]: 27: Hoare triple {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 16:34:53,876 INFO L290 TraceCheckUtils]: 28: Hoare triple {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:53,877 INFO L290 TraceCheckUtils]: 29: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:53,877 INFO L272 TraceCheckUtils]: 30: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,877 INFO L290 TraceCheckUtils]: 31: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,877 INFO L290 TraceCheckUtils]: 32: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,877 INFO L290 TraceCheckUtils]: 33: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,877 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {20837#true} {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:53,878 INFO L290 TraceCheckUtils]: 35: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 16:34:53,878 INFO L290 TraceCheckUtils]: 36: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:53,879 INFO L290 TraceCheckUtils]: 37: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:53,879 INFO L272 TraceCheckUtils]: 38: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,879 INFO L290 TraceCheckUtils]: 39: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,879 INFO L290 TraceCheckUtils]: 40: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,879 INFO L290 TraceCheckUtils]: 41: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,880 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {20837#true} {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:53,880 INFO L290 TraceCheckUtils]: 43: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 16:34:53,881 INFO L290 TraceCheckUtils]: 44: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:53,881 INFO L290 TraceCheckUtils]: 45: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:53,881 INFO L272 TraceCheckUtils]: 46: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,881 INFO L290 TraceCheckUtils]: 47: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,881 INFO L290 TraceCheckUtils]: 48: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,881 INFO L290 TraceCheckUtils]: 49: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,882 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {20837#true} {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:53,882 INFO L290 TraceCheckUtils]: 51: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 16:34:53,883 INFO L290 TraceCheckUtils]: 52: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:53,883 INFO L290 TraceCheckUtils]: 53: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:53,883 INFO L272 TraceCheckUtils]: 54: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,884 INFO L290 TraceCheckUtils]: 55: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,884 INFO L290 TraceCheckUtils]: 56: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,884 INFO L290 TraceCheckUtils]: 57: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,884 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {20837#true} {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:53,885 INFO L290 TraceCheckUtils]: 59: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 16:34:53,885 INFO L290 TraceCheckUtils]: 60: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:53,886 INFO L290 TraceCheckUtils]: 61: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:53,886 INFO L272 TraceCheckUtils]: 62: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,886 INFO L290 TraceCheckUtils]: 63: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,886 INFO L290 TraceCheckUtils]: 64: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,886 INFO L290 TraceCheckUtils]: 65: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,887 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {20837#true} {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:53,887 INFO L290 TraceCheckUtils]: 67: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:53,888 INFO L290 TraceCheckUtils]: 68: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:53,888 INFO L290 TraceCheckUtils]: 69: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:53,888 INFO L272 TraceCheckUtils]: 70: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,888 INFO L290 TraceCheckUtils]: 71: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,888 INFO L290 TraceCheckUtils]: 72: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,889 INFO L290 TraceCheckUtils]: 73: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,889 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {20837#true} {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:53,889 INFO L290 TraceCheckUtils]: 75: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 16:34:53,890 INFO L290 TraceCheckUtils]: 76: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:53,890 INFO L290 TraceCheckUtils]: 77: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:53,891 INFO L272 TraceCheckUtils]: 78: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,891 INFO L290 TraceCheckUtils]: 79: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,891 INFO L290 TraceCheckUtils]: 80: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,891 INFO L290 TraceCheckUtils]: 81: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,891 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {20837#true} {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:53,892 INFO L290 TraceCheckUtils]: 83: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 16:34:53,892 INFO L290 TraceCheckUtils]: 84: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:53,893 INFO L290 TraceCheckUtils]: 85: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:53,893 INFO L272 TraceCheckUtils]: 86: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-27 16:34:53,893 INFO L290 TraceCheckUtils]: 87: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-27 16:34:53,893 INFO L290 TraceCheckUtils]: 88: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,893 INFO L290 TraceCheckUtils]: 89: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-27 16:34:53,894 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {20837#true} {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:53,894 INFO L290 TraceCheckUtils]: 91: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 16:34:53,895 INFO L290 TraceCheckUtils]: 92: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20894#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 16:34:53,895 INFO L290 TraceCheckUtils]: 93: Hoare triple {20894#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20895#(= |main_#t~mem5| 0)} is VALID [2022-04-27 16:34:53,895 INFO L272 TraceCheckUtils]: 94: Hoare triple {20895#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20896#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 16:34:53,896 INFO L290 TraceCheckUtils]: 95: Hoare triple {20896#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20897#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:34:53,896 INFO L290 TraceCheckUtils]: 96: Hoare triple {20897#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {20838#false} is VALID [2022-04-27 16:34:53,896 INFO L290 TraceCheckUtils]: 97: Hoare triple {20838#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20838#false} is VALID [2022-04-27 16:34:53,897 INFO L134 CoverageAnalysis]: Checked inductivity of 356 backedges. 16 proven. 228 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 16:34:53,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:34:53,897 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115331306] [2022-04-27 16:34:53,897 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1115331306] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:34:53,897 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [204557904] [2022-04-27 16:34:53,897 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 16:34:53,897 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:34:53,898 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:34:53,900 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:34:53,918 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-27 16:34:54,077 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2022-04-27 16:34:54,077 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:34:54,079 INFO L263 TraceCheckSpWp]: Trace formula consists of 264 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-27 16:34:54,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:34:54,106 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:34:54,247 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 16:34:54,477 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 16:34:54,478 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26