/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-industry-pattern/ofuf_5.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:30:41,230 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:30:41,232 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:30:41,258 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 16:30:41,258 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 16:30:41,259 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 16:30:41,260 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 16:30:41,261 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 16:30:41,263 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 16:30:41,263 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 16:30:41,278 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 16:30:41,282 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 16:30:41,282 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:30:41,285 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:30:41,286 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:30:41,288 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:30:41,288 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:30:41,289 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:30:41,292 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:30:41,293 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:30:41,294 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:30:41,296 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:30:41,297 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:30:41,298 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:30:41,300 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:30:41,302 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-27 16:30:41,303 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-27 16:30:41,303 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-27 16:30:41,303 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-27 16:30:41,303 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-27 16:30:41,304 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-27 16:30:41,304 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-27 16:30:41,304 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-27 16:30:41,305 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-27 16:30:41,305 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-27 16:30:41,306 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-27 16:30:41,306 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-27 16:30:41,306 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-27 16:30:41,306 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-27 16:30:41,307 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:30:41,307 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:30:41,311 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:30:41,312 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:30:41,323 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:30:41,323 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:30:41,324 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:30:41,324 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:30:41,324 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:30:41,324 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:30:41,324 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:30:41,324 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:30:41,324 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:30:41,325 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:30:41,325 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:30:41,325 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:30:41,325 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:30:41,325 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:30:41,325 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:30:41,326 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:30:41,326 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:30:41,326 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:30:41,326 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:30:41,326 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:30:41,326 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:30:41,327 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:30:41,327 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:30:41,521 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:30:41,546 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:30:41,548 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:30:41,549 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:30:41,549 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:30:41,550 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-industry-pattern/ofuf_5.c [2022-04-27 16:30:41,610 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6ac6eabfe/5047a81b1d6746948c89146d1c63172c/FLAG364244365 [2022-04-27 16:30:42,041 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:30:42,041 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-industry-pattern/ofuf_5.c [2022-04-27 16:30:42,051 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6ac6eabfe/5047a81b1d6746948c89146d1c63172c/FLAG364244365 [2022-04-27 16:30:42,065 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6ac6eabfe/5047a81b1d6746948c89146d1c63172c [2022-04-27 16:30:42,067 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:30:42,069 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:30:42,075 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:30:42,075 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:30:42,079 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:30:42,080 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,081 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4106f283 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42, skipping insertion in model container [2022-04-27 16:30:42,081 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,085 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:30:42,118 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:30:42,402 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-industry-pattern/ofuf_5.c[11314,11327] [2022-04-27 16:30:42,408 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:30:42,414 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:30:42,467 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-industry-pattern/ofuf_5.c[11314,11327] [2022-04-27 16:30:42,467 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:30:42,478 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:30:42,478 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42 WrapperNode [2022-04-27 16:30:42,478 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:30:42,479 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:30:42,479 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:30:42,479 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:30:42,487 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,487 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,498 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,498 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,521 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,526 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,529 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,533 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:30:42,534 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:30:42,534 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:30:42,534 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:30:42,544 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (1/1) ... [2022-04-27 16:30:42,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:30:42,556 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:30:42,582 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:30:42,590 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure avoid_zero [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_89 [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_92 [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_95 [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_96 [2022-04-27 16:30:42,615 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_97 [2022-04-27 16:30:42,616 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_99 [2022-04-27 16:30:42,616 INFO L138 BoogieDeclarations]: Found implementation of procedure Id_MCDC_100 [2022-04-27 16:30:42,616 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:30:42,616 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure avoid_zero [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure strcmp [2022-04-27 16:30:42,616 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_89 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_92 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_95 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_96 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_97 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_99 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure Id_MCDC_100 [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure fopen [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-04-27 16:30:42,617 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-04-27 16:30:42,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:30:42,712 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:30:42,713 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:30:43,187 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:30:43,193 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:30:43,193 INFO L299 CfgBuilder]: Removed 7 assume(true) statements. [2022-04-27 16:30:43,194 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:30:43 BoogieIcfgContainer [2022-04-27 16:30:43,194 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:30:43,195 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:30:43,195 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:30:43,196 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:30:43,198 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:30:43" (1/1) ... [2022-04-27 16:30:43,200 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:30:43,238 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:30:43 BasicIcfg [2022-04-27 16:30:43,238 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:30:43,239 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:30:43,239 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:30:43,241 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:30:43,242 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:30:42" (1/4) ... [2022-04-27 16:30:43,242 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@325d1320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:30:43, skipping insertion in model container [2022-04-27 16:30:43,242 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:30:42" (2/4) ... [2022-04-27 16:30:43,242 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@325d1320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:30:43, skipping insertion in model container [2022-04-27 16:30:43,243 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:30:43" (3/4) ... [2022-04-27 16:30:43,243 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@325d1320 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:30:43, skipping insertion in model container [2022-04-27 16:30:43,243 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:30:43" (4/4) ... [2022-04-27 16:30:43,243 INFO L111 eAbstractionObserver]: Analyzing ICFG ofuf_5.cJordan [2022-04-27 16:30:43,253 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:30:43,253 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:30:43,284 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:30:43,289 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@7ad19e09, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@689fa21c [2022-04-27 16:30:43,290 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:30:43,298 INFO L276 IsEmpty]: Start isEmpty. Operand has 129 states, 100 states have (on average 1.54) internal successors, (154), 102 states have internal predecessors, (154), 16 states have call successors, (16), 11 states have call predecessors, (16), 11 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 16:30:43,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-04-27 16:30:43,309 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:30:43,309 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:30:43,310 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:30:43,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:30:43,313 INFO L85 PathProgramCache]: Analyzing trace with hash -1746528498, now seen corresponding path program 1 times [2022-04-27 16:30:43,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:30:43,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495279229] [2022-04-27 16:30:43,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:30:43,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:30:43,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:43,546 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:30:43,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:43,593 INFO L290 TraceCheckUtils]: 0: Hoare triple {152#(and (= ~Id_MCDC_110~0.offset |old(~Id_MCDC_110~0.offset)|) (= ~Id_MCDC_109~0.offset |old(~Id_MCDC_109~0.offset)|) (= |~#Id_MCDC_112~0.base| |old(~#Id_MCDC_112~0.base)|) (= |old(~Id_MCDC_114~0)| ~Id_MCDC_114~0) (= |old(~Id_MCDC_106~0)| ~Id_MCDC_106~0) (= ~Id_MCDC_107~0.base |old(~Id_MCDC_107~0.base)|) (= |old(~#Id_MCDC_112~0.offset)| |~#Id_MCDC_112~0.offset|) (= ~Id_MCDC_108~0.base |old(~Id_MCDC_108~0.base)|) (= |old(~Id_MCDC_109~0.base)| ~Id_MCDC_109~0.base) (= |old(~#Id_MCDC_113~0.base)| |~#Id_MCDC_113~0.base|) (= |old(~#Id_MCDC_113~0.offset)| |~#Id_MCDC_113~0.offset|) (= |old(~Id_MCDC_110~0.base)| ~Id_MCDC_110~0.base) (= |old(~Id_MCDC_104~0)| ~Id_MCDC_104~0) (= |old(~Id_MCDC_108~0.offset)| ~Id_MCDC_108~0.offset) (= |old(~Id_MCDC_105~0)| ~Id_MCDC_105~0) (= ~Id_MCDC_107~0.offset |old(~Id_MCDC_107~0.offset)|) (= |old(~Id_MCDC_111~0.offset)| ~Id_MCDC_111~0.offset) (= |#NULL.offset| |old(#NULL.offset)|) (= ~Id_MCDC_111~0.base |old(~Id_MCDC_111~0.base)|) (= |old(#NULL.base)| |#NULL.base|))} [398] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse6 (+ 16 |v_~#Id_MCDC_113~0.offset_6|)) (.cse3 (select |v_#memory_int_31| 8)) (.cse8 (select |v_#memory_int_31| 1)) (.cse9 (select |v_#memory_int_31| |v_~#Id_MCDC_113~0.base_6|)) (.cse2 (+ 4 |v_~#Id_MCDC_113~0.offset_6|)) (.cse0 (select |v_#memory_int_31| 9)) (.cse1 (select |v_#memory_$Pointer$.offset_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse5 (+ 8 |v_~#Id_MCDC_113~0.offset_6|)) (.cse12 (select |v_#memory_int_31| 5)) (.cse13 (select |v_#memory_int_31| 4)) (.cse14 (select |v_#memory_int_31| 10)) (.cse10 (select |v_#memory_int_31| |v_~#Id_MCDC_112~0.base_3|)) (.cse4 (select |v_#memory_$Pointer$.base_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse7 (+ 12 |v_~#Id_MCDC_113~0.offset_6|)) (.cse11 (select |v_#memory_int_31| 7))) (and (= 46 (select .cse0 2)) (= 0 (select .cse1 .cse2)) (= |v_~#Id_MCDC_113~0.offset_6| 0) (= (select .cse3 2) 0) (= (select .cse4 .cse5) 0) (= (select .cse3 1) 111) (= v_~Id_MCDC_107~0.base_2 0) (= (select .cse4 .cse6) 0) (= 5 (select |v_#length_16| 4)) (= v_~Id_MCDC_108~0.offset_2 0) (= (select .cse1 .cse6) 0) (= (select |v_#valid_54| 4) 1) (= |v_~#Id_MCDC_113~0.base_6| 12) (= (select .cse1 .cse7) 0) (= (select |v_#valid_54| 7) 1) (= v_~Id_MCDC_114~0_6 0) (= (select |v_#length_16| 5) 3) (= (select .cse8 1) 0) (= (select |v_#valid_54| 5) 1) (= (select .cse9 (+ 3 |v_~#Id_MCDC_113~0.offset_6|)) 0) (= 119 (select .cse3 0)) (= (select |v_#valid_54| 1) 1) (= (select .cse9 |v_~#Id_MCDC_113~0.offset_6|) 0) (= 110 (select .cse0 1)) (= 0 v_~Id_MCDC_107~0.offset_2) (= v_~Id_MCDC_104~0_1 0) (= (select .cse10 (+ 12 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse11 3) 100) (= (select .cse8 0) 48) (= (select |v_#length_16| 8) 3) (< 0 |v_#StackHeapBarrier_3|) (= (select .cse9 (+ |v_~#Id_MCDC_113~0.offset_6| 1)) 0) (= 5 (select |v_#length_16| 7)) (= 101 (select .cse0 3)) (= 119 (select .cse12 0)) (= |v_#NULL.base_1| 0) (= (select |v_#valid_54| 2) 1) (= (select .cse13 4) 0) (= 0 (select .cse4 .cse2)) (= v_~Id_MCDC_110~0.base_2 0) (= (select .cse0 6) 0) (= v_~Id_MCDC_110~0.offset_2 0) (= (select .cse0 0) 105) (= (select .cse0 5) 115) (= (select .cse10 (+ 8 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select |v_#valid_54| 10) 1) (= 115 (select .cse13 1)) (= (select .cse13 3) 100) (= 115 (select .cse11 1)) (= |v_~#Id_MCDC_112~0.offset_3| 0) (= 118 (select .cse13 2)) (= (select |v_#valid_54| 6) 1) (= 2 (select |v_#length_16| 10)) (= (select |v_#valid_54| 9) 1) (= 16 (select |v_#length_16| 11)) (= 7 (select |v_#length_16| 9)) (= 111 (select .cse12 1)) (= (select .cse0 4) 100) (= v_~Id_MCDC_109~0.offset_2 0) (= |v_~#Id_MCDC_112~0.base_3| 11) (= (select |v_#valid_54| 8) 1) (= v_~Id_MCDC_106~0_3 0) (= (select |v_#valid_54| 12) 1) (= (select |v_#valid_54| 3) 1) (= 118 (select .cse11 2)) (= v_~Id_MCDC_111~0.offset_4 0) (= v_~Id_MCDC_111~0.base_4 0) (= (select .cse1 .cse5) 0) (= (select .cse10 (+ 4 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse12 2) 0) (= (select .cse13 0) 114) (= (select .cse14 1) 0) (= 114 (select .cse14 0)) (= (select .cse10 |v_~#Id_MCDC_112~0.offset_3|) 0) (= |v_#NULL.offset_1| 0) (= v_~Id_MCDC_108~0.base_2 0) (= (select .cse11 4) 0) (= (select |v_#valid_54| 11) 1) (= (select |v_#valid_54| 0) 0) (= 2 (select |v_#length_16| 1)) (= v_~Id_MCDC_109~0.base_2 0) (= (select .cse4 .cse7) 0) (= v_~Id_MCDC_105~0_3 0) (= 20 (select |v_#length_16| 12)) (= 114 (select .cse11 0)) (= 9 (select |v_#length_16| 2)) (= (select |v_#length_16| 6) 20) (= (select |v_#length_16| 3) 12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, #length=|v_#length_16|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|} OutVars{#memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_6|, #NULL.offset=|v_#NULL.offset_1|, ~Id_MCDC_111~0.offset=v_~Id_MCDC_111~0.offset_4, ~#Id_MCDC_112~0.base=|v_~#Id_MCDC_112~0.base_3|, ~#Id_MCDC_112~0.offset=|v_~#Id_MCDC_112~0.offset_3|, ~Id_MCDC_109~0.offset=v_~Id_MCDC_109~0.offset_2, ~Id_MCDC_114~0=v_~Id_MCDC_114~0_6, #length=|v_#length_16|, ~Id_MCDC_106~0=v_~Id_MCDC_106~0_3, ~Id_MCDC_104~0=v_~Id_MCDC_104~0_1, ~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_6|, ~Id_MCDC_109~0.base=v_~Id_MCDC_109~0.base_2, ~Id_MCDC_108~0.offset=v_~Id_MCDC_108~0.offset_2, ~Id_MCDC_107~0.base=v_~Id_MCDC_107~0.base_2, ~Id_MCDC_110~0.base=v_~Id_MCDC_110~0.base_2, ~Id_MCDC_108~0.base=v_~Id_MCDC_108~0.base_2, ~Id_MCDC_111~0.base=v_~Id_MCDC_111~0.base_4, #NULL.base=|v_#NULL.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, ~Id_MCDC_110~0.offset=v_~Id_MCDC_110~0.offset_2, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, ~Id_MCDC_107~0.offset=v_~Id_MCDC_107~0.offset_2, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|, ~Id_MCDC_105~0=v_~Id_MCDC_105~0_3} AuxVars[] AssignedVars[~#Id_MCDC_113~0.offset, ~Id_MCDC_109~0.base, ~#Id_MCDC_113~0.base, ~Id_MCDC_108~0.offset, ~Id_MCDC_107~0.base, #NULL.offset, ~Id_MCDC_110~0.base, ~Id_MCDC_111~0.offset, ~Id_MCDC_108~0.base, ~#Id_MCDC_112~0.base, ~#Id_MCDC_112~0.offset, ~Id_MCDC_109~0.offset, ~Id_MCDC_111~0.base, #NULL.base, ~Id_MCDC_114~0, ~Id_MCDC_110~0.offset, ~Id_MCDC_107~0.offset, ~Id_MCDC_106~0, ~Id_MCDC_104~0, ~Id_MCDC_105~0] {132#true} is VALID [2022-04-27 16:30:43,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {132#true} [401] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,593 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {132#true} {132#true} [566] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,604 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-04-27 16:30:43,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:43,641 INFO L290 TraceCheckUtils]: 0: Hoare triple {153#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} [412] Id_MCDC_97ENTRY-->L352-3: Formula: (let ((.cse3 (store |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 1))) (let ((.cse2 (store .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 1))) (let ((.cse0 (store .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 1))) (let ((.cse1 (store .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 1))) (and (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18| 0) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|) 0) (= (store (store (store (store (store |v_#length_15| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 4) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 4) |v_#length_10|) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) (= (select .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) 0) (= |v_#valid_48| (store .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 1)) (= v_Id_MCDC_97_~Id_MCDC_123~0_9 6144) (= 0 |v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|) (= v_Id_MCDC_97_~Id_MCDC_35~0_4 0) (= (select .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 0)) (= (select .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) 0) (= (select |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) 0) (= |v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14| 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18| 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 0)) (= v_Id_MCDC_97_~Id_MCDC_36~0_1 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 0)) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|) 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) (not (= 0 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|)) (= v_Id_MCDC_97_~Id_MCDC_134~0_3 0) (= |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20| 0) (= v_Id_MCDC_97_~Id_MCDC_132~0_11 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 0)) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|) 0) (= (select .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) 0) (= v_Id_MCDC_97_~Id_MCDC_133~0_1 0)))))) InVars {#memory_int=|v_#memory_int_23|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_15|, #valid=|v_#valid_53|} OutVars{Id_MCDC_97_~Id_MCDC_127~0=v_Id_MCDC_97_~Id_MCDC_127~0_4, Id_MCDC_97_~Id_MCDC_137~0.base=v_Id_MCDC_97_~Id_MCDC_137~0.base_1, Id_MCDC_97_~Id_MCDC_134~0=v_Id_MCDC_97_~Id_MCDC_134~0_3, Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_9, Id_MCDC_97_~Id_MCDC_137~0.offset=v_Id_MCDC_97_~Id_MCDC_137~0.offset_1, Id_MCDC_97_~Id_MCDC_126~0=v_Id_MCDC_97_~Id_MCDC_126~0_2, #length=|v_#length_10|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|, Id_MCDC_97_~Id_MCDC_124~0=v_Id_MCDC_97_~Id_MCDC_124~0_4, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|, Id_MCDC_97_~Id_MCDC_35~0=v_Id_MCDC_97_~Id_MCDC_35~0_4, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|, Id_MCDC_97_~Id_MCDC_129~0=v_Id_MCDC_97_~Id_MCDC_129~0_3, Id_MCDC_97_~Id_MCDC_138~0=v_Id_MCDC_97_~Id_MCDC_138~0_7, Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_11, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|, Id_MCDC_97_~Id_MCDC_125~0=v_Id_MCDC_97_~Id_MCDC_125~0_2, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|, Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_48|, Id_MCDC_97_~Id_MCDC_36~0=v_Id_MCDC_97_~Id_MCDC_36~0_1, #memory_int=|v_#memory_int_23|, Id_MCDC_97_~Id_MCDC_133~0=v_Id_MCDC_97_~Id_MCDC_133~0_1, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|} AuxVars[] AssignedVars[Id_MCDC_97_~Id_MCDC_127~0, Id_MCDC_97_~Id_MCDC_137~0.base, Id_MCDC_97_~Id_MCDC_134~0, Id_MCDC_97_~Id_MCDC_123~0, Id_MCDC_97_~Id_MCDC_137~0.offset, Id_MCDC_97_~Id_MCDC_126~0, #length, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base, Id_MCDC_97_~Id_MCDC_124~0, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~Id_MCDC_35~0, Id_MCDC_97_~#Id_MCDC_130~0.base, Id_MCDC_97_~Id_MCDC_129~0, Id_MCDC_97_~Id_MCDC_138~0, Id_MCDC_97_~Id_MCDC_132~0, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~Id_MCDC_125~0, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_131~0.base, #valid, Id_MCDC_97_~Id_MCDC_36~0, Id_MCDC_97_~Id_MCDC_133~0, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset] {132#true} is VALID [2022-04-27 16:30:43,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {132#true} [416] L352-3-->L352-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {133#false} [423] L352-4-->L356: Formula: (not (<= (mod v_Id_MCDC_97_~Id_MCDC_123~0_1 4294967296) 6147)) InVars {Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} OutVars{Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,643 INFO L290 TraceCheckUtils]: 3: Hoare triple {133#false} [432] L356-->Id_MCDC_97FINAL: Formula: (and (= 0 |v_Id_MCDC_97_#res_1|) (= |v_#valid_12| (store (store (store (store (store |v_#valid_17| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_2| 0))) InVars {Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_2|, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_2|, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_2|, #valid=|v_#valid_17|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_2|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_2|} OutVars{Id_MCDC_97_#res=|v_Id_MCDC_97_#res_1|, #valid=|v_#valid_12|, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_1|, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_1|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_1|, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_1|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_1|} AuxVars[] AssignedVars[Id_MCDC_97_~#Id_MCDC_131~0.base, Id_MCDC_97_#res, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~#Id_MCDC_130~0.base, #valid, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base] {133#false} is VALID [2022-04-27 16:30:43,643 INFO L290 TraceCheckUtils]: 4: Hoare triple {133#false} [438] Id_MCDC_97FINAL-->Id_MCDC_97EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,643 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {133#false} {132#true} [570] Id_MCDC_97EXIT-->L405-1: AOR: Formula: (= |v_Id_MCDC_97_#resOutParam_1| |v_Id_MCDC_99_#t~ret54_3|) InVars {Id_MCDC_97_#res=|v_Id_MCDC_97_#resOutParam_1|} OutVars{Id_MCDC_99_#t~ret54=|v_Id_MCDC_99_#t~ret54_3|} AuxVars[] AssignedVars[Id_MCDC_97_#res, Id_MCDC_99_#t~ret54] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,644 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-27 16:30:43,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:43,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {132#true} [458] Id_MCDC_92ENTRY-->L255: Formula: (and (= |v_Id_MCDC_92_#in~Id_MCDC_91_1| v_Id_MCDC_92_~Id_MCDC_91_4) (= v_Id_MCDC_92_~Id_MCDC_119~0_1 1) (= v_Id_MCDC_92_~Id_MCDC_118~0_2 0) (= v_Id_MCDC_92_~Id_MCDC_120~0_1 0) (= v_Id_MCDC_92_~Id_MCDC_117~0_3 0) (= |v_Id_MCDC_92_#in~Id_MCDC_90_1| v_Id_MCDC_92_~Id_MCDC_90_4)) InVars {Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|} OutVars{Id_MCDC_92_~Id_MCDC_120~0=v_Id_MCDC_92_~Id_MCDC_120~0_1, Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_4, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_4, Id_MCDC_92_~Id_MCDC_117~0=v_Id_MCDC_92_~Id_MCDC_117~0_3, Id_MCDC_92_~Id_MCDC_119~0=v_Id_MCDC_92_~Id_MCDC_119~0_1, Id_MCDC_92_~Id_MCDC_118~0=v_Id_MCDC_92_~Id_MCDC_118~0_2} AuxVars[] AssignedVars[Id_MCDC_92_~Id_MCDC_120~0, Id_MCDC_92_~Id_MCDC_90, Id_MCDC_92_~Id_MCDC_91, Id_MCDC_92_~Id_MCDC_117~0, Id_MCDC_92_~Id_MCDC_119~0, Id_MCDC_92_~Id_MCDC_118~0] {132#true} is VALID [2022-04-27 16:30:43,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {132#true} [465] L255-->L261: Formula: (not (< (mod v_Id_MCDC_92_~Id_MCDC_91_1 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_90_1 4294967296))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} OutVars{Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {132#true} [478] L261-->Id_MCDC_92FINAL: Formula: (and (= v_Id_MCDC_92_~Id_MCDC_90_3 |v_Id_MCDC_92_#res_2|) (not (< (mod v_Id_MCDC_92_~Id_MCDC_90_3 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_91_3 4294967296)))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} OutVars{Id_MCDC_92_#res=|v_Id_MCDC_92_#res_2|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} AuxVars[] AssignedVars[Id_MCDC_92_#res] {132#true} is VALID [2022-04-27 16:30:43,658 INFO L290 TraceCheckUtils]: 3: Hoare triple {132#true} [490] Id_MCDC_92FINAL-->Id_MCDC_92EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,659 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {132#true} {133#false} [577] Id_MCDC_92EXIT-->L296-1: AOR: Formula: (= |v_Id_MCDC_92_#resOutParam_1| |v_Id_MCDC_95_#t~ret21_4|) InVars {Id_MCDC_92_#res=|v_Id_MCDC_92_#resOutParam_1|} OutVars{Id_MCDC_95_#t~ret21=|v_Id_MCDC_95_#t~ret21_4|} AuxVars[] AssignedVars[Id_MCDC_95_#t~ret21, Id_MCDC_92_#res] LVA: Formula: (and (= |v_Id_MCDC_95_#t~mem20_4| |v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|) (= v_Id_MCDC_95_~Id_MCDC_122~0_8 |v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|)) InVars {Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_4|, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_8} OutVars{Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|} AuxVars[] AssignedVars[Id_MCDC_92_#in~Id_MCDC_90, Id_MCDC_92_#in~Id_MCDC_91, Id_MCDC_95_#t~mem20, Id_MCDC_95_~Id_MCDC_122~0] {133#false} is VALID [2022-04-27 16:30:43,659 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 16:30:43,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:43,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {132#true} [473] avoid_zeroENTRY-->L11: Formula: (= |v_avoid_zero_#in~y_1| v_avoid_zero_~y_1) InVars {avoid_zero_#in~y=|v_avoid_zero_#in~y_1|} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~y_1|, avoid_zero_~y=v_avoid_zero_~y_1} AuxVars[] AssignedVars[avoid_zero_~y] {132#true} is VALID [2022-04-27 16:30:43,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {132#true} [486] L11-->L11-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,666 INFO L290 TraceCheckUtils]: 2: Hoare triple {133#false} [498] L11-2-->avoid_zeroEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,667 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {133#false} {133#false} [579] avoid_zeroEXIT-->L297-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v_avoid_zero_#in~yInParam_2| (ite (not (= (mod v_Id_MCDC_95_~Id_MCDC_121~0_5 4294967296) 0)) 1 0)) InVars {Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_5} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~yInParam_2|} AuxVars[] AssignedVars[avoid_zero_#in~y, Id_MCDC_95_~Id_MCDC_121~0] {133#false} is VALID [2022-04-27 16:30:43,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {132#true} [396] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {152#(and (= ~Id_MCDC_110~0.offset |old(~Id_MCDC_110~0.offset)|) (= ~Id_MCDC_109~0.offset |old(~Id_MCDC_109~0.offset)|) (= |~#Id_MCDC_112~0.base| |old(~#Id_MCDC_112~0.base)|) (= |old(~Id_MCDC_114~0)| ~Id_MCDC_114~0) (= |old(~Id_MCDC_106~0)| ~Id_MCDC_106~0) (= ~Id_MCDC_107~0.base |old(~Id_MCDC_107~0.base)|) (= |old(~#Id_MCDC_112~0.offset)| |~#Id_MCDC_112~0.offset|) (= ~Id_MCDC_108~0.base |old(~Id_MCDC_108~0.base)|) (= |old(~Id_MCDC_109~0.base)| ~Id_MCDC_109~0.base) (= |old(~#Id_MCDC_113~0.base)| |~#Id_MCDC_113~0.base|) (= |old(~#Id_MCDC_113~0.offset)| |~#Id_MCDC_113~0.offset|) (= |old(~Id_MCDC_110~0.base)| ~Id_MCDC_110~0.base) (= |old(~Id_MCDC_104~0)| ~Id_MCDC_104~0) (= |old(~Id_MCDC_108~0.offset)| ~Id_MCDC_108~0.offset) (= |old(~Id_MCDC_105~0)| ~Id_MCDC_105~0) (= ~Id_MCDC_107~0.offset |old(~Id_MCDC_107~0.offset)|) (= |old(~Id_MCDC_111~0.offset)| ~Id_MCDC_111~0.offset) (= |#NULL.offset| |old(#NULL.offset)|) (= ~Id_MCDC_111~0.base |old(~Id_MCDC_111~0.base)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:30:43,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {152#(and (= ~Id_MCDC_110~0.offset |old(~Id_MCDC_110~0.offset)|) (= ~Id_MCDC_109~0.offset |old(~Id_MCDC_109~0.offset)|) (= |~#Id_MCDC_112~0.base| |old(~#Id_MCDC_112~0.base)|) (= |old(~Id_MCDC_114~0)| ~Id_MCDC_114~0) (= |old(~Id_MCDC_106~0)| ~Id_MCDC_106~0) (= ~Id_MCDC_107~0.base |old(~Id_MCDC_107~0.base)|) (= |old(~#Id_MCDC_112~0.offset)| |~#Id_MCDC_112~0.offset|) (= ~Id_MCDC_108~0.base |old(~Id_MCDC_108~0.base)|) (= |old(~Id_MCDC_109~0.base)| ~Id_MCDC_109~0.base) (= |old(~#Id_MCDC_113~0.base)| |~#Id_MCDC_113~0.base|) (= |old(~#Id_MCDC_113~0.offset)| |~#Id_MCDC_113~0.offset|) (= |old(~Id_MCDC_110~0.base)| ~Id_MCDC_110~0.base) (= |old(~Id_MCDC_104~0)| ~Id_MCDC_104~0) (= |old(~Id_MCDC_108~0.offset)| ~Id_MCDC_108~0.offset) (= |old(~Id_MCDC_105~0)| ~Id_MCDC_105~0) (= ~Id_MCDC_107~0.offset |old(~Id_MCDC_107~0.offset)|) (= |old(~Id_MCDC_111~0.offset)| ~Id_MCDC_111~0.offset) (= |#NULL.offset| |old(#NULL.offset)|) (= ~Id_MCDC_111~0.base |old(~Id_MCDC_111~0.base)|) (= |old(#NULL.base)| |#NULL.base|))} [398] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse6 (+ 16 |v_~#Id_MCDC_113~0.offset_6|)) (.cse3 (select |v_#memory_int_31| 8)) (.cse8 (select |v_#memory_int_31| 1)) (.cse9 (select |v_#memory_int_31| |v_~#Id_MCDC_113~0.base_6|)) (.cse2 (+ 4 |v_~#Id_MCDC_113~0.offset_6|)) (.cse0 (select |v_#memory_int_31| 9)) (.cse1 (select |v_#memory_$Pointer$.offset_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse5 (+ 8 |v_~#Id_MCDC_113~0.offset_6|)) (.cse12 (select |v_#memory_int_31| 5)) (.cse13 (select |v_#memory_int_31| 4)) (.cse14 (select |v_#memory_int_31| 10)) (.cse10 (select |v_#memory_int_31| |v_~#Id_MCDC_112~0.base_3|)) (.cse4 (select |v_#memory_$Pointer$.base_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse7 (+ 12 |v_~#Id_MCDC_113~0.offset_6|)) (.cse11 (select |v_#memory_int_31| 7))) (and (= 46 (select .cse0 2)) (= 0 (select .cse1 .cse2)) (= |v_~#Id_MCDC_113~0.offset_6| 0) (= (select .cse3 2) 0) (= (select .cse4 .cse5) 0) (= (select .cse3 1) 111) (= v_~Id_MCDC_107~0.base_2 0) (= (select .cse4 .cse6) 0) (= 5 (select |v_#length_16| 4)) (= v_~Id_MCDC_108~0.offset_2 0) (= (select .cse1 .cse6) 0) (= (select |v_#valid_54| 4) 1) (= |v_~#Id_MCDC_113~0.base_6| 12) (= (select .cse1 .cse7) 0) (= (select |v_#valid_54| 7) 1) (= v_~Id_MCDC_114~0_6 0) (= (select |v_#length_16| 5) 3) (= (select .cse8 1) 0) (= (select |v_#valid_54| 5) 1) (= (select .cse9 (+ 3 |v_~#Id_MCDC_113~0.offset_6|)) 0) (= 119 (select .cse3 0)) (= (select |v_#valid_54| 1) 1) (= (select .cse9 |v_~#Id_MCDC_113~0.offset_6|) 0) (= 110 (select .cse0 1)) (= 0 v_~Id_MCDC_107~0.offset_2) (= v_~Id_MCDC_104~0_1 0) (= (select .cse10 (+ 12 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse11 3) 100) (= (select .cse8 0) 48) (= (select |v_#length_16| 8) 3) (< 0 |v_#StackHeapBarrier_3|) (= (select .cse9 (+ |v_~#Id_MCDC_113~0.offset_6| 1)) 0) (= 5 (select |v_#length_16| 7)) (= 101 (select .cse0 3)) (= 119 (select .cse12 0)) (= |v_#NULL.base_1| 0) (= (select |v_#valid_54| 2) 1) (= (select .cse13 4) 0) (= 0 (select .cse4 .cse2)) (= v_~Id_MCDC_110~0.base_2 0) (= (select .cse0 6) 0) (= v_~Id_MCDC_110~0.offset_2 0) (= (select .cse0 0) 105) (= (select .cse0 5) 115) (= (select .cse10 (+ 8 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select |v_#valid_54| 10) 1) (= 115 (select .cse13 1)) (= (select .cse13 3) 100) (= 115 (select .cse11 1)) (= |v_~#Id_MCDC_112~0.offset_3| 0) (= 118 (select .cse13 2)) (= (select |v_#valid_54| 6) 1) (= 2 (select |v_#length_16| 10)) (= (select |v_#valid_54| 9) 1) (= 16 (select |v_#length_16| 11)) (= 7 (select |v_#length_16| 9)) (= 111 (select .cse12 1)) (= (select .cse0 4) 100) (= v_~Id_MCDC_109~0.offset_2 0) (= |v_~#Id_MCDC_112~0.base_3| 11) (= (select |v_#valid_54| 8) 1) (= v_~Id_MCDC_106~0_3 0) (= (select |v_#valid_54| 12) 1) (= (select |v_#valid_54| 3) 1) (= 118 (select .cse11 2)) (= v_~Id_MCDC_111~0.offset_4 0) (= v_~Id_MCDC_111~0.base_4 0) (= (select .cse1 .cse5) 0) (= (select .cse10 (+ 4 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse12 2) 0) (= (select .cse13 0) 114) (= (select .cse14 1) 0) (= 114 (select .cse14 0)) (= (select .cse10 |v_~#Id_MCDC_112~0.offset_3|) 0) (= |v_#NULL.offset_1| 0) (= v_~Id_MCDC_108~0.base_2 0) (= (select .cse11 4) 0) (= (select |v_#valid_54| 11) 1) (= (select |v_#valid_54| 0) 0) (= 2 (select |v_#length_16| 1)) (= v_~Id_MCDC_109~0.base_2 0) (= (select .cse4 .cse7) 0) (= v_~Id_MCDC_105~0_3 0) (= 20 (select |v_#length_16| 12)) (= 114 (select .cse11 0)) (= 9 (select |v_#length_16| 2)) (= (select |v_#length_16| 6) 20) (= (select |v_#length_16| 3) 12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, #length=|v_#length_16|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|} OutVars{#memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_6|, #NULL.offset=|v_#NULL.offset_1|, ~Id_MCDC_111~0.offset=v_~Id_MCDC_111~0.offset_4, ~#Id_MCDC_112~0.base=|v_~#Id_MCDC_112~0.base_3|, ~#Id_MCDC_112~0.offset=|v_~#Id_MCDC_112~0.offset_3|, ~Id_MCDC_109~0.offset=v_~Id_MCDC_109~0.offset_2, ~Id_MCDC_114~0=v_~Id_MCDC_114~0_6, #length=|v_#length_16|, ~Id_MCDC_106~0=v_~Id_MCDC_106~0_3, ~Id_MCDC_104~0=v_~Id_MCDC_104~0_1, ~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_6|, ~Id_MCDC_109~0.base=v_~Id_MCDC_109~0.base_2, ~Id_MCDC_108~0.offset=v_~Id_MCDC_108~0.offset_2, ~Id_MCDC_107~0.base=v_~Id_MCDC_107~0.base_2, ~Id_MCDC_110~0.base=v_~Id_MCDC_110~0.base_2, ~Id_MCDC_108~0.base=v_~Id_MCDC_108~0.base_2, ~Id_MCDC_111~0.base=v_~Id_MCDC_111~0.base_4, #NULL.base=|v_#NULL.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, ~Id_MCDC_110~0.offset=v_~Id_MCDC_110~0.offset_2, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, ~Id_MCDC_107~0.offset=v_~Id_MCDC_107~0.offset_2, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|, ~Id_MCDC_105~0=v_~Id_MCDC_105~0_3} AuxVars[] AssignedVars[~#Id_MCDC_113~0.offset, ~Id_MCDC_109~0.base, ~#Id_MCDC_113~0.base, ~Id_MCDC_108~0.offset, ~Id_MCDC_107~0.base, #NULL.offset, ~Id_MCDC_110~0.base, ~Id_MCDC_111~0.offset, ~Id_MCDC_108~0.base, ~#Id_MCDC_112~0.base, ~#Id_MCDC_112~0.offset, ~Id_MCDC_109~0.offset, ~Id_MCDC_111~0.base, #NULL.base, ~Id_MCDC_114~0, ~Id_MCDC_110~0.offset, ~Id_MCDC_107~0.offset, ~Id_MCDC_106~0, ~Id_MCDC_104~0, ~Id_MCDC_105~0] {132#true} is VALID [2022-04-27 16:30:43,670 INFO L290 TraceCheckUtils]: 2: Hoare triple {132#true} [401] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,670 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {132#true} {132#true} [566] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,670 INFO L272 TraceCheckUtils]: 4: Hoare triple {132#true} [397] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,670 INFO L290 TraceCheckUtils]: 5: Hoare triple {132#true} [400] mainENTRY-->L452: Formula: (and (= v_main_~Id_MCDC_161~0_1 0) (= v_main_~Id_MCDC_162~0_1 0)) InVars {} OutVars{main_~Id_MCDC_158~0.base=v_main_~Id_MCDC_158~0.base_1, main_~Id_MCDC_164~0=v_main_~Id_MCDC_164~0_1, main_~Id_MCDC_163~0=v_main_~Id_MCDC_163~0_1, main_~Id_MCDC_150~0=v_main_~Id_MCDC_150~0_1, main_~Id_MCDC_146~0.offset=v_main_~Id_MCDC_146~0.offset_1, main_~Id_MCDC_146~0.base=v_main_~Id_MCDC_146~0.base_1, main_#t~ret64.offset=|v_main_#t~ret64.offset_1|, main_~Id_MCDC_156~0=v_main_~Id_MCDC_156~0_1, main_~Id_MCDC_143~0.base=v_main_~Id_MCDC_143~0.base_1, main_~Id_MCDC_162~0=v_main_~Id_MCDC_162~0_1, main_~Id_MCDC_143~0.offset=v_main_~Id_MCDC_143~0.offset_1, main_~Id_MCDC_157~0=v_main_~Id_MCDC_157~0_1, main_~Id_MCDC_148~0.base=v_main_~Id_MCDC_148~0.base_1, main_~Id_MCDC_153~0=v_main_~Id_MCDC_153~0_1, main_~Id_MCDC_145~0.base=v_main_~Id_MCDC_145~0.base_1, main_~Id_MCDC_147~0.offset=v_main_~Id_MCDC_147~0.offset_1, main_~Id_MCDC_149~0=v_main_~Id_MCDC_149~0_1, main_~Id_MCDC_161~0=v_main_~Id_MCDC_161~0_1, main_~Id_MCDC_144~0.offset=v_main_~Id_MCDC_144~0.offset_1, main_~Id_MCDC_152~0=v_main_~Id_MCDC_152~0_1, main_~Id_MCDC_154~0=v_main_~Id_MCDC_154~0_1, main_#t~ret64.base=|v_main_#t~ret64.base_1|, main_~Id_MCDC_160~0=v_main_~Id_MCDC_160~0_1, main_~Id_MCDC_159~0=v_main_~Id_MCDC_159~0_1, main_~Id_MCDC_148~0.offset=v_main_~Id_MCDC_148~0.offset_1, main_~Id_MCDC_158~0.offset=v_main_~Id_MCDC_158~0.offset_1, main_~Id_MCDC_147~0.base=v_main_~Id_MCDC_147~0.base_1, main_~Id_MCDC_145~0.offset=v_main_~Id_MCDC_145~0.offset_1, main_~Id_MCDC_144~0.base=v_main_~Id_MCDC_144~0.base_1, main_~Id_MCDC_151~0=v_main_~Id_MCDC_151~0_1, main_~Id_MCDC_155~0=v_main_~Id_MCDC_155~0_1} AuxVars[] AssignedVars[main_~Id_MCDC_158~0.base, main_~Id_MCDC_164~0, main_~Id_MCDC_163~0, main_~Id_MCDC_150~0, main_~Id_MCDC_146~0.offset, main_~Id_MCDC_146~0.base, main_#t~ret64.offset, main_~Id_MCDC_156~0, main_~Id_MCDC_143~0.base, main_~Id_MCDC_162~0, main_~Id_MCDC_143~0.offset, main_~Id_MCDC_157~0, main_~Id_MCDC_148~0.base, main_~Id_MCDC_153~0, main_~Id_MCDC_145~0.base, main_~Id_MCDC_147~0.offset, main_~Id_MCDC_149~0, main_~Id_MCDC_161~0, main_~Id_MCDC_144~0.offset, main_~Id_MCDC_152~0, main_~Id_MCDC_154~0, main_#t~ret64.base, main_~Id_MCDC_160~0, main_~Id_MCDC_159~0, main_~Id_MCDC_148~0.offset, main_~Id_MCDC_158~0.offset, main_~Id_MCDC_147~0.base, main_~Id_MCDC_145~0.offset, main_~Id_MCDC_144~0.base, main_~Id_MCDC_151~0, main_~Id_MCDC_155~0] {132#true} is VALID [2022-04-27 16:30:43,671 INFO L290 TraceCheckUtils]: 6: Hoare triple {132#true} [403] L452-->L457: Formula: (or (not (= v_main_~Id_MCDC_158~0.offset_5 0)) (not (= v_main_~Id_MCDC_158~0.base_5 0))) InVars {main_~Id_MCDC_158~0.base=v_main_~Id_MCDC_158~0.base_5, main_~Id_MCDC_158~0.offset=v_main_~Id_MCDC_158~0.offset_5} OutVars{main_~Id_MCDC_158~0.base=v_main_~Id_MCDC_158~0.base_5, main_~Id_MCDC_158~0.offset=v_main_~Id_MCDC_158~0.offset_5} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,671 INFO L272 TraceCheckUtils]: 7: Hoare triple {132#true} [405] L457-->Id_MCDC_100ENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {132#true} [406] Id_MCDC_100ENTRY-->L424: Formula: true InVars {} OutVars{Id_MCDC_100_~Id_MCDC_141~0=v_Id_MCDC_100_~Id_MCDC_141~0_1, Id_MCDC_100_~Id_MCDC_142~0.offset=v_Id_MCDC_100_~Id_MCDC_142~0.offset_1, Id_MCDC_100_~Id_MCDC_142~0.base=v_Id_MCDC_100_~Id_MCDC_142~0.base_1} AuxVars[] AssignedVars[Id_MCDC_100_~Id_MCDC_142~0.base, Id_MCDC_100_~Id_MCDC_141~0, Id_MCDC_100_~Id_MCDC_142~0.offset] {132#true} is VALID [2022-04-27 16:30:43,672 INFO L272 TraceCheckUtils]: 9: Hoare triple {132#true} [407] L424-->Id_MCDC_99ENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,672 INFO L290 TraceCheckUtils]: 10: Hoare triple {132#true} [409] Id_MCDC_99ENTRY-->L405: Formula: (let ((.cse1 (store |v_#valid_9| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6| 1)) (.cse0 (select |v_#memory_int_14| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|)) (.cse2 (+ 12 |v_~#Id_MCDC_113~0.offset_4|))) (and (= (select .cse0 (+ |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 3)) 0) (= (select |v_#valid_9| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|) 0) (= (select .cse1 |v_Id_MCDC_99_#t~malloc53.base_4|) 0) (= (select .cse0 (+ |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 1)) 0) (not (= |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6| 0)) (< |v_#StackHeapBarrier_1| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|) (= (store |v_#memory_$Pointer$.base_17| |v_~#Id_MCDC_113~0.base_4| (store (select |v_#memory_$Pointer$.base_17| |v_~#Id_MCDC_113~0.base_4|) .cse2 |v_Id_MCDC_99_#t~malloc53.base_4|)) |v_#memory_$Pointer$.base_16|) (= (store |v_#memory_$Pointer$.offset_17| |v_~#Id_MCDC_113~0.base_4| (store (select |v_#memory_$Pointer$.offset_17| |v_~#Id_MCDC_113~0.base_4|) .cse2 0)) |v_#memory_$Pointer$.offset_16|) (= |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 0) (= |v_#valid_7| (store .cse1 |v_Id_MCDC_99_#t~malloc53.base_4| 1)) (= (select .cse0 (+ |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 2)) 0) (= |v_#length_5| (store (store |v_#length_7| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6| 4) |v_Id_MCDC_99_#t~malloc53.base_4| 372)) (= (select .cse0 |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6|) 0) (= v_Id_MCDC_99_~Id_MCDC_140~0_8 0) (not (= |v_Id_MCDC_99_#t~malloc53.base_4| 0)) (< |v_Id_MCDC_99_#t~malloc53.base_4| |v_#StackHeapBarrier_1|) (= (store |v_#memory_int_14| |v_~#Id_MCDC_113~0.base_4| (store (select |v_#memory_int_14| |v_~#Id_MCDC_113~0.base_4|) .cse2 (select (select |v_#memory_int_13| |v_~#Id_MCDC_113~0.base_4|) .cse2))) |v_#memory_int_13|))) InVars {~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_4|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_17|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_4|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_14|, #length=|v_#length_7|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_17|} OutVars{~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_4|, Id_MCDC_99_~#Id_MCDC_139~0.base=|v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_16|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_4|, Id_MCDC_99_#t~malloc53.base=|v_Id_MCDC_99_#t~malloc53.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, Id_MCDC_99_~#Id_MCDC_139~0.offset=|v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6|, Id_MCDC_99_~Id_MCDC_140~0=v_Id_MCDC_99_~Id_MCDC_140~0_8, #valid=|v_#valid_7|, Id_MCDC_99_#t~malloc53.offset=|v_Id_MCDC_99_#t~malloc53.offset_1|, #memory_int=|v_#memory_int_13|, #length=|v_#length_5|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_16|} AuxVars[|v_Id_MCDC_99_#t~malloc53.base_4|] AssignedVars[Id_MCDC_99_~#Id_MCDC_139~0.base, Id_MCDC_99_~#Id_MCDC_139~0.offset, #memory_$Pointer$.base, Id_MCDC_99_~Id_MCDC_140~0, #valid, Id_MCDC_99_#t~malloc53.offset, #memory_int, #length, Id_MCDC_99_#t~malloc53.base, #memory_$Pointer$.offset] {132#true} is VALID [2022-04-27 16:30:43,674 INFO L272 TraceCheckUtils]: 11: Hoare triple {132#true} [410] L405-->Id_MCDC_97ENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {153#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-04-27 16:30:43,675 INFO L290 TraceCheckUtils]: 12: Hoare triple {153#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} [412] Id_MCDC_97ENTRY-->L352-3: Formula: (let ((.cse3 (store |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 1))) (let ((.cse2 (store .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 1))) (let ((.cse0 (store .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 1))) (let ((.cse1 (store .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 1))) (and (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18| 0) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|) 0) (= (store (store (store (store (store |v_#length_15| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 4) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 4) |v_#length_10|) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) (= (select .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) 0) (= |v_#valid_48| (store .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 1)) (= v_Id_MCDC_97_~Id_MCDC_123~0_9 6144) (= 0 |v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|) (= v_Id_MCDC_97_~Id_MCDC_35~0_4 0) (= (select .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 0)) (= (select .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) 0) (= (select |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) 0) (= |v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14| 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18| 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 0)) (= v_Id_MCDC_97_~Id_MCDC_36~0_1 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 0)) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|) 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) (not (= 0 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|)) (= v_Id_MCDC_97_~Id_MCDC_134~0_3 0) (= |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20| 0) (= v_Id_MCDC_97_~Id_MCDC_132~0_11 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 0)) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|) 0) (= (select .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) 0) (= v_Id_MCDC_97_~Id_MCDC_133~0_1 0)))))) InVars {#memory_int=|v_#memory_int_23|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_15|, #valid=|v_#valid_53|} OutVars{Id_MCDC_97_~Id_MCDC_127~0=v_Id_MCDC_97_~Id_MCDC_127~0_4, Id_MCDC_97_~Id_MCDC_137~0.base=v_Id_MCDC_97_~Id_MCDC_137~0.base_1, Id_MCDC_97_~Id_MCDC_134~0=v_Id_MCDC_97_~Id_MCDC_134~0_3, Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_9, Id_MCDC_97_~Id_MCDC_137~0.offset=v_Id_MCDC_97_~Id_MCDC_137~0.offset_1, Id_MCDC_97_~Id_MCDC_126~0=v_Id_MCDC_97_~Id_MCDC_126~0_2, #length=|v_#length_10|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|, Id_MCDC_97_~Id_MCDC_124~0=v_Id_MCDC_97_~Id_MCDC_124~0_4, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|, Id_MCDC_97_~Id_MCDC_35~0=v_Id_MCDC_97_~Id_MCDC_35~0_4, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|, Id_MCDC_97_~Id_MCDC_129~0=v_Id_MCDC_97_~Id_MCDC_129~0_3, Id_MCDC_97_~Id_MCDC_138~0=v_Id_MCDC_97_~Id_MCDC_138~0_7, Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_11, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|, Id_MCDC_97_~Id_MCDC_125~0=v_Id_MCDC_97_~Id_MCDC_125~0_2, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|, Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_48|, Id_MCDC_97_~Id_MCDC_36~0=v_Id_MCDC_97_~Id_MCDC_36~0_1, #memory_int=|v_#memory_int_23|, Id_MCDC_97_~Id_MCDC_133~0=v_Id_MCDC_97_~Id_MCDC_133~0_1, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|} AuxVars[] AssignedVars[Id_MCDC_97_~Id_MCDC_127~0, Id_MCDC_97_~Id_MCDC_137~0.base, Id_MCDC_97_~Id_MCDC_134~0, Id_MCDC_97_~Id_MCDC_123~0, Id_MCDC_97_~Id_MCDC_137~0.offset, Id_MCDC_97_~Id_MCDC_126~0, #length, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base, Id_MCDC_97_~Id_MCDC_124~0, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~Id_MCDC_35~0, Id_MCDC_97_~#Id_MCDC_130~0.base, Id_MCDC_97_~Id_MCDC_129~0, Id_MCDC_97_~Id_MCDC_138~0, Id_MCDC_97_~Id_MCDC_132~0, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~Id_MCDC_125~0, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_131~0.base, #valid, Id_MCDC_97_~Id_MCDC_36~0, Id_MCDC_97_~Id_MCDC_133~0, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset] {132#true} is VALID [2022-04-27 16:30:43,676 INFO L290 TraceCheckUtils]: 13: Hoare triple {132#true} [416] L352-3-->L352-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,676 INFO L290 TraceCheckUtils]: 14: Hoare triple {133#false} [423] L352-4-->L356: Formula: (not (<= (mod v_Id_MCDC_97_~Id_MCDC_123~0_1 4294967296) 6147)) InVars {Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} OutVars{Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,676 INFO L290 TraceCheckUtils]: 15: Hoare triple {133#false} [432] L356-->Id_MCDC_97FINAL: Formula: (and (= 0 |v_Id_MCDC_97_#res_1|) (= |v_#valid_12| (store (store (store (store (store |v_#valid_17| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_2| 0))) InVars {Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_2|, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_2|, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_2|, #valid=|v_#valid_17|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_2|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_2|} OutVars{Id_MCDC_97_#res=|v_Id_MCDC_97_#res_1|, #valid=|v_#valid_12|, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_1|, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_1|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_1|, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_1|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_1|} AuxVars[] AssignedVars[Id_MCDC_97_~#Id_MCDC_131~0.base, Id_MCDC_97_#res, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~#Id_MCDC_130~0.base, #valid, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base] {133#false} is VALID [2022-04-27 16:30:43,677 INFO L290 TraceCheckUtils]: 16: Hoare triple {133#false} [438] Id_MCDC_97FINAL-->Id_MCDC_97EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,677 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {133#false} {132#true} [570] Id_MCDC_97EXIT-->L405-1: AOR: Formula: (= |v_Id_MCDC_97_#resOutParam_1| |v_Id_MCDC_99_#t~ret54_3|) InVars {Id_MCDC_97_#res=|v_Id_MCDC_97_#resOutParam_1|} OutVars{Id_MCDC_99_#t~ret54=|v_Id_MCDC_99_#t~ret54_3|} AuxVars[] AssignedVars[Id_MCDC_97_#res, Id_MCDC_99_#t~ret54] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,677 INFO L290 TraceCheckUtils]: 18: Hoare triple {133#false} [411] L405-1-->L406-3: Formula: (= v_Id_MCDC_99_~Id_MCDC_140~0_9 0) InVars {} OutVars{Id_MCDC_99_~Id_MCDC_140~0=v_Id_MCDC_99_~Id_MCDC_140~0_9, Id_MCDC_99_#t~ret54=|v_Id_MCDC_99_#t~ret54_2|} AuxVars[] AssignedVars[Id_MCDC_99_~Id_MCDC_140~0, Id_MCDC_99_#t~ret54] {133#false} is VALID [2022-04-27 16:30:43,678 INFO L290 TraceCheckUtils]: 19: Hoare triple {133#false} [413] L406-3-->L406-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,678 INFO L272 TraceCheckUtils]: 20: Hoare triple {133#false} [419] L406-4-->Id_MCDC_95ENTRY: Formula: (and (= |v_Id_MCDC_95_#in~Id_MCDC_94.baseInParam_1| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_7|) (= |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_7| |v_Id_MCDC_95_#in~Id_MCDC_94.offsetInParam_1|) (= |v_Id_MCDC_95_#in~Id_MCDC_93InParam_1| 4)) InVars {Id_MCDC_99_~#Id_MCDC_139~0.base=|v_Id_MCDC_99_~#Id_MCDC_139~0.base_7|, Id_MCDC_99_~#Id_MCDC_139~0.offset=|v_Id_MCDC_99_~#Id_MCDC_139~0.offset_7|} OutVars{Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offsetInParam_1|, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93InParam_1|, Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.baseInParam_1|} AuxVars[] AssignedVars[Id_MCDC_99_~#Id_MCDC_139~0.base, Id_MCDC_99_~#Id_MCDC_139~0.offset, Id_MCDC_95_#in~Id_MCDC_94.base, Id_MCDC_95_#in~Id_MCDC_94.offset, Id_MCDC_95_#in~Id_MCDC_93] {133#false} is VALID [2022-04-27 16:30:43,679 INFO L290 TraceCheckUtils]: 21: Hoare triple {133#false} [426] Id_MCDC_95ENTRY-->L284: Formula: (and (= v_Id_MCDC_95_~Id_MCDC_122~0_2 0) (= v_Id_MCDC_95_~Id_MCDC_121~0_2 0) (= v_Id_MCDC_95_~Id_MCDC_94.base_2 |v_Id_MCDC_95_#in~Id_MCDC_94.base_1|) (= |v_Id_MCDC_95_#in~Id_MCDC_93_1| v_Id_MCDC_95_~Id_MCDC_93_1) (= |v_Id_MCDC_95_#in~Id_MCDC_94.offset_1| v_Id_MCDC_95_~Id_MCDC_94.offset_2)) InVars {Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offset_1|, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93_1|, Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.base_1|} OutVars{Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.base_1|, Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offset_1|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_1, Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_2, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_2, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_2, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93_1|, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_2} AuxVars[] AssignedVars[Id_MCDC_95_~Id_MCDC_93, Id_MCDC_95_~Id_MCDC_121~0, Id_MCDC_95_~Id_MCDC_122~0, Id_MCDC_95_~Id_MCDC_94.base, Id_MCDC_95_~Id_MCDC_94.offset] {133#false} is VALID [2022-04-27 16:30:43,679 INFO L290 TraceCheckUtils]: 22: Hoare triple {133#false} [435] L284-->L288: Formula: (not (< (mod v_Id_MCDC_95_~Id_MCDC_93_3 4294967296) 2)) InVars {Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_3} OutVars{Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_3} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,679 INFO L290 TraceCheckUtils]: 23: Hoare triple {133#false} [440] L288-->L290: Formula: (not (= 2 (mod v_Id_MCDC_95_~Id_MCDC_93_4 4294967296))) InVars {Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_4} OutVars{Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_4} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,679 INFO L272 TraceCheckUtils]: 24: Hoare triple {133#false} [445] L290-->Id_MCDC_95ENTRY: Formula: (and (= |v_Id_MCDC_95_#in~Id_MCDC_94.offsetInParam_2| (+ v_Id_MCDC_95_~Id_MCDC_94.offset_8 1)) (= (+ (- 1) v_Id_MCDC_95_~Id_MCDC_93_7) |v_Id_MCDC_95_#in~Id_MCDC_93InParam_2|) (= |v_Id_MCDC_95_#in~Id_MCDC_94.baseInParam_2| v_Id_MCDC_95_~Id_MCDC_94.base_8)) InVars {Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_7, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_8, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_8} OutVars{Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offsetInParam_2|, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93InParam_2|, Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.baseInParam_2|} AuxVars[] AssignedVars[Id_MCDC_95_#in~Id_MCDC_94.base, Id_MCDC_95_#in~Id_MCDC_94.offset, Id_MCDC_95_~Id_MCDC_93, Id_MCDC_95_#in~Id_MCDC_93, Id_MCDC_95_~Id_MCDC_94.base, Id_MCDC_95_~Id_MCDC_94.offset] {133#false} is VALID [2022-04-27 16:30:43,679 INFO L290 TraceCheckUtils]: 25: Hoare triple {133#false} [426] Id_MCDC_95ENTRY-->L284: Formula: (and (= v_Id_MCDC_95_~Id_MCDC_122~0_2 0) (= v_Id_MCDC_95_~Id_MCDC_121~0_2 0) (= v_Id_MCDC_95_~Id_MCDC_94.base_2 |v_Id_MCDC_95_#in~Id_MCDC_94.base_1|) (= |v_Id_MCDC_95_#in~Id_MCDC_93_1| v_Id_MCDC_95_~Id_MCDC_93_1) (= |v_Id_MCDC_95_#in~Id_MCDC_94.offset_1| v_Id_MCDC_95_~Id_MCDC_94.offset_2)) InVars {Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offset_1|, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93_1|, Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.base_1|} OutVars{Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.base_1|, Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offset_1|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_1, Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_2, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_2, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_2, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93_1|, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_2} AuxVars[] AssignedVars[Id_MCDC_95_~Id_MCDC_93, Id_MCDC_95_~Id_MCDC_121~0, Id_MCDC_95_~Id_MCDC_122~0, Id_MCDC_95_~Id_MCDC_94.base, Id_MCDC_95_~Id_MCDC_94.offset] {133#false} is VALID [2022-04-27 16:30:43,680 INFO L290 TraceCheckUtils]: 26: Hoare triple {133#false} [435] L284-->L288: Formula: (not (< (mod v_Id_MCDC_95_~Id_MCDC_93_3 4294967296) 2)) InVars {Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_3} OutVars{Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_3} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,680 INFO L290 TraceCheckUtils]: 27: Hoare triple {133#false} [441] L288-->L288-2: Formula: (and (= v_Id_MCDC_95_~Id_MCDC_122~0_4 (select (select |v_#memory_int_25| v_Id_MCDC_95_~Id_MCDC_94.base_4) (+ v_Id_MCDC_95_~Id_MCDC_94.offset_4 1))) (= (mod v_Id_MCDC_95_~Id_MCDC_93_6 4294967296) 2)) InVars {#memory_int=|v_#memory_int_25|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_6, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_4, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_4} OutVars{Id_MCDC_95_#t~mem19=|v_Id_MCDC_95_#t~mem19_1|, #memory_int=|v_#memory_int_25|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_6, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_4, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_4, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_4} AuxVars[] AssignedVars[Id_MCDC_95_#t~mem19, Id_MCDC_95_~Id_MCDC_122~0] {133#false} is VALID [2022-04-27 16:30:43,681 INFO L290 TraceCheckUtils]: 28: Hoare triple {133#false} [446] L288-2-->L296: Formula: (= |v_Id_MCDC_95_#t~mem20_1| (select (select |v_#memory_int_26| v_Id_MCDC_95_~Id_MCDC_94.base_5) v_Id_MCDC_95_~Id_MCDC_94.offset_5)) InVars {#memory_int=|v_#memory_int_26|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_5, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_5} OutVars{#memory_int=|v_#memory_int_26|, Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_1|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_5, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_5} AuxVars[] AssignedVars[Id_MCDC_95_#t~mem20] {133#false} is VALID [2022-04-27 16:30:43,681 INFO L272 TraceCheckUtils]: 29: Hoare triple {133#false} [451] L296-->Id_MCDC_92ENTRY: Formula: (and (= |v_Id_MCDC_95_#t~mem20_4| |v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|) (= v_Id_MCDC_95_~Id_MCDC_122~0_8 |v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|)) InVars {Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_4|, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_8} OutVars{Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|} AuxVars[] AssignedVars[Id_MCDC_92_#in~Id_MCDC_90, Id_MCDC_92_#in~Id_MCDC_91, Id_MCDC_95_#t~mem20, Id_MCDC_95_~Id_MCDC_122~0] {132#true} is VALID [2022-04-27 16:30:43,684 INFO L290 TraceCheckUtils]: 30: Hoare triple {132#true} [458] Id_MCDC_92ENTRY-->L255: Formula: (and (= |v_Id_MCDC_92_#in~Id_MCDC_91_1| v_Id_MCDC_92_~Id_MCDC_91_4) (= v_Id_MCDC_92_~Id_MCDC_119~0_1 1) (= v_Id_MCDC_92_~Id_MCDC_118~0_2 0) (= v_Id_MCDC_92_~Id_MCDC_120~0_1 0) (= v_Id_MCDC_92_~Id_MCDC_117~0_3 0) (= |v_Id_MCDC_92_#in~Id_MCDC_90_1| v_Id_MCDC_92_~Id_MCDC_90_4)) InVars {Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|} OutVars{Id_MCDC_92_~Id_MCDC_120~0=v_Id_MCDC_92_~Id_MCDC_120~0_1, Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_4, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_4, Id_MCDC_92_~Id_MCDC_117~0=v_Id_MCDC_92_~Id_MCDC_117~0_3, Id_MCDC_92_~Id_MCDC_119~0=v_Id_MCDC_92_~Id_MCDC_119~0_1, Id_MCDC_92_~Id_MCDC_118~0=v_Id_MCDC_92_~Id_MCDC_118~0_2} AuxVars[] AssignedVars[Id_MCDC_92_~Id_MCDC_120~0, Id_MCDC_92_~Id_MCDC_90, Id_MCDC_92_~Id_MCDC_91, Id_MCDC_92_~Id_MCDC_117~0, Id_MCDC_92_~Id_MCDC_119~0, Id_MCDC_92_~Id_MCDC_118~0] {132#true} is VALID [2022-04-27 16:30:43,684 INFO L290 TraceCheckUtils]: 31: Hoare triple {132#true} [465] L255-->L261: Formula: (not (< (mod v_Id_MCDC_92_~Id_MCDC_91_1 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_90_1 4294967296))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} OutVars{Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,686 INFO L290 TraceCheckUtils]: 32: Hoare triple {132#true} [478] L261-->Id_MCDC_92FINAL: Formula: (and (= v_Id_MCDC_92_~Id_MCDC_90_3 |v_Id_MCDC_92_#res_2|) (not (< (mod v_Id_MCDC_92_~Id_MCDC_90_3 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_91_3 4294967296)))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} OutVars{Id_MCDC_92_#res=|v_Id_MCDC_92_#res_2|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} AuxVars[] AssignedVars[Id_MCDC_92_#res] {132#true} is VALID [2022-04-27 16:30:43,686 INFO L290 TraceCheckUtils]: 33: Hoare triple {132#true} [490] Id_MCDC_92FINAL-->Id_MCDC_92EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#true} is VALID [2022-04-27 16:30:43,686 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {132#true} {133#false} [577] Id_MCDC_92EXIT-->L296-1: AOR: Formula: (= |v_Id_MCDC_92_#resOutParam_1| |v_Id_MCDC_95_#t~ret21_4|) InVars {Id_MCDC_92_#res=|v_Id_MCDC_92_#resOutParam_1|} OutVars{Id_MCDC_95_#t~ret21=|v_Id_MCDC_95_#t~ret21_4|} AuxVars[] AssignedVars[Id_MCDC_95_#t~ret21, Id_MCDC_92_#res] LVA: Formula: (and (= |v_Id_MCDC_95_#t~mem20_4| |v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|) (= v_Id_MCDC_95_~Id_MCDC_122~0_8 |v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|)) InVars {Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_4|, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_8} OutVars{Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|} AuxVars[] AssignedVars[Id_MCDC_92_#in~Id_MCDC_90, Id_MCDC_92_#in~Id_MCDC_91, Id_MCDC_95_#t~mem20, Id_MCDC_95_~Id_MCDC_122~0] {133#false} is VALID [2022-04-27 16:30:43,686 INFO L290 TraceCheckUtils]: 35: Hoare triple {133#false} [457] L296-1-->L297: Formula: (= v_Id_MCDC_95_~Id_MCDC_121~0_3 |v_Id_MCDC_95_#t~ret21_3|) InVars {Id_MCDC_95_#t~ret21=|v_Id_MCDC_95_#t~ret21_3|} OutVars{Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_3, Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_3|} AuxVars[] AssignedVars[Id_MCDC_95_#t~ret21, Id_MCDC_95_~Id_MCDC_121~0, Id_MCDC_95_#t~mem20] {133#false} is VALID [2022-04-27 16:30:43,686 INFO L272 TraceCheckUtils]: 36: Hoare triple {133#false} [463] L297-->avoid_zeroENTRY: Formula: (= |v_avoid_zero_#in~yInParam_2| (ite (not (= (mod v_Id_MCDC_95_~Id_MCDC_121~0_5 4294967296) 0)) 1 0)) InVars {Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_5} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~yInParam_2|} AuxVars[] AssignedVars[avoid_zero_#in~y, Id_MCDC_95_~Id_MCDC_121~0] {132#true} is VALID [2022-04-27 16:30:43,687 INFO L290 TraceCheckUtils]: 37: Hoare triple {132#true} [473] avoid_zeroENTRY-->L11: Formula: (= |v_avoid_zero_#in~y_1| v_avoid_zero_~y_1) InVars {avoid_zero_#in~y=|v_avoid_zero_#in~y_1|} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~y_1|, avoid_zero_~y=v_avoid_zero_~y_1} AuxVars[] AssignedVars[avoid_zero_~y] {132#true} is VALID [2022-04-27 16:30:43,688 INFO L290 TraceCheckUtils]: 38: Hoare triple {132#true} [486] L11-->L11-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,688 INFO L290 TraceCheckUtils]: 39: Hoare triple {133#false} [498] L11-2-->avoid_zeroEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,689 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {133#false} {133#false} [579] avoid_zeroEXIT-->L297-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v_avoid_zero_#in~yInParam_2| (ite (not (= (mod v_Id_MCDC_95_~Id_MCDC_121~0_5 4294967296) 0)) 1 0)) InVars {Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_5} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~yInParam_2|} AuxVars[] AssignedVars[avoid_zero_#in~y, Id_MCDC_95_~Id_MCDC_121~0] {133#false} is VALID [2022-04-27 16:30:43,689 INFO L290 TraceCheckUtils]: 41: Hoare triple {133#false} [472] L297-1-->L298: Formula: (and |v_Id_MCDC_95_#t~short24_3| (= |v_Id_MCDC_95_#t~mem22_2| (select (select |v_#memory_int_27| v_Id_MCDC_95_~Id_MCDC_94.base_6) v_Id_MCDC_95_~Id_MCDC_94.offset_6))) InVars {#memory_int=|v_#memory_int_27|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_6, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_6} OutVars{#memory_int=|v_#memory_int_27|, Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_3|, Id_MCDC_95_#t~mem22=|v_Id_MCDC_95_#t~mem22_2|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_6, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_6} AuxVars[] AssignedVars[Id_MCDC_95_#t~short24, Id_MCDC_95_#t~mem22] {133#false} is VALID [2022-04-27 16:30:43,689 INFO L290 TraceCheckUtils]: 42: Hoare triple {133#false} [484] L298-->L298-2: Formula: (and (= (select (select |v_#memory_int_28| v_Id_MCDC_95_~Id_MCDC_94.base_7) v_Id_MCDC_95_~Id_MCDC_94.offset_7) |v_Id_MCDC_95_#t~mem23_2|) |v_Id_MCDC_95_#t~short24_4| |v_Id_MCDC_95_#t~short24_5|) InVars {#memory_int=|v_#memory_int_28|, Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_5|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_7, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_7} OutVars{#memory_int=|v_#memory_int_28|, Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_4|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_7, Id_MCDC_95_#t~mem23=|v_Id_MCDC_95_#t~mem23_2|, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_7} AuxVars[] AssignedVars[Id_MCDC_95_#t~short24, Id_MCDC_95_#t~mem23] {133#false} is VALID [2022-04-27 16:30:43,690 INFO L272 TraceCheckUtils]: 43: Hoare triple {133#false} [497] L298-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~Id_MCDC_103InParam_1| (ite |v_Id_MCDC_95_#t~short24_7| 1 0)) InVars {Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_7|} OutVars{__VERIFIER_assert_#in~Id_MCDC_103=|v___VERIFIER_assert_#in~Id_MCDC_103InParam_1|} AuxVars[] AssignedVars[Id_MCDC_95_#t~short24, __VERIFIER_assert_#in~Id_MCDC_103] {133#false} is VALID [2022-04-27 16:30:43,690 INFO L290 TraceCheckUtils]: 44: Hoare triple {133#false} [509] __VERIFIER_assertENTRY-->L461: Formula: (= v___VERIFIER_assert_~Id_MCDC_103_1 |v___VERIFIER_assert_#in~Id_MCDC_103_1|) InVars {__VERIFIER_assert_#in~Id_MCDC_103=|v___VERIFIER_assert_#in~Id_MCDC_103_1|} OutVars{__VERIFIER_assert_~Id_MCDC_103=v___VERIFIER_assert_~Id_MCDC_103_1, __VERIFIER_assert_#in~Id_MCDC_103=|v___VERIFIER_assert_#in~Id_MCDC_103_1|} AuxVars[] AssignedVars[__VERIFIER_assert_~Id_MCDC_103] {133#false} is VALID [2022-04-27 16:30:43,690 INFO L290 TraceCheckUtils]: 45: Hoare triple {133#false} [517] L461-->L463: Formula: (= v___VERIFIER_assert_~Id_MCDC_103_2 0) InVars {__VERIFIER_assert_~Id_MCDC_103=v___VERIFIER_assert_~Id_MCDC_103_2} OutVars{__VERIFIER_assert_~Id_MCDC_103=v___VERIFIER_assert_~Id_MCDC_103_2} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,690 INFO L290 TraceCheckUtils]: 46: Hoare triple {133#false} [527] L463-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {133#false} is VALID [2022-04-27 16:30:43,691 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 16:30:43,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:30:43,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495279229] [2022-04-27 16:30:43,692 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495279229] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:30:43,692 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:30:43,692 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:30:43,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031636185] [2022-04-27 16:30:43,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:30:43,700 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 47 [2022-04-27 16:30:43,701 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:30:43,704 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-27 16:30:43,750 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:30:43,750 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:30:43,751 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:30:43,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:30:43,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:30:43,774 INFO L87 Difference]: Start difference. First operand has 129 states, 100 states have (on average 1.54) internal successors, (154), 102 states have internal predecessors, (154), 16 states have call successors, (16), 11 states have call predecessors, (16), 11 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-27 16:30:44,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:30:44,724 INFO L93 Difference]: Finished difference Result 131 states and 179 transitions. [2022-04-27 16:30:44,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 16:30:44,724 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 47 [2022-04-27 16:30:44,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:30:44,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-27 16:30:44,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 188 transitions. [2022-04-27 16:30:44,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-27 16:30:44,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 188 transitions. [2022-04-27 16:30:44,738 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 188 transitions. [2022-04-27 16:30:45,029 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:30:45,038 INFO L225 Difference]: With dead ends: 131 [2022-04-27 16:30:45,038 INFO L226 Difference]: Without dead ends: 120 [2022-04-27 16:30:45,040 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:30:45,042 INFO L413 NwaCegarLoop]: 133 mSDtfsCounter, 242 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 249 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 16:30:45,042 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [249 Valid, 138 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 16:30:45,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-04-27 16:30:45,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2022-04-27 16:30:45,066 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:30:45,067 INFO L82 GeneralOperation]: Start isEquivalent. First operand 120 states. Second operand has 120 states, 95 states have (on average 1.4631578947368422) internal successors, (139), 96 states have internal predecessors, (139), 16 states have call successors, (16), 11 states have call predecessors, (16), 8 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 16:30:45,067 INFO L74 IsIncluded]: Start isIncluded. First operand 120 states. Second operand has 120 states, 95 states have (on average 1.4631578947368422) internal successors, (139), 96 states have internal predecessors, (139), 16 states have call successors, (16), 11 states have call predecessors, (16), 8 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 16:30:45,068 INFO L87 Difference]: Start difference. First operand 120 states. Second operand has 120 states, 95 states have (on average 1.4631578947368422) internal successors, (139), 96 states have internal predecessors, (139), 16 states have call successors, (16), 11 states have call predecessors, (16), 8 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 16:30:45,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:30:45,090 INFO L93 Difference]: Finished difference Result 120 states and 167 transitions. [2022-04-27 16:30:45,090 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 167 transitions. [2022-04-27 16:30:45,091 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:30:45,091 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:30:45,092 INFO L74 IsIncluded]: Start isIncluded. First operand has 120 states, 95 states have (on average 1.4631578947368422) internal successors, (139), 96 states have internal predecessors, (139), 16 states have call successors, (16), 11 states have call predecessors, (16), 8 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Second operand 120 states. [2022-04-27 16:30:45,092 INFO L87 Difference]: Start difference. First operand has 120 states, 95 states have (on average 1.4631578947368422) internal successors, (139), 96 states have internal predecessors, (139), 16 states have call successors, (16), 11 states have call predecessors, (16), 8 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Second operand 120 states. [2022-04-27 16:30:45,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:30:45,099 INFO L93 Difference]: Finished difference Result 120 states and 167 transitions. [2022-04-27 16:30:45,099 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 167 transitions. [2022-04-27 16:30:45,100 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:30:45,100 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:30:45,100 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:30:45,101 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:30:45,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 95 states have (on average 1.4631578947368422) internal successors, (139), 96 states have internal predecessors, (139), 16 states have call successors, (16), 11 states have call predecessors, (16), 8 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 16:30:45,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 167 transitions. [2022-04-27 16:30:45,110 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 167 transitions. Word has length 47 [2022-04-27 16:30:45,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:30:45,111 INFO L495 AbstractCegarLoop]: Abstraction has 120 states and 167 transitions. [2022-04-27 16:30:45,111 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 2 states have internal predecessors, (31), 2 states have call successors, (10), 4 states have call predecessors, (10), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-27 16:30:45,111 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 167 transitions. [2022-04-27 16:30:45,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-04-27 16:30:45,116 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:30:45,116 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:30:45,116 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:30:45,116 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:30:45,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:30:45,116 INFO L85 PathProgramCache]: Analyzing trace with hash -1478723201, now seen corresponding path program 1 times [2022-04-27 16:30:45,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:30:45,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488316002] [2022-04-27 16:30:45,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:30:45,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:30:45,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:45,277 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:30:45,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:45,286 INFO L290 TraceCheckUtils]: 0: Hoare triple {673#(and (= ~Id_MCDC_110~0.offset |old(~Id_MCDC_110~0.offset)|) (= ~Id_MCDC_109~0.offset |old(~Id_MCDC_109~0.offset)|) (= |~#Id_MCDC_112~0.base| |old(~#Id_MCDC_112~0.base)|) (= |old(~Id_MCDC_114~0)| ~Id_MCDC_114~0) (= |old(~Id_MCDC_106~0)| ~Id_MCDC_106~0) (= ~Id_MCDC_107~0.base |old(~Id_MCDC_107~0.base)|) (= |old(~#Id_MCDC_112~0.offset)| |~#Id_MCDC_112~0.offset|) (= ~Id_MCDC_108~0.base |old(~Id_MCDC_108~0.base)|) (= |old(~Id_MCDC_109~0.base)| ~Id_MCDC_109~0.base) (= |old(~#Id_MCDC_113~0.base)| |~#Id_MCDC_113~0.base|) (= |old(~#Id_MCDC_113~0.offset)| |~#Id_MCDC_113~0.offset|) (= |old(~Id_MCDC_110~0.base)| ~Id_MCDC_110~0.base) (= |old(~Id_MCDC_104~0)| ~Id_MCDC_104~0) (= |old(~Id_MCDC_108~0.offset)| ~Id_MCDC_108~0.offset) (= |old(~Id_MCDC_105~0)| ~Id_MCDC_105~0) (= ~Id_MCDC_107~0.offset |old(~Id_MCDC_107~0.offset)|) (= |old(~Id_MCDC_111~0.offset)| ~Id_MCDC_111~0.offset) (= |#NULL.offset| |old(#NULL.offset)|) (= ~Id_MCDC_111~0.base |old(~Id_MCDC_111~0.base)|) (= |old(#NULL.base)| |#NULL.base|))} [398] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse6 (+ 16 |v_~#Id_MCDC_113~0.offset_6|)) (.cse3 (select |v_#memory_int_31| 8)) (.cse8 (select |v_#memory_int_31| 1)) (.cse9 (select |v_#memory_int_31| |v_~#Id_MCDC_113~0.base_6|)) (.cse2 (+ 4 |v_~#Id_MCDC_113~0.offset_6|)) (.cse0 (select |v_#memory_int_31| 9)) (.cse1 (select |v_#memory_$Pointer$.offset_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse5 (+ 8 |v_~#Id_MCDC_113~0.offset_6|)) (.cse12 (select |v_#memory_int_31| 5)) (.cse13 (select |v_#memory_int_31| 4)) (.cse14 (select |v_#memory_int_31| 10)) (.cse10 (select |v_#memory_int_31| |v_~#Id_MCDC_112~0.base_3|)) (.cse4 (select |v_#memory_$Pointer$.base_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse7 (+ 12 |v_~#Id_MCDC_113~0.offset_6|)) (.cse11 (select |v_#memory_int_31| 7))) (and (= 46 (select .cse0 2)) (= 0 (select .cse1 .cse2)) (= |v_~#Id_MCDC_113~0.offset_6| 0) (= (select .cse3 2) 0) (= (select .cse4 .cse5) 0) (= (select .cse3 1) 111) (= v_~Id_MCDC_107~0.base_2 0) (= (select .cse4 .cse6) 0) (= 5 (select |v_#length_16| 4)) (= v_~Id_MCDC_108~0.offset_2 0) (= (select .cse1 .cse6) 0) (= (select |v_#valid_54| 4) 1) (= |v_~#Id_MCDC_113~0.base_6| 12) (= (select .cse1 .cse7) 0) (= (select |v_#valid_54| 7) 1) (= v_~Id_MCDC_114~0_6 0) (= (select |v_#length_16| 5) 3) (= (select .cse8 1) 0) (= (select |v_#valid_54| 5) 1) (= (select .cse9 (+ 3 |v_~#Id_MCDC_113~0.offset_6|)) 0) (= 119 (select .cse3 0)) (= (select |v_#valid_54| 1) 1) (= (select .cse9 |v_~#Id_MCDC_113~0.offset_6|) 0) (= 110 (select .cse0 1)) (= 0 v_~Id_MCDC_107~0.offset_2) (= v_~Id_MCDC_104~0_1 0) (= (select .cse10 (+ 12 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse11 3) 100) (= (select .cse8 0) 48) (= (select |v_#length_16| 8) 3) (< 0 |v_#StackHeapBarrier_3|) (= (select .cse9 (+ |v_~#Id_MCDC_113~0.offset_6| 1)) 0) (= 5 (select |v_#length_16| 7)) (= 101 (select .cse0 3)) (= 119 (select .cse12 0)) (= |v_#NULL.base_1| 0) (= (select |v_#valid_54| 2) 1) (= (select .cse13 4) 0) (= 0 (select .cse4 .cse2)) (= v_~Id_MCDC_110~0.base_2 0) (= (select .cse0 6) 0) (= v_~Id_MCDC_110~0.offset_2 0) (= (select .cse0 0) 105) (= (select .cse0 5) 115) (= (select .cse10 (+ 8 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select |v_#valid_54| 10) 1) (= 115 (select .cse13 1)) (= (select .cse13 3) 100) (= 115 (select .cse11 1)) (= |v_~#Id_MCDC_112~0.offset_3| 0) (= 118 (select .cse13 2)) (= (select |v_#valid_54| 6) 1) (= 2 (select |v_#length_16| 10)) (= (select |v_#valid_54| 9) 1) (= 16 (select |v_#length_16| 11)) (= 7 (select |v_#length_16| 9)) (= 111 (select .cse12 1)) (= (select .cse0 4) 100) (= v_~Id_MCDC_109~0.offset_2 0) (= |v_~#Id_MCDC_112~0.base_3| 11) (= (select |v_#valid_54| 8) 1) (= v_~Id_MCDC_106~0_3 0) (= (select |v_#valid_54| 12) 1) (= (select |v_#valid_54| 3) 1) (= 118 (select .cse11 2)) (= v_~Id_MCDC_111~0.offset_4 0) (= v_~Id_MCDC_111~0.base_4 0) (= (select .cse1 .cse5) 0) (= (select .cse10 (+ 4 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse12 2) 0) (= (select .cse13 0) 114) (= (select .cse14 1) 0) (= 114 (select .cse14 0)) (= (select .cse10 |v_~#Id_MCDC_112~0.offset_3|) 0) (= |v_#NULL.offset_1| 0) (= v_~Id_MCDC_108~0.base_2 0) (= (select .cse11 4) 0) (= (select |v_#valid_54| 11) 1) (= (select |v_#valid_54| 0) 0) (= 2 (select |v_#length_16| 1)) (= v_~Id_MCDC_109~0.base_2 0) (= (select .cse4 .cse7) 0) (= v_~Id_MCDC_105~0_3 0) (= 20 (select |v_#length_16| 12)) (= 114 (select .cse11 0)) (= 9 (select |v_#length_16| 2)) (= (select |v_#length_16| 6) 20) (= (select |v_#length_16| 3) 12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, #length=|v_#length_16|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|} OutVars{#memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_6|, #NULL.offset=|v_#NULL.offset_1|, ~Id_MCDC_111~0.offset=v_~Id_MCDC_111~0.offset_4, ~#Id_MCDC_112~0.base=|v_~#Id_MCDC_112~0.base_3|, ~#Id_MCDC_112~0.offset=|v_~#Id_MCDC_112~0.offset_3|, ~Id_MCDC_109~0.offset=v_~Id_MCDC_109~0.offset_2, ~Id_MCDC_114~0=v_~Id_MCDC_114~0_6, #length=|v_#length_16|, ~Id_MCDC_106~0=v_~Id_MCDC_106~0_3, ~Id_MCDC_104~0=v_~Id_MCDC_104~0_1, ~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_6|, ~Id_MCDC_109~0.base=v_~Id_MCDC_109~0.base_2, ~Id_MCDC_108~0.offset=v_~Id_MCDC_108~0.offset_2, ~Id_MCDC_107~0.base=v_~Id_MCDC_107~0.base_2, ~Id_MCDC_110~0.base=v_~Id_MCDC_110~0.base_2, ~Id_MCDC_108~0.base=v_~Id_MCDC_108~0.base_2, ~Id_MCDC_111~0.base=v_~Id_MCDC_111~0.base_4, #NULL.base=|v_#NULL.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, ~Id_MCDC_110~0.offset=v_~Id_MCDC_110~0.offset_2, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, ~Id_MCDC_107~0.offset=v_~Id_MCDC_107~0.offset_2, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|, ~Id_MCDC_105~0=v_~Id_MCDC_105~0_3} AuxVars[] AssignedVars[~#Id_MCDC_113~0.offset, ~Id_MCDC_109~0.base, ~#Id_MCDC_113~0.base, ~Id_MCDC_108~0.offset, ~Id_MCDC_107~0.base, #NULL.offset, ~Id_MCDC_110~0.base, ~Id_MCDC_111~0.offset, ~Id_MCDC_108~0.base, ~#Id_MCDC_112~0.base, ~#Id_MCDC_112~0.offset, ~Id_MCDC_109~0.offset, ~Id_MCDC_111~0.base, #NULL.base, ~Id_MCDC_114~0, ~Id_MCDC_110~0.offset, ~Id_MCDC_107~0.offset, ~Id_MCDC_106~0, ~Id_MCDC_104~0, ~Id_MCDC_105~0] {650#true} is VALID [2022-04-27 16:30:45,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {650#true} [401] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,287 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {650#true} {650#true} [566] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-04-27 16:30:45,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:45,311 INFO L290 TraceCheckUtils]: 0: Hoare triple {674#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} [412] Id_MCDC_97ENTRY-->L352-3: Formula: (let ((.cse3 (store |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 1))) (let ((.cse2 (store .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 1))) (let ((.cse0 (store .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 1))) (let ((.cse1 (store .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 1))) (and (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18| 0) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|) 0) (= (store (store (store (store (store |v_#length_15| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 4) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 4) |v_#length_10|) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) (= (select .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) 0) (= |v_#valid_48| (store .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 1)) (= v_Id_MCDC_97_~Id_MCDC_123~0_9 6144) (= 0 |v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|) (= v_Id_MCDC_97_~Id_MCDC_35~0_4 0) (= (select .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 0)) (= (select .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) 0) (= (select |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) 0) (= |v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14| 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18| 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 0)) (= v_Id_MCDC_97_~Id_MCDC_36~0_1 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 0)) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|) 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) (not (= 0 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|)) (= v_Id_MCDC_97_~Id_MCDC_134~0_3 0) (= |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20| 0) (= v_Id_MCDC_97_~Id_MCDC_132~0_11 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 0)) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|) 0) (= (select .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) 0) (= v_Id_MCDC_97_~Id_MCDC_133~0_1 0)))))) InVars {#memory_int=|v_#memory_int_23|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_15|, #valid=|v_#valid_53|} OutVars{Id_MCDC_97_~Id_MCDC_127~0=v_Id_MCDC_97_~Id_MCDC_127~0_4, Id_MCDC_97_~Id_MCDC_137~0.base=v_Id_MCDC_97_~Id_MCDC_137~0.base_1, Id_MCDC_97_~Id_MCDC_134~0=v_Id_MCDC_97_~Id_MCDC_134~0_3, Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_9, Id_MCDC_97_~Id_MCDC_137~0.offset=v_Id_MCDC_97_~Id_MCDC_137~0.offset_1, Id_MCDC_97_~Id_MCDC_126~0=v_Id_MCDC_97_~Id_MCDC_126~0_2, #length=|v_#length_10|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|, Id_MCDC_97_~Id_MCDC_124~0=v_Id_MCDC_97_~Id_MCDC_124~0_4, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|, Id_MCDC_97_~Id_MCDC_35~0=v_Id_MCDC_97_~Id_MCDC_35~0_4, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|, Id_MCDC_97_~Id_MCDC_129~0=v_Id_MCDC_97_~Id_MCDC_129~0_3, Id_MCDC_97_~Id_MCDC_138~0=v_Id_MCDC_97_~Id_MCDC_138~0_7, Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_11, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|, Id_MCDC_97_~Id_MCDC_125~0=v_Id_MCDC_97_~Id_MCDC_125~0_2, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|, Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_48|, Id_MCDC_97_~Id_MCDC_36~0=v_Id_MCDC_97_~Id_MCDC_36~0_1, #memory_int=|v_#memory_int_23|, Id_MCDC_97_~Id_MCDC_133~0=v_Id_MCDC_97_~Id_MCDC_133~0_1, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|} AuxVars[] AssignedVars[Id_MCDC_97_~Id_MCDC_127~0, Id_MCDC_97_~Id_MCDC_137~0.base, Id_MCDC_97_~Id_MCDC_134~0, Id_MCDC_97_~Id_MCDC_123~0, Id_MCDC_97_~Id_MCDC_137~0.offset, Id_MCDC_97_~Id_MCDC_126~0, #length, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base, Id_MCDC_97_~Id_MCDC_124~0, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~Id_MCDC_35~0, Id_MCDC_97_~#Id_MCDC_130~0.base, Id_MCDC_97_~Id_MCDC_129~0, Id_MCDC_97_~Id_MCDC_138~0, Id_MCDC_97_~Id_MCDC_132~0, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~Id_MCDC_125~0, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_131~0.base, #valid, Id_MCDC_97_~Id_MCDC_36~0, Id_MCDC_97_~Id_MCDC_133~0, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset] {650#true} is VALID [2022-04-27 16:30:45,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {650#true} [417] L352-3-->L352-4: Formula: (not (< (mod v_Id_MCDC_97_~Id_MCDC_132~0_1 256) 4)) InVars {Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_1} OutVars{Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,311 INFO L290 TraceCheckUtils]: 2: Hoare triple {650#true} [423] L352-4-->L356: Formula: (not (<= (mod v_Id_MCDC_97_~Id_MCDC_123~0_1 4294967296) 6147)) InVars {Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} OutVars{Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,311 INFO L290 TraceCheckUtils]: 3: Hoare triple {650#true} [432] L356-->Id_MCDC_97FINAL: Formula: (and (= 0 |v_Id_MCDC_97_#res_1|) (= |v_#valid_12| (store (store (store (store (store |v_#valid_17| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_2| 0))) InVars {Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_2|, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_2|, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_2|, #valid=|v_#valid_17|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_2|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_2|} OutVars{Id_MCDC_97_#res=|v_Id_MCDC_97_#res_1|, #valid=|v_#valid_12|, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_1|, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_1|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_1|, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_1|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_1|} AuxVars[] AssignedVars[Id_MCDC_97_~#Id_MCDC_131~0.base, Id_MCDC_97_#res, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~#Id_MCDC_130~0.base, #valid, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base] {650#true} is VALID [2022-04-27 16:30:45,311 INFO L290 TraceCheckUtils]: 4: Hoare triple {650#true} [438] Id_MCDC_97FINAL-->Id_MCDC_97EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,312 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {650#true} {650#true} [570] Id_MCDC_97EXIT-->L405-1: AOR: Formula: (= |v_Id_MCDC_97_#resOutParam_1| |v_Id_MCDC_99_#t~ret54_3|) InVars {Id_MCDC_97_#res=|v_Id_MCDC_97_#resOutParam_1|} OutVars{Id_MCDC_99_#t~ret54=|v_Id_MCDC_99_#t~ret54_3|} AuxVars[] AssignedVars[Id_MCDC_97_#res, Id_MCDC_99_#t~ret54] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-04-27 16:30:45,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:45,317 INFO L290 TraceCheckUtils]: 0: Hoare triple {650#true} [458] Id_MCDC_92ENTRY-->L255: Formula: (and (= |v_Id_MCDC_92_#in~Id_MCDC_91_1| v_Id_MCDC_92_~Id_MCDC_91_4) (= v_Id_MCDC_92_~Id_MCDC_119~0_1 1) (= v_Id_MCDC_92_~Id_MCDC_118~0_2 0) (= v_Id_MCDC_92_~Id_MCDC_120~0_1 0) (= v_Id_MCDC_92_~Id_MCDC_117~0_3 0) (= |v_Id_MCDC_92_#in~Id_MCDC_90_1| v_Id_MCDC_92_~Id_MCDC_90_4)) InVars {Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|} OutVars{Id_MCDC_92_~Id_MCDC_120~0=v_Id_MCDC_92_~Id_MCDC_120~0_1, Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_4, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_4, Id_MCDC_92_~Id_MCDC_117~0=v_Id_MCDC_92_~Id_MCDC_117~0_3, Id_MCDC_92_~Id_MCDC_119~0=v_Id_MCDC_92_~Id_MCDC_119~0_1, Id_MCDC_92_~Id_MCDC_118~0=v_Id_MCDC_92_~Id_MCDC_118~0_2} AuxVars[] AssignedVars[Id_MCDC_92_~Id_MCDC_120~0, Id_MCDC_92_~Id_MCDC_90, Id_MCDC_92_~Id_MCDC_91, Id_MCDC_92_~Id_MCDC_117~0, Id_MCDC_92_~Id_MCDC_119~0, Id_MCDC_92_~Id_MCDC_118~0] {650#true} is VALID [2022-04-27 16:30:45,318 INFO L290 TraceCheckUtils]: 1: Hoare triple {650#true} [465] L255-->L261: Formula: (not (< (mod v_Id_MCDC_92_~Id_MCDC_91_1 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_90_1 4294967296))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} OutVars{Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {650#true} [478] L261-->Id_MCDC_92FINAL: Formula: (and (= v_Id_MCDC_92_~Id_MCDC_90_3 |v_Id_MCDC_92_#res_2|) (not (< (mod v_Id_MCDC_92_~Id_MCDC_90_3 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_91_3 4294967296)))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} OutVars{Id_MCDC_92_#res=|v_Id_MCDC_92_#res_2|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} AuxVars[] AssignedVars[Id_MCDC_92_#res] {650#true} is VALID [2022-04-27 16:30:45,318 INFO L290 TraceCheckUtils]: 3: Hoare triple {650#true} [490] Id_MCDC_92FINAL-->Id_MCDC_92EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,318 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {650#true} {650#true} [577] Id_MCDC_92EXIT-->L296-1: AOR: Formula: (= |v_Id_MCDC_92_#resOutParam_1| |v_Id_MCDC_95_#t~ret21_4|) InVars {Id_MCDC_92_#res=|v_Id_MCDC_92_#resOutParam_1|} OutVars{Id_MCDC_95_#t~ret21=|v_Id_MCDC_95_#t~ret21_4|} AuxVars[] AssignedVars[Id_MCDC_95_#t~ret21, Id_MCDC_92_#res] LVA: Formula: (and (= |v_Id_MCDC_95_#t~mem20_4| |v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|) (= v_Id_MCDC_95_~Id_MCDC_122~0_8 |v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|)) InVars {Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_4|, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_8} OutVars{Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|} AuxVars[] AssignedVars[Id_MCDC_92_#in~Id_MCDC_90, Id_MCDC_92_#in~Id_MCDC_91, Id_MCDC_95_#t~mem20, Id_MCDC_95_~Id_MCDC_122~0] {650#true} is VALID [2022-04-27 16:30:45,318 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 16:30:45,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:30:45,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {650#true} [473] avoid_zeroENTRY-->L11: Formula: (= |v_avoid_zero_#in~y_1| v_avoid_zero_~y_1) InVars {avoid_zero_#in~y=|v_avoid_zero_#in~y_1|} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~y_1|, avoid_zero_~y=v_avoid_zero_~y_1} AuxVars[] AssignedVars[avoid_zero_~y] {650#true} is VALID [2022-04-27 16:30:45,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {650#true} [487] L11-->L11-2: Formula: (not (= v_avoid_zero_~y_3 0)) InVars {avoid_zero_~y=v_avoid_zero_~y_3} OutVars{avoid_zero_~y=v_avoid_zero_~y_3} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {650#true} [498] L11-2-->avoid_zeroEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {650#true} {650#true} [579] avoid_zeroEXIT-->L297-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v_avoid_zero_#in~yInParam_2| (ite (not (= (mod v_Id_MCDC_95_~Id_MCDC_121~0_5 4294967296) 0)) 1 0)) InVars {Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_5} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~yInParam_2|} AuxVars[] AssignedVars[avoid_zero_#in~y, Id_MCDC_95_~Id_MCDC_121~0] {650#true} is VALID [2022-04-27 16:30:45,323 INFO L272 TraceCheckUtils]: 0: Hoare triple {650#true} [396] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {673#(and (= ~Id_MCDC_110~0.offset |old(~Id_MCDC_110~0.offset)|) (= ~Id_MCDC_109~0.offset |old(~Id_MCDC_109~0.offset)|) (= |~#Id_MCDC_112~0.base| |old(~#Id_MCDC_112~0.base)|) (= |old(~Id_MCDC_114~0)| ~Id_MCDC_114~0) (= |old(~Id_MCDC_106~0)| ~Id_MCDC_106~0) (= ~Id_MCDC_107~0.base |old(~Id_MCDC_107~0.base)|) (= |old(~#Id_MCDC_112~0.offset)| |~#Id_MCDC_112~0.offset|) (= ~Id_MCDC_108~0.base |old(~Id_MCDC_108~0.base)|) (= |old(~Id_MCDC_109~0.base)| ~Id_MCDC_109~0.base) (= |old(~#Id_MCDC_113~0.base)| |~#Id_MCDC_113~0.base|) (= |old(~#Id_MCDC_113~0.offset)| |~#Id_MCDC_113~0.offset|) (= |old(~Id_MCDC_110~0.base)| ~Id_MCDC_110~0.base) (= |old(~Id_MCDC_104~0)| ~Id_MCDC_104~0) (= |old(~Id_MCDC_108~0.offset)| ~Id_MCDC_108~0.offset) (= |old(~Id_MCDC_105~0)| ~Id_MCDC_105~0) (= ~Id_MCDC_107~0.offset |old(~Id_MCDC_107~0.offset)|) (= |old(~Id_MCDC_111~0.offset)| ~Id_MCDC_111~0.offset) (= |#NULL.offset| |old(#NULL.offset)|) (= ~Id_MCDC_111~0.base |old(~Id_MCDC_111~0.base)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:30:45,324 INFO L290 TraceCheckUtils]: 1: Hoare triple {673#(and (= ~Id_MCDC_110~0.offset |old(~Id_MCDC_110~0.offset)|) (= ~Id_MCDC_109~0.offset |old(~Id_MCDC_109~0.offset)|) (= |~#Id_MCDC_112~0.base| |old(~#Id_MCDC_112~0.base)|) (= |old(~Id_MCDC_114~0)| ~Id_MCDC_114~0) (= |old(~Id_MCDC_106~0)| ~Id_MCDC_106~0) (= ~Id_MCDC_107~0.base |old(~Id_MCDC_107~0.base)|) (= |old(~#Id_MCDC_112~0.offset)| |~#Id_MCDC_112~0.offset|) (= ~Id_MCDC_108~0.base |old(~Id_MCDC_108~0.base)|) (= |old(~Id_MCDC_109~0.base)| ~Id_MCDC_109~0.base) (= |old(~#Id_MCDC_113~0.base)| |~#Id_MCDC_113~0.base|) (= |old(~#Id_MCDC_113~0.offset)| |~#Id_MCDC_113~0.offset|) (= |old(~Id_MCDC_110~0.base)| ~Id_MCDC_110~0.base) (= |old(~Id_MCDC_104~0)| ~Id_MCDC_104~0) (= |old(~Id_MCDC_108~0.offset)| ~Id_MCDC_108~0.offset) (= |old(~Id_MCDC_105~0)| ~Id_MCDC_105~0) (= ~Id_MCDC_107~0.offset |old(~Id_MCDC_107~0.offset)|) (= |old(~Id_MCDC_111~0.offset)| ~Id_MCDC_111~0.offset) (= |#NULL.offset| |old(#NULL.offset)|) (= ~Id_MCDC_111~0.base |old(~Id_MCDC_111~0.base)|) (= |old(#NULL.base)| |#NULL.base|))} [398] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse6 (+ 16 |v_~#Id_MCDC_113~0.offset_6|)) (.cse3 (select |v_#memory_int_31| 8)) (.cse8 (select |v_#memory_int_31| 1)) (.cse9 (select |v_#memory_int_31| |v_~#Id_MCDC_113~0.base_6|)) (.cse2 (+ 4 |v_~#Id_MCDC_113~0.offset_6|)) (.cse0 (select |v_#memory_int_31| 9)) (.cse1 (select |v_#memory_$Pointer$.offset_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse5 (+ 8 |v_~#Id_MCDC_113~0.offset_6|)) (.cse12 (select |v_#memory_int_31| 5)) (.cse13 (select |v_#memory_int_31| 4)) (.cse14 (select |v_#memory_int_31| 10)) (.cse10 (select |v_#memory_int_31| |v_~#Id_MCDC_112~0.base_3|)) (.cse4 (select |v_#memory_$Pointer$.base_29| |v_~#Id_MCDC_113~0.base_6|)) (.cse7 (+ 12 |v_~#Id_MCDC_113~0.offset_6|)) (.cse11 (select |v_#memory_int_31| 7))) (and (= 46 (select .cse0 2)) (= 0 (select .cse1 .cse2)) (= |v_~#Id_MCDC_113~0.offset_6| 0) (= (select .cse3 2) 0) (= (select .cse4 .cse5) 0) (= (select .cse3 1) 111) (= v_~Id_MCDC_107~0.base_2 0) (= (select .cse4 .cse6) 0) (= 5 (select |v_#length_16| 4)) (= v_~Id_MCDC_108~0.offset_2 0) (= (select .cse1 .cse6) 0) (= (select |v_#valid_54| 4) 1) (= |v_~#Id_MCDC_113~0.base_6| 12) (= (select .cse1 .cse7) 0) (= (select |v_#valid_54| 7) 1) (= v_~Id_MCDC_114~0_6 0) (= (select |v_#length_16| 5) 3) (= (select .cse8 1) 0) (= (select |v_#valid_54| 5) 1) (= (select .cse9 (+ 3 |v_~#Id_MCDC_113~0.offset_6|)) 0) (= 119 (select .cse3 0)) (= (select |v_#valid_54| 1) 1) (= (select .cse9 |v_~#Id_MCDC_113~0.offset_6|) 0) (= 110 (select .cse0 1)) (= 0 v_~Id_MCDC_107~0.offset_2) (= v_~Id_MCDC_104~0_1 0) (= (select .cse10 (+ 12 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse11 3) 100) (= (select .cse8 0) 48) (= (select |v_#length_16| 8) 3) (< 0 |v_#StackHeapBarrier_3|) (= (select .cse9 (+ |v_~#Id_MCDC_113~0.offset_6| 1)) 0) (= 5 (select |v_#length_16| 7)) (= 101 (select .cse0 3)) (= 119 (select .cse12 0)) (= |v_#NULL.base_1| 0) (= (select |v_#valid_54| 2) 1) (= (select .cse13 4) 0) (= 0 (select .cse4 .cse2)) (= v_~Id_MCDC_110~0.base_2 0) (= (select .cse0 6) 0) (= v_~Id_MCDC_110~0.offset_2 0) (= (select .cse0 0) 105) (= (select .cse0 5) 115) (= (select .cse10 (+ 8 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select |v_#valid_54| 10) 1) (= 115 (select .cse13 1)) (= (select .cse13 3) 100) (= 115 (select .cse11 1)) (= |v_~#Id_MCDC_112~0.offset_3| 0) (= 118 (select .cse13 2)) (= (select |v_#valid_54| 6) 1) (= 2 (select |v_#length_16| 10)) (= (select |v_#valid_54| 9) 1) (= 16 (select |v_#length_16| 11)) (= 7 (select |v_#length_16| 9)) (= 111 (select .cse12 1)) (= (select .cse0 4) 100) (= v_~Id_MCDC_109~0.offset_2 0) (= |v_~#Id_MCDC_112~0.base_3| 11) (= (select |v_#valid_54| 8) 1) (= v_~Id_MCDC_106~0_3 0) (= (select |v_#valid_54| 12) 1) (= (select |v_#valid_54| 3) 1) (= 118 (select .cse11 2)) (= v_~Id_MCDC_111~0.offset_4 0) (= v_~Id_MCDC_111~0.base_4 0) (= (select .cse1 .cse5) 0) (= (select .cse10 (+ 4 |v_~#Id_MCDC_112~0.offset_3|)) 0) (= (select .cse12 2) 0) (= (select .cse13 0) 114) (= (select .cse14 1) 0) (= 114 (select .cse14 0)) (= (select .cse10 |v_~#Id_MCDC_112~0.offset_3|) 0) (= |v_#NULL.offset_1| 0) (= v_~Id_MCDC_108~0.base_2 0) (= (select .cse11 4) 0) (= (select |v_#valid_54| 11) 1) (= (select |v_#valid_54| 0) 0) (= 2 (select |v_#length_16| 1)) (= v_~Id_MCDC_109~0.base_2 0) (= (select .cse4 .cse7) 0) (= v_~Id_MCDC_105~0_3 0) (= 20 (select |v_#length_16| 12)) (= 114 (select .cse11 0)) (= 9 (select |v_#length_16| 2)) (= (select |v_#length_16| 6) 20) (= (select |v_#length_16| 3) 12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, #length=|v_#length_16|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|} OutVars{#memory_$Pointer$.base=|v_#memory_$Pointer$.base_29|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_6|, #NULL.offset=|v_#NULL.offset_1|, ~Id_MCDC_111~0.offset=v_~Id_MCDC_111~0.offset_4, ~#Id_MCDC_112~0.base=|v_~#Id_MCDC_112~0.base_3|, ~#Id_MCDC_112~0.offset=|v_~#Id_MCDC_112~0.offset_3|, ~Id_MCDC_109~0.offset=v_~Id_MCDC_109~0.offset_2, ~Id_MCDC_114~0=v_~Id_MCDC_114~0_6, #length=|v_#length_16|, ~Id_MCDC_106~0=v_~Id_MCDC_106~0_3, ~Id_MCDC_104~0=v_~Id_MCDC_104~0_1, ~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_6|, ~Id_MCDC_109~0.base=v_~Id_MCDC_109~0.base_2, ~Id_MCDC_108~0.offset=v_~Id_MCDC_108~0.offset_2, ~Id_MCDC_107~0.base=v_~Id_MCDC_107~0.base_2, ~Id_MCDC_110~0.base=v_~Id_MCDC_110~0.base_2, ~Id_MCDC_108~0.base=v_~Id_MCDC_108~0.base_2, ~Id_MCDC_111~0.base=v_~Id_MCDC_111~0.base_4, #NULL.base=|v_#NULL.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, ~Id_MCDC_110~0.offset=v_~Id_MCDC_110~0.offset_2, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_31|, ~Id_MCDC_107~0.offset=v_~Id_MCDC_107~0.offset_2, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_29|, ~Id_MCDC_105~0=v_~Id_MCDC_105~0_3} AuxVars[] AssignedVars[~#Id_MCDC_113~0.offset, ~Id_MCDC_109~0.base, ~#Id_MCDC_113~0.base, ~Id_MCDC_108~0.offset, ~Id_MCDC_107~0.base, #NULL.offset, ~Id_MCDC_110~0.base, ~Id_MCDC_111~0.offset, ~Id_MCDC_108~0.base, ~#Id_MCDC_112~0.base, ~#Id_MCDC_112~0.offset, ~Id_MCDC_109~0.offset, ~Id_MCDC_111~0.base, #NULL.base, ~Id_MCDC_114~0, ~Id_MCDC_110~0.offset, ~Id_MCDC_107~0.offset, ~Id_MCDC_106~0, ~Id_MCDC_104~0, ~Id_MCDC_105~0] {650#true} is VALID [2022-04-27 16:30:45,324 INFO L290 TraceCheckUtils]: 2: Hoare triple {650#true} [401] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,324 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {650#true} {650#true} [566] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,324 INFO L272 TraceCheckUtils]: 4: Hoare triple {650#true} [397] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,325 INFO L290 TraceCheckUtils]: 5: Hoare triple {650#true} [400] mainENTRY-->L452: Formula: (and (= v_main_~Id_MCDC_161~0_1 0) (= v_main_~Id_MCDC_162~0_1 0)) InVars {} OutVars{main_~Id_MCDC_158~0.base=v_main_~Id_MCDC_158~0.base_1, main_~Id_MCDC_164~0=v_main_~Id_MCDC_164~0_1, main_~Id_MCDC_163~0=v_main_~Id_MCDC_163~0_1, main_~Id_MCDC_150~0=v_main_~Id_MCDC_150~0_1, main_~Id_MCDC_146~0.offset=v_main_~Id_MCDC_146~0.offset_1, main_~Id_MCDC_146~0.base=v_main_~Id_MCDC_146~0.base_1, main_#t~ret64.offset=|v_main_#t~ret64.offset_1|, main_~Id_MCDC_156~0=v_main_~Id_MCDC_156~0_1, main_~Id_MCDC_143~0.base=v_main_~Id_MCDC_143~0.base_1, main_~Id_MCDC_162~0=v_main_~Id_MCDC_162~0_1, main_~Id_MCDC_143~0.offset=v_main_~Id_MCDC_143~0.offset_1, main_~Id_MCDC_157~0=v_main_~Id_MCDC_157~0_1, main_~Id_MCDC_148~0.base=v_main_~Id_MCDC_148~0.base_1, main_~Id_MCDC_153~0=v_main_~Id_MCDC_153~0_1, main_~Id_MCDC_145~0.base=v_main_~Id_MCDC_145~0.base_1, main_~Id_MCDC_147~0.offset=v_main_~Id_MCDC_147~0.offset_1, main_~Id_MCDC_149~0=v_main_~Id_MCDC_149~0_1, main_~Id_MCDC_161~0=v_main_~Id_MCDC_161~0_1, main_~Id_MCDC_144~0.offset=v_main_~Id_MCDC_144~0.offset_1, main_~Id_MCDC_152~0=v_main_~Id_MCDC_152~0_1, main_~Id_MCDC_154~0=v_main_~Id_MCDC_154~0_1, main_#t~ret64.base=|v_main_#t~ret64.base_1|, main_~Id_MCDC_160~0=v_main_~Id_MCDC_160~0_1, main_~Id_MCDC_159~0=v_main_~Id_MCDC_159~0_1, main_~Id_MCDC_148~0.offset=v_main_~Id_MCDC_148~0.offset_1, main_~Id_MCDC_158~0.offset=v_main_~Id_MCDC_158~0.offset_1, main_~Id_MCDC_147~0.base=v_main_~Id_MCDC_147~0.base_1, main_~Id_MCDC_145~0.offset=v_main_~Id_MCDC_145~0.offset_1, main_~Id_MCDC_144~0.base=v_main_~Id_MCDC_144~0.base_1, main_~Id_MCDC_151~0=v_main_~Id_MCDC_151~0_1, main_~Id_MCDC_155~0=v_main_~Id_MCDC_155~0_1} AuxVars[] AssignedVars[main_~Id_MCDC_158~0.base, main_~Id_MCDC_164~0, main_~Id_MCDC_163~0, main_~Id_MCDC_150~0, main_~Id_MCDC_146~0.offset, main_~Id_MCDC_146~0.base, main_#t~ret64.offset, main_~Id_MCDC_156~0, main_~Id_MCDC_143~0.base, main_~Id_MCDC_162~0, main_~Id_MCDC_143~0.offset, main_~Id_MCDC_157~0, main_~Id_MCDC_148~0.base, main_~Id_MCDC_153~0, main_~Id_MCDC_145~0.base, main_~Id_MCDC_147~0.offset, main_~Id_MCDC_149~0, main_~Id_MCDC_161~0, main_~Id_MCDC_144~0.offset, main_~Id_MCDC_152~0, main_~Id_MCDC_154~0, main_#t~ret64.base, main_~Id_MCDC_160~0, main_~Id_MCDC_159~0, main_~Id_MCDC_148~0.offset, main_~Id_MCDC_158~0.offset, main_~Id_MCDC_147~0.base, main_~Id_MCDC_145~0.offset, main_~Id_MCDC_144~0.base, main_~Id_MCDC_151~0, main_~Id_MCDC_155~0] {650#true} is VALID [2022-04-27 16:30:45,325 INFO L290 TraceCheckUtils]: 6: Hoare triple {650#true} [403] L452-->L457: Formula: (or (not (= v_main_~Id_MCDC_158~0.offset_5 0)) (not (= v_main_~Id_MCDC_158~0.base_5 0))) InVars {main_~Id_MCDC_158~0.base=v_main_~Id_MCDC_158~0.base_5, main_~Id_MCDC_158~0.offset=v_main_~Id_MCDC_158~0.offset_5} OutVars{main_~Id_MCDC_158~0.base=v_main_~Id_MCDC_158~0.base_5, main_~Id_MCDC_158~0.offset=v_main_~Id_MCDC_158~0.offset_5} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,325 INFO L272 TraceCheckUtils]: 7: Hoare triple {650#true} [405] L457-->Id_MCDC_100ENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,325 INFO L290 TraceCheckUtils]: 8: Hoare triple {650#true} [406] Id_MCDC_100ENTRY-->L424: Formula: true InVars {} OutVars{Id_MCDC_100_~Id_MCDC_141~0=v_Id_MCDC_100_~Id_MCDC_141~0_1, Id_MCDC_100_~Id_MCDC_142~0.offset=v_Id_MCDC_100_~Id_MCDC_142~0.offset_1, Id_MCDC_100_~Id_MCDC_142~0.base=v_Id_MCDC_100_~Id_MCDC_142~0.base_1} AuxVars[] AssignedVars[Id_MCDC_100_~Id_MCDC_142~0.base, Id_MCDC_100_~Id_MCDC_141~0, Id_MCDC_100_~Id_MCDC_142~0.offset] {650#true} is VALID [2022-04-27 16:30:45,325 INFO L272 TraceCheckUtils]: 9: Hoare triple {650#true} [407] L424-->Id_MCDC_99ENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,325 INFO L290 TraceCheckUtils]: 10: Hoare triple {650#true} [409] Id_MCDC_99ENTRY-->L405: Formula: (let ((.cse1 (store |v_#valid_9| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6| 1)) (.cse0 (select |v_#memory_int_14| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|)) (.cse2 (+ 12 |v_~#Id_MCDC_113~0.offset_4|))) (and (= (select .cse0 (+ |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 3)) 0) (= (select |v_#valid_9| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|) 0) (= (select .cse1 |v_Id_MCDC_99_#t~malloc53.base_4|) 0) (= (select .cse0 (+ |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 1)) 0) (not (= |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6| 0)) (< |v_#StackHeapBarrier_1| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|) (= (store |v_#memory_$Pointer$.base_17| |v_~#Id_MCDC_113~0.base_4| (store (select |v_#memory_$Pointer$.base_17| |v_~#Id_MCDC_113~0.base_4|) .cse2 |v_Id_MCDC_99_#t~malloc53.base_4|)) |v_#memory_$Pointer$.base_16|) (= (store |v_#memory_$Pointer$.offset_17| |v_~#Id_MCDC_113~0.base_4| (store (select |v_#memory_$Pointer$.offset_17| |v_~#Id_MCDC_113~0.base_4|) .cse2 0)) |v_#memory_$Pointer$.offset_16|) (= |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 0) (= |v_#valid_7| (store .cse1 |v_Id_MCDC_99_#t~malloc53.base_4| 1)) (= (select .cse0 (+ |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6| 2)) 0) (= |v_#length_5| (store (store |v_#length_7| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_6| 4) |v_Id_MCDC_99_#t~malloc53.base_4| 372)) (= (select .cse0 |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6|) 0) (= v_Id_MCDC_99_~Id_MCDC_140~0_8 0) (not (= |v_Id_MCDC_99_#t~malloc53.base_4| 0)) (< |v_Id_MCDC_99_#t~malloc53.base_4| |v_#StackHeapBarrier_1|) (= (store |v_#memory_int_14| |v_~#Id_MCDC_113~0.base_4| (store (select |v_#memory_int_14| |v_~#Id_MCDC_113~0.base_4|) .cse2 (select (select |v_#memory_int_13| |v_~#Id_MCDC_113~0.base_4|) .cse2))) |v_#memory_int_13|))) InVars {~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_4|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_17|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_4|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_14|, #length=|v_#length_7|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_17|} OutVars{~#Id_MCDC_113~0.offset=|v_~#Id_MCDC_113~0.offset_4|, Id_MCDC_99_~#Id_MCDC_139~0.base=|v_Id_MCDC_99_~#Id_MCDC_139~0.base_6|, #memory_$Pointer$.base=|v_#memory_$Pointer$.base_16|, ~#Id_MCDC_113~0.base=|v_~#Id_MCDC_113~0.base_4|, Id_MCDC_99_#t~malloc53.base=|v_Id_MCDC_99_#t~malloc53.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, Id_MCDC_99_~#Id_MCDC_139~0.offset=|v_Id_MCDC_99_~#Id_MCDC_139~0.offset_6|, Id_MCDC_99_~Id_MCDC_140~0=v_Id_MCDC_99_~Id_MCDC_140~0_8, #valid=|v_#valid_7|, Id_MCDC_99_#t~malloc53.offset=|v_Id_MCDC_99_#t~malloc53.offset_1|, #memory_int=|v_#memory_int_13|, #length=|v_#length_5|, #memory_$Pointer$.offset=|v_#memory_$Pointer$.offset_16|} AuxVars[|v_Id_MCDC_99_#t~malloc53.base_4|] AssignedVars[Id_MCDC_99_~#Id_MCDC_139~0.base, Id_MCDC_99_~#Id_MCDC_139~0.offset, #memory_$Pointer$.base, Id_MCDC_99_~Id_MCDC_140~0, #valid, Id_MCDC_99_#t~malloc53.offset, #memory_int, #length, Id_MCDC_99_#t~malloc53.base, #memory_$Pointer$.offset] {650#true} is VALID [2022-04-27 16:30:45,326 INFO L272 TraceCheckUtils]: 11: Hoare triple {650#true} [410] L405-->Id_MCDC_97ENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {674#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-04-27 16:30:45,326 INFO L290 TraceCheckUtils]: 12: Hoare triple {674#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} [412] Id_MCDC_97ENTRY-->L352-3: Formula: (let ((.cse3 (store |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 1))) (let ((.cse2 (store .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 1))) (let ((.cse0 (store .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 1))) (let ((.cse1 (store .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 1))) (and (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18| 0) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|) 0) (= (store (store (store (store (store |v_#length_15| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 4) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 4) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 4) |v_#length_10|) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) (= (select .cse0 |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|) 0) (= |v_#valid_48| (store .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 1)) (= v_Id_MCDC_97_~Id_MCDC_123~0_9 6144) (= 0 |v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|) (= v_Id_MCDC_97_~Id_MCDC_35~0_4 0) (= (select .cse2 |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_135~0.base_18| 0)) (= (select .cse3 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|) 0) (= (select |v_#valid_53| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) 0) (= |v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14| 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) (= |v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18| 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20| 0)) (= v_Id_MCDC_97_~Id_MCDC_36~0_1 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14| 0)) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|) |v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|) 0) (< |v_#StackHeapBarrier_2| |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) (not (= 0 |v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|)) (= v_Id_MCDC_97_~Id_MCDC_134~0_3 0) (= |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20| 0) (= v_Id_MCDC_97_~Id_MCDC_132~0_11 0) (not (= |v_Id_MCDC_97_~#Id_MCDC_131~0.base_18| 0)) (= (select (select |v_#memory_int_23| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|) |v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|) 0) (= (select .cse1 |v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|) 0) (= v_Id_MCDC_97_~Id_MCDC_133~0_1 0)))))) InVars {#memory_int=|v_#memory_int_23|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_15|, #valid=|v_#valid_53|} OutVars{Id_MCDC_97_~Id_MCDC_127~0=v_Id_MCDC_97_~Id_MCDC_127~0_4, Id_MCDC_97_~Id_MCDC_137~0.base=v_Id_MCDC_97_~Id_MCDC_137~0.base_1, Id_MCDC_97_~Id_MCDC_134~0=v_Id_MCDC_97_~Id_MCDC_134~0_3, Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_9, Id_MCDC_97_~Id_MCDC_137~0.offset=v_Id_MCDC_97_~Id_MCDC_137~0.offset_1, Id_MCDC_97_~Id_MCDC_126~0=v_Id_MCDC_97_~Id_MCDC_126~0_2, #length=|v_#length_10|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_14|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_18|, Id_MCDC_97_~Id_MCDC_124~0=v_Id_MCDC_97_~Id_MCDC_124~0_4, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_14|, Id_MCDC_97_~Id_MCDC_35~0=v_Id_MCDC_97_~Id_MCDC_35~0_4, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_18|, Id_MCDC_97_~Id_MCDC_129~0=v_Id_MCDC_97_~Id_MCDC_129~0_3, Id_MCDC_97_~Id_MCDC_138~0=v_Id_MCDC_97_~Id_MCDC_138~0_7, Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_11, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_18|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_20|, Id_MCDC_97_~Id_MCDC_125~0=v_Id_MCDC_97_~Id_MCDC_125~0_2, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_18|, Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_18|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_48|, Id_MCDC_97_~Id_MCDC_36~0=v_Id_MCDC_97_~Id_MCDC_36~0_1, #memory_int=|v_#memory_int_23|, Id_MCDC_97_~Id_MCDC_133~0=v_Id_MCDC_97_~Id_MCDC_133~0_1, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_20|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_18|} AuxVars[] AssignedVars[Id_MCDC_97_~Id_MCDC_127~0, Id_MCDC_97_~Id_MCDC_137~0.base, Id_MCDC_97_~Id_MCDC_134~0, Id_MCDC_97_~Id_MCDC_123~0, Id_MCDC_97_~Id_MCDC_137~0.offset, Id_MCDC_97_~Id_MCDC_126~0, #length, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base, Id_MCDC_97_~Id_MCDC_124~0, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~Id_MCDC_35~0, Id_MCDC_97_~#Id_MCDC_130~0.base, Id_MCDC_97_~Id_MCDC_129~0, Id_MCDC_97_~Id_MCDC_138~0, Id_MCDC_97_~Id_MCDC_132~0, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~Id_MCDC_125~0, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_131~0.base, #valid, Id_MCDC_97_~Id_MCDC_36~0, Id_MCDC_97_~Id_MCDC_133~0, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset] {650#true} is VALID [2022-04-27 16:30:45,326 INFO L290 TraceCheckUtils]: 13: Hoare triple {650#true} [417] L352-3-->L352-4: Formula: (not (< (mod v_Id_MCDC_97_~Id_MCDC_132~0_1 256) 4)) InVars {Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_1} OutVars{Id_MCDC_97_~Id_MCDC_132~0=v_Id_MCDC_97_~Id_MCDC_132~0_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,326 INFO L290 TraceCheckUtils]: 14: Hoare triple {650#true} [423] L352-4-->L356: Formula: (not (<= (mod v_Id_MCDC_97_~Id_MCDC_123~0_1 4294967296) 6147)) InVars {Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} OutVars{Id_MCDC_97_~Id_MCDC_123~0=v_Id_MCDC_97_~Id_MCDC_123~0_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,326 INFO L290 TraceCheckUtils]: 15: Hoare triple {650#true} [432] L356-->Id_MCDC_97FINAL: Formula: (and (= 0 |v_Id_MCDC_97_#res_1|) (= |v_#valid_12| (store (store (store (store (store |v_#valid_17| |v_Id_MCDC_97_~#Id_MCDC_128~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_130~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_131~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_135~0.base_2| 0) |v_Id_MCDC_97_~#Id_MCDC_136~0.base_2| 0))) InVars {Id_MCDC_97_~#Id_MCDC_131~0.base=|v_Id_MCDC_97_~#Id_MCDC_131~0.base_2|, Id_MCDC_97_~#Id_MCDC_136~0.base=|v_Id_MCDC_97_~#Id_MCDC_136~0.base_2|, Id_MCDC_97_~#Id_MCDC_130~0.base=|v_Id_MCDC_97_~#Id_MCDC_130~0.base_2|, #valid=|v_#valid_17|, Id_MCDC_97_~#Id_MCDC_128~0.base=|v_Id_MCDC_97_~#Id_MCDC_128~0.base_2|, Id_MCDC_97_~#Id_MCDC_135~0.base=|v_Id_MCDC_97_~#Id_MCDC_135~0.base_2|} OutVars{Id_MCDC_97_#res=|v_Id_MCDC_97_#res_1|, #valid=|v_#valid_12|, Id_MCDC_97_~#Id_MCDC_131~0.offset=|v_Id_MCDC_97_~#Id_MCDC_131~0.offset_1|, Id_MCDC_97_~#Id_MCDC_128~0.offset=|v_Id_MCDC_97_~#Id_MCDC_128~0.offset_1|, Id_MCDC_97_~#Id_MCDC_130~0.offset=|v_Id_MCDC_97_~#Id_MCDC_130~0.offset_1|, Id_MCDC_97_~#Id_MCDC_135~0.offset=|v_Id_MCDC_97_~#Id_MCDC_135~0.offset_1|, Id_MCDC_97_~#Id_MCDC_136~0.offset=|v_Id_MCDC_97_~#Id_MCDC_136~0.offset_1|} AuxVars[] AssignedVars[Id_MCDC_97_~#Id_MCDC_131~0.base, Id_MCDC_97_#res, Id_MCDC_97_~#Id_MCDC_136~0.base, Id_MCDC_97_~#Id_MCDC_130~0.base, #valid, Id_MCDC_97_~#Id_MCDC_131~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.offset, Id_MCDC_97_~#Id_MCDC_130~0.offset, Id_MCDC_97_~#Id_MCDC_128~0.base, Id_MCDC_97_~#Id_MCDC_135~0.offset, Id_MCDC_97_~#Id_MCDC_136~0.offset, Id_MCDC_97_~#Id_MCDC_135~0.base] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L290 TraceCheckUtils]: 16: Hoare triple {650#true} [438] Id_MCDC_97FINAL-->Id_MCDC_97EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {650#true} {650#true} [570] Id_MCDC_97EXIT-->L405-1: AOR: Formula: (= |v_Id_MCDC_97_#resOutParam_1| |v_Id_MCDC_99_#t~ret54_3|) InVars {Id_MCDC_97_#res=|v_Id_MCDC_97_#resOutParam_1|} OutVars{Id_MCDC_99_#t~ret54=|v_Id_MCDC_99_#t~ret54_3|} AuxVars[] AssignedVars[Id_MCDC_97_#res, Id_MCDC_99_#t~ret54] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L290 TraceCheckUtils]: 18: Hoare triple {650#true} [411] L405-1-->L406-3: Formula: (= v_Id_MCDC_99_~Id_MCDC_140~0_9 0) InVars {} OutVars{Id_MCDC_99_~Id_MCDC_140~0=v_Id_MCDC_99_~Id_MCDC_140~0_9, Id_MCDC_99_#t~ret54=|v_Id_MCDC_99_#t~ret54_2|} AuxVars[] AssignedVars[Id_MCDC_99_~Id_MCDC_140~0, Id_MCDC_99_#t~ret54] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L290 TraceCheckUtils]: 19: Hoare triple {650#true} [414] L406-3-->L406-4: Formula: (not (< (mod v_Id_MCDC_99_~Id_MCDC_140~0_1 4294967296) 4)) InVars {Id_MCDC_99_~Id_MCDC_140~0=v_Id_MCDC_99_~Id_MCDC_140~0_1} OutVars{Id_MCDC_99_~Id_MCDC_140~0=v_Id_MCDC_99_~Id_MCDC_140~0_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L272 TraceCheckUtils]: 20: Hoare triple {650#true} [419] L406-4-->Id_MCDC_95ENTRY: Formula: (and (= |v_Id_MCDC_95_#in~Id_MCDC_94.baseInParam_1| |v_Id_MCDC_99_~#Id_MCDC_139~0.base_7|) (= |v_Id_MCDC_99_~#Id_MCDC_139~0.offset_7| |v_Id_MCDC_95_#in~Id_MCDC_94.offsetInParam_1|) (= |v_Id_MCDC_95_#in~Id_MCDC_93InParam_1| 4)) InVars {Id_MCDC_99_~#Id_MCDC_139~0.base=|v_Id_MCDC_99_~#Id_MCDC_139~0.base_7|, Id_MCDC_99_~#Id_MCDC_139~0.offset=|v_Id_MCDC_99_~#Id_MCDC_139~0.offset_7|} OutVars{Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offsetInParam_1|, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93InParam_1|, Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.baseInParam_1|} AuxVars[] AssignedVars[Id_MCDC_99_~#Id_MCDC_139~0.base, Id_MCDC_99_~#Id_MCDC_139~0.offset, Id_MCDC_95_#in~Id_MCDC_94.base, Id_MCDC_95_#in~Id_MCDC_94.offset, Id_MCDC_95_#in~Id_MCDC_93] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L290 TraceCheckUtils]: 21: Hoare triple {650#true} [426] Id_MCDC_95ENTRY-->L284: Formula: (and (= v_Id_MCDC_95_~Id_MCDC_122~0_2 0) (= v_Id_MCDC_95_~Id_MCDC_121~0_2 0) (= v_Id_MCDC_95_~Id_MCDC_94.base_2 |v_Id_MCDC_95_#in~Id_MCDC_94.base_1|) (= |v_Id_MCDC_95_#in~Id_MCDC_93_1| v_Id_MCDC_95_~Id_MCDC_93_1) (= |v_Id_MCDC_95_#in~Id_MCDC_94.offset_1| v_Id_MCDC_95_~Id_MCDC_94.offset_2)) InVars {Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offset_1|, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93_1|, Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.base_1|} OutVars{Id_MCDC_95_#in~Id_MCDC_94.base=|v_Id_MCDC_95_#in~Id_MCDC_94.base_1|, Id_MCDC_95_#in~Id_MCDC_94.offset=|v_Id_MCDC_95_#in~Id_MCDC_94.offset_1|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_1, Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_2, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_2, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_2, Id_MCDC_95_#in~Id_MCDC_93=|v_Id_MCDC_95_#in~Id_MCDC_93_1|, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_2} AuxVars[] AssignedVars[Id_MCDC_95_~Id_MCDC_93, Id_MCDC_95_~Id_MCDC_121~0, Id_MCDC_95_~Id_MCDC_122~0, Id_MCDC_95_~Id_MCDC_94.base, Id_MCDC_95_~Id_MCDC_94.offset] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L290 TraceCheckUtils]: 22: Hoare triple {650#true} [435] L284-->L288: Formula: (not (< (mod v_Id_MCDC_95_~Id_MCDC_93_3 4294967296) 2)) InVars {Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_3} OutVars{Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_3} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,327 INFO L290 TraceCheckUtils]: 23: Hoare triple {650#true} [441] L288-->L288-2: Formula: (and (= v_Id_MCDC_95_~Id_MCDC_122~0_4 (select (select |v_#memory_int_25| v_Id_MCDC_95_~Id_MCDC_94.base_4) (+ v_Id_MCDC_95_~Id_MCDC_94.offset_4 1))) (= (mod v_Id_MCDC_95_~Id_MCDC_93_6 4294967296) 2)) InVars {#memory_int=|v_#memory_int_25|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_6, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_4, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_4} OutVars{Id_MCDC_95_#t~mem19=|v_Id_MCDC_95_#t~mem19_1|, #memory_int=|v_#memory_int_25|, Id_MCDC_95_~Id_MCDC_93=v_Id_MCDC_95_~Id_MCDC_93_6, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_4, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_4, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_4} AuxVars[] AssignedVars[Id_MCDC_95_#t~mem19, Id_MCDC_95_~Id_MCDC_122~0] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L290 TraceCheckUtils]: 24: Hoare triple {650#true} [446] L288-2-->L296: Formula: (= |v_Id_MCDC_95_#t~mem20_1| (select (select |v_#memory_int_26| v_Id_MCDC_95_~Id_MCDC_94.base_5) v_Id_MCDC_95_~Id_MCDC_94.offset_5)) InVars {#memory_int=|v_#memory_int_26|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_5, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_5} OutVars{#memory_int=|v_#memory_int_26|, Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_1|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_5, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_5} AuxVars[] AssignedVars[Id_MCDC_95_#t~mem20] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L272 TraceCheckUtils]: 25: Hoare triple {650#true} [451] L296-->Id_MCDC_92ENTRY: Formula: (and (= |v_Id_MCDC_95_#t~mem20_4| |v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|) (= v_Id_MCDC_95_~Id_MCDC_122~0_8 |v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|)) InVars {Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_4|, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_8} OutVars{Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|} AuxVars[] AssignedVars[Id_MCDC_92_#in~Id_MCDC_90, Id_MCDC_92_#in~Id_MCDC_91, Id_MCDC_95_#t~mem20, Id_MCDC_95_~Id_MCDC_122~0] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L290 TraceCheckUtils]: 26: Hoare triple {650#true} [458] Id_MCDC_92ENTRY-->L255: Formula: (and (= |v_Id_MCDC_92_#in~Id_MCDC_91_1| v_Id_MCDC_92_~Id_MCDC_91_4) (= v_Id_MCDC_92_~Id_MCDC_119~0_1 1) (= v_Id_MCDC_92_~Id_MCDC_118~0_2 0) (= v_Id_MCDC_92_~Id_MCDC_120~0_1 0) (= v_Id_MCDC_92_~Id_MCDC_117~0_3 0) (= |v_Id_MCDC_92_#in~Id_MCDC_90_1| v_Id_MCDC_92_~Id_MCDC_90_4)) InVars {Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|} OutVars{Id_MCDC_92_~Id_MCDC_120~0=v_Id_MCDC_92_~Id_MCDC_120~0_1, Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91_1|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_4, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_4, Id_MCDC_92_~Id_MCDC_117~0=v_Id_MCDC_92_~Id_MCDC_117~0_3, Id_MCDC_92_~Id_MCDC_119~0=v_Id_MCDC_92_~Id_MCDC_119~0_1, Id_MCDC_92_~Id_MCDC_118~0=v_Id_MCDC_92_~Id_MCDC_118~0_2} AuxVars[] AssignedVars[Id_MCDC_92_~Id_MCDC_120~0, Id_MCDC_92_~Id_MCDC_90, Id_MCDC_92_~Id_MCDC_91, Id_MCDC_92_~Id_MCDC_117~0, Id_MCDC_92_~Id_MCDC_119~0, Id_MCDC_92_~Id_MCDC_118~0] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L290 TraceCheckUtils]: 27: Hoare triple {650#true} [465] L255-->L261: Formula: (not (< (mod v_Id_MCDC_92_~Id_MCDC_91_1 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_90_1 4294967296))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} OutVars{Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_1, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_1} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L290 TraceCheckUtils]: 28: Hoare triple {650#true} [478] L261-->Id_MCDC_92FINAL: Formula: (and (= v_Id_MCDC_92_~Id_MCDC_90_3 |v_Id_MCDC_92_#res_2|) (not (< (mod v_Id_MCDC_92_~Id_MCDC_90_3 4294967296) (mod v_Id_MCDC_92_~Id_MCDC_91_3 4294967296)))) InVars {Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} OutVars{Id_MCDC_92_#res=|v_Id_MCDC_92_#res_2|, Id_MCDC_92_~Id_MCDC_90=v_Id_MCDC_92_~Id_MCDC_90_3, Id_MCDC_92_~Id_MCDC_91=v_Id_MCDC_92_~Id_MCDC_91_3} AuxVars[] AssignedVars[Id_MCDC_92_#res] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L290 TraceCheckUtils]: 29: Hoare triple {650#true} [490] Id_MCDC_92FINAL-->Id_MCDC_92EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {650#true} {650#true} [577] Id_MCDC_92EXIT-->L296-1: AOR: Formula: (= |v_Id_MCDC_92_#resOutParam_1| |v_Id_MCDC_95_#t~ret21_4|) InVars {Id_MCDC_92_#res=|v_Id_MCDC_92_#resOutParam_1|} OutVars{Id_MCDC_95_#t~ret21=|v_Id_MCDC_95_#t~ret21_4|} AuxVars[] AssignedVars[Id_MCDC_95_#t~ret21, Id_MCDC_92_#res] LVA: Formula: (and (= |v_Id_MCDC_95_#t~mem20_4| |v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|) (= v_Id_MCDC_95_~Id_MCDC_122~0_8 |v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|)) InVars {Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_4|, Id_MCDC_95_~Id_MCDC_122~0=v_Id_MCDC_95_~Id_MCDC_122~0_8} OutVars{Id_MCDC_92_#in~Id_MCDC_90=|v_Id_MCDC_92_#in~Id_MCDC_90InParam_1|, Id_MCDC_92_#in~Id_MCDC_91=|v_Id_MCDC_92_#in~Id_MCDC_91InParam_1|} AuxVars[] AssignedVars[Id_MCDC_92_#in~Id_MCDC_90, Id_MCDC_92_#in~Id_MCDC_91, Id_MCDC_95_#t~mem20, Id_MCDC_95_~Id_MCDC_122~0] {650#true} is VALID [2022-04-27 16:30:45,328 INFO L290 TraceCheckUtils]: 31: Hoare triple {650#true} [457] L296-1-->L297: Formula: (= v_Id_MCDC_95_~Id_MCDC_121~0_3 |v_Id_MCDC_95_#t~ret21_3|) InVars {Id_MCDC_95_#t~ret21=|v_Id_MCDC_95_#t~ret21_3|} OutVars{Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_3, Id_MCDC_95_#t~mem20=|v_Id_MCDC_95_#t~mem20_3|} AuxVars[] AssignedVars[Id_MCDC_95_#t~ret21, Id_MCDC_95_~Id_MCDC_121~0, Id_MCDC_95_#t~mem20] {650#true} is VALID [2022-04-27 16:30:45,329 INFO L272 TraceCheckUtils]: 32: Hoare triple {650#true} [463] L297-->avoid_zeroENTRY: Formula: (= |v_avoid_zero_#in~yInParam_2| (ite (not (= (mod v_Id_MCDC_95_~Id_MCDC_121~0_5 4294967296) 0)) 1 0)) InVars {Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_5} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~yInParam_2|} AuxVars[] AssignedVars[avoid_zero_#in~y, Id_MCDC_95_~Id_MCDC_121~0] {650#true} is VALID [2022-04-27 16:30:45,329 INFO L290 TraceCheckUtils]: 33: Hoare triple {650#true} [473] avoid_zeroENTRY-->L11: Formula: (= |v_avoid_zero_#in~y_1| v_avoid_zero_~y_1) InVars {avoid_zero_#in~y=|v_avoid_zero_#in~y_1|} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~y_1|, avoid_zero_~y=v_avoid_zero_~y_1} AuxVars[] AssignedVars[avoid_zero_~y] {650#true} is VALID [2022-04-27 16:30:45,329 INFO L290 TraceCheckUtils]: 34: Hoare triple {650#true} [487] L11-->L11-2: Formula: (not (= v_avoid_zero_~y_3 0)) InVars {avoid_zero_~y=v_avoid_zero_~y_3} OutVars{avoid_zero_~y=v_avoid_zero_~y_3} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,329 INFO L290 TraceCheckUtils]: 35: Hoare triple {650#true} [498] L11-2-->avoid_zeroEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#true} is VALID [2022-04-27 16:30:45,329 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {650#true} {650#true} [579] avoid_zeroEXIT-->L297-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v_avoid_zero_#in~yInParam_2| (ite (not (= (mod v_Id_MCDC_95_~Id_MCDC_121~0_5 4294967296) 0)) 1 0)) InVars {Id_MCDC_95_~Id_MCDC_121~0=v_Id_MCDC_95_~Id_MCDC_121~0_5} OutVars{avoid_zero_#in~y=|v_avoid_zero_#in~yInParam_2|} AuxVars[] AssignedVars[avoid_zero_#in~y, Id_MCDC_95_~Id_MCDC_121~0] {650#true} is VALID [2022-04-27 16:30:45,329 INFO L290 TraceCheckUtils]: 37: Hoare triple {650#true} [472] L297-1-->L298: Formula: (and |v_Id_MCDC_95_#t~short24_3| (= |v_Id_MCDC_95_#t~mem22_2| (select (select |v_#memory_int_27| v_Id_MCDC_95_~Id_MCDC_94.base_6) v_Id_MCDC_95_~Id_MCDC_94.offset_6))) InVars {#memory_int=|v_#memory_int_27|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_6, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_6} OutVars{#memory_int=|v_#memory_int_27|, Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_3|, Id_MCDC_95_#t~mem22=|v_Id_MCDC_95_#t~mem22_2|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_6, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_6} AuxVars[] AssignedVars[Id_MCDC_95_#t~short24, Id_MCDC_95_#t~mem22] {650#true} is VALID [2022-04-27 16:30:45,330 INFO L290 TraceCheckUtils]: 38: Hoare triple {650#true} [484] L298-->L298-2: Formula: (and (= (select (select |v_#memory_int_28| v_Id_MCDC_95_~Id_MCDC_94.base_7) v_Id_MCDC_95_~Id_MCDC_94.offset_7) |v_Id_MCDC_95_#t~mem23_2|) |v_Id_MCDC_95_#t~short24_4| |v_Id_MCDC_95_#t~short24_5|) InVars {#memory_int=|v_#memory_int_28|, Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_5|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_7, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_7} OutVars{#memory_int=|v_#memory_int_28|, Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_4|, Id_MCDC_95_~Id_MCDC_94.base=v_Id_MCDC_95_~Id_MCDC_94.base_7, Id_MCDC_95_#t~mem23=|v_Id_MCDC_95_#t~mem23_2|, Id_MCDC_95_~Id_MCDC_94.offset=v_Id_MCDC_95_~Id_MCDC_94.offset_7} AuxVars[] AssignedVars[Id_MCDC_95_#t~short24, Id_MCDC_95_#t~mem23] {670#|Id_MCDC_95_#t~short24|} is VALID [2022-04-27 16:30:45,330 INFO L272 TraceCheckUtils]: 39: Hoare triple {670#|Id_MCDC_95_#t~short24|} [497] L298-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~Id_MCDC_103InParam_1| (ite |v_Id_MCDC_95_#t~short24_7| 1 0)) InVars {Id_MCDC_95_#t~short24=|v_Id_MCDC_95_#t~short24_7|} OutVars{__VERIFIER_assert_#in~Id_MCDC_103=|v___VERIFIER_assert_#in~Id_MCDC_103InParam_1|} AuxVars[] AssignedVars[Id_MCDC_95_#t~short24, __VERIFIER_assert_#in~Id_MCDC_103] {671#(not (= |__VERIFIER_assert_#in~Id_MCDC_103| 0))} is VALID [2022-04-27 16:30:45,330 INFO L290 TraceCheckUtils]: 40: Hoare triple {671#(not (= |__VERIFIER_assert_#in~Id_MCDC_103| 0))} [509] __VERIFIER_assertENTRY-->L461: Formula: (= v___VERIFIER_assert_~Id_MCDC_103_1 |v___VERIFIER_assert_#in~Id_MCDC_103_1|) InVars {__VERIFIER_assert_#in~Id_MCDC_103=|v___VERIFIER_assert_#in~Id_MCDC_103_1|} OutVars{__VERIFIER_assert_~Id_MCDC_103=v___VERIFIER_assert_~Id_MCDC_103_1, __VERIFIER_assert_#in~Id_MCDC_103=|v___VERIFIER_assert_#in~Id_MCDC_103_1|} AuxVars[] AssignedVars[__VERIFIER_assert_~Id_MCDC_103] {672#(not (= __VERIFIER_assert_~Id_MCDC_103 0))} is VALID [2022-04-27 16:30:45,331 INFO L290 TraceCheckUtils]: 41: Hoare triple {672#(not (= __VERIFIER_assert_~Id_MCDC_103 0))} [517] L461-->L463: Formula: (= v___VERIFIER_assert_~Id_MCDC_103_2 0) InVars {__VERIFIER_assert_~Id_MCDC_103=v___VERIFIER_assert_~Id_MCDC_103_2} OutVars{__VERIFIER_assert_~Id_MCDC_103=v___VERIFIER_assert_~Id_MCDC_103_2} AuxVars[] AssignedVars[] {651#false} is VALID [2022-04-27 16:30:45,331 INFO L290 TraceCheckUtils]: 42: Hoare triple {651#false} [527] L463-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {651#false} is VALID [2022-04-27 16:30:45,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:30:45,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:30:45,332 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488316002] [2022-04-27 16:30:45,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [488316002] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:30:45,332 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:30:45,332 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-27 16:30:45,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799954938] [2022-04-27 16:30:45,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:30:45,333 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 43 [2022-04-27 16:30:45,333 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:30:45,333 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-27 16:30:45,365 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:30:45,365 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 16:30:45,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:30:45,365 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 16:30:45,366 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-27 16:30:45,366 INFO L87 Difference]: Start difference. First operand 120 states and 167 transitions. Second operand has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-27 16:30:47,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:30:47,425 INFO L93 Difference]: Finished difference Result 118 states and 164 transitions. [2022-04-27 16:30:47,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 16:30:47,425 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 43 [2022-04-27 16:30:47,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:30:47,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-27 16:30:47,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 166 transitions. [2022-04-27 16:30:47,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-27 16:30:47,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 166 transitions. [2022-04-27 16:30:47,431 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 166 transitions. [2022-04-27 16:30:47,690 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:30:47,691 INFO L225 Difference]: With dead ends: 118 [2022-04-27 16:30:47,691 INFO L226 Difference]: Without dead ends: 0 [2022-04-27 16:30:47,691 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-27 16:30:47,692 INFO L413 NwaCegarLoop]: 119 mSDtfsCounter, 233 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 566 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 239 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 616 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 566 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 16:30:47,692 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [239 Valid, 125 Invalid, 616 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 566 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-27 16:30:47,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-04-27 16:30:47,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-04-27 16:30:47,693 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:30:47,693 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:30:47,693 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:30:47,693 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:30:47,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:30:47,693 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:30:47,693 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:30:47,693 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:30:47,693 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:30:47,693 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:30:47,694 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:30:47,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:30:47,694 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:30:47,694 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:30:47,694 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:30:47,694 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:30:47,694 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:30:47,694 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:30:47,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:30:47,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-04-27 16:30:47,694 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 43 [2022-04-27 16:30:47,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:30:47,694 INFO L495 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-04-27 16:30:47,695 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 5.0) internal successors, (30), 4 states have internal predecessors, (30), 2 states have call successors, (9), 4 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-27 16:30:47,695 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:30:47,695 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:30:47,697 INFO L805 garLoopResultBuilder]: Registering result SAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 16:30:47,697 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:30:47,699 INFO L356 BasicCegarLoop]: Path program histogram: [1, 1] [2022-04-27 16:30:47,700 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 16:30:47,702 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:30:47 BasicIcfg [2022-04-27 16:30:47,703 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 16:30:47,704 INFO L158 Benchmark]: Toolchain (without parser) took 5634.72ms. Allocated memory was 185.6MB in the beginning and 292.6MB in the end (delta: 107.0MB). Free memory was 130.9MB in the beginning and 211.7MB in the end (delta: -80.8MB). Peak memory consumption was 27.7MB. Max. memory is 8.0GB. [2022-04-27 16:30:47,704 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 185.6MB. Free memory is still 148.2MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:30:47,704 INFO L158 Benchmark]: CACSL2BoogieTranslator took 403.18ms. Allocated memory was 185.6MB in the beginning and 240.1MB in the end (delta: 54.5MB). Free memory was 130.7MB in the beginning and 204.1MB in the end (delta: -73.4MB). Peak memory consumption was 8.5MB. Max. memory is 8.0GB. [2022-04-27 16:30:47,704 INFO L158 Benchmark]: Boogie Preprocessor took 54.13ms. Allocated memory is still 240.1MB. Free memory was 204.1MB in the beginning and 199.4MB in the end (delta: 4.7MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. [2022-04-27 16:30:47,705 INFO L158 Benchmark]: RCFGBuilder took 660.94ms. Allocated memory is still 240.1MB. Free memory was 199.4MB in the beginning and 160.5MB in the end (delta: 38.8MB). Peak memory consumption was 38.8MB. Max. memory is 8.0GB. [2022-04-27 16:30:47,705 INFO L158 Benchmark]: IcfgTransformer took 43.21ms. Allocated memory is still 240.1MB. Free memory was 160.5MB in the beginning and 155.3MB in the end (delta: 5.2MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. [2022-04-27 16:30:47,705 INFO L158 Benchmark]: TraceAbstraction took 4463.30ms. Allocated memory was 240.1MB in the beginning and 292.6MB in the end (delta: 52.4MB). Free memory was 154.8MB in the beginning and 211.7MB in the end (delta: -56.9MB). There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:30:47,706 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 185.6MB. Free memory is still 148.2MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 403.18ms. Allocated memory was 185.6MB in the beginning and 240.1MB in the end (delta: 54.5MB). Free memory was 130.7MB in the beginning and 204.1MB in the end (delta: -73.4MB). Peak memory consumption was 8.5MB. Max. memory is 8.0GB. * Boogie Preprocessor took 54.13ms. Allocated memory is still 240.1MB. Free memory was 204.1MB in the beginning and 199.4MB in the end (delta: 4.7MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. * RCFGBuilder took 660.94ms. Allocated memory is still 240.1MB. Free memory was 199.4MB in the beginning and 160.5MB in the end (delta: 38.8MB). Peak memory consumption was 38.8MB. Max. memory is 8.0GB. * IcfgTransformer took 43.21ms. Allocated memory is still 240.1MB. Free memory was 160.5MB in the beginning and 155.3MB in the end (delta: 5.2MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. * TraceAbstraction took 4463.30ms. Allocated memory was 240.1MB in the beginning and 292.6MB in the end (delta: 52.4MB). Free memory was 154.8MB in the beginning and 211.7MB in the end (delta: -56.9MB). There was no memory consumed. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 463]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 12 procedures, 129 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 4.4s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 488 SdHoareTripleChecker+Valid, 1.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 475 mSDsluCounter, 263 SdHoareTripleChecker+Invalid, 1.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 11 mSDsCounter, 93 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 667 IncrementalHoareTripleChecker+Invalid, 760 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 93 mSolverCounterUnsat, 252 mSDtfsCounter, 667 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 33 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=129occurred in iteration=0, InterpolantAutomatonStates: 13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 2 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.4s InterpolantComputationTime, 90 NumberOfCodeBlocks, 90 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 88 ConstructedInterpolants, 0 QuantifiedInterpolants, 244 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 2 InterpolantComputations, 2 PerfectInterpolantSequences, 3/3 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2022-04-27 16:30:47,743 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...