/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-acceleration/phases_1-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 16:11:03,629 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 16:11:03,631 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 16:11:03,654 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 16:11:03,654 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 16:11:03,656 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 16:11:03,660 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 16:11:03,664 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 16:11:03,665 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 16:11:03,668 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 16:11:03,669 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 16:11:03,670 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 16:11:03,670 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 16:11:03,672 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 16:11:03,673 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 16:11:03,673 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 16:11:03,674 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 16:11:03,674 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 16:11:03,677 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 16:11:03,681 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 16:11:03,682 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 16:11:03,683 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 16:11:03,683 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 16:11:03,684 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 16:11:03,685 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 16:11:03,690 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 16:11:03,696 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 16:11:03,696 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 16:11:03,697 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 16:11:03,698 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 16:11:03,707 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 16:11:03,707 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 16:11:03,708 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 16:11:03,708 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 16:11:03,708 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 16:11:03,708 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 16:11:03,708 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 16:11:03,708 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 16:11:03,708 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 16:11:03,709 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 16:11:03,709 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 16:11:03,709 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 16:11:03,709 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 16:11:03,710 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 16:11:03,710 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 16:11:03,710 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 16:11:03,710 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 16:11:03,710 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 16:11:03,710 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:11:03,710 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 16:11:03,710 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 16:11:03,711 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 16:11:03,711 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 16:11:03,889 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 16:11:03,917 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 16:11:03,919 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 16:11:03,919 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 16:11:03,920 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 16:11:03,921 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/phases_1-1.c [2022-04-27 16:11:03,964 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a05f4b417/f8381fda811d460fa53231733f4953e8/FLAG1a512f013 [2022-04-27 16:11:04,309 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 16:11:04,309 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_1-1.c [2022-04-27 16:11:04,313 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a05f4b417/f8381fda811d460fa53231733f4953e8/FLAG1a512f013 [2022-04-27 16:11:04,757 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a05f4b417/f8381fda811d460fa53231733f4953e8 [2022-04-27 16:11:04,758 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 16:11:04,759 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 16:11:04,781 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 16:11:04,782 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 16:11:04,785 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 16:11:04,786 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,787 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@49aef06f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04, skipping insertion in model container [2022-04-27 16:11:04,787 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,792 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 16:11:04,803 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 16:11:04,919 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_1-1.c[322,335] [2022-04-27 16:11:04,927 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:11:04,932 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 16:11:04,939 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_1-1.c[322,335] [2022-04-27 16:11:04,941 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 16:11:04,957 INFO L208 MainTranslator]: Completed translation [2022-04-27 16:11:04,957 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04 WrapperNode [2022-04-27 16:11:04,957 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 16:11:04,958 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 16:11:04,958 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 16:11:04,958 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 16:11:04,964 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,965 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,968 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,968 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,971 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,973 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,974 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,975 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 16:11:04,975 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 16:11:04,975 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 16:11:04,975 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 16:11:04,976 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (1/1) ... [2022-04-27 16:11:04,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 16:11:04,998 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:05,008 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 16:11:05,010 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 16:11:05,034 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 16:11:05,034 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 16:11:05,034 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 16:11:05,034 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 16:11:05,034 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 16:11:05,034 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 16:11:05,034 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 16:11:05,035 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 16:11:05,073 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 16:11:05,074 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 16:11:05,157 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 16:11:05,162 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 16:11:05,162 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 16:11:05,163 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:11:05 BoogieIcfgContainer [2022-04-27 16:11:05,163 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 16:11:05,164 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 16:11:05,164 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 16:11:05,165 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 16:11:05,166 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:11:05" (1/1) ... [2022-04-27 16:11:05,168 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 16:11:05,179 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:11:05 BasicIcfg [2022-04-27 16:11:05,180 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 16:11:05,181 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 16:11:05,181 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 16:11:05,183 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 16:11:05,183 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 04:11:04" (1/4) ... [2022-04-27 16:11:05,183 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28f6d311 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:11:05, skipping insertion in model container [2022-04-27 16:11:05,183 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 04:11:04" (2/4) ... [2022-04-27 16:11:05,184 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28f6d311 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 04:11:05, skipping insertion in model container [2022-04-27 16:11:05,184 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 04:11:05" (3/4) ... [2022-04-27 16:11:05,184 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28f6d311 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:11:05, skipping insertion in model container [2022-04-27 16:11:05,184 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 04:11:05" (4/4) ... [2022-04-27 16:11:05,185 INFO L111 eAbstractionObserver]: Analyzing ICFG phases_1-1.cJordan [2022-04-27 16:11:05,193 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 16:11:05,193 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 16:11:05,218 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 16:11:05,223 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5266da2c, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@6810b540 [2022-04-27 16:11:05,223 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 16:11:05,228 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 16:11:05,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 16:11:05,232 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:05,233 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:05,233 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:05,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:05,237 INFO L85 PathProgramCache]: Analyzing trace with hash -756157467, now seen corresponding path program 1 times [2022-04-27 16:11:05,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:05,257 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910488873] [2022-04-27 16:11:05,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:05,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:05,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,357 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:05,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,400 INFO L290 TraceCheckUtils]: 0: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-27 16:11:05,401 INFO L290 TraceCheckUtils]: 1: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:11:05,401 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:11:05,403 INFO L272 TraceCheckUtils]: 0: Hoare triple {22#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:05,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-27 16:11:05,403 INFO L290 TraceCheckUtils]: 2: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:11:05,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:11:05,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {22#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-27 16:11:05,404 INFO L290 TraceCheckUtils]: 5: Hoare triple {22#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {22#true} is VALID [2022-04-27 16:11:05,404 INFO L290 TraceCheckUtils]: 6: Hoare triple {22#true} [51] L16-2-->L15-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-27 16:11:05,404 INFO L272 TraceCheckUtils]: 7: Hoare triple {23#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {23#false} is VALID [2022-04-27 16:11:05,405 INFO L290 TraceCheckUtils]: 8: Hoare triple {23#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23#false} is VALID [2022-04-27 16:11:05,405 INFO L290 TraceCheckUtils]: 9: Hoare triple {23#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-27 16:11:05,405 INFO L290 TraceCheckUtils]: 10: Hoare triple {23#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-27 16:11:05,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:05,410 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:05,410 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910488873] [2022-04-27 16:11:05,411 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910488873] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:11:05,411 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:11:05,411 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 16:11:05,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698306381] [2022-04-27 16:11:05,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:11:05,416 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:11:05,417 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:05,421 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,448 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:05,448 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 16:11:05,449 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:05,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 16:11:05,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:11:05,470 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:05,538 INFO L93 Difference]: Finished difference Result 19 states and 20 transitions. [2022-04-27 16:11:05,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 16:11:05,539 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:11:05,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:05,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 22 transitions. [2022-04-27 16:11:05,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 22 transitions. [2022-04-27 16:11:05,558 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 22 transitions. [2022-04-27 16:11:05,594 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:05,599 INFO L225 Difference]: With dead ends: 19 [2022-04-27 16:11:05,600 INFO L226 Difference]: Without dead ends: 13 [2022-04-27 16:11:05,601 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 16:11:05,604 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 11 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:05,605 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 22 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:11:05,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-27 16:11:05,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-27 16:11:05,623 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:05,623 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,624 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,624 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:05,626 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-27 16:11:05,626 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-27 16:11:05,626 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:05,626 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:05,626 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 16:11:05,627 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 16:11:05,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:05,628 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-27 16:11:05,628 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-27 16:11:05,629 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:05,629 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:05,629 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:05,629 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:05,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2022-04-27 16:11:05,631 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 11 [2022-04-27 16:11:05,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:05,631 INFO L495 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-04-27 16:11:05,632 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,632 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-27 16:11:05,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 16:11:05,632 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:05,632 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:05,632 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 16:11:05,633 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:05,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:05,633 INFO L85 PathProgramCache]: Analyzing trace with hash -755233946, now seen corresponding path program 1 times [2022-04-27 16:11:05,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:05,634 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269960263] [2022-04-27 16:11:05,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:05,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:05,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:05,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88#true} is VALID [2022-04-27 16:11:05,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {88#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:11:05,704 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {88#true} {88#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:11:05,705 INFO L272 TraceCheckUtils]: 0: Hoare triple {88#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:05,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88#true} is VALID [2022-04-27 16:11:05,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {88#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:11:05,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {88#true} {88#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:11:05,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {88#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-27 16:11:05,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {88#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {93#(= main_~x~0 0)} is VALID [2022-04-27 16:11:05,707 INFO L290 TraceCheckUtils]: 6: Hoare triple {93#(= main_~x~0 0)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-27 16:11:05,707 INFO L272 TraceCheckUtils]: 7: Hoare triple {89#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {89#false} is VALID [2022-04-27 16:11:05,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {89#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {89#false} is VALID [2022-04-27 16:11:05,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {89#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-27 16:11:05,708 INFO L290 TraceCheckUtils]: 10: Hoare triple {89#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-27 16:11:05,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:05,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:05,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269960263] [2022-04-27 16:11:05,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1269960263] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 16:11:05,708 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 16:11:05,708 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 16:11:05,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [22311717] [2022-04-27 16:11:05,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 16:11:05,710 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:11:05,710 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:05,710 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,719 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:05,720 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 16:11:05,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:05,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 16:11:05,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 16:11:05,721 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:05,765 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-27 16:11:05,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 16:11:05,765 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 16:11:05,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:05,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-27 16:11:05,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-27 16:11:05,768 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 18 transitions. [2022-04-27 16:11:05,784 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:05,785 INFO L225 Difference]: With dead ends: 15 [2022-04-27 16:11:05,785 INFO L226 Difference]: Without dead ends: 15 [2022-04-27 16:11:05,785 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 16:11:05,786 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:05,786 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 19 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 16:11:05,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-27 16:11:05,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-27 16:11:05,788 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:05,788 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,789 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,789 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:05,790 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-27 16:11:05,790 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-27 16:11:05,790 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:05,790 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:05,791 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 16:11:05,791 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 16:11:05,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:05,792 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-27 16:11:05,792 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-27 16:11:05,792 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:05,792 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:05,792 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:05,792 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:05,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-04-27 16:11:05,793 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 11 [2022-04-27 16:11:05,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:05,794 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-04-27 16:11:05,794 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:05,794 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-27 16:11:05,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-27 16:11:05,794 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:05,795 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:05,795 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 16:11:05,795 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:05,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:05,796 INFO L85 PathProgramCache]: Analyzing trace with hash 980092676, now seen corresponding path program 1 times [2022-04-27 16:11:05,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:05,796 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250141394] [2022-04-27 16:11:05,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:05,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:05,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,853 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:05,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,859 INFO L290 TraceCheckUtils]: 0: Hoare triple {166#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159#true} is VALID [2022-04-27 16:11:05,860 INFO L290 TraceCheckUtils]: 1: Hoare triple {159#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,860 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {159#true} {159#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,861 INFO L272 TraceCheckUtils]: 0: Hoare triple {159#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {166#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:05,861 INFO L290 TraceCheckUtils]: 1: Hoare triple {166#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159#true} is VALID [2022-04-27 16:11:05,861 INFO L290 TraceCheckUtils]: 2: Hoare triple {159#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,861 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {159#true} {159#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,861 INFO L272 TraceCheckUtils]: 4: Hoare triple {159#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,862 INFO L290 TraceCheckUtils]: 5: Hoare triple {159#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {164#(= main_~x~0 0)} is VALID [2022-04-27 16:11:05,862 INFO L290 TraceCheckUtils]: 6: Hoare triple {164#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {164#(= main_~x~0 0)} is VALID [2022-04-27 16:11:05,863 INFO L290 TraceCheckUtils]: 7: Hoare triple {164#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {165#(and (<= main_~x~0 1) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:05,863 INFO L290 TraceCheckUtils]: 8: Hoare triple {165#(and (<= main_~x~0 1) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:05,863 INFO L272 TraceCheckUtils]: 9: Hoare triple {160#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {160#false} is VALID [2022-04-27 16:11:05,888 INFO L290 TraceCheckUtils]: 10: Hoare triple {160#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {160#false} is VALID [2022-04-27 16:11:05,888 INFO L290 TraceCheckUtils]: 11: Hoare triple {160#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:05,888 INFO L290 TraceCheckUtils]: 12: Hoare triple {160#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:05,889 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:05,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:05,889 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250141394] [2022-04-27 16:11:05,899 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1250141394] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:05,900 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [568717980] [2022-04-27 16:11:05,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:05,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:05,906 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:05,911 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:05,911 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 16:11:05,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,944 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-27 16:11:05,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:05,951 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:05,998 INFO L272 TraceCheckUtils]: 0: Hoare triple {159#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,999 INFO L290 TraceCheckUtils]: 1: Hoare triple {159#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159#true} is VALID [2022-04-27 16:11:05,999 INFO L290 TraceCheckUtils]: 2: Hoare triple {159#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,999 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {159#true} {159#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:05,999 INFO L272 TraceCheckUtils]: 4: Hoare triple {159#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:06,000 INFO L290 TraceCheckUtils]: 5: Hoare triple {159#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {164#(= main_~x~0 0)} is VALID [2022-04-27 16:11:06,000 INFO L290 TraceCheckUtils]: 6: Hoare triple {164#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {164#(= main_~x~0 0)} is VALID [2022-04-27 16:11:06,001 INFO L290 TraceCheckUtils]: 7: Hoare triple {164#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {191#(= main_~x~0 1)} is VALID [2022-04-27 16:11:06,001 INFO L290 TraceCheckUtils]: 8: Hoare triple {191#(= main_~x~0 1)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:06,002 INFO L272 TraceCheckUtils]: 9: Hoare triple {160#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {160#false} is VALID [2022-04-27 16:11:06,002 INFO L290 TraceCheckUtils]: 10: Hoare triple {160#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {160#false} is VALID [2022-04-27 16:11:06,002 INFO L290 TraceCheckUtils]: 11: Hoare triple {160#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:06,002 INFO L290 TraceCheckUtils]: 12: Hoare triple {160#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:06,002 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:06,002 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:06,077 INFO L290 TraceCheckUtils]: 12: Hoare triple {160#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:06,077 INFO L290 TraceCheckUtils]: 11: Hoare triple {160#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:06,077 INFO L290 TraceCheckUtils]: 10: Hoare triple {160#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {160#false} is VALID [2022-04-27 16:11:06,078 INFO L272 TraceCheckUtils]: 9: Hoare triple {160#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {160#false} is VALID [2022-04-27 16:11:06,078 INFO L290 TraceCheckUtils]: 8: Hoare triple {219#(< (mod main_~x~0 4294967296) 268435455)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {160#false} is VALID [2022-04-27 16:11:06,079 INFO L290 TraceCheckUtils]: 7: Hoare triple {223#(< (mod (+ main_~x~0 1) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {219#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 16:11:06,080 INFO L290 TraceCheckUtils]: 6: Hoare triple {223#(< (mod (+ main_~x~0 1) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {223#(< (mod (+ main_~x~0 1) 4294967296) 268435455)} is VALID [2022-04-27 16:11:06,080 INFO L290 TraceCheckUtils]: 5: Hoare triple {159#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {223#(< (mod (+ main_~x~0 1) 4294967296) 268435455)} is VALID [2022-04-27 16:11:06,080 INFO L272 TraceCheckUtils]: 4: Hoare triple {159#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:06,081 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {159#true} {159#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:06,081 INFO L290 TraceCheckUtils]: 2: Hoare triple {159#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:06,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {159#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159#true} is VALID [2022-04-27 16:11:06,081 INFO L272 TraceCheckUtils]: 0: Hoare triple {159#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#true} is VALID [2022-04-27 16:11:06,082 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:06,084 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [568717980] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:06,085 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:06,085 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-27 16:11:06,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [155453665] [2022-04-27 16:11:06,085 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:06,086 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 16:11:06,087 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:06,087 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,105 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:06,105 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 16:11:06,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:06,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 16:11:06,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-04-27 16:11:06,107 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:06,271 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-27 16:11:06,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 16:11:06,271 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 16:11:06,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:06,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 24 transitions. [2022-04-27 16:11:06,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 24 transitions. [2022-04-27 16:11:06,274 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 24 transitions. [2022-04-27 16:11:06,304 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:06,305 INFO L225 Difference]: With dead ends: 19 [2022-04-27 16:11:06,305 INFO L226 Difference]: Without dead ends: 19 [2022-04-27 16:11:06,305 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2022-04-27 16:11:06,308 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 13 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:06,309 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 33 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:11:06,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-04-27 16:11:06,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2022-04-27 16:11:06,313 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:06,313 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19 states. Second operand has 18 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 13 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,315 INFO L74 IsIncluded]: Start isIncluded. First operand 19 states. Second operand has 18 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 13 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,316 INFO L87 Difference]: Start difference. First operand 19 states. Second operand has 18 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 13 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:06,317 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-27 16:11:06,317 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-27 16:11:06,319 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:06,319 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:06,320 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 13 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-27 16:11:06,320 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 13 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-27 16:11:06,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:06,322 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-27 16:11:06,322 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-27 16:11:06,323 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:06,323 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:06,323 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:06,323 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:06,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 13 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2022-04-27 16:11:06,327 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 13 [2022-04-27 16:11:06,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:06,327 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2022-04-27 16:11:06,327 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.0) internal successors, (16), 7 states have internal predecessors, (16), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:06,327 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2022-04-27 16:11:06,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 16:11:06,328 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:06,328 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:06,377 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 16:11:06,529 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:06,529 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:06,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:06,530 INFO L85 PathProgramCache]: Analyzing trace with hash 1575643231, now seen corresponding path program 1 times [2022-04-27 16:11:06,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:06,530 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581203377] [2022-04-27 16:11:06,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:06,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:06,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:06,624 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:06,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:06,631 INFO L290 TraceCheckUtils]: 0: Hoare triple {338#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {330#true} is VALID [2022-04-27 16:11:06,631 INFO L290 TraceCheckUtils]: 1: Hoare triple {330#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,631 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {330#true} {330#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {330#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {338#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:06,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {338#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {330#true} is VALID [2022-04-27 16:11:06,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {330#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,632 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {330#true} {330#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,632 INFO L272 TraceCheckUtils]: 4: Hoare triple {330#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,633 INFO L290 TraceCheckUtils]: 5: Hoare triple {330#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {335#(= main_~x~0 0)} is VALID [2022-04-27 16:11:06,633 INFO L290 TraceCheckUtils]: 6: Hoare triple {335#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {335#(= main_~x~0 0)} is VALID [2022-04-27 16:11:06,634 INFO L290 TraceCheckUtils]: 7: Hoare triple {335#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:06,634 INFO L290 TraceCheckUtils]: 8: Hoare triple {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:06,635 INFO L290 TraceCheckUtils]: 9: Hoare triple {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {337#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:06,635 INFO L290 TraceCheckUtils]: 10: Hoare triple {337#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {337#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:06,636 INFO L290 TraceCheckUtils]: 11: Hoare triple {337#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {331#false} is VALID [2022-04-27 16:11:06,636 INFO L290 TraceCheckUtils]: 12: Hoare triple {331#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:06,636 INFO L272 TraceCheckUtils]: 13: Hoare triple {331#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {331#false} is VALID [2022-04-27 16:11:06,637 INFO L290 TraceCheckUtils]: 14: Hoare triple {331#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {331#false} is VALID [2022-04-27 16:11:06,637 INFO L290 TraceCheckUtils]: 15: Hoare triple {331#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:06,637 INFO L290 TraceCheckUtils]: 16: Hoare triple {331#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:06,637 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:06,637 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:06,637 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581203377] [2022-04-27 16:11:06,638 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1581203377] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:06,638 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [808017193] [2022-04-27 16:11:06,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:06,638 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:06,638 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:06,639 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:06,642 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 16:11:06,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:06,691 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 16:11:06,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:06,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:06,913 INFO L272 TraceCheckUtils]: 0: Hoare triple {330#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,913 INFO L290 TraceCheckUtils]: 1: Hoare triple {330#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {330#true} is VALID [2022-04-27 16:11:06,913 INFO L290 TraceCheckUtils]: 2: Hoare triple {330#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,913 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {330#true} {330#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,913 INFO L272 TraceCheckUtils]: 4: Hoare triple {330#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:06,914 INFO L290 TraceCheckUtils]: 5: Hoare triple {330#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {335#(= main_~x~0 0)} is VALID [2022-04-27 16:11:06,914 INFO L290 TraceCheckUtils]: 6: Hoare triple {335#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {335#(= main_~x~0 0)} is VALID [2022-04-27 16:11:06,915 INFO L290 TraceCheckUtils]: 7: Hoare triple {335#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:06,915 INFO L290 TraceCheckUtils]: 8: Hoare triple {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:06,916 INFO L290 TraceCheckUtils]: 9: Hoare triple {336#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {369#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:06,916 INFO L290 TraceCheckUtils]: 10: Hoare triple {369#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {369#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:06,917 INFO L290 TraceCheckUtils]: 11: Hoare triple {369#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {376#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:06,918 INFO L290 TraceCheckUtils]: 12: Hoare triple {376#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {376#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:06,918 INFO L272 TraceCheckUtils]: 13: Hoare triple {376#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {383#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:11:06,919 INFO L290 TraceCheckUtils]: 14: Hoare triple {383#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {387#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:11:06,919 INFO L290 TraceCheckUtils]: 15: Hoare triple {387#(<= 1 __VERIFIER_assert_~cond)} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:06,919 INFO L290 TraceCheckUtils]: 16: Hoare triple {331#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:06,920 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:06,920 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:07,012 INFO L290 TraceCheckUtils]: 16: Hoare triple {331#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:07,013 INFO L290 TraceCheckUtils]: 15: Hoare triple {387#(<= 1 __VERIFIER_assert_~cond)} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {331#false} is VALID [2022-04-27 16:11:07,013 INFO L290 TraceCheckUtils]: 14: Hoare triple {383#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {387#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 16:11:07,014 INFO L272 TraceCheckUtils]: 13: Hoare triple {403#(= (mod main_~x~0 2) 0)} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {383#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:11:07,014 INFO L290 TraceCheckUtils]: 12: Hoare triple {403#(= (mod main_~x~0 2) 0)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {403#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:11:07,015 INFO L290 TraceCheckUtils]: 11: Hoare triple {403#(= (mod main_~x~0 2) 0)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {403#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:11:07,015 INFO L290 TraceCheckUtils]: 10: Hoare triple {403#(= (mod main_~x~0 2) 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {403#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:11:07,016 INFO L290 TraceCheckUtils]: 9: Hoare triple {416#(= (mod (+ main_~x~0 1) 2) 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {403#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:11:07,016 INFO L290 TraceCheckUtils]: 8: Hoare triple {416#(= (mod (+ main_~x~0 1) 2) 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {416#(= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:11:07,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {403#(= (mod main_~x~0 2) 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {416#(= (mod (+ main_~x~0 1) 2) 0)} is VALID [2022-04-27 16:11:07,017 INFO L290 TraceCheckUtils]: 6: Hoare triple {403#(= (mod main_~x~0 2) 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {403#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:11:07,017 INFO L290 TraceCheckUtils]: 5: Hoare triple {330#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {403#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:11:07,018 INFO L272 TraceCheckUtils]: 4: Hoare triple {330#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:07,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {330#true} {330#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:07,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {330#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:07,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {330#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {330#true} is VALID [2022-04-27 16:11:07,018 INFO L272 TraceCheckUtils]: 0: Hoare triple {330#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {330#true} is VALID [2022-04-27 16:11:07,018 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 16:11:07,019 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [808017193] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:07,019 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:07,019 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8, 6] total 12 [2022-04-27 16:11:07,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1788324818] [2022-04-27 16:11:07,019 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:07,019 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:11:07,020 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:07,020 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,042 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:07,042 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 16:11:07,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:07,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 16:11:07,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2022-04-27 16:11:07,043 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:07,313 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-27 16:11:07,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 16:11:07,313 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 16:11:07,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:07,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 28 transitions. [2022-04-27 16:11:07,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 28 transitions. [2022-04-27 16:11:07,315 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 28 transitions. [2022-04-27 16:11:07,338 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:07,338 INFO L225 Difference]: With dead ends: 26 [2022-04-27 16:11:07,338 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 16:11:07,339 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-27 16:11:07,339 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 13 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 48 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:07,339 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 48 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:11:07,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 16:11:07,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-04-27 16:11:07,341 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:07,341 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,341 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,342 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:07,343 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2022-04-27 16:11:07,343 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-27 16:11:07,343 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:07,343 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:07,343 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 16:11:07,343 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 16:11:07,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:07,344 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2022-04-27 16:11:07,344 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-27 16:11:07,344 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:07,345 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:07,345 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:07,345 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:07,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-04-27 16:11:07,346 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 17 [2022-04-27 16:11:07,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:07,346 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-04-27 16:11:07,346 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.25) internal successors, (27), 10 states have internal predecessors, (27), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:07,346 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-27 16:11:07,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 16:11:07,346 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:07,346 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:07,363 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-27 16:11:07,556 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 16:11:07,556 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:07,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:07,557 INFO L85 PathProgramCache]: Analyzing trace with hash 1560917373, now seen corresponding path program 2 times [2022-04-27 16:11:07,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:07,557 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195488500] [2022-04-27 16:11:07,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:07,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:07,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:07,722 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:07,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:07,740 INFO L290 TraceCheckUtils]: 0: Hoare triple {563#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {554#true} is VALID [2022-04-27 16:11:07,740 INFO L290 TraceCheckUtils]: 1: Hoare triple {554#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:07,741 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {554#true} {554#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:07,744 INFO L272 TraceCheckUtils]: 0: Hoare triple {554#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {563#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:07,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {563#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {554#true} is VALID [2022-04-27 16:11:07,744 INFO L290 TraceCheckUtils]: 2: Hoare triple {554#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:07,744 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {554#true} {554#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:07,745 INFO L272 TraceCheckUtils]: 4: Hoare triple {554#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:07,745 INFO L290 TraceCheckUtils]: 5: Hoare triple {554#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {559#(= main_~x~0 0)} is VALID [2022-04-27 16:11:07,745 INFO L290 TraceCheckUtils]: 6: Hoare triple {559#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {559#(= main_~x~0 0)} is VALID [2022-04-27 16:11:07,746 INFO L290 TraceCheckUtils]: 7: Hoare triple {559#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:07,746 INFO L290 TraceCheckUtils]: 8: Hoare triple {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:07,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:07,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:07,748 INFO L290 TraceCheckUtils]: 11: Hoare triple {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {562#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 3))} is VALID [2022-04-27 16:11:07,748 INFO L290 TraceCheckUtils]: 12: Hoare triple {562#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 3))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {562#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 3))} is VALID [2022-04-27 16:11:07,749 INFO L290 TraceCheckUtils]: 13: Hoare triple {562#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 3))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {555#false} is VALID [2022-04-27 16:11:07,749 INFO L290 TraceCheckUtils]: 14: Hoare triple {555#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:07,749 INFO L272 TraceCheckUtils]: 15: Hoare triple {555#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {555#false} is VALID [2022-04-27 16:11:07,749 INFO L290 TraceCheckUtils]: 16: Hoare triple {555#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {555#false} is VALID [2022-04-27 16:11:07,749 INFO L290 TraceCheckUtils]: 17: Hoare triple {555#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:07,750 INFO L290 TraceCheckUtils]: 18: Hoare triple {555#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:07,750 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:07,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:07,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195488500] [2022-04-27 16:11:07,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1195488500] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:07,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [758261153] [2022-04-27 16:11:07,750 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 16:11:07,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:07,751 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:07,764 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:07,788 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 16:11:07,819 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 16:11:07,819 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:11:07,820 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 16:11:07,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:07,833 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:08,041 INFO L272 TraceCheckUtils]: 0: Hoare triple {554#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {554#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {554#true} is VALID [2022-04-27 16:11:08,041 INFO L290 TraceCheckUtils]: 2: Hoare triple {554#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,041 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {554#true} {554#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,041 INFO L272 TraceCheckUtils]: 4: Hoare triple {554#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,042 INFO L290 TraceCheckUtils]: 5: Hoare triple {554#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {559#(= main_~x~0 0)} is VALID [2022-04-27 16:11:08,042 INFO L290 TraceCheckUtils]: 6: Hoare triple {559#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {559#(= main_~x~0 0)} is VALID [2022-04-27 16:11:08,043 INFO L290 TraceCheckUtils]: 7: Hoare triple {559#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:08,043 INFO L290 TraceCheckUtils]: 8: Hoare triple {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:08,044 INFO L290 TraceCheckUtils]: 9: Hoare triple {560#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:08,044 INFO L290 TraceCheckUtils]: 10: Hoare triple {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:08,044 INFO L290 TraceCheckUtils]: 11: Hoare triple {561#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {600#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:08,045 INFO L290 TraceCheckUtils]: 12: Hoare triple {600#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {600#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:08,045 INFO L290 TraceCheckUtils]: 13: Hoare triple {600#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {555#false} is VALID [2022-04-27 16:11:08,046 INFO L290 TraceCheckUtils]: 14: Hoare triple {555#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:08,046 INFO L272 TraceCheckUtils]: 15: Hoare triple {555#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {555#false} is VALID [2022-04-27 16:11:08,046 INFO L290 TraceCheckUtils]: 16: Hoare triple {555#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {555#false} is VALID [2022-04-27 16:11:08,046 INFO L290 TraceCheckUtils]: 17: Hoare triple {555#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:08,046 INFO L290 TraceCheckUtils]: 18: Hoare triple {555#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:08,046 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:08,046 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:08,204 INFO L290 TraceCheckUtils]: 18: Hoare triple {555#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:08,204 INFO L290 TraceCheckUtils]: 17: Hoare triple {555#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:08,204 INFO L290 TraceCheckUtils]: 16: Hoare triple {555#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {555#false} is VALID [2022-04-27 16:11:08,204 INFO L272 TraceCheckUtils]: 15: Hoare triple {555#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {555#false} is VALID [2022-04-27 16:11:08,204 INFO L290 TraceCheckUtils]: 14: Hoare triple {555#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {555#false} is VALID [2022-04-27 16:11:08,205 INFO L290 TraceCheckUtils]: 13: Hoare triple {637#(< (mod main_~x~0 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {555#false} is VALID [2022-04-27 16:11:08,206 INFO L290 TraceCheckUtils]: 12: Hoare triple {641#(or (< (mod main_~x~0 4294967296) 65520) (not (< (mod main_~x~0 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {637#(< (mod main_~x~0 4294967296) 65520)} is VALID [2022-04-27 16:11:08,207 INFO L290 TraceCheckUtils]: 11: Hoare triple {645#(or (not (< (mod (+ main_~x~0 1) 4294967296) 268435455)) (< (mod (+ main_~x~0 1) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {641#(or (< (mod main_~x~0 4294967296) 65520) (not (< (mod main_~x~0 4294967296) 268435455)))} is VALID [2022-04-27 16:11:08,207 INFO L290 TraceCheckUtils]: 10: Hoare triple {645#(or (not (< (mod (+ main_~x~0 1) 4294967296) 268435455)) (< (mod (+ main_~x~0 1) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {645#(or (not (< (mod (+ main_~x~0 1) 4294967296) 268435455)) (< (mod (+ main_~x~0 1) 4294967296) 65520))} is VALID [2022-04-27 16:11:08,208 INFO L290 TraceCheckUtils]: 9: Hoare triple {652#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {645#(or (not (< (mod (+ main_~x~0 1) 4294967296) 268435455)) (< (mod (+ main_~x~0 1) 4294967296) 65520))} is VALID [2022-04-27 16:11:08,208 INFO L290 TraceCheckUtils]: 8: Hoare triple {652#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {652#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} is VALID [2022-04-27 16:11:08,209 INFO L290 TraceCheckUtils]: 7: Hoare triple {659#(or (not (< (mod (+ main_~x~0 3) 4294967296) 268435455)) (< (mod (+ main_~x~0 3) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {652#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} is VALID [2022-04-27 16:11:08,209 INFO L290 TraceCheckUtils]: 6: Hoare triple {659#(or (not (< (mod (+ main_~x~0 3) 4294967296) 268435455)) (< (mod (+ main_~x~0 3) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {659#(or (not (< (mod (+ main_~x~0 3) 4294967296) 268435455)) (< (mod (+ main_~x~0 3) 4294967296) 65520))} is VALID [2022-04-27 16:11:08,210 INFO L290 TraceCheckUtils]: 5: Hoare triple {554#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {659#(or (not (< (mod (+ main_~x~0 3) 4294967296) 268435455)) (< (mod (+ main_~x~0 3) 4294967296) 65520))} is VALID [2022-04-27 16:11:08,210 INFO L272 TraceCheckUtils]: 4: Hoare triple {554#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,210 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {554#true} {554#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,210 INFO L290 TraceCheckUtils]: 2: Hoare triple {554#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,210 INFO L290 TraceCheckUtils]: 1: Hoare triple {554#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {554#true} is VALID [2022-04-27 16:11:08,210 INFO L272 TraceCheckUtils]: 0: Hoare triple {554#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {554#true} is VALID [2022-04-27 16:11:08,211 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:08,211 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [758261153] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:08,211 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:08,211 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7] total 13 [2022-04-27 16:11:08,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300058957] [2022-04-27 16:11:08,211 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:08,211 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:11:08,212 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:08,212 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,239 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:08,239 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 16:11:08,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:08,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 16:11:08,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2022-04-27 16:11:08,240 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:08,784 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-27 16:11:08,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 16:11:08,784 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 16:11:08,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:08,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 35 transitions. [2022-04-27 16:11:08,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 35 transitions. [2022-04-27 16:11:08,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 35 transitions. [2022-04-27 16:11:08,821 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:08,822 INFO L225 Difference]: With dead ends: 32 [2022-04-27 16:11:08,822 INFO L226 Difference]: Without dead ends: 32 [2022-04-27 16:11:08,823 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=153, Invalid=309, Unknown=0, NotChecked=0, Total=462 [2022-04-27 16:11:08,823 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:08,824 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 44 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 16:11:08,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-27 16:11:08,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2022-04-27 16:11:08,825 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:08,825 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 27 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,825 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 27 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,826 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 27 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:08,827 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-27 16:11:08,827 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-27 16:11:08,827 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:08,827 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:08,827 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 27 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-27 16:11:08,827 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 27 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-27 16:11:08,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:08,828 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-27 16:11:08,828 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-27 16:11:08,829 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:08,829 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:08,829 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:08,829 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:08,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.1111111111111112) internal successors, (30), 27 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 34 transitions. [2022-04-27 16:11:08,830 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 34 transitions. Word has length 19 [2022-04-27 16:11:08,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:08,830 INFO L495 AbstractCegarLoop]: Abstraction has 32 states and 34 transitions. [2022-04-27 16:11:08,830 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:08,831 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-27 16:11:08,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 16:11:08,831 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:08,831 INFO L195 NwaCegarLoop]: trace histogram [10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:08,854 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-27 16:11:09,047 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:09,048 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:09,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:09,048 INFO L85 PathProgramCache]: Analyzing trace with hash 838082225, now seen corresponding path program 3 times [2022-04-27 16:11:09,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:09,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675723092] [2022-04-27 16:11:09,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:09,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:09,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:09,287 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:09,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:09,294 INFO L290 TraceCheckUtils]: 0: Hoare triple {844#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {829#true} is VALID [2022-04-27 16:11:09,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {829#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {829#true} {829#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,296 INFO L272 TraceCheckUtils]: 0: Hoare triple {829#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:09,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {829#true} is VALID [2022-04-27 16:11:09,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {829#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,297 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {829#true} {829#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,297 INFO L272 TraceCheckUtils]: 4: Hoare triple {829#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,297 INFO L290 TraceCheckUtils]: 5: Hoare triple {829#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {834#(= main_~x~0 0)} is VALID [2022-04-27 16:11:09,298 INFO L290 TraceCheckUtils]: 6: Hoare triple {834#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {834#(= main_~x~0 0)} is VALID [2022-04-27 16:11:09,298 INFO L290 TraceCheckUtils]: 7: Hoare triple {834#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {835#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:09,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {835#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {835#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:09,299 INFO L290 TraceCheckUtils]: 9: Hoare triple {835#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {836#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:09,299 INFO L290 TraceCheckUtils]: 10: Hoare triple {836#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {836#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:09,300 INFO L290 TraceCheckUtils]: 11: Hoare triple {836#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {837#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:09,300 INFO L290 TraceCheckUtils]: 12: Hoare triple {837#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {837#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:09,303 INFO L290 TraceCheckUtils]: 13: Hoare triple {837#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {838#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:09,303 INFO L290 TraceCheckUtils]: 14: Hoare triple {838#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {838#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:09,304 INFO L290 TraceCheckUtils]: 15: Hoare triple {838#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {839#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:09,304 INFO L290 TraceCheckUtils]: 16: Hoare triple {839#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {839#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:09,305 INFO L290 TraceCheckUtils]: 17: Hoare triple {839#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {840#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:09,306 INFO L290 TraceCheckUtils]: 18: Hoare triple {840#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {840#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:09,306 INFO L290 TraceCheckUtils]: 19: Hoare triple {840#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {841#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:09,307 INFO L290 TraceCheckUtils]: 20: Hoare triple {841#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {841#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:09,307 INFO L290 TraceCheckUtils]: 21: Hoare triple {841#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {842#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:09,307 INFO L290 TraceCheckUtils]: 22: Hoare triple {842#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {842#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:09,308 INFO L290 TraceCheckUtils]: 23: Hoare triple {842#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {843#(and (<= main_~x~0 9) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:09,308 INFO L290 TraceCheckUtils]: 24: Hoare triple {843#(and (<= main_~x~0 9) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {843#(and (<= main_~x~0 9) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:09,309 INFO L290 TraceCheckUtils]: 25: Hoare triple {843#(and (<= main_~x~0 9) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {830#false} is VALID [2022-04-27 16:11:09,309 INFO L290 TraceCheckUtils]: 26: Hoare triple {830#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,309 INFO L272 TraceCheckUtils]: 27: Hoare triple {830#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {830#false} is VALID [2022-04-27 16:11:09,309 INFO L290 TraceCheckUtils]: 28: Hoare triple {830#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {830#false} is VALID [2022-04-27 16:11:09,309 INFO L290 TraceCheckUtils]: 29: Hoare triple {830#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,309 INFO L290 TraceCheckUtils]: 30: Hoare triple {830#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,310 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 10 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:09,310 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:09,310 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675723092] [2022-04-27 16:11:09,310 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1675723092] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:09,310 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [196701054] [2022-04-27 16:11:09,310 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 16:11:09,310 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:09,310 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:09,311 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:09,312 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 16:11:09,342 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-27 16:11:09,343 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:11:09,343 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 16:11:09,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:09,352 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:09,625 INFO L272 TraceCheckUtils]: 0: Hoare triple {829#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L290 TraceCheckUtils]: 1: Hoare triple {829#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L290 TraceCheckUtils]: 2: Hoare triple {829#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {829#true} {829#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L272 TraceCheckUtils]: 4: Hoare triple {829#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L290 TraceCheckUtils]: 5: Hoare triple {829#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L290 TraceCheckUtils]: 6: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L290 TraceCheckUtils]: 7: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 9: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 10: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 11: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 12: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 13: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 14: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 15: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 16: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,626 INFO L290 TraceCheckUtils]: 17: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,627 INFO L290 TraceCheckUtils]: 18: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,627 INFO L290 TraceCheckUtils]: 19: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,627 INFO L290 TraceCheckUtils]: 20: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,627 INFO L290 TraceCheckUtils]: 21: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,627 INFO L290 TraceCheckUtils]: 22: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,628 INFO L290 TraceCheckUtils]: 23: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {917#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} is VALID [2022-04-27 16:11:09,628 INFO L290 TraceCheckUtils]: 24: Hoare triple {917#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {917#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} is VALID [2022-04-27 16:11:09,629 INFO L290 TraceCheckUtils]: 25: Hoare triple {917#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {924#(< (mod (+ main_~x~0 4294967293) 4294967296) 65520)} is VALID [2022-04-27 16:11:09,630 INFO L290 TraceCheckUtils]: 26: Hoare triple {924#(< (mod (+ main_~x~0 4294967293) 4294967296) 65520)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,630 INFO L272 TraceCheckUtils]: 27: Hoare triple {830#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {830#false} is VALID [2022-04-27 16:11:09,633 INFO L290 TraceCheckUtils]: 28: Hoare triple {830#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {830#false} is VALID [2022-04-27 16:11:09,633 INFO L290 TraceCheckUtils]: 29: Hoare triple {830#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,638 INFO L290 TraceCheckUtils]: 30: Hoare triple {830#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,638 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 27 proven. 1 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2022-04-27 16:11:09,638 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:09,894 INFO L290 TraceCheckUtils]: 30: Hoare triple {830#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,894 INFO L290 TraceCheckUtils]: 29: Hoare triple {830#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,894 INFO L290 TraceCheckUtils]: 28: Hoare triple {830#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {830#false} is VALID [2022-04-27 16:11:09,894 INFO L272 TraceCheckUtils]: 27: Hoare triple {830#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {830#false} is VALID [2022-04-27 16:11:09,895 INFO L290 TraceCheckUtils]: 26: Hoare triple {952#(< (mod main_~x~0 4294967296) 268435455)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {830#false} is VALID [2022-04-27 16:11:09,897 INFO L290 TraceCheckUtils]: 25: Hoare triple {956#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {952#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 16:11:09,900 INFO L290 TraceCheckUtils]: 24: Hoare triple {956#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {956#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 23: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {956#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 22: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 21: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 20: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 19: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 18: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 17: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,902 INFO L290 TraceCheckUtils]: 16: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 15: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 14: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 13: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 12: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 11: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 8: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 7: Hoare triple {829#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 6: Hoare triple {829#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L290 TraceCheckUtils]: 5: Hoare triple {829#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {829#true} is VALID [2022-04-27 16:11:09,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {829#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,904 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {829#true} {829#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,904 INFO L290 TraceCheckUtils]: 2: Hoare triple {829#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {829#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {829#true} is VALID [2022-04-27 16:11:09,904 INFO L272 TraceCheckUtils]: 0: Hoare triple {829#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {829#true} is VALID [2022-04-27 16:11:09,904 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 27 proven. 1 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2022-04-27 16:11:09,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [196701054] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:09,904 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:09,904 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 4, 4] total 17 [2022-04-27 16:11:09,904 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138280982] [2022-04-27 16:11:09,905 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:09,905 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 16:11:09,905 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:09,905 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:09,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:09,940 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-27 16:11:09,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:09,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-27 16:11:09,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2022-04-27 16:11:09,941 INFO L87 Difference]: Start difference. First operand 32 states and 34 transitions. Second operand has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:10,508 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2022-04-27 16:11:10,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 16:11:10,509 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 16:11:10,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:10,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 52 transitions. [2022-04-27 16:11:10,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 52 transitions. [2022-04-27 16:11:10,511 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 52 transitions. [2022-04-27 16:11:10,572 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:10,573 INFO L225 Difference]: With dead ends: 53 [2022-04-27 16:11:10,573 INFO L226 Difference]: Without dead ends: 53 [2022-04-27 16:11:10,574 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 63 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=249, Invalid=743, Unknown=0, NotChecked=0, Total=992 [2022-04-27 16:11:10,574 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 34 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:10,574 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 28 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 16:11:10,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-04-27 16:11:10,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 42. [2022-04-27 16:11:10,576 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:10,577 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand has 42 states, 37 states have (on average 1.162162162162162) internal successors, (43), 37 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,577 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand has 42 states, 37 states have (on average 1.162162162162162) internal successors, (43), 37 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,577 INFO L87 Difference]: Start difference. First operand 53 states. Second operand has 42 states, 37 states have (on average 1.162162162162162) internal successors, (43), 37 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:10,578 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2022-04-27 16:11:10,578 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2022-04-27 16:11:10,578 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:10,579 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:10,579 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.162162162162162) internal successors, (43), 37 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-27 16:11:10,579 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.162162162162162) internal successors, (43), 37 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-27 16:11:10,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:10,582 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2022-04-27 16:11:10,582 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2022-04-27 16:11:10,583 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:10,583 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:10,583 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:10,583 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:10,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.162162162162162) internal successors, (43), 37 states have internal predecessors, (43), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 47 transitions. [2022-04-27 16:11:10,584 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 47 transitions. Word has length 31 [2022-04-27 16:11:10,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:10,584 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 47 transitions. [2022-04-27 16:11:10,584 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:10,584 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-04-27 16:11:10,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-27 16:11:10,585 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:10,585 INFO L195 NwaCegarLoop]: trace histogram [15, 11, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:10,605 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 16:11:10,785 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:10,786 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:10,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:10,786 INFO L85 PathProgramCache]: Analyzing trace with hash 890325540, now seen corresponding path program 4 times [2022-04-27 16:11:10,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:10,786 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933891709] [2022-04-27 16:11:10,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:10,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:10,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:11,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:11,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:11,056 INFO L290 TraceCheckUtils]: 0: Hoare triple {1285#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1268#true} is VALID [2022-04-27 16:11:11,056 INFO L290 TraceCheckUtils]: 1: Hoare triple {1268#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,056 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1268#true} {1268#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,056 INFO L272 TraceCheckUtils]: 0: Hoare triple {1268#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1285#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:11,057 INFO L290 TraceCheckUtils]: 1: Hoare triple {1285#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1268#true} is VALID [2022-04-27 16:11:11,057 INFO L290 TraceCheckUtils]: 2: Hoare triple {1268#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,057 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1268#true} {1268#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,057 INFO L272 TraceCheckUtils]: 4: Hoare triple {1268#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,057 INFO L290 TraceCheckUtils]: 5: Hoare triple {1268#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {1273#(= main_~x~0 0)} is VALID [2022-04-27 16:11:11,057 INFO L290 TraceCheckUtils]: 6: Hoare triple {1273#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1273#(= main_~x~0 0)} is VALID [2022-04-27 16:11:11,058 INFO L290 TraceCheckUtils]: 7: Hoare triple {1273#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:11,058 INFO L290 TraceCheckUtils]: 8: Hoare triple {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:11,059 INFO L290 TraceCheckUtils]: 9: Hoare triple {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:11,059 INFO L290 TraceCheckUtils]: 10: Hoare triple {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:11,060 INFO L290 TraceCheckUtils]: 11: Hoare triple {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:11,060 INFO L290 TraceCheckUtils]: 12: Hoare triple {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:11,060 INFO L290 TraceCheckUtils]: 13: Hoare triple {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:11,061 INFO L290 TraceCheckUtils]: 14: Hoare triple {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:11,061 INFO L290 TraceCheckUtils]: 15: Hoare triple {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:11,062 INFO L290 TraceCheckUtils]: 16: Hoare triple {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:11,062 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:11,062 INFO L290 TraceCheckUtils]: 18: Hoare triple {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:11,063 INFO L290 TraceCheckUtils]: 19: Hoare triple {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:11,063 INFO L290 TraceCheckUtils]: 20: Hoare triple {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:11,064 INFO L290 TraceCheckUtils]: 21: Hoare triple {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:11,064 INFO L290 TraceCheckUtils]: 22: Hoare triple {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:11,065 INFO L290 TraceCheckUtils]: 23: Hoare triple {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:11,065 INFO L290 TraceCheckUtils]: 24: Hoare triple {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:11,066 INFO L290 TraceCheckUtils]: 25: Hoare triple {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:11,066 INFO L290 TraceCheckUtils]: 26: Hoare triple {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:11,066 INFO L290 TraceCheckUtils]: 27: Hoare triple {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1284#(and (<= main_~x~0 11) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:11,067 INFO L290 TraceCheckUtils]: 28: Hoare triple {1284#(and (<= main_~x~0 11) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1284#(and (<= main_~x~0 11) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:11,067 INFO L290 TraceCheckUtils]: 29: Hoare triple {1284#(and (<= main_~x~0 11) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1269#false} is VALID [2022-04-27 16:11:11,067 INFO L290 TraceCheckUtils]: 30: Hoare triple {1269#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 31: Hoare triple {1269#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 32: Hoare triple {1269#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 33: Hoare triple {1269#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 34: Hoare triple {1269#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 35: Hoare triple {1269#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 36: Hoare triple {1269#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L272 TraceCheckUtils]: 37: Hoare triple {1269#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 38: Hoare triple {1269#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 39: Hoare triple {1269#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,068 INFO L290 TraceCheckUtils]: 40: Hoare triple {1269#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,069 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 84 proven. 132 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 16:11:11,069 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:11,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933891709] [2022-04-27 16:11:11,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [933891709] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:11,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [113496749] [2022-04-27 16:11:11,069 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 16:11:11,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:11,069 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:11,070 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:11,071 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 16:11:11,130 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 16:11:11,131 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:11:11,131 INFO L263 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 16:11:11,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:11,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:11,582 INFO L272 TraceCheckUtils]: 0: Hoare triple {1268#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,582 INFO L290 TraceCheckUtils]: 1: Hoare triple {1268#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1268#true} is VALID [2022-04-27 16:11:11,583 INFO L290 TraceCheckUtils]: 2: Hoare triple {1268#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,583 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1268#true} {1268#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,583 INFO L272 TraceCheckUtils]: 4: Hoare triple {1268#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:11,583 INFO L290 TraceCheckUtils]: 5: Hoare triple {1268#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {1273#(= main_~x~0 0)} is VALID [2022-04-27 16:11:11,584 INFO L290 TraceCheckUtils]: 6: Hoare triple {1273#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1273#(= main_~x~0 0)} is VALID [2022-04-27 16:11:11,585 INFO L290 TraceCheckUtils]: 7: Hoare triple {1273#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:11,585 INFO L290 TraceCheckUtils]: 8: Hoare triple {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:11,586 INFO L290 TraceCheckUtils]: 9: Hoare triple {1274#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:11,586 INFO L290 TraceCheckUtils]: 10: Hoare triple {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:11,586 INFO L290 TraceCheckUtils]: 11: Hoare triple {1275#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:11,587 INFO L290 TraceCheckUtils]: 12: Hoare triple {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:11,587 INFO L290 TraceCheckUtils]: 13: Hoare triple {1276#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:11,588 INFO L290 TraceCheckUtils]: 14: Hoare triple {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:11,588 INFO L290 TraceCheckUtils]: 15: Hoare triple {1277#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:11,588 INFO L290 TraceCheckUtils]: 16: Hoare triple {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:11,589 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:11,589 INFO L290 TraceCheckUtils]: 18: Hoare triple {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:11,590 INFO L290 TraceCheckUtils]: 19: Hoare triple {1279#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:11,590 INFO L290 TraceCheckUtils]: 20: Hoare triple {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:11,590 INFO L290 TraceCheckUtils]: 21: Hoare triple {1280#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:11,591 INFO L290 TraceCheckUtils]: 22: Hoare triple {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:11,591 INFO L290 TraceCheckUtils]: 23: Hoare triple {1281#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:11,592 INFO L290 TraceCheckUtils]: 24: Hoare triple {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:11,592 INFO L290 TraceCheckUtils]: 25: Hoare triple {1282#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:11,592 INFO L290 TraceCheckUtils]: 26: Hoare triple {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:11,593 INFO L290 TraceCheckUtils]: 27: Hoare triple {1283#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1370#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:11,594 INFO L290 TraceCheckUtils]: 28: Hoare triple {1370#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1370#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:11,594 INFO L290 TraceCheckUtils]: 29: Hoare triple {1370#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1377#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:11,595 INFO L290 TraceCheckUtils]: 30: Hoare triple {1377#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1377#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:11,595 INFO L290 TraceCheckUtils]: 31: Hoare triple {1377#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1384#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:11,595 INFO L290 TraceCheckUtils]: 32: Hoare triple {1384#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1384#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:11,596 INFO L290 TraceCheckUtils]: 33: Hoare triple {1384#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1391#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:11,596 INFO L290 TraceCheckUtils]: 34: Hoare triple {1391#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1391#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:11,598 INFO L290 TraceCheckUtils]: 35: Hoare triple {1391#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1398#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:11,598 INFO L290 TraceCheckUtils]: 36: Hoare triple {1398#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,598 INFO L272 TraceCheckUtils]: 37: Hoare triple {1269#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1269#false} is VALID [2022-04-27 16:11:11,598 INFO L290 TraceCheckUtils]: 38: Hoare triple {1269#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1269#false} is VALID [2022-04-27 16:11:11,599 INFO L290 TraceCheckUtils]: 39: Hoare triple {1269#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,599 INFO L290 TraceCheckUtils]: 40: Hoare triple {1269#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:11,599 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:11,599 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:12,076 INFO L290 TraceCheckUtils]: 40: Hoare triple {1269#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:12,076 INFO L290 TraceCheckUtils]: 39: Hoare triple {1269#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:12,076 INFO L290 TraceCheckUtils]: 38: Hoare triple {1269#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1269#false} is VALID [2022-04-27 16:11:12,077 INFO L272 TraceCheckUtils]: 37: Hoare triple {1269#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1269#false} is VALID [2022-04-27 16:11:12,077 INFO L290 TraceCheckUtils]: 36: Hoare triple {1426#(< (mod main_~x~0 4294967296) 268435455)} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1269#false} is VALID [2022-04-27 16:11:12,077 INFO L290 TraceCheckUtils]: 35: Hoare triple {1430#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1426#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,078 INFO L290 TraceCheckUtils]: 34: Hoare triple {1430#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1430#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,078 INFO L290 TraceCheckUtils]: 33: Hoare triple {1437#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1430#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,079 INFO L290 TraceCheckUtils]: 32: Hoare triple {1437#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1437#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,080 INFO L290 TraceCheckUtils]: 31: Hoare triple {1444#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1437#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,081 INFO L290 TraceCheckUtils]: 30: Hoare triple {1444#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1444#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,084 INFO L290 TraceCheckUtils]: 29: Hoare triple {1451#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1444#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,084 INFO L290 TraceCheckUtils]: 28: Hoare triple {1451#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1451#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,085 INFO L290 TraceCheckUtils]: 27: Hoare triple {1458#(< (mod (+ main_~x~0 9) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1451#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,085 INFO L290 TraceCheckUtils]: 26: Hoare triple {1458#(< (mod (+ main_~x~0 9) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1458#(< (mod (+ main_~x~0 9) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,086 INFO L290 TraceCheckUtils]: 25: Hoare triple {1465#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1458#(< (mod (+ main_~x~0 9) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,086 INFO L290 TraceCheckUtils]: 24: Hoare triple {1465#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1465#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,086 INFO L290 TraceCheckUtils]: 23: Hoare triple {1472#(< (mod (+ main_~x~0 11) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1465#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,087 INFO L290 TraceCheckUtils]: 22: Hoare triple {1472#(< (mod (+ main_~x~0 11) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1472#(< (mod (+ main_~x~0 11) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,087 INFO L290 TraceCheckUtils]: 21: Hoare triple {1479#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1472#(< (mod (+ main_~x~0 11) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,088 INFO L290 TraceCheckUtils]: 20: Hoare triple {1479#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1479#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,089 INFO L290 TraceCheckUtils]: 19: Hoare triple {1486#(< (mod (+ main_~x~0 13) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1479#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,089 INFO L290 TraceCheckUtils]: 18: Hoare triple {1486#(< (mod (+ main_~x~0 13) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1486#(< (mod (+ main_~x~0 13) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,089 INFO L290 TraceCheckUtils]: 17: Hoare triple {1493#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1486#(< (mod (+ main_~x~0 13) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,090 INFO L290 TraceCheckUtils]: 16: Hoare triple {1493#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1493#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,090 INFO L290 TraceCheckUtils]: 15: Hoare triple {1500#(< (mod (+ main_~x~0 15) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1493#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,090 INFO L290 TraceCheckUtils]: 14: Hoare triple {1500#(< (mod (+ main_~x~0 15) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1500#(< (mod (+ main_~x~0 15) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,091 INFO L290 TraceCheckUtils]: 13: Hoare triple {1507#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1500#(< (mod (+ main_~x~0 15) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,091 INFO L290 TraceCheckUtils]: 12: Hoare triple {1507#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1507#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,092 INFO L290 TraceCheckUtils]: 11: Hoare triple {1514#(< (mod (+ main_~x~0 17) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1507#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,092 INFO L290 TraceCheckUtils]: 10: Hoare triple {1514#(< (mod (+ main_~x~0 17) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1514#(< (mod (+ main_~x~0 17) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,093 INFO L290 TraceCheckUtils]: 9: Hoare triple {1521#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1514#(< (mod (+ main_~x~0 17) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,093 INFO L290 TraceCheckUtils]: 8: Hoare triple {1521#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1521#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,094 INFO L290 TraceCheckUtils]: 7: Hoare triple {1528#(< (mod (+ 19 main_~x~0) 4294967296) 268435455)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1521#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,094 INFO L290 TraceCheckUtils]: 6: Hoare triple {1528#(< (mod (+ 19 main_~x~0) 4294967296) 268435455)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1528#(< (mod (+ 19 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,094 INFO L290 TraceCheckUtils]: 5: Hoare triple {1268#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {1528#(< (mod (+ 19 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 16:11:12,094 INFO L272 TraceCheckUtils]: 4: Hoare triple {1268#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:12,094 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1268#true} {1268#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:12,094 INFO L290 TraceCheckUtils]: 2: Hoare triple {1268#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:12,094 INFO L290 TraceCheckUtils]: 1: Hoare triple {1268#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1268#true} is VALID [2022-04-27 16:11:12,095 INFO L272 TraceCheckUtils]: 0: Hoare triple {1268#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1268#true} is VALID [2022-04-27 16:11:12,095 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 16:11:12,095 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [113496749] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:12,095 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:12,095 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18, 18] total 36 [2022-04-27 16:11:12,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563488015] [2022-04-27 16:11:12,095 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:12,096 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-27 16:11:12,096 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:12,096 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:12,164 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:12,164 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-27 16:11:12,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:12,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-27 16:11:12,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=353, Invalid=907, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 16:11:12,165 INFO L87 Difference]: Start difference. First operand 42 states and 47 transitions. Second operand has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:21,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:21,921 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-27 16:11:21,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-27 16:11:21,922 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-27 16:11:21,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:11:21,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:21,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 74 transitions. [2022-04-27 16:11:21,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:21,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 74 transitions. [2022-04-27 16:11:21,925 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 74 transitions. [2022-04-27 16:11:22,183 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:22,185 INFO L225 Difference]: With dead ends: 77 [2022-04-27 16:11:22,185 INFO L226 Difference]: Without dead ends: 77 [2022-04-27 16:11:22,186 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 285 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=876, Invalid=2430, Unknown=0, NotChecked=0, Total=3306 [2022-04-27 16:11:22,186 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 50 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 517 mSolverCounterSat, 235 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 752 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 235 IncrementalHoareTripleChecker+Valid, 517 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 16:11:22,186 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 98 Invalid, 752 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [235 Valid, 517 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 16:11:22,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-27 16:11:22,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 58. [2022-04-27 16:11:22,189 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:11:22,190 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 58 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 53 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:22,190 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 58 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 53 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:22,190 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 58 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 53 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:22,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:22,192 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-27 16:11:22,192 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 97 transitions. [2022-04-27 16:11:22,192 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:22,192 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:22,192 INFO L74 IsIncluded]: Start isIncluded. First operand has 58 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 53 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-27 16:11:22,193 INFO L87 Difference]: Start difference. First operand has 58 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 53 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-27 16:11:22,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:11:22,194 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-27 16:11:22,194 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 97 transitions. [2022-04-27 16:11:22,194 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:11:22,194 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:11:22,195 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:11:22,195 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:11:22,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 53 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:22,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 69 transitions. [2022-04-27 16:11:22,196 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 69 transitions. Word has length 41 [2022-04-27 16:11:22,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:11:22,196 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 69 transitions. [2022-04-27 16:11:22,196 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 2.111111111111111) internal successors, (76), 35 states have internal predecessors, (76), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:22,196 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 69 transitions. [2022-04-27 16:11:22,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-04-27 16:11:22,197 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:11:22,197 INFO L195 NwaCegarLoop]: trace histogram [23, 13, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:11:22,214 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 16:11:22,414 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:22,414 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:11:22,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:11:22,414 INFO L85 PathProgramCache]: Analyzing trace with hash -422126962, now seen corresponding path program 5 times [2022-04-27 16:11:22,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:11:22,415 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494704124] [2022-04-27 16:11:22,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:11:22,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:11:22,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:22,698 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:11:22,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:22,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {1904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1885#true} is VALID [2022-04-27 16:11:22,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {1885#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:22,705 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1885#true} {1885#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:22,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {1885#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:11:22,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {1904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1885#true} is VALID [2022-04-27 16:11:22,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {1885#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:22,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1885#true} {1885#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:22,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {1885#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:22,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {1885#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {1890#(= main_~x~0 0)} is VALID [2022-04-27 16:11:22,707 INFO L290 TraceCheckUtils]: 6: Hoare triple {1890#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1890#(= main_~x~0 0)} is VALID [2022-04-27 16:11:22,707 INFO L290 TraceCheckUtils]: 7: Hoare triple {1890#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:22,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:22,708 INFO L290 TraceCheckUtils]: 9: Hoare triple {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:22,708 INFO L290 TraceCheckUtils]: 10: Hoare triple {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:22,709 INFO L290 TraceCheckUtils]: 11: Hoare triple {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:22,709 INFO L290 TraceCheckUtils]: 12: Hoare triple {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:22,710 INFO L290 TraceCheckUtils]: 13: Hoare triple {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:22,710 INFO L290 TraceCheckUtils]: 14: Hoare triple {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:22,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:22,711 INFO L290 TraceCheckUtils]: 16: Hoare triple {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:22,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:22,712 INFO L290 TraceCheckUtils]: 18: Hoare triple {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:22,712 INFO L290 TraceCheckUtils]: 19: Hoare triple {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:22,712 INFO L290 TraceCheckUtils]: 20: Hoare triple {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:22,713 INFO L290 TraceCheckUtils]: 21: Hoare triple {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:22,713 INFO L290 TraceCheckUtils]: 22: Hoare triple {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:22,714 INFO L290 TraceCheckUtils]: 23: Hoare triple {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:22,714 INFO L290 TraceCheckUtils]: 24: Hoare triple {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:22,714 INFO L290 TraceCheckUtils]: 25: Hoare triple {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:22,715 INFO L290 TraceCheckUtils]: 26: Hoare triple {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:22,715 INFO L290 TraceCheckUtils]: 27: Hoare triple {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:22,716 INFO L290 TraceCheckUtils]: 28: Hoare triple {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:22,716 INFO L290 TraceCheckUtils]: 29: Hoare triple {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:22,716 INFO L290 TraceCheckUtils]: 30: Hoare triple {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:22,717 INFO L290 TraceCheckUtils]: 31: Hoare triple {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1903#(and (<= main_~x~0 13) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:22,717 INFO L290 TraceCheckUtils]: 32: Hoare triple {1903#(and (<= main_~x~0 13) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1903#(and (<= main_~x~0 13) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 33: Hoare triple {1903#(and (<= main_~x~0 13) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 34: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 35: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 36: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 37: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 38: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 39: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 40: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 41: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,718 INFO L290 TraceCheckUtils]: 42: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 43: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 44: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 45: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 46: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 47: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 48: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 49: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 50: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 51: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 52: Hoare triple {1886#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L272 TraceCheckUtils]: 53: Hoare triple {1886#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 54: Hoare triple {1886#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1886#false} is VALID [2022-04-27 16:11:22,719 INFO L290 TraceCheckUtils]: 55: Hoare triple {1886#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,720 INFO L290 TraceCheckUtils]: 56: Hoare triple {1886#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:22,720 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 266 proven. 182 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2022-04-27 16:11:22,720 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:11:22,720 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494704124] [2022-04-27 16:11:22,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1494704124] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:11:22,720 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1012683593] [2022-04-27 16:11:22,720 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 16:11:22,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:11:22,720 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:11:22,732 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:11:22,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 16:11:24,143 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2022-04-27 16:11:24,143 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:11:24,148 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-27 16:11:24,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:11:24,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:11:24,803 INFO L272 TraceCheckUtils]: 0: Hoare triple {1885#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:24,803 INFO L290 TraceCheckUtils]: 1: Hoare triple {1885#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1885#true} is VALID [2022-04-27 16:11:24,803 INFO L290 TraceCheckUtils]: 2: Hoare triple {1885#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:24,803 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1885#true} {1885#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:24,804 INFO L272 TraceCheckUtils]: 4: Hoare triple {1885#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:24,804 INFO L290 TraceCheckUtils]: 5: Hoare triple {1885#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {1890#(= main_~x~0 0)} is VALID [2022-04-27 16:11:24,804 INFO L290 TraceCheckUtils]: 6: Hoare triple {1890#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1890#(= main_~x~0 0)} is VALID [2022-04-27 16:11:24,804 INFO L290 TraceCheckUtils]: 7: Hoare triple {1890#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:24,805 INFO L290 TraceCheckUtils]: 8: Hoare triple {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:11:24,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {1891#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:24,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:11:24,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {1892#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:24,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:11:24,807 INFO L290 TraceCheckUtils]: 13: Hoare triple {1893#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:24,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:11:24,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {1894#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:24,808 INFO L290 TraceCheckUtils]: 16: Hoare triple {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:11:24,809 INFO L290 TraceCheckUtils]: 17: Hoare triple {1895#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:24,809 INFO L290 TraceCheckUtils]: 18: Hoare triple {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:11:24,809 INFO L290 TraceCheckUtils]: 19: Hoare triple {1896#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:24,810 INFO L290 TraceCheckUtils]: 20: Hoare triple {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:11:24,810 INFO L290 TraceCheckUtils]: 21: Hoare triple {1897#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:24,810 INFO L290 TraceCheckUtils]: 22: Hoare triple {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:11:24,811 INFO L290 TraceCheckUtils]: 23: Hoare triple {1898#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:24,811 INFO L290 TraceCheckUtils]: 24: Hoare triple {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:11:24,812 INFO L290 TraceCheckUtils]: 25: Hoare triple {1899#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:24,812 INFO L290 TraceCheckUtils]: 26: Hoare triple {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:11:24,813 INFO L290 TraceCheckUtils]: 27: Hoare triple {1900#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:24,813 INFO L290 TraceCheckUtils]: 28: Hoare triple {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:11:24,813 INFO L290 TraceCheckUtils]: 29: Hoare triple {1901#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:24,814 INFO L290 TraceCheckUtils]: 30: Hoare triple {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:11:24,814 INFO L290 TraceCheckUtils]: 31: Hoare triple {1902#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2001#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:24,814 INFO L290 TraceCheckUtils]: 32: Hoare triple {2001#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2001#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:11:24,815 INFO L290 TraceCheckUtils]: 33: Hoare triple {2001#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2008#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:24,815 INFO L290 TraceCheckUtils]: 34: Hoare triple {2008#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2008#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:11:24,816 INFO L290 TraceCheckUtils]: 35: Hoare triple {2008#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2015#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:24,816 INFO L290 TraceCheckUtils]: 36: Hoare triple {2015#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2015#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:11:24,817 INFO L290 TraceCheckUtils]: 37: Hoare triple {2015#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2022#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:24,817 INFO L290 TraceCheckUtils]: 38: Hoare triple {2022#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2022#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:11:24,817 INFO L290 TraceCheckUtils]: 39: Hoare triple {2022#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2029#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:11:24,818 INFO L290 TraceCheckUtils]: 40: Hoare triple {2029#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2029#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:11:24,818 INFO L290 TraceCheckUtils]: 41: Hoare triple {2029#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2036#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:11:24,818 INFO L290 TraceCheckUtils]: 42: Hoare triple {2036#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2036#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:11:24,819 INFO L290 TraceCheckUtils]: 43: Hoare triple {2036#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2043#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:11:24,819 INFO L290 TraceCheckUtils]: 44: Hoare triple {2043#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2043#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 45: Hoare triple {2043#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 46: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 47: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 48: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 49: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 50: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 51: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 52: Hoare triple {1886#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L272 TraceCheckUtils]: 53: Hoare triple {1886#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1886#false} is VALID [2022-04-27 16:11:24,820 INFO L290 TraceCheckUtils]: 54: Hoare triple {1886#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1886#false} is VALID [2022-04-27 16:11:24,821 INFO L290 TraceCheckUtils]: 55: Hoare triple {1886#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:24,821 INFO L290 TraceCheckUtils]: 56: Hoare triple {1886#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:24,821 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 140 proven. 380 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 16:11:24,821 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:11:25,994 INFO L290 TraceCheckUtils]: 56: Hoare triple {1886#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:25,994 INFO L290 TraceCheckUtils]: 55: Hoare triple {1886#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:25,994 INFO L290 TraceCheckUtils]: 54: Hoare triple {1886#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1886#false} is VALID [2022-04-27 16:11:25,994 INFO L272 TraceCheckUtils]: 53: Hoare triple {1886#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1886#false} is VALID [2022-04-27 16:11:25,994 INFO L290 TraceCheckUtils]: 52: Hoare triple {1886#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:25,994 INFO L290 TraceCheckUtils]: 51: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:25,994 INFO L290 TraceCheckUtils]: 50: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:25,995 INFO L290 TraceCheckUtils]: 49: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:25,995 INFO L290 TraceCheckUtils]: 48: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:25,995 INFO L290 TraceCheckUtils]: 47: Hoare triple {1886#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:25,995 INFO L290 TraceCheckUtils]: 46: Hoare triple {1886#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {1886#false} is VALID [2022-04-27 16:11:25,995 INFO L290 TraceCheckUtils]: 45: Hoare triple {2116#(< (mod main_~x~0 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1886#false} is VALID [2022-04-27 16:11:25,995 INFO L290 TraceCheckUtils]: 44: Hoare triple {2120#(or (< (mod main_~x~0 4294967296) 65520) (not (< (mod main_~x~0 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2116#(< (mod main_~x~0 4294967296) 65520)} is VALID [2022-04-27 16:11:25,996 INFO L290 TraceCheckUtils]: 43: Hoare triple {2124#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2120#(or (< (mod main_~x~0 4294967296) 65520) (not (< (mod main_~x~0 4294967296) 268435455)))} is VALID [2022-04-27 16:11:25,996 INFO L290 TraceCheckUtils]: 42: Hoare triple {2124#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2124#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} is VALID [2022-04-27 16:11:25,997 INFO L290 TraceCheckUtils]: 41: Hoare triple {2131#(or (< (mod (+ main_~x~0 4) 4294967296) 65520) (not (< (mod (+ main_~x~0 4) 4294967296) 268435455)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2124#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 65520))} is VALID [2022-04-27 16:11:25,997 INFO L290 TraceCheckUtils]: 40: Hoare triple {2131#(or (< (mod (+ main_~x~0 4) 4294967296) 65520) (not (< (mod (+ main_~x~0 4) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2131#(or (< (mod (+ main_~x~0 4) 4294967296) 65520) (not (< (mod (+ main_~x~0 4) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:25,998 INFO L290 TraceCheckUtils]: 39: Hoare triple {2138#(or (not (< (mod (+ main_~x~0 6) 4294967296) 268435455)) (< (mod (+ main_~x~0 6) 4294967296) 65520))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2131#(or (< (mod (+ main_~x~0 4) 4294967296) 65520) (not (< (mod (+ main_~x~0 4) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:25,998 INFO L290 TraceCheckUtils]: 38: Hoare triple {2138#(or (not (< (mod (+ main_~x~0 6) 4294967296) 268435455)) (< (mod (+ main_~x~0 6) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2138#(or (not (< (mod (+ main_~x~0 6) 4294967296) 268435455)) (< (mod (+ main_~x~0 6) 4294967296) 65520))} is VALID [2022-04-27 16:11:25,999 INFO L290 TraceCheckUtils]: 37: Hoare triple {2145#(or (not (< (mod (+ main_~x~0 8) 4294967296) 268435455)) (< (mod (+ main_~x~0 8) 4294967296) 65520))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2138#(or (not (< (mod (+ main_~x~0 6) 4294967296) 268435455)) (< (mod (+ main_~x~0 6) 4294967296) 65520))} is VALID [2022-04-27 16:11:25,999 INFO L290 TraceCheckUtils]: 36: Hoare triple {2145#(or (not (< (mod (+ main_~x~0 8) 4294967296) 268435455)) (< (mod (+ main_~x~0 8) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2145#(or (not (< (mod (+ main_~x~0 8) 4294967296) 268435455)) (< (mod (+ main_~x~0 8) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,000 INFO L290 TraceCheckUtils]: 35: Hoare triple {2152#(or (< (mod (+ main_~x~0 10) 4294967296) 65520) (not (< (mod (+ main_~x~0 10) 4294967296) 268435455)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2145#(or (not (< (mod (+ main_~x~0 8) 4294967296) 268435455)) (< (mod (+ main_~x~0 8) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,000 INFO L290 TraceCheckUtils]: 34: Hoare triple {2152#(or (< (mod (+ main_~x~0 10) 4294967296) 65520) (not (< (mod (+ main_~x~0 10) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2152#(or (< (mod (+ main_~x~0 10) 4294967296) 65520) (not (< (mod (+ main_~x~0 10) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,001 INFO L290 TraceCheckUtils]: 33: Hoare triple {2159#(or (< (mod (+ main_~x~0 12) 4294967296) 65520) (not (< (mod (+ main_~x~0 12) 4294967296) 268435455)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2152#(or (< (mod (+ main_~x~0 10) 4294967296) 65520) (not (< (mod (+ main_~x~0 10) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,001 INFO L290 TraceCheckUtils]: 32: Hoare triple {2159#(or (< (mod (+ main_~x~0 12) 4294967296) 65520) (not (< (mod (+ main_~x~0 12) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2159#(or (< (mod (+ main_~x~0 12) 4294967296) 65520) (not (< (mod (+ main_~x~0 12) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,002 INFO L290 TraceCheckUtils]: 31: Hoare triple {2166#(or (< (mod (+ main_~x~0 13) 4294967296) 65520) (not (< (mod (+ main_~x~0 13) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2159#(or (< (mod (+ main_~x~0 12) 4294967296) 65520) (not (< (mod (+ main_~x~0 12) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,012 INFO L290 TraceCheckUtils]: 30: Hoare triple {2166#(or (< (mod (+ main_~x~0 13) 4294967296) 65520) (not (< (mod (+ main_~x~0 13) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2166#(or (< (mod (+ main_~x~0 13) 4294967296) 65520) (not (< (mod (+ main_~x~0 13) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,013 INFO L290 TraceCheckUtils]: 29: Hoare triple {2173#(or (< (mod (+ main_~x~0 14) 4294967296) 65520) (not (< (mod (+ main_~x~0 14) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2166#(or (< (mod (+ main_~x~0 13) 4294967296) 65520) (not (< (mod (+ main_~x~0 13) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,013 INFO L290 TraceCheckUtils]: 28: Hoare triple {2173#(or (< (mod (+ main_~x~0 14) 4294967296) 65520) (not (< (mod (+ main_~x~0 14) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2173#(or (< (mod (+ main_~x~0 14) 4294967296) 65520) (not (< (mod (+ main_~x~0 14) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,014 INFO L290 TraceCheckUtils]: 27: Hoare triple {2180#(or (< (mod (+ main_~x~0 15) 4294967296) 65520) (not (< (mod (+ main_~x~0 15) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2173#(or (< (mod (+ main_~x~0 14) 4294967296) 65520) (not (< (mod (+ main_~x~0 14) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,014 INFO L290 TraceCheckUtils]: 26: Hoare triple {2180#(or (< (mod (+ main_~x~0 15) 4294967296) 65520) (not (< (mod (+ main_~x~0 15) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2180#(or (< (mod (+ main_~x~0 15) 4294967296) 65520) (not (< (mod (+ main_~x~0 15) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,014 INFO L290 TraceCheckUtils]: 25: Hoare triple {2187#(or (not (< (mod (+ main_~x~0 16) 4294967296) 268435455)) (< (mod (+ main_~x~0 16) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2180#(or (< (mod (+ main_~x~0 15) 4294967296) 65520) (not (< (mod (+ main_~x~0 15) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,015 INFO L290 TraceCheckUtils]: 24: Hoare triple {2187#(or (not (< (mod (+ main_~x~0 16) 4294967296) 268435455)) (< (mod (+ main_~x~0 16) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2187#(or (not (< (mod (+ main_~x~0 16) 4294967296) 268435455)) (< (mod (+ main_~x~0 16) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,015 INFO L290 TraceCheckUtils]: 23: Hoare triple {2194#(or (not (< (mod (+ main_~x~0 17) 4294967296) 268435455)) (< (mod (+ main_~x~0 17) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2187#(or (not (< (mod (+ main_~x~0 16) 4294967296) 268435455)) (< (mod (+ main_~x~0 16) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,016 INFO L290 TraceCheckUtils]: 22: Hoare triple {2194#(or (not (< (mod (+ main_~x~0 17) 4294967296) 268435455)) (< (mod (+ main_~x~0 17) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2194#(or (not (< (mod (+ main_~x~0 17) 4294967296) 268435455)) (< (mod (+ main_~x~0 17) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,016 INFO L290 TraceCheckUtils]: 21: Hoare triple {2201#(or (not (< (mod (+ main_~x~0 18) 4294967296) 268435455)) (< (mod (+ main_~x~0 18) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2194#(or (not (< (mod (+ main_~x~0 17) 4294967296) 268435455)) (< (mod (+ main_~x~0 17) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,016 INFO L290 TraceCheckUtils]: 20: Hoare triple {2201#(or (not (< (mod (+ main_~x~0 18) 4294967296) 268435455)) (< (mod (+ main_~x~0 18) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2201#(or (not (< (mod (+ main_~x~0 18) 4294967296) 268435455)) (< (mod (+ main_~x~0 18) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,017 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#(or (not (< (mod (+ 19 main_~x~0) 4294967296) 268435455)) (< (mod (+ 19 main_~x~0) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2201#(or (not (< (mod (+ main_~x~0 18) 4294967296) 268435455)) (< (mod (+ main_~x~0 18) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,017 INFO L290 TraceCheckUtils]: 18: Hoare triple {2208#(or (not (< (mod (+ 19 main_~x~0) 4294967296) 268435455)) (< (mod (+ 19 main_~x~0) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2208#(or (not (< (mod (+ 19 main_~x~0) 4294967296) 268435455)) (< (mod (+ 19 main_~x~0) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,018 INFO L290 TraceCheckUtils]: 17: Hoare triple {2215#(or (< (mod (+ main_~x~0 20) 4294967296) 65520) (not (< (mod (+ main_~x~0 20) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2208#(or (not (< (mod (+ 19 main_~x~0) 4294967296) 268435455)) (< (mod (+ 19 main_~x~0) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,018 INFO L290 TraceCheckUtils]: 16: Hoare triple {2215#(or (< (mod (+ main_~x~0 20) 4294967296) 65520) (not (< (mod (+ main_~x~0 20) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2215#(or (< (mod (+ main_~x~0 20) 4294967296) 65520) (not (< (mod (+ main_~x~0 20) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,019 INFO L290 TraceCheckUtils]: 15: Hoare triple {2222#(or (< (mod (+ main_~x~0 21) 4294967296) 65520) (not (< (mod (+ main_~x~0 21) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2215#(or (< (mod (+ main_~x~0 20) 4294967296) 65520) (not (< (mod (+ main_~x~0 20) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,019 INFO L290 TraceCheckUtils]: 14: Hoare triple {2222#(or (< (mod (+ main_~x~0 21) 4294967296) 65520) (not (< (mod (+ main_~x~0 21) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2222#(or (< (mod (+ main_~x~0 21) 4294967296) 65520) (not (< (mod (+ main_~x~0 21) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,020 INFO L290 TraceCheckUtils]: 13: Hoare triple {2229#(or (not (< (mod (+ main_~x~0 22) 4294967296) 268435455)) (< (mod (+ main_~x~0 22) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2222#(or (< (mod (+ main_~x~0 21) 4294967296) 65520) (not (< (mod (+ main_~x~0 21) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,020 INFO L290 TraceCheckUtils]: 12: Hoare triple {2229#(or (not (< (mod (+ main_~x~0 22) 4294967296) 268435455)) (< (mod (+ main_~x~0 22) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2229#(or (not (< (mod (+ main_~x~0 22) 4294967296) 268435455)) (< (mod (+ main_~x~0 22) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,021 INFO L290 TraceCheckUtils]: 11: Hoare triple {2236#(or (< (mod (+ 23 main_~x~0) 4294967296) 65520) (not (< (mod (+ 23 main_~x~0) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2229#(or (not (< (mod (+ main_~x~0 22) 4294967296) 268435455)) (< (mod (+ main_~x~0 22) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,021 INFO L290 TraceCheckUtils]: 10: Hoare triple {2236#(or (< (mod (+ 23 main_~x~0) 4294967296) 65520) (not (< (mod (+ 23 main_~x~0) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2236#(or (< (mod (+ 23 main_~x~0) 4294967296) 65520) (not (< (mod (+ 23 main_~x~0) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,021 INFO L290 TraceCheckUtils]: 9: Hoare triple {2243#(or (< (mod (+ main_~x~0 24) 4294967296) 65520) (not (< (mod (+ main_~x~0 24) 4294967296) 268435455)))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2236#(or (< (mod (+ 23 main_~x~0) 4294967296) 65520) (not (< (mod (+ 23 main_~x~0) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,022 INFO L290 TraceCheckUtils]: 8: Hoare triple {2243#(or (< (mod (+ main_~x~0 24) 4294967296) 65520) (not (< (mod (+ main_~x~0 24) 4294967296) 268435455)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2243#(or (< (mod (+ main_~x~0 24) 4294967296) 65520) (not (< (mod (+ main_~x~0 24) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,022 INFO L290 TraceCheckUtils]: 7: Hoare triple {2250#(or (not (< (mod (+ main_~x~0 25) 4294967296) 268435455)) (< (mod (+ main_~x~0 25) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2243#(or (< (mod (+ main_~x~0 24) 4294967296) 65520) (not (< (mod (+ main_~x~0 24) 4294967296) 268435455)))} is VALID [2022-04-27 16:11:26,022 INFO L290 TraceCheckUtils]: 6: Hoare triple {2250#(or (not (< (mod (+ main_~x~0 25) 4294967296) 268435455)) (< (mod (+ main_~x~0 25) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2250#(or (not (< (mod (+ main_~x~0 25) 4294967296) 268435455)) (< (mod (+ main_~x~0 25) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,023 INFO L290 TraceCheckUtils]: 5: Hoare triple {1885#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {2250#(or (not (< (mod (+ main_~x~0 25) 4294967296) 268435455)) (< (mod (+ main_~x~0 25) 4294967296) 65520))} is VALID [2022-04-27 16:11:26,023 INFO L272 TraceCheckUtils]: 4: Hoare triple {1885#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:26,023 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1885#true} {1885#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:26,023 INFO L290 TraceCheckUtils]: 2: Hoare triple {1885#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:26,023 INFO L290 TraceCheckUtils]: 1: Hoare triple {1885#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1885#true} is VALID [2022-04-27 16:11:26,023 INFO L272 TraceCheckUtils]: 0: Hoare triple {1885#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1885#true} is VALID [2022-04-27 16:11:26,024 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 140 proven. 380 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 16:11:26,024 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1012683593] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:11:26,024 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:11:26,024 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 22, 23] total 45 [2022-04-27 16:11:26,024 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126922654] [2022-04-27 16:11:26,024 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:11:26,027 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 57 [2022-04-27 16:11:26,027 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:11:26,028 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:11:26,101 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:11:26,101 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2022-04-27 16:11:26,101 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:11:26,102 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2022-04-27 16:11:26,103 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=543, Invalid=1437, Unknown=0, NotChecked=0, Total=1980 [2022-04-27 16:11:26,103 INFO L87 Difference]: Start difference. First operand 58 states and 69 transitions. Second operand has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:12:26,103 INFO L93 Difference]: Finished difference Result 102 states and 113 transitions. [2022-04-27 16:12:26,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-27 16:12:26,103 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 57 [2022-04-27 16:12:26,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:12:26,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 104 transitions. [2022-04-27 16:12:26,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 104 transitions. [2022-04-27 16:12:26,107 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 104 transitions. [2022-04-27 16:12:26,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:12:26,309 INFO L225 Difference]: With dead ends: 102 [2022-04-27 16:12:26,309 INFO L226 Difference]: Without dead ends: 102 [2022-04-27 16:12:26,311 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 693 ImplicationChecksByTransitivity, 59.3s TimeCoverageRelationStatistics Valid=1705, Invalid=4615, Unknown=0, NotChecked=0, Total=6320 [2022-04-27 16:12:26,311 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 76 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 718 mSolverCounterSat, 203 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 921 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 203 IncrementalHoareTripleChecker+Valid, 718 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 16:12:26,311 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [76 Valid, 119 Invalid, 921 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [203 Valid, 718 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 16:12:26,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2022-04-27 16:12:26,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2022-04-27 16:12:26,314 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:12:26,315 INFO L82 GeneralOperation]: Start isEquivalent. First operand 102 states. Second operand has 102 states, 97 states have (on average 1.1237113402061856) internal successors, (109), 97 states have internal predecessors, (109), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,315 INFO L74 IsIncluded]: Start isIncluded. First operand 102 states. Second operand has 102 states, 97 states have (on average 1.1237113402061856) internal successors, (109), 97 states have internal predecessors, (109), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,315 INFO L87 Difference]: Start difference. First operand 102 states. Second operand has 102 states, 97 states have (on average 1.1237113402061856) internal successors, (109), 97 states have internal predecessors, (109), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:12:26,318 INFO L93 Difference]: Finished difference Result 102 states and 113 transitions. [2022-04-27 16:12:26,318 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 113 transitions. [2022-04-27 16:12:26,318 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:12:26,318 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:12:26,318 INFO L74 IsIncluded]: Start isIncluded. First operand has 102 states, 97 states have (on average 1.1237113402061856) internal successors, (109), 97 states have internal predecessors, (109), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 102 states. [2022-04-27 16:12:26,319 INFO L87 Difference]: Start difference. First operand has 102 states, 97 states have (on average 1.1237113402061856) internal successors, (109), 97 states have internal predecessors, (109), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 102 states. [2022-04-27 16:12:26,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:12:26,322 INFO L93 Difference]: Finished difference Result 102 states and 113 transitions. [2022-04-27 16:12:26,322 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 113 transitions. [2022-04-27 16:12:26,322 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:12:26,322 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:12:26,322 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:12:26,322 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:12:26,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 97 states have (on average 1.1237113402061856) internal successors, (109), 97 states have internal predecessors, (109), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 113 transitions. [2022-04-27 16:12:26,325 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 113 transitions. Word has length 57 [2022-04-27 16:12:26,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:12:26,325 INFO L495 AbstractCegarLoop]: Abstraction has 102 states and 113 transitions. [2022-04-27 16:12:26,325 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 45 states have (on average 2.088888888888889) internal successors, (94), 44 states have internal predecessors, (94), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:26,325 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 113 transitions. [2022-04-27 16:12:26,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2022-04-27 16:12:26,326 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 16:12:26,326 INFO L195 NwaCegarLoop]: trace histogram [45, 35, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 16:12:26,342 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 16:12:26,532 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:12:26,532 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 16:12:26,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 16:12:26,533 INFO L85 PathProgramCache]: Analyzing trace with hash -759620958, now seen corresponding path program 6 times [2022-04-27 16:12:26,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 16:12:26,533 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030672396] [2022-04-27 16:12:26,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 16:12:26,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 16:12:26,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:12:27,378 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 16:12:27,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:12:27,386 INFO L290 TraceCheckUtils]: 0: Hoare triple {2793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2752#true} is VALID [2022-04-27 16:12:27,387 INFO L290 TraceCheckUtils]: 1: Hoare triple {2752#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:27,387 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2752#true} {2752#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:27,387 INFO L272 TraceCheckUtils]: 0: Hoare triple {2752#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 16:12:27,387 INFO L290 TraceCheckUtils]: 1: Hoare triple {2793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2752#true} is VALID [2022-04-27 16:12:27,387 INFO L290 TraceCheckUtils]: 2: Hoare triple {2752#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:27,387 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2752#true} {2752#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:27,387 INFO L272 TraceCheckUtils]: 4: Hoare triple {2752#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:27,388 INFO L290 TraceCheckUtils]: 5: Hoare triple {2752#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {2757#(= main_~x~0 0)} is VALID [2022-04-27 16:12:27,388 INFO L290 TraceCheckUtils]: 6: Hoare triple {2757#(= main_~x~0 0)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2757#(= main_~x~0 0)} is VALID [2022-04-27 16:12:27,388 INFO L290 TraceCheckUtils]: 7: Hoare triple {2757#(= main_~x~0 0)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2758#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:12:27,389 INFO L290 TraceCheckUtils]: 8: Hoare triple {2758#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2758#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-27 16:12:27,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {2758#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2759#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:12:27,390 INFO L290 TraceCheckUtils]: 10: Hoare triple {2759#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2759#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 16:12:27,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {2759#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2760#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:12:27,391 INFO L290 TraceCheckUtils]: 12: Hoare triple {2760#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2760#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-27 16:12:27,391 INFO L290 TraceCheckUtils]: 13: Hoare triple {2760#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2761#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:12:27,391 INFO L290 TraceCheckUtils]: 14: Hoare triple {2761#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2761#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 16:12:27,392 INFO L290 TraceCheckUtils]: 15: Hoare triple {2761#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2762#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:12:27,392 INFO L290 TraceCheckUtils]: 16: Hoare triple {2762#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2762#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-27 16:12:27,392 INFO L290 TraceCheckUtils]: 17: Hoare triple {2762#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2763#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:12:27,393 INFO L290 TraceCheckUtils]: 18: Hoare triple {2763#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2763#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 16:12:27,393 INFO L290 TraceCheckUtils]: 19: Hoare triple {2763#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2764#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:12:27,393 INFO L290 TraceCheckUtils]: 20: Hoare triple {2764#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2764#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-27 16:12:27,394 INFO L290 TraceCheckUtils]: 21: Hoare triple {2764#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2765#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:12:27,394 INFO L290 TraceCheckUtils]: 22: Hoare triple {2765#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2765#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 16:12:27,395 INFO L290 TraceCheckUtils]: 23: Hoare triple {2765#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2766#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:12:27,395 INFO L290 TraceCheckUtils]: 24: Hoare triple {2766#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2766#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-27 16:12:27,396 INFO L290 TraceCheckUtils]: 25: Hoare triple {2766#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2767#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:12:27,396 INFO L290 TraceCheckUtils]: 26: Hoare triple {2767#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2767#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 16:12:27,397 INFO L290 TraceCheckUtils]: 27: Hoare triple {2767#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2768#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:12:27,398 INFO L290 TraceCheckUtils]: 28: Hoare triple {2768#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2768#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-27 16:12:27,398 INFO L290 TraceCheckUtils]: 29: Hoare triple {2768#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2769#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:12:27,398 INFO L290 TraceCheckUtils]: 30: Hoare triple {2769#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2769#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 16:12:27,399 INFO L290 TraceCheckUtils]: 31: Hoare triple {2769#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2770#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:12:27,399 INFO L290 TraceCheckUtils]: 32: Hoare triple {2770#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2770#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-27 16:12:27,400 INFO L290 TraceCheckUtils]: 33: Hoare triple {2770#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2771#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:12:27,400 INFO L290 TraceCheckUtils]: 34: Hoare triple {2771#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2771#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 16:12:27,400 INFO L290 TraceCheckUtils]: 35: Hoare triple {2771#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2772#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:12:27,401 INFO L290 TraceCheckUtils]: 36: Hoare triple {2772#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2772#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-27 16:12:27,401 INFO L290 TraceCheckUtils]: 37: Hoare triple {2772#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2773#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:12:27,401 INFO L290 TraceCheckUtils]: 38: Hoare triple {2773#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2773#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 16:12:27,402 INFO L290 TraceCheckUtils]: 39: Hoare triple {2773#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2774#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:12:27,402 INFO L290 TraceCheckUtils]: 40: Hoare triple {2774#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2774#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-27 16:12:27,402 INFO L290 TraceCheckUtils]: 41: Hoare triple {2774#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2775#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:12:27,403 INFO L290 TraceCheckUtils]: 42: Hoare triple {2775#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2775#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 16:12:27,403 INFO L290 TraceCheckUtils]: 43: Hoare triple {2775#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2776#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:12:27,404 INFO L290 TraceCheckUtils]: 44: Hoare triple {2776#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2776#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-27 16:12:27,404 INFO L290 TraceCheckUtils]: 45: Hoare triple {2776#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2777#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:12:27,404 INFO L290 TraceCheckUtils]: 46: Hoare triple {2777#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2777#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 16:12:27,405 INFO L290 TraceCheckUtils]: 47: Hoare triple {2777#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2778#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:12:27,406 INFO L290 TraceCheckUtils]: 48: Hoare triple {2778#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2778#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-27 16:12:27,406 INFO L290 TraceCheckUtils]: 49: Hoare triple {2778#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2779#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:12:27,406 INFO L290 TraceCheckUtils]: 50: Hoare triple {2779#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2779#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 16:12:27,407 INFO L290 TraceCheckUtils]: 51: Hoare triple {2779#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2780#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:12:27,407 INFO L290 TraceCheckUtils]: 52: Hoare triple {2780#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2780#(and (<= 23 main_~x~0) (<= main_~x~0 23))} is VALID [2022-04-27 16:12:27,408 INFO L290 TraceCheckUtils]: 53: Hoare triple {2780#(and (<= 23 main_~x~0) (<= main_~x~0 23))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2781#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:12:27,408 INFO L290 TraceCheckUtils]: 54: Hoare triple {2781#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2781#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 16:12:27,408 INFO L290 TraceCheckUtils]: 55: Hoare triple {2781#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2782#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:12:27,409 INFO L290 TraceCheckUtils]: 56: Hoare triple {2782#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2782#(and (<= main_~x~0 25) (<= 25 main_~x~0))} is VALID [2022-04-27 16:12:27,409 INFO L290 TraceCheckUtils]: 57: Hoare triple {2782#(and (<= main_~x~0 25) (<= 25 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2783#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:12:27,409 INFO L290 TraceCheckUtils]: 58: Hoare triple {2783#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2783#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 16:12:27,410 INFO L290 TraceCheckUtils]: 59: Hoare triple {2783#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2784#(and (<= 27 main_~x~0) (<= main_~x~0 27))} is VALID [2022-04-27 16:12:27,410 INFO L290 TraceCheckUtils]: 60: Hoare triple {2784#(and (<= 27 main_~x~0) (<= main_~x~0 27))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2784#(and (<= 27 main_~x~0) (<= main_~x~0 27))} is VALID [2022-04-27 16:12:27,410 INFO L290 TraceCheckUtils]: 61: Hoare triple {2784#(and (<= 27 main_~x~0) (<= main_~x~0 27))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2785#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:12:27,411 INFO L290 TraceCheckUtils]: 62: Hoare triple {2785#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2785#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 16:12:27,411 INFO L290 TraceCheckUtils]: 63: Hoare triple {2785#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2786#(and (<= main_~x~0 29) (<= 29 main_~x~0))} is VALID [2022-04-27 16:12:27,411 INFO L290 TraceCheckUtils]: 64: Hoare triple {2786#(and (<= main_~x~0 29) (<= 29 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2786#(and (<= main_~x~0 29) (<= 29 main_~x~0))} is VALID [2022-04-27 16:12:27,412 INFO L290 TraceCheckUtils]: 65: Hoare triple {2786#(and (<= main_~x~0 29) (<= 29 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2787#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 16:12:27,412 INFO L290 TraceCheckUtils]: 66: Hoare triple {2787#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2787#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 16:12:27,413 INFO L290 TraceCheckUtils]: 67: Hoare triple {2787#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2788#(and (<= 31 main_~x~0) (<= main_~x~0 31))} is VALID [2022-04-27 16:12:27,413 INFO L290 TraceCheckUtils]: 68: Hoare triple {2788#(and (<= 31 main_~x~0) (<= main_~x~0 31))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2788#(and (<= 31 main_~x~0) (<= main_~x~0 31))} is VALID [2022-04-27 16:12:27,417 INFO L290 TraceCheckUtils]: 69: Hoare triple {2788#(and (<= 31 main_~x~0) (<= main_~x~0 31))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2789#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 16:12:27,417 INFO L290 TraceCheckUtils]: 70: Hoare triple {2789#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2789#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 16:12:27,418 INFO L290 TraceCheckUtils]: 71: Hoare triple {2789#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2790#(and (<= main_~x~0 33) (<= 33 main_~x~0))} is VALID [2022-04-27 16:12:27,418 INFO L290 TraceCheckUtils]: 72: Hoare triple {2790#(and (<= main_~x~0 33) (<= 33 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2790#(and (<= main_~x~0 33) (<= 33 main_~x~0))} is VALID [2022-04-27 16:12:27,419 INFO L290 TraceCheckUtils]: 73: Hoare triple {2790#(and (<= main_~x~0 33) (<= 33 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2791#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 16:12:27,419 INFO L290 TraceCheckUtils]: 74: Hoare triple {2791#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2791#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 16:12:27,419 INFO L290 TraceCheckUtils]: 75: Hoare triple {2791#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2792#(and (<= main_~x~0 35) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 76: Hoare triple {2792#(and (<= main_~x~0 35) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2792#(and (<= main_~x~0 35) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 77: Hoare triple {2792#(and (<= main_~x~0 35) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 78: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 79: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 80: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 81: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 82: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,420 INFO L290 TraceCheckUtils]: 83: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 84: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 85: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 86: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 87: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 88: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 89: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 90: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 91: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 92: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 93: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 94: Hoare triple {2753#false} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 95: Hoare triple {2753#false} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 96: Hoare triple {2753#false} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L272 TraceCheckUtils]: 97: Hoare triple {2753#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2753#false} is VALID [2022-04-27 16:12:27,421 INFO L290 TraceCheckUtils]: 98: Hoare triple {2753#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2753#false} is VALID [2022-04-27 16:12:27,422 INFO L290 TraceCheckUtils]: 99: Hoare triple {2753#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,422 INFO L290 TraceCheckUtils]: 100: Hoare triple {2753#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:27,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 684 proven. 1260 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2022-04-27 16:12:27,430 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 16:12:27,430 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030672396] [2022-04-27 16:12:27,430 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030672396] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 16:12:27,430 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [932225988] [2022-04-27 16:12:27,430 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 16:12:27,430 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:12:27,430 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 16:12:27,431 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 16:12:27,432 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 16:12:39,957 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2022-04-27 16:12:39,958 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 16:12:39,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 65 conjunts are in the unsatisfiable core [2022-04-27 16:12:40,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 16:12:40,249 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 16:12:41,869 INFO L272 TraceCheckUtils]: 0: Hoare triple {2752#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,883 INFO L290 TraceCheckUtils]: 1: Hoare triple {2752#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 2: Hoare triple {2752#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2752#true} {2752#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L272 TraceCheckUtils]: 4: Hoare triple {2752#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 5: Hoare triple {2752#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 6: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 7: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 9: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,884 INFO L290 TraceCheckUtils]: 10: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 11: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 12: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 13: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 14: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 15: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 16: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 17: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 18: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 19: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 20: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 21: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 22: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 23: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,885 INFO L290 TraceCheckUtils]: 24: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 25: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 26: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 27: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 28: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 29: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 30: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 31: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 32: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 33: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 34: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 35: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 36: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 37: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,886 INFO L290 TraceCheckUtils]: 38: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,891 INFO L290 TraceCheckUtils]: 39: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,891 INFO L290 TraceCheckUtils]: 40: Hoare triple {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,891 INFO L290 TraceCheckUtils]: 41: Hoare triple {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2921#(< (mod (+ main_~x~0 4294967294) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,892 INFO L290 TraceCheckUtils]: 42: Hoare triple {2921#(< (mod (+ main_~x~0 4294967294) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2921#(< (mod (+ main_~x~0 4294967294) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,893 INFO L290 TraceCheckUtils]: 43: Hoare triple {2921#(< (mod (+ main_~x~0 4294967294) 4294967296) 65520)} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2928#(and (< (mod (+ main_~x~0 4294967293) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,893 INFO L290 TraceCheckUtils]: 44: Hoare triple {2928#(and (< (mod (+ main_~x~0 4294967293) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2928#(and (< (mod (+ main_~x~0 4294967293) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,912 INFO L290 TraceCheckUtils]: 45: Hoare triple {2928#(and (< (mod (+ main_~x~0 4294967293) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2935#(and (< (mod (+ main_~x~0 4294967295) 4294967296) 65520) (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,913 INFO L290 TraceCheckUtils]: 46: Hoare triple {2935#(and (< (mod (+ main_~x~0 4294967295) 4294967296) 65520) (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2935#(and (< (mod (+ main_~x~0 4294967295) 4294967296) 65520) (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,915 INFO L290 TraceCheckUtils]: 47: Hoare triple {2935#(and (< (mod (+ main_~x~0 4294967295) 4294967296) 65520) (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2942#(and (< (mod (+ 4294967291 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,915 INFO L290 TraceCheckUtils]: 48: Hoare triple {2942#(and (< (mod (+ 4294967291 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2942#(and (< (mod (+ 4294967291 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,926 INFO L290 TraceCheckUtils]: 49: Hoare triple {2942#(and (< (mod (+ 4294967291 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2949#(and (< (mod (+ 4294967290 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,926 INFO L290 TraceCheckUtils]: 50: Hoare triple {2949#(and (< (mod (+ 4294967290 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2949#(and (< (mod (+ 4294967290 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,927 INFO L290 TraceCheckUtils]: 51: Hoare triple {2949#(and (< (mod (+ 4294967290 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2956#(and (< (mod (+ main_~x~0 4294967289) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,928 INFO L290 TraceCheckUtils]: 52: Hoare triple {2956#(and (< (mod (+ main_~x~0 4294967289) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2956#(and (< (mod (+ main_~x~0 4294967289) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,930 INFO L290 TraceCheckUtils]: 53: Hoare triple {2956#(and (< (mod (+ main_~x~0 4294967289) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2963#(and (< (mod (+ 4294967288 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,930 INFO L290 TraceCheckUtils]: 54: Hoare triple {2963#(and (< (mod (+ 4294967288 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2963#(and (< (mod (+ 4294967288 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,934 INFO L290 TraceCheckUtils]: 55: Hoare triple {2963#(and (< (mod (+ 4294967288 main_~x~0) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2970#(and (< (mod (+ main_~x~0 4294967287) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,935 INFO L290 TraceCheckUtils]: 56: Hoare triple {2970#(and (< (mod (+ main_~x~0 4294967287) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2970#(and (< (mod (+ main_~x~0 4294967287) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,953 INFO L290 TraceCheckUtils]: 57: Hoare triple {2970#(and (< (mod (+ main_~x~0 4294967287) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2977#(and (< (mod (+ main_~x~0 4294967286) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 58: Hoare triple {2977#(and (< (mod (+ main_~x~0 4294967286) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2977#(and (< (mod (+ main_~x~0 4294967286) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 59: Hoare triple {2977#(and (< (mod (+ main_~x~0 4294967286) 4294967296) 65520) (< (mod (+ main_~x~0 4294967295) 4294967296) 65520))} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 60: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 61: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 62: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 63: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 64: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 65: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 66: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 67: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,954 INFO L290 TraceCheckUtils]: 68: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,955 INFO L290 TraceCheckUtils]: 69: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,955 INFO L290 TraceCheckUtils]: 70: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,955 INFO L290 TraceCheckUtils]: 71: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,955 INFO L290 TraceCheckUtils]: 72: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,955 INFO L290 TraceCheckUtils]: 73: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:41,955 INFO L290 TraceCheckUtils]: 74: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:41,957 INFO L290 TraceCheckUtils]: 75: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,957 INFO L290 TraceCheckUtils]: 76: Hoare triple {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,958 INFO L290 TraceCheckUtils]: 77: Hoare triple {2914#(< (mod (+ main_~x~0 4294967295) 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3038#(< (mod (+ main_~x~0 4294967293) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,958 INFO L290 TraceCheckUtils]: 78: Hoare triple {3038#(< (mod (+ main_~x~0 4294967293) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3038#(< (mod (+ main_~x~0 4294967293) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,960 INFO L290 TraceCheckUtils]: 79: Hoare triple {3038#(< (mod (+ main_~x~0 4294967293) 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3045#(< (mod (+ 4294967291 main_~x~0) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,960 INFO L290 TraceCheckUtils]: 80: Hoare triple {3045#(< (mod (+ 4294967291 main_~x~0) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3045#(< (mod (+ 4294967291 main_~x~0) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,960 INFO L290 TraceCheckUtils]: 81: Hoare triple {3045#(< (mod (+ 4294967291 main_~x~0) 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3052#(< (mod (+ main_~x~0 4294967289) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,961 INFO L290 TraceCheckUtils]: 82: Hoare triple {3052#(< (mod (+ main_~x~0 4294967289) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3052#(< (mod (+ main_~x~0 4294967289) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,961 INFO L290 TraceCheckUtils]: 83: Hoare triple {3052#(< (mod (+ main_~x~0 4294967289) 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3059#(< (mod (+ main_~x~0 4294967287) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,965 INFO L290 TraceCheckUtils]: 84: Hoare triple {3059#(< (mod (+ main_~x~0 4294967287) 4294967296) 65520)} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3059#(< (mod (+ main_~x~0 4294967287) 4294967296) 65520)} is VALID [2022-04-27 16:12:41,970 INFO L290 TraceCheckUtils]: 85: Hoare triple {3059#(< (mod (+ main_~x~0 4294967287) 4294967296) 65520)} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3066#(and (< (mod (+ main_~x~0 4294967285) 4294967296) 65520) (not (< (mod (+ main_~x~0 4294967294) 4294967296) 65520)))} is VALID [2022-04-27 16:12:41,971 INFO L290 TraceCheckUtils]: 86: Hoare triple {3066#(and (< (mod (+ main_~x~0 4294967285) 4294967296) 65520) (not (< (mod (+ main_~x~0 4294967294) 4294967296) 65520)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3066#(and (< (mod (+ main_~x~0 4294967285) 4294967296) 65520) (not (< (mod (+ main_~x~0 4294967294) 4294967296) 65520)))} is VALID [2022-04-27 16:12:41,973 INFO L290 TraceCheckUtils]: 87: Hoare triple {3066#(and (< (mod (+ main_~x~0 4294967285) 4294967296) 65520) (not (< (mod (+ main_~x~0 4294967294) 4294967296) 65520)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3073#(and (< (mod (+ 4294967283 main_~x~0) 4294967296) 65520) (not (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520)))} is VALID [2022-04-27 16:12:41,973 INFO L290 TraceCheckUtils]: 88: Hoare triple {3073#(and (< (mod (+ 4294967283 main_~x~0) 4294967296) 65520) (not (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3073#(and (< (mod (+ 4294967283 main_~x~0) 4294967296) 65520) (not (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520)))} is VALID [2022-04-27 16:12:41,974 INFO L290 TraceCheckUtils]: 89: Hoare triple {3073#(and (< (mod (+ 4294967283 main_~x~0) 4294967296) 65520) (not (< (mod (+ 4294967292 main_~x~0) 4294967296) 65520)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3080#(and (<= 65520 (mod (+ 4294967290 main_~x~0) 4294967296)) (< (mod (+ main_~x~0 4294967281) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,974 INFO L290 TraceCheckUtils]: 90: Hoare triple {3080#(and (<= 65520 (mod (+ 4294967290 main_~x~0) 4294967296)) (< (mod (+ main_~x~0 4294967281) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3080#(and (<= 65520 (mod (+ 4294967290 main_~x~0) 4294967296)) (< (mod (+ main_~x~0 4294967281) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,975 INFO L290 TraceCheckUtils]: 91: Hoare triple {3080#(and (<= 65520 (mod (+ 4294967290 main_~x~0) 4294967296)) (< (mod (+ main_~x~0 4294967281) 4294967296) 65520))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3087#(and (< (mod (+ main_~x~0 4294967279) 4294967296) 65520) (<= 65520 (mod (+ 4294967288 main_~x~0) 4294967296)))} is VALID [2022-04-27 16:12:41,975 INFO L290 TraceCheckUtils]: 92: Hoare triple {3087#(and (< (mod (+ main_~x~0 4294967279) 4294967296) 65520) (<= 65520 (mod (+ 4294967288 main_~x~0) 4294967296)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3087#(and (< (mod (+ main_~x~0 4294967279) 4294967296) 65520) (<= 65520 (mod (+ 4294967288 main_~x~0) 4294967296)))} is VALID [2022-04-27 16:12:41,984 INFO L290 TraceCheckUtils]: 93: Hoare triple {3087#(and (< (mod (+ main_~x~0 4294967279) 4294967296) 65520) (<= 65520 (mod (+ 4294967288 main_~x~0) 4294967296)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3094#(and (<= 65520 (mod (+ main_~x~0 4294967286) 4294967296)) (< (mod (+ main_~x~0 4294967277) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,984 INFO L290 TraceCheckUtils]: 94: Hoare triple {3094#(and (<= 65520 (mod (+ main_~x~0 4294967286) 4294967296)) (< (mod (+ main_~x~0 4294967277) 4294967296) 65520))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3094#(and (<= 65520 (mod (+ main_~x~0 4294967286) 4294967296)) (< (mod (+ main_~x~0 4294967277) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,985 INFO L290 TraceCheckUtils]: 95: Hoare triple {3094#(and (<= 65520 (mod (+ main_~x~0 4294967286) 4294967296)) (< (mod (+ main_~x~0 4294967277) 4294967296) 65520))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3101#(and (<= 65520 (mod (+ main_~x~0 4294967284) 4294967296)) (< (mod (+ 4294967275 main_~x~0) 4294967296) 65520))} is VALID [2022-04-27 16:12:41,991 INFO L290 TraceCheckUtils]: 96: Hoare triple {3101#(and (<= 65520 (mod (+ main_~x~0 4294967284) 4294967296)) (< (mod (+ 4294967275 main_~x~0) 4294967296) 65520))} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:41,991 INFO L272 TraceCheckUtils]: 97: Hoare triple {2753#false} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2753#false} is VALID [2022-04-27 16:12:41,991 INFO L290 TraceCheckUtils]: 98: Hoare triple {2753#false} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2753#false} is VALID [2022-04-27 16:12:41,991 INFO L290 TraceCheckUtils]: 99: Hoare triple {2753#false} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:41,991 INFO L290 TraceCheckUtils]: 100: Hoare triple {2753#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:41,992 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 953 proven. 470 refuted. 0 times theorem prover too weak. 602 trivial. 0 not checked. [2022-04-27 16:12:41,992 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 16:12:45,007 INFO L290 TraceCheckUtils]: 100: Hoare triple {2753#false} [61] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:45,008 INFO L290 TraceCheckUtils]: 99: Hoare triple {3120#(not (<= __VERIFIER_assert_~cond 0))} [59] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2753#false} is VALID [2022-04-27 16:12:45,008 INFO L290 TraceCheckUtils]: 98: Hoare triple {3124#(< 0 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3120#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 16:12:45,009 INFO L272 TraceCheckUtils]: 97: Hoare triple {3128#(= (mod main_~x~0 2) 0)} [54] L15-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_9} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3124#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 16:12:45,009 INFO L290 TraceCheckUtils]: 96: Hoare triple {3132#(or (< (mod main_~x~0 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [52] L16-2-->L15-2: Formula: (not (< (mod v_main_~x~0_8 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_8} OutVars{main_~x~0=v_main_~x~0_8} AuxVars[] AssignedVars[] {3128#(= (mod main_~x~0 2) 0)} is VALID [2022-04-27 16:12:45,010 INFO L290 TraceCheckUtils]: 95: Hoare triple {3136#(or (< (mod (+ main_~x~0 2) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3132#(or (< (mod main_~x~0 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,010 INFO L290 TraceCheckUtils]: 94: Hoare triple {3140#(or (not (< (mod main_~x~0 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3136#(or (< (mod (+ main_~x~0 2) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,011 INFO L290 TraceCheckUtils]: 93: Hoare triple {3144#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 4) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3140#(or (not (< (mod main_~x~0 4294967296) 268435455)) (< (mod (+ main_~x~0 2) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,012 INFO L290 TraceCheckUtils]: 92: Hoare triple {3144#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 4) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3144#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 4) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,013 INFO L290 TraceCheckUtils]: 91: Hoare triple {3151#(or (<= 268435455 (mod (+ main_~x~0 4) 4294967296)) (< (mod (+ main_~x~0 6) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3144#(or (not (< (mod (+ main_~x~0 2) 4294967296) 268435455)) (< (mod (+ main_~x~0 4) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,013 INFO L290 TraceCheckUtils]: 90: Hoare triple {3151#(or (<= 268435455 (mod (+ main_~x~0 4) 4294967296)) (< (mod (+ main_~x~0 6) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3151#(or (<= 268435455 (mod (+ main_~x~0 4) 4294967296)) (< (mod (+ main_~x~0 6) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,014 INFO L290 TraceCheckUtils]: 89: Hoare triple {3158#(or (<= 268435455 (mod (+ main_~x~0 6) 4294967296)) (< (mod (+ main_~x~0 8) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3151#(or (<= 268435455 (mod (+ main_~x~0 4) 4294967296)) (< (mod (+ main_~x~0 6) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,014 INFO L290 TraceCheckUtils]: 88: Hoare triple {3158#(or (<= 268435455 (mod (+ main_~x~0 6) 4294967296)) (< (mod (+ main_~x~0 8) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3158#(or (<= 268435455 (mod (+ main_~x~0 6) 4294967296)) (< (mod (+ main_~x~0 8) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,015 INFO L290 TraceCheckUtils]: 87: Hoare triple {3165#(or (<= 268435455 (mod (+ main_~x~0 8) 4294967296)) (< (mod (+ main_~x~0 10) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3158#(or (<= 268435455 (mod (+ main_~x~0 6) 4294967296)) (< (mod (+ main_~x~0 8) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,016 INFO L290 TraceCheckUtils]: 86: Hoare triple {3165#(or (<= 268435455 (mod (+ main_~x~0 8) 4294967296)) (< (mod (+ main_~x~0 10) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3165#(or (<= 268435455 (mod (+ main_~x~0 8) 4294967296)) (< (mod (+ main_~x~0 10) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,017 INFO L290 TraceCheckUtils]: 85: Hoare triple {3172#(or (<= 268435455 (mod (+ main_~x~0 10) 4294967296)) (< (mod (+ main_~x~0 12) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3165#(or (<= 268435455 (mod (+ main_~x~0 8) 4294967296)) (< (mod (+ main_~x~0 10) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,017 INFO L290 TraceCheckUtils]: 84: Hoare triple {3172#(or (<= 268435455 (mod (+ main_~x~0 10) 4294967296)) (< (mod (+ main_~x~0 12) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3172#(or (<= 268435455 (mod (+ main_~x~0 10) 4294967296)) (< (mod (+ main_~x~0 12) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,018 INFO L290 TraceCheckUtils]: 83: Hoare triple {3179#(or (<= 268435455 (mod (+ main_~x~0 12) 4294967296)) (< (mod (+ main_~x~0 14) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3172#(or (<= 268435455 (mod (+ main_~x~0 10) 4294967296)) (< (mod (+ main_~x~0 12) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,018 INFO L290 TraceCheckUtils]: 82: Hoare triple {3179#(or (<= 268435455 (mod (+ main_~x~0 12) 4294967296)) (< (mod (+ main_~x~0 14) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3179#(or (<= 268435455 (mod (+ main_~x~0 12) 4294967296)) (< (mod (+ main_~x~0 14) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,019 INFO L290 TraceCheckUtils]: 81: Hoare triple {3186#(or (<= 268435455 (mod (+ main_~x~0 14) 4294967296)) (< (mod (+ main_~x~0 16) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3179#(or (<= 268435455 (mod (+ main_~x~0 12) 4294967296)) (< (mod (+ main_~x~0 14) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,020 INFO L290 TraceCheckUtils]: 80: Hoare triple {3186#(or (<= 268435455 (mod (+ main_~x~0 14) 4294967296)) (< (mod (+ main_~x~0 16) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3186#(or (<= 268435455 (mod (+ main_~x~0 14) 4294967296)) (< (mod (+ main_~x~0 16) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,021 INFO L290 TraceCheckUtils]: 79: Hoare triple {3193#(or (< (mod (+ main_~x~0 18) 4294967296) 268435455) (<= 268435455 (mod (+ main_~x~0 16) 4294967296)) (= (mod main_~x~0 2) 0))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3186#(or (<= 268435455 (mod (+ main_~x~0 14) 4294967296)) (< (mod (+ main_~x~0 16) 4294967296) 268435455) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,021 INFO L290 TraceCheckUtils]: 78: Hoare triple {3193#(or (< (mod (+ main_~x~0 18) 4294967296) 268435455) (<= 268435455 (mod (+ main_~x~0 16) 4294967296)) (= (mod main_~x~0 2) 0))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3193#(or (< (mod (+ main_~x~0 18) 4294967296) 268435455) (<= 268435455 (mod (+ main_~x~0 16) 4294967296)) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,022 INFO L290 TraceCheckUtils]: 77: Hoare triple {3200#(or (< (mod (+ main_~x~0 20) 4294967296) 268435455) (= (mod main_~x~0 2) 0) (<= 268435455 (mod (+ main_~x~0 18) 4294967296)))} [56] L16-->L16-2: Formula: (and (= v_main_~x~0_4 (+ v_main_~x~0_5 2)) (not (< (mod v_main_~x~0_5 4294967296) 65520))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {3193#(or (< (mod (+ main_~x~0 18) 4294967296) 268435455) (<= 268435455 (mod (+ main_~x~0 16) 4294967296)) (= (mod main_~x~0 2) 0))} is VALID [2022-04-27 16:12:45,022 INFO L290 TraceCheckUtils]: 76: Hoare triple {3200#(or (< (mod (+ main_~x~0 20) 4294967296) 268435455) (= (mod main_~x~0 2) 0) (<= 268435455 (mod (+ main_~x~0 18) 4294967296)))} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {3200#(or (< (mod (+ main_~x~0 20) 4294967296) 268435455) (= (mod main_~x~0 2) 0) (<= 268435455 (mod (+ main_~x~0 18) 4294967296)))} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 75: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {3200#(or (< (mod (+ main_~x~0 20) 4294967296) 268435455) (= (mod main_~x~0 2) 0) (<= 268435455 (mod (+ main_~x~0 18) 4294967296)))} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 74: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 73: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 72: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 71: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 70: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 69: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,024 INFO L290 TraceCheckUtils]: 68: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 67: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 66: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 65: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 64: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 63: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 62: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 61: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 60: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 59: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 58: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 57: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 56: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 55: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,025 INFO L290 TraceCheckUtils]: 54: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 53: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 52: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 51: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 50: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 49: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 48: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 47: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 46: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 45: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 44: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 43: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 42: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 41: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,026 INFO L290 TraceCheckUtils]: 40: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 39: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 38: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 37: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 36: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 35: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 34: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 33: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 32: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 31: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 30: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 29: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 28: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 27: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,027 INFO L290 TraceCheckUtils]: 26: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 25: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 24: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 23: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 22: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 21: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 20: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 19: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 18: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 17: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 16: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 13: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 10: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 9: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 8: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 7: Hoare triple {2752#true} [55] L16-->L16-2: Formula: (and (< (mod v_main_~x~0_3 4294967296) 65520) (= (+ v_main_~x~0_3 1) v_main_~x~0_2)) InVars {main_~x~0=v_main_~x~0_3} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post4=|v_main_#t~post4_1|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 6: Hoare triple {2752#true} [53] L16-2-->L16: Formula: (< (mod v_main_~x~0_1 4294967296) 268435455) InVars {main_~x~0=v_main_~x~0_1} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 5: Hoare triple {2752#true} [49] mainENTRY-->L16-2: Formula: (= v_main_~x~0_6 0) InVars {} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[main_~x~0] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L272 TraceCheckUtils]: 4: Hoare triple {2752#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2752#true} {2752#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 2: Hoare triple {2752#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L290 TraceCheckUtils]: 1: Hoare triple {2752#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2752#true} is VALID [2022-04-27 16:12:45,029 INFO L272 TraceCheckUtils]: 0: Hoare triple {2752#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2752#true} is VALID [2022-04-27 16:12:45,030 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 735 proven. 100 refuted. 0 times theorem prover too weak. 1190 trivial. 0 not checked. [2022-04-27 16:12:45,030 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [932225988] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 16:12:45,030 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 16:12:45,030 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 22, 17] total 74 [2022-04-27 16:12:45,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030910911] [2022-04-27 16:12:45,033 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 16:12:45,035 INFO L78 Accepts]: Start accepts. Automaton has has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 101 [2022-04-27 16:12:45,059 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 16:12:45,060 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:12:45,394 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 156 edges. 156 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:12:45,394 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 74 states [2022-04-27 16:12:45,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 16:12:45,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2022-04-27 16:12:45,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1358, Invalid=4044, Unknown=0, NotChecked=0, Total=5402 [2022-04-27 16:12:45,396 INFO L87 Difference]: Start difference. First operand 102 states and 113 transitions. Second operand has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:13:02,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:13:02,595 INFO L93 Difference]: Finished difference Result 165 states and 187 transitions. [2022-04-27 16:13:02,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-04-27 16:13:02,596 INFO L78 Accepts]: Start accepts. Automaton has has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 101 [2022-04-27 16:13:02,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 16:13:02,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:13:02,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 148 transitions. [2022-04-27 16:13:02,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:13:02,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 148 transitions. [2022-04-27 16:13:02,610 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 62 states and 148 transitions. [2022-04-27 16:13:02,963 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 148 edges. 148 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 16:13:02,964 INFO L225 Difference]: With dead ends: 165 [2022-04-27 16:13:02,964 INFO L226 Difference]: Without dead ends: 0 [2022-04-27 16:13:02,967 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 312 GetRequests, 179 SyntacticMatches, 2 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2423 ImplicationChecksByTransitivity, 15.6s TimeCoverageRelationStatistics Valid=3276, Invalid=14280, Unknown=0, NotChecked=0, Total=17556 [2022-04-27 16:13:02,967 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 186 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 2887 mSolverCounterSat, 301 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 186 SdHoareTripleChecker+Valid, 104 SdHoareTripleChecker+Invalid, 3188 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 301 IncrementalHoareTripleChecker+Valid, 2887 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.6s IncrementalHoareTripleChecker+Time [2022-04-27 16:13:02,968 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [186 Valid, 104 Invalid, 3188 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [301 Valid, 2887 Invalid, 0 Unknown, 0 Unchecked, 2.6s Time] [2022-04-27 16:13:02,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-04-27 16:13:02,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-04-27 16:13:02,968 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 16:13:02,968 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:13:02,968 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:13:02,968 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:13:02,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:13:02,968 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:13:02,968 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:13:02,968 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:13:02,969 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:13:02,969 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:13:02,969 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-27 16:13:02,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 16:13:02,969 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-27 16:13:02,969 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:13:02,969 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:13:02,969 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 16:13:02,969 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 16:13:02,969 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 16:13:02,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-27 16:13:02,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-04-27 16:13:02,969 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 101 [2022-04-27 16:13:02,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 16:13:02,969 INFO L495 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-04-27 16:13:02,970 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 74 states, 73 states have (on average 2.0547945205479454) internal successors, (150), 72 states have internal predecessors, (150), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 16:13:02,970 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-27 16:13:02,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 16:13:02,972 INFO L805 garLoopResultBuilder]: Registering result SAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 16:13:02,981 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 16:13:03,181 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 16:13:03,184 INFO L356 BasicCegarLoop]: Path program histogram: [6, 1, 1, 1] [2022-04-27 16:13:03,185 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 16:13:03,187 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 04:13:03 BasicIcfg [2022-04-27 16:13:03,187 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 16:13:03,187 INFO L158 Benchmark]: Toolchain (without parser) took 118428.32ms. Allocated memory was 195.0MB in the beginning and 293.6MB in the end (delta: 98.6MB). Free memory was 142.6MB in the beginning and 206.7MB in the end (delta: -64.1MB). Peak memory consumption was 34.5MB. Max. memory is 8.0GB. [2022-04-27 16:13:03,187 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 195.0MB. Free memory is still 158.7MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 16:13:03,188 INFO L158 Benchmark]: CACSL2BoogieTranslator took 176.36ms. Allocated memory is still 195.0MB. Free memory was 173.6MB in the beginning and 171.0MB in the end (delta: 2.6MB). Peak memory consumption was 7.3MB. Max. memory is 8.0GB. [2022-04-27 16:13:03,188 INFO L158 Benchmark]: Boogie Preprocessor took 17.04ms. Allocated memory is still 195.0MB. Free memory was 171.0MB in the beginning and 169.6MB in the end (delta: 1.4MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 16:13:03,188 INFO L158 Benchmark]: RCFGBuilder took 188.04ms. Allocated memory is still 195.0MB. Free memory was 169.6MB in the beginning and 159.1MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. [2022-04-27 16:13:03,188 INFO L158 Benchmark]: IcfgTransformer took 15.86ms. Allocated memory is still 195.0MB. Free memory was 158.8MB in the beginning and 157.7MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 16:13:03,188 INFO L158 Benchmark]: TraceAbstraction took 118006.13ms. Allocated memory was 195.0MB in the beginning and 293.6MB in the end (delta: 98.6MB). Free memory was 157.0MB in the beginning and 206.7MB in the end (delta: -49.7MB). Peak memory consumption was 49.6MB. Max. memory is 8.0GB. [2022-04-27 16:13:03,189 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 195.0MB. Free memory is still 158.7MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 176.36ms. Allocated memory is still 195.0MB. Free memory was 173.6MB in the beginning and 171.0MB in the end (delta: 2.6MB). Peak memory consumption was 7.3MB. Max. memory is 8.0GB. * Boogie Preprocessor took 17.04ms. Allocated memory is still 195.0MB. Free memory was 171.0MB in the beginning and 169.6MB in the end (delta: 1.4MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 188.04ms. Allocated memory is still 195.0MB. Free memory was 169.6MB in the beginning and 159.1MB in the end (delta: 10.5MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. * IcfgTransformer took 15.86ms. Allocated memory is still 195.0MB. Free memory was 158.8MB in the beginning and 157.7MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 118006.13ms. Allocated memory was 195.0MB in the beginning and 293.6MB in the end (delta: 98.6MB). Free memory was 157.0MB in the beginning and 206.7MB in the end (delta: -49.7MB). Peak memory consumption was 49.6MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 7]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 118.0s, OverallIterations: 9, TraceHistogramMax: 45, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 89.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 418 SdHoareTripleChecker+Valid, 4.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 417 mSDsluCounter, 515 SdHoareTripleChecker+Invalid, 4.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 409 mSDsCounter, 850 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 4550 IncrementalHoareTripleChecker+Invalid, 5400 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 850 mSolverCounterUnsat, 106 mSDtfsCounter, 4550 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 843 GetRequests, 485 SyntacticMatches, 12 SemanticMatches, 346 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3623 ImplicationChecksByTransitivity, 84.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=102occurred in iteration=8, InterpolantAutomatonStates: 179, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 9 MinimizatonAttempts, 32 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 14.1s SatisfiabilityAnalysisTime, 11.3s InterpolantComputationTime, 580 NumberOfCodeBlocks, 560 NumberOfCodeBlocksAsserted, 86 NumberOfCheckSat, 836 ConstructedInterpolants, 0 QuantifiedInterpolants, 4190 SizeOfPredicates, 6 NumberOfNonLiveVariables, 721 ConjunctsInSsa, 172 ConjunctsInUnsatCore, 23 InterpolantComputations, 2 PerfectInterpolantSequences, 5210/8715 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2022-04-27 16:13:03,209 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...