/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/locks/test_locks_13.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 20:29:40,255 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 20:29:40,257 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 20:29:40,312 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 20:29:40,313 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 20:29:40,314 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 20:29:40,314 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 20:29:40,315 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 20:29:40,316 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 20:29:40,317 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 20:29:40,318 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 20:29:40,318 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 20:29:40,318 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 20:29:40,322 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 20:29:40,322 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 20:29:40,324 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 20:29:40,325 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 20:29:40,328 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 20:29:40,330 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 20:29:40,331 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 20:29:40,331 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 20:29:40,332 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 20:29:40,333 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 20:29:40,333 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 20:29:40,334 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 20:29:40,335 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 20:29:40,340 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 20:29:40,341 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 20:29:40,349 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 20:29:40,351 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 20:29:40,361 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 20:29:40,362 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 20:29:40,362 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 20:29:40,363 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 20:29:40,364 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 20:29:40,364 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 20:29:40,364 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 20:29:40,364 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 20:29:40,364 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 20:29:40,364 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 20:29:40,364 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 20:29:40,364 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 20:29:40,365 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 20:29:40,365 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 20:29:40,518 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 20:29:40,553 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 20:29:40,555 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 20:29:40,555 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 20:29:40,556 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 20:29:40,557 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_13.c [2022-04-27 20:29:40,600 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/eeeeba60e/677aa8f240ff4a1f8d8b02858443a9d7/FLAG55b7b807a [2022-04-27 20:29:40,960 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 20:29:40,960 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_13.c [2022-04-27 20:29:40,968 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/eeeeba60e/677aa8f240ff4a1f8d8b02858443a9d7/FLAG55b7b807a [2022-04-27 20:29:40,977 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/eeeeba60e/677aa8f240ff4a1f8d8b02858443a9d7 [2022-04-27 20:29:40,978 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 20:29:40,979 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 20:29:40,980 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 20:29:40,980 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 20:29:40,983 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 20:29:40,986 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 08:29:40" (1/1) ... [2022-04-27 20:29:40,987 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@396b31c6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:40, skipping insertion in model container [2022-04-27 20:29:40,988 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 08:29:40" (1/1) ... [2022-04-27 20:29:40,992 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 20:29:41,012 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 20:29:41,196 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_13.c[4936,4949] [2022-04-27 20:29:41,199 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 20:29:41,213 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 20:29:41,247 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_13.c[4936,4949] [2022-04-27 20:29:41,248 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 20:29:41,259 INFO L208 MainTranslator]: Completed translation [2022-04-27 20:29:41,259 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41 WrapperNode [2022-04-27 20:29:41,259 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 20:29:41,260 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 20:29:41,260 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 20:29:41,260 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 20:29:41,267 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,267 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,278 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,278 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,292 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,297 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,298 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,301 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 20:29:41,302 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 20:29:41,303 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 20:29:41,303 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 20:29:41,303 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,308 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 20:29:41,315 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 20:29:41,324 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 20:29:41,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 20:29:41,351 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 20:29:41,351 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 20:29:41,351 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 20:29:41,351 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 20:29:41,352 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 20:29:41,352 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 20:29:41,352 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 20:29:41,352 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 20:29:41,352 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 20:29:41,352 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 20:29:41,353 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 20:29:41,353 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 20:29:41,353 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 20:29:41,353 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 20:29:41,354 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 20:29:41,355 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 20:29:41,418 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 20:29:41,419 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 20:29:41,613 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 20:29:41,625 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 20:29:41,625 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 20:29:41,626 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:29:41 BoogieIcfgContainer [2022-04-27 20:29:41,626 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 20:29:41,627 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 20:29:41,627 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 20:29:41,631 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 20:29:41,633 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:29:41" (1/1) ... [2022-04-27 20:29:41,635 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 20:29:41,662 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 08:29:41 BasicIcfg [2022-04-27 20:29:41,662 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 20:29:41,663 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 20:29:41,663 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 20:29:41,665 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 20:29:41,665 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 08:29:40" (1/4) ... [2022-04-27 20:29:41,666 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6793d713 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 08:29:41, skipping insertion in model container [2022-04-27 20:29:41,666 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:41" (2/4) ... [2022-04-27 20:29:41,666 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6793d713 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 08:29:41, skipping insertion in model container [2022-04-27 20:29:41,666 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:29:41" (3/4) ... [2022-04-27 20:29:41,666 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6793d713 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 08:29:41, skipping insertion in model container [2022-04-27 20:29:41,666 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 08:29:41" (4/4) ... [2022-04-27 20:29:41,679 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_13.cJordan [2022-04-27 20:29:41,688 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 20:29:41,688 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 20:29:41,724 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 20:29:41,730 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@3d3881a3, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@12bdecf5 [2022-04-27 20:29:41,730 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 20:29:41,736 INFO L276 IsEmpty]: Start isEmpty. Operand has 54 states, 48 states have (on average 1.8958333333333333) internal successors, (91), 49 states have internal predecessors, (91), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 20:29:41,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 20:29:41,741 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:41,741 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:41,741 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:41,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:41,746 INFO L85 PathProgramCache]: Analyzing trace with hash -1381361359, now seen corresponding path program 1 times [2022-04-27 20:29:41,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:41,753 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410161313] [2022-04-27 20:29:41,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:41,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:41,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:41,943 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:41,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:41,965 INFO L290 TraceCheckUtils]: 0: Hoare triple {63#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {57#true} is VALID [2022-04-27 20:29:41,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {57#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57#true} is VALID [2022-04-27 20:29:41,965 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57#true} {57#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57#true} is VALID [2022-04-27 20:29:41,971 INFO L272 TraceCheckUtils]: 0: Hoare triple {57#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {63#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:41,971 INFO L290 TraceCheckUtils]: 1: Hoare triple {63#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {57#true} is VALID [2022-04-27 20:29:41,971 INFO L290 TraceCheckUtils]: 2: Hoare triple {57#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57#true} is VALID [2022-04-27 20:29:41,972 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57#true} {57#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57#true} is VALID [2022-04-27 20:29:41,972 INFO L272 TraceCheckUtils]: 4: Hoare triple {57#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57#true} is VALID [2022-04-27 20:29:41,972 INFO L290 TraceCheckUtils]: 5: Hoare triple {57#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {57#true} is VALID [2022-04-27 20:29:41,972 INFO L290 TraceCheckUtils]: 6: Hoare triple {57#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {57#true} is VALID [2022-04-27 20:29:41,973 INFO L290 TraceCheckUtils]: 7: Hoare triple {57#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {57#true} is VALID [2022-04-27 20:29:41,983 INFO L290 TraceCheckUtils]: 8: Hoare triple {57#true} [267] L83-->L83-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,984 INFO L290 TraceCheckUtils]: 9: Hoare triple {62#(= main_~lk1~0 1)} [269] L83-2-->L87-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,984 INFO L290 TraceCheckUtils]: 10: Hoare triple {62#(= main_~lk1~0 1)} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,985 INFO L290 TraceCheckUtils]: 11: Hoare triple {62#(= main_~lk1~0 1)} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {62#(= main_~lk1~0 1)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,986 INFO L290 TraceCheckUtils]: 13: Hoare triple {62#(= main_~lk1~0 1)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,986 INFO L290 TraceCheckUtils]: 14: Hoare triple {62#(= main_~lk1~0 1)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,987 INFO L290 TraceCheckUtils]: 15: Hoare triple {62#(= main_~lk1~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,987 INFO L290 TraceCheckUtils]: 16: Hoare triple {62#(= main_~lk1~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:41,988 INFO L290 TraceCheckUtils]: 17: Hoare triple {62#(= main_~lk1~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:42,007 INFO L290 TraceCheckUtils]: 18: Hoare triple {62#(= main_~lk1~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:42,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {62#(= main_~lk1~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:42,009 INFO L290 TraceCheckUtils]: 20: Hoare triple {62#(= main_~lk1~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:42,009 INFO L290 TraceCheckUtils]: 21: Hoare triple {62#(= main_~lk1~0 1)} [293] L131-1-->L138: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {62#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:42,010 INFO L290 TraceCheckUtils]: 22: Hoare triple {62#(= main_~lk1~0 1)} [295] L138-->L198-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {58#false} is VALID [2022-04-27 20:29:42,010 INFO L290 TraceCheckUtils]: 23: Hoare triple {58#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {58#false} is VALID [2022-04-27 20:29:42,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:42,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:42,011 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410161313] [2022-04-27 20:29:42,011 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410161313] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:42,012 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:42,012 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:42,013 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [682370921] [2022-04-27 20:29:42,013 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:42,017 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 20:29:42,018 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:42,020 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,044 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:42,044 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:42,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:42,057 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:42,058 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:42,060 INFO L87 Difference]: Start difference. First operand has 54 states, 48 states have (on average 1.8958333333333333) internal successors, (91), 49 states have internal predecessors, (91), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:42,404 INFO L93 Difference]: Finished difference Result 99 states and 174 transitions. [2022-04-27 20:29:42,405 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:42,406 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 20:29:42,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:42,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 181 transitions. [2022-04-27 20:29:42,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 181 transitions. [2022-04-27 20:29:42,428 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 181 transitions. [2022-04-27 20:29:42,565 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 181 edges. 181 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:42,578 INFO L225 Difference]: With dead ends: 99 [2022-04-27 20:29:42,578 INFO L226 Difference]: Without dead ends: 91 [2022-04-27 20:29:42,580 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:42,582 INFO L413 NwaCegarLoop]: 98 mSDtfsCounter, 225 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 225 SdHoareTripleChecker+Valid, 107 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:42,582 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [225 Valid, 107 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:42,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-04-27 20:29:42,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 63. [2022-04-27 20:29:42,603 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:42,604 INFO L82 GeneralOperation]: Start isEquivalent. First operand 91 states. Second operand has 63 states, 59 states have (on average 1.88135593220339) internal successors, (111), 59 states have internal predecessors, (111), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,604 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand has 63 states, 59 states have (on average 1.88135593220339) internal successors, (111), 59 states have internal predecessors, (111), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,605 INFO L87 Difference]: Start difference. First operand 91 states. Second operand has 63 states, 59 states have (on average 1.88135593220339) internal successors, (111), 59 states have internal predecessors, (111), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:42,609 INFO L93 Difference]: Finished difference Result 91 states and 165 transitions. [2022-04-27 20:29:42,610 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 165 transitions. [2022-04-27 20:29:42,610 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:42,610 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:42,611 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 59 states have (on average 1.88135593220339) internal successors, (111), 59 states have internal predecessors, (111), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 91 states. [2022-04-27 20:29:42,621 INFO L87 Difference]: Start difference. First operand has 63 states, 59 states have (on average 1.88135593220339) internal successors, (111), 59 states have internal predecessors, (111), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 91 states. [2022-04-27 20:29:42,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:42,627 INFO L93 Difference]: Finished difference Result 91 states and 165 transitions. [2022-04-27 20:29:42,627 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 165 transitions. [2022-04-27 20:29:42,628 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:42,628 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:42,628 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:42,628 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:42,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 59 states have (on average 1.88135593220339) internal successors, (111), 59 states have internal predecessors, (111), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 114 transitions. [2022-04-27 20:29:42,631 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 114 transitions. Word has length 24 [2022-04-27 20:29:42,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:42,634 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 114 transitions. [2022-04-27 20:29:42,634 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,634 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 114 transitions. [2022-04-27 20:29:42,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 20:29:42,634 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:42,635 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:42,635 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 20:29:42,635 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:42,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:42,635 INFO L85 PathProgramCache]: Analyzing trace with hash -1891895536, now seen corresponding path program 1 times [2022-04-27 20:29:42,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:42,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034850590] [2022-04-27 20:29:42,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:42,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:42,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:42,702 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:42,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:42,728 INFO L290 TraceCheckUtils]: 0: Hoare triple {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {413#true} is VALID [2022-04-27 20:29:42,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {413#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-27 20:29:42,729 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {413#true} {413#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-27 20:29:42,729 INFO L272 TraceCheckUtils]: 0: Hoare triple {413#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:42,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {413#true} is VALID [2022-04-27 20:29:42,730 INFO L290 TraceCheckUtils]: 2: Hoare triple {413#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-27 20:29:42,730 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {413#true} {413#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-27 20:29:42,731 INFO L272 TraceCheckUtils]: 4: Hoare triple {413#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-27 20:29:42,731 INFO L290 TraceCheckUtils]: 5: Hoare triple {413#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {413#true} is VALID [2022-04-27 20:29:42,732 INFO L290 TraceCheckUtils]: 6: Hoare triple {413#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {413#true} is VALID [2022-04-27 20:29:42,732 INFO L290 TraceCheckUtils]: 7: Hoare triple {413#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {413#true} is VALID [2022-04-27 20:29:42,732 INFO L290 TraceCheckUtils]: 8: Hoare triple {413#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,733 INFO L290 TraceCheckUtils]: 9: Hoare triple {418#(= main_~p1~0 0)} [269] L83-2-->L87-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,734 INFO L290 TraceCheckUtils]: 10: Hoare triple {418#(= main_~p1~0 0)} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,735 INFO L290 TraceCheckUtils]: 11: Hoare triple {418#(= main_~p1~0 0)} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,735 INFO L290 TraceCheckUtils]: 12: Hoare triple {418#(= main_~p1~0 0)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,735 INFO L290 TraceCheckUtils]: 13: Hoare triple {418#(= main_~p1~0 0)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,736 INFO L290 TraceCheckUtils]: 14: Hoare triple {418#(= main_~p1~0 0)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,736 INFO L290 TraceCheckUtils]: 15: Hoare triple {418#(= main_~p1~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,736 INFO L290 TraceCheckUtils]: 16: Hoare triple {418#(= main_~p1~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,737 INFO L290 TraceCheckUtils]: 17: Hoare triple {418#(= main_~p1~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,737 INFO L290 TraceCheckUtils]: 18: Hoare triple {418#(= main_~p1~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,740 INFO L290 TraceCheckUtils]: 19: Hoare triple {418#(= main_~p1~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,741 INFO L290 TraceCheckUtils]: 20: Hoare triple {418#(= main_~p1~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {418#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:42,741 INFO L290 TraceCheckUtils]: 21: Hoare triple {418#(= main_~p1~0 0)} [293] L131-1-->L138: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {414#false} is VALID [2022-04-27 20:29:42,741 INFO L290 TraceCheckUtils]: 22: Hoare triple {414#false} [295] L138-->L198-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {414#false} is VALID [2022-04-27 20:29:42,742 INFO L290 TraceCheckUtils]: 23: Hoare triple {414#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {414#false} is VALID [2022-04-27 20:29:42,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:42,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:42,742 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034850590] [2022-04-27 20:29:42,742 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2034850590] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:42,742 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:42,742 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:42,743 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [688663917] [2022-04-27 20:29:42,743 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:42,744 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 20:29:42,744 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:42,744 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,758 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:42,758 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:42,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:42,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:42,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:42,763 INFO L87 Difference]: Start difference. First operand 63 states and 114 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:42,983 INFO L93 Difference]: Finished difference Result 91 states and 163 transitions. [2022-04-27 20:29:42,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:42,983 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 20:29:42,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:42,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-27 20:29:42,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:42,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-27 20:29:42,989 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 165 transitions. [2022-04-27 20:29:43,118 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:43,120 INFO L225 Difference]: With dead ends: 91 [2022-04-27 20:29:43,120 INFO L226 Difference]: Without dead ends: 91 [2022-04-27 20:29:43,120 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:43,121 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 193 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 193 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:43,121 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [193 Valid, 119 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:43,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-04-27 20:29:43,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 89. [2022-04-27 20:29:43,125 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:43,126 INFO L82 GeneralOperation]: Start isEquivalent. First operand 91 states. Second operand has 89 states, 85 states have (on average 1.8705882352941177) internal successors, (159), 85 states have internal predecessors, (159), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,126 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand has 89 states, 85 states have (on average 1.8705882352941177) internal successors, (159), 85 states have internal predecessors, (159), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,126 INFO L87 Difference]: Start difference. First operand 91 states. Second operand has 89 states, 85 states have (on average 1.8705882352941177) internal successors, (159), 85 states have internal predecessors, (159), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:43,129 INFO L93 Difference]: Finished difference Result 91 states and 163 transitions. [2022-04-27 20:29:43,129 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 163 transitions. [2022-04-27 20:29:43,130 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:43,130 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:43,130 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 85 states have (on average 1.8705882352941177) internal successors, (159), 85 states have internal predecessors, (159), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 91 states. [2022-04-27 20:29:43,131 INFO L87 Difference]: Start difference. First operand has 89 states, 85 states have (on average 1.8705882352941177) internal successors, (159), 85 states have internal predecessors, (159), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 91 states. [2022-04-27 20:29:43,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:43,133 INFO L93 Difference]: Finished difference Result 91 states and 163 transitions. [2022-04-27 20:29:43,134 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 163 transitions. [2022-04-27 20:29:43,134 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:43,134 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:43,134 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:43,134 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:43,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 85 states have (on average 1.8705882352941177) internal successors, (159), 85 states have internal predecessors, (159), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 162 transitions. [2022-04-27 20:29:43,137 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 162 transitions. Word has length 24 [2022-04-27 20:29:43,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:43,137 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 162 transitions. [2022-04-27 20:29:43,137 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,138 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 162 transitions. [2022-04-27 20:29:43,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 20:29:43,138 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:43,138 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:43,138 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 20:29:43,139 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:43,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:43,139 INFO L85 PathProgramCache]: Analyzing trace with hash 127502905, now seen corresponding path program 1 times [2022-04-27 20:29:43,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:43,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620082825] [2022-04-27 20:29:43,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:43,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:43,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:43,198 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:43,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:43,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {787#true} is VALID [2022-04-27 20:29:43,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {787#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {787#true} is VALID [2022-04-27 20:29:43,204 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {787#true} {787#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {787#true} is VALID [2022-04-27 20:29:43,204 INFO L272 TraceCheckUtils]: 0: Hoare triple {787#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:43,205 INFO L290 TraceCheckUtils]: 1: Hoare triple {793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {787#true} is VALID [2022-04-27 20:29:43,205 INFO L290 TraceCheckUtils]: 2: Hoare triple {787#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {787#true} is VALID [2022-04-27 20:29:43,205 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {787#true} {787#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {787#true} is VALID [2022-04-27 20:29:43,205 INFO L272 TraceCheckUtils]: 4: Hoare triple {787#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {787#true} is VALID [2022-04-27 20:29:43,205 INFO L290 TraceCheckUtils]: 5: Hoare triple {787#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {787#true} is VALID [2022-04-27 20:29:43,206 INFO L290 TraceCheckUtils]: 6: Hoare triple {787#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {787#true} is VALID [2022-04-27 20:29:43,206 INFO L290 TraceCheckUtils]: 7: Hoare triple {787#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {787#true} is VALID [2022-04-27 20:29:43,206 INFO L290 TraceCheckUtils]: 8: Hoare triple {787#true} [267] L83-->L83-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,207 INFO L290 TraceCheckUtils]: 9: Hoare triple {792#(not (= main_~p1~0 0))} [269] L83-2-->L87-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,207 INFO L290 TraceCheckUtils]: 10: Hoare triple {792#(not (= main_~p1~0 0))} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,207 INFO L290 TraceCheckUtils]: 11: Hoare triple {792#(not (= main_~p1~0 0))} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,208 INFO L290 TraceCheckUtils]: 12: Hoare triple {792#(not (= main_~p1~0 0))} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,208 INFO L290 TraceCheckUtils]: 13: Hoare triple {792#(not (= main_~p1~0 0))} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,211 INFO L290 TraceCheckUtils]: 14: Hoare triple {792#(not (= main_~p1~0 0))} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,211 INFO L290 TraceCheckUtils]: 15: Hoare triple {792#(not (= main_~p1~0 0))} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,212 INFO L290 TraceCheckUtils]: 16: Hoare triple {792#(not (= main_~p1~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,212 INFO L290 TraceCheckUtils]: 17: Hoare triple {792#(not (= main_~p1~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,212 INFO L290 TraceCheckUtils]: 18: Hoare triple {792#(not (= main_~p1~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,213 INFO L290 TraceCheckUtils]: 19: Hoare triple {792#(not (= main_~p1~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,213 INFO L290 TraceCheckUtils]: 20: Hoare triple {792#(not (= main_~p1~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {792#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:43,214 INFO L290 TraceCheckUtils]: 21: Hoare triple {792#(not (= main_~p1~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {788#false} is VALID [2022-04-27 20:29:43,214 INFO L290 TraceCheckUtils]: 22: Hoare triple {788#false} [297] L137-1-->L143: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {788#false} is VALID [2022-04-27 20:29:43,214 INFO L290 TraceCheckUtils]: 23: Hoare triple {788#false} [301] L143-->L198-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {788#false} is VALID [2022-04-27 20:29:43,214 INFO L290 TraceCheckUtils]: 24: Hoare triple {788#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#false} is VALID [2022-04-27 20:29:43,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:43,215 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:43,215 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620082825] [2022-04-27 20:29:43,215 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [620082825] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:43,215 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:43,215 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:43,216 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344056591] [2022-04-27 20:29:43,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:43,216 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:43,216 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:43,216 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,231 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:43,231 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:43,231 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:43,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:43,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:43,232 INFO L87 Difference]: Start difference. First operand 89 states and 162 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:43,434 INFO L93 Difference]: Finished difference Result 94 states and 165 transitions. [2022-04-27 20:29:43,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:43,434 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:43,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:43,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-27 20:29:43,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-27 20:29:43,438 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 164 transitions. [2022-04-27 20:29:43,566 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:43,567 INFO L225 Difference]: With dead ends: 94 [2022-04-27 20:29:43,567 INFO L226 Difference]: Without dead ends: 94 [2022-04-27 20:29:43,568 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:43,568 INFO L413 NwaCegarLoop]: 136 mSDtfsCounter, 170 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 170 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:43,569 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [170 Valid, 143 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:43,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-27 20:29:43,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 92. [2022-04-27 20:29:43,572 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:43,573 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 92 states, 88 states have (on average 1.8295454545454546) internal successors, (161), 88 states have internal predecessors, (161), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,573 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 92 states, 88 states have (on average 1.8295454545454546) internal successors, (161), 88 states have internal predecessors, (161), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,573 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 92 states, 88 states have (on average 1.8295454545454546) internal successors, (161), 88 states have internal predecessors, (161), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:43,576 INFO L93 Difference]: Finished difference Result 94 states and 165 transitions. [2022-04-27 20:29:43,576 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 165 transitions. [2022-04-27 20:29:43,576 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:43,577 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:43,577 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 88 states have (on average 1.8295454545454546) internal successors, (161), 88 states have internal predecessors, (161), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-27 20:29:43,577 INFO L87 Difference]: Start difference. First operand has 92 states, 88 states have (on average 1.8295454545454546) internal successors, (161), 88 states have internal predecessors, (161), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-27 20:29:43,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:43,580 INFO L93 Difference]: Finished difference Result 94 states and 165 transitions. [2022-04-27 20:29:43,580 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 165 transitions. [2022-04-27 20:29:43,580 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:43,580 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:43,580 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:43,580 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:43,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 88 states have (on average 1.8295454545454546) internal successors, (161), 88 states have internal predecessors, (161), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 164 transitions. [2022-04-27 20:29:43,583 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 164 transitions. Word has length 25 [2022-04-27 20:29:43,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:43,583 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 164 transitions. [2022-04-27 20:29:43,583 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,583 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 164 transitions. [2022-04-27 20:29:43,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 20:29:43,584 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:43,584 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:43,584 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 20:29:43,584 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:43,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:43,585 INFO L85 PathProgramCache]: Analyzing trace with hash 1480812602, now seen corresponding path program 1 times [2022-04-27 20:29:43,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:43,586 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129656306] [2022-04-27 20:29:43,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:43,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:43,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:43,621 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:43,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:43,626 INFO L290 TraceCheckUtils]: 0: Hoare triple {1179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1173#true} is VALID [2022-04-27 20:29:43,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {1173#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1173#true} is VALID [2022-04-27 20:29:43,626 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1173#true} {1173#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1173#true} is VALID [2022-04-27 20:29:43,626 INFO L272 TraceCheckUtils]: 0: Hoare triple {1173#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:43,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {1179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1173#true} is VALID [2022-04-27 20:29:43,627 INFO L290 TraceCheckUtils]: 2: Hoare triple {1173#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1173#true} is VALID [2022-04-27 20:29:43,627 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1173#true} {1173#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1173#true} is VALID [2022-04-27 20:29:43,627 INFO L272 TraceCheckUtils]: 4: Hoare triple {1173#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1173#true} is VALID [2022-04-27 20:29:43,627 INFO L290 TraceCheckUtils]: 5: Hoare triple {1173#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1173#true} is VALID [2022-04-27 20:29:43,628 INFO L290 TraceCheckUtils]: 6: Hoare triple {1173#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {1173#true} is VALID [2022-04-27 20:29:43,628 INFO L290 TraceCheckUtils]: 7: Hoare triple {1173#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1173#true} is VALID [2022-04-27 20:29:43,628 INFO L290 TraceCheckUtils]: 8: Hoare triple {1173#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1173#true} is VALID [2022-04-27 20:29:43,628 INFO L290 TraceCheckUtils]: 9: Hoare triple {1173#true} [269] L83-2-->L87-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,628 INFO L290 TraceCheckUtils]: 10: Hoare triple {1178#(= main_~lk2~0 1)} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,629 INFO L290 TraceCheckUtils]: 11: Hoare triple {1178#(= main_~lk2~0 1)} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,629 INFO L290 TraceCheckUtils]: 12: Hoare triple {1178#(= main_~lk2~0 1)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,629 INFO L290 TraceCheckUtils]: 13: Hoare triple {1178#(= main_~lk2~0 1)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,630 INFO L290 TraceCheckUtils]: 14: Hoare triple {1178#(= main_~lk2~0 1)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,630 INFO L290 TraceCheckUtils]: 15: Hoare triple {1178#(= main_~lk2~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,630 INFO L290 TraceCheckUtils]: 16: Hoare triple {1178#(= main_~lk2~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,631 INFO L290 TraceCheckUtils]: 17: Hoare triple {1178#(= main_~lk2~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,631 INFO L290 TraceCheckUtils]: 18: Hoare triple {1178#(= main_~lk2~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,631 INFO L290 TraceCheckUtils]: 19: Hoare triple {1178#(= main_~lk2~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,632 INFO L290 TraceCheckUtils]: 20: Hoare triple {1178#(= main_~lk2~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,632 INFO L290 TraceCheckUtils]: 21: Hoare triple {1178#(= main_~lk2~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,632 INFO L290 TraceCheckUtils]: 22: Hoare triple {1178#(= main_~lk2~0 1)} [297] L137-1-->L143: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1178#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:43,633 INFO L290 TraceCheckUtils]: 23: Hoare triple {1178#(= main_~lk2~0 1)} [301] L143-->L198-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1174#false} is VALID [2022-04-27 20:29:43,633 INFO L290 TraceCheckUtils]: 24: Hoare triple {1174#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1174#false} is VALID [2022-04-27 20:29:43,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:43,633 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:43,633 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129656306] [2022-04-27 20:29:43,633 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2129656306] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:43,634 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:43,634 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:43,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163197083] [2022-04-27 20:29:43,634 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:43,634 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:43,634 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:43,635 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,647 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:43,647 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:43,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:43,648 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:43,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:43,648 INFO L87 Difference]: Start difference. First operand 92 states and 164 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:43,850 INFO L93 Difference]: Finished difference Result 171 states and 310 transitions. [2022-04-27 20:29:43,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:43,850 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:43,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:43,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:43,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:43,854 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-27 20:29:43,974 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:43,976 INFO L225 Difference]: With dead ends: 171 [2022-04-27 20:29:43,976 INFO L226 Difference]: Without dead ends: 171 [2022-04-27 20:29:43,977 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:43,984 INFO L413 NwaCegarLoop]: 88 mSDtfsCounter, 212 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:43,985 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 95 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:43,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2022-04-27 20:29:43,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 121. [2022-04-27 20:29:43,993 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:43,994 INFO L82 GeneralOperation]: Start isEquivalent. First operand 171 states. Second operand has 121 states, 117 states have (on average 1.829059829059829) internal successors, (214), 117 states have internal predecessors, (214), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,994 INFO L74 IsIncluded]: Start isIncluded. First operand 171 states. Second operand has 121 states, 117 states have (on average 1.829059829059829) internal successors, (214), 117 states have internal predecessors, (214), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,994 INFO L87 Difference]: Start difference. First operand 171 states. Second operand has 121 states, 117 states have (on average 1.829059829059829) internal successors, (214), 117 states have internal predecessors, (214), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,003 INFO L93 Difference]: Finished difference Result 171 states and 310 transitions. [2022-04-27 20:29:44,003 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 310 transitions. [2022-04-27 20:29:44,004 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,004 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,004 INFO L74 IsIncluded]: Start isIncluded. First operand has 121 states, 117 states have (on average 1.829059829059829) internal successors, (214), 117 states have internal predecessors, (214), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 171 states. [2022-04-27 20:29:44,004 INFO L87 Difference]: Start difference. First operand has 121 states, 117 states have (on average 1.829059829059829) internal successors, (214), 117 states have internal predecessors, (214), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 171 states. [2022-04-27 20:29:44,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,011 INFO L93 Difference]: Finished difference Result 171 states and 310 transitions. [2022-04-27 20:29:44,011 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 310 transitions. [2022-04-27 20:29:44,011 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,011 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,011 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:44,011 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:44,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 117 states have (on average 1.829059829059829) internal successors, (214), 117 states have internal predecessors, (214), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 217 transitions. [2022-04-27 20:29:44,021 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 217 transitions. Word has length 25 [2022-04-27 20:29:44,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:44,022 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 217 transitions. [2022-04-27 20:29:44,022 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,022 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 217 transitions. [2022-04-27 20:29:44,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 20:29:44,022 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:44,022 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:44,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 20:29:44,023 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:44,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:44,023 INFO L85 PathProgramCache]: Analyzing trace with hash 970278425, now seen corresponding path program 1 times [2022-04-27 20:29:44,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:44,023 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659683973] [2022-04-27 20:29:44,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:44,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:44,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,067 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:44,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,071 INFO L290 TraceCheckUtils]: 0: Hoare triple {1825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1819#true} is VALID [2022-04-27 20:29:44,071 INFO L290 TraceCheckUtils]: 1: Hoare triple {1819#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-27 20:29:44,071 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1819#true} {1819#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-27 20:29:44,072 INFO L272 TraceCheckUtils]: 0: Hoare triple {1819#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:44,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {1825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1819#true} is VALID [2022-04-27 20:29:44,072 INFO L290 TraceCheckUtils]: 2: Hoare triple {1819#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-27 20:29:44,072 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1819#true} {1819#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-27 20:29:44,072 INFO L272 TraceCheckUtils]: 4: Hoare triple {1819#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-27 20:29:44,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {1819#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1819#true} is VALID [2022-04-27 20:29:44,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {1819#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {1819#true} is VALID [2022-04-27 20:29:44,073 INFO L290 TraceCheckUtils]: 7: Hoare triple {1819#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1819#true} is VALID [2022-04-27 20:29:44,073 INFO L290 TraceCheckUtils]: 8: Hoare triple {1819#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-27 20:29:44,073 INFO L290 TraceCheckUtils]: 9: Hoare triple {1819#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,073 INFO L290 TraceCheckUtils]: 10: Hoare triple {1824#(= main_~p2~0 0)} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,074 INFO L290 TraceCheckUtils]: 11: Hoare triple {1824#(= main_~p2~0 0)} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,074 INFO L290 TraceCheckUtils]: 12: Hoare triple {1824#(= main_~p2~0 0)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,074 INFO L290 TraceCheckUtils]: 13: Hoare triple {1824#(= main_~p2~0 0)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,075 INFO L290 TraceCheckUtils]: 14: Hoare triple {1824#(= main_~p2~0 0)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,075 INFO L290 TraceCheckUtils]: 15: Hoare triple {1824#(= main_~p2~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,075 INFO L290 TraceCheckUtils]: 16: Hoare triple {1824#(= main_~p2~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,075 INFO L290 TraceCheckUtils]: 17: Hoare triple {1824#(= main_~p2~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,076 INFO L290 TraceCheckUtils]: 18: Hoare triple {1824#(= main_~p2~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,076 INFO L290 TraceCheckUtils]: 19: Hoare triple {1824#(= main_~p2~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,076 INFO L290 TraceCheckUtils]: 20: Hoare triple {1824#(= main_~p2~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,077 INFO L290 TraceCheckUtils]: 21: Hoare triple {1824#(= main_~p2~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1824#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:44,077 INFO L290 TraceCheckUtils]: 22: Hoare triple {1824#(= main_~p2~0 0)} [297] L137-1-->L143: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1820#false} is VALID [2022-04-27 20:29:44,077 INFO L290 TraceCheckUtils]: 23: Hoare triple {1820#false} [301] L143-->L198-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1820#false} is VALID [2022-04-27 20:29:44,077 INFO L290 TraceCheckUtils]: 24: Hoare triple {1820#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1820#false} is VALID [2022-04-27 20:29:44,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:44,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:44,077 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659683973] [2022-04-27 20:29:44,078 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1659683973] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:44,078 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:44,078 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:44,078 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229294785] [2022-04-27 20:29:44,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:44,084 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:44,084 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:44,084 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,097 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,098 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:44,098 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:44,098 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:44,099 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:44,099 INFO L87 Difference]: Start difference. First operand 121 states and 217 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,278 INFO L93 Difference]: Finished difference Result 173 states and 308 transitions. [2022-04-27 20:29:44,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:44,278 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:44,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:44,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-27 20:29:44,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-27 20:29:44,281 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 163 transitions. [2022-04-27 20:29:44,388 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,390 INFO L225 Difference]: With dead ends: 173 [2022-04-27 20:29:44,390 INFO L226 Difference]: Without dead ends: 173 [2022-04-27 20:29:44,391 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:44,393 INFO L413 NwaCegarLoop]: 114 mSDtfsCounter, 187 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 121 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:44,393 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 121 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:44,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2022-04-27 20:29:44,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 171. [2022-04-27 20:29:44,408 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:44,408 INFO L82 GeneralOperation]: Start isEquivalent. First operand 173 states. Second operand has 171 states, 167 states have (on average 1.8203592814371257) internal successors, (304), 167 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,408 INFO L74 IsIncluded]: Start isIncluded. First operand 173 states. Second operand has 171 states, 167 states have (on average 1.8203592814371257) internal successors, (304), 167 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,409 INFO L87 Difference]: Start difference. First operand 173 states. Second operand has 171 states, 167 states have (on average 1.8203592814371257) internal successors, (304), 167 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,412 INFO L93 Difference]: Finished difference Result 173 states and 308 transitions. [2022-04-27 20:29:44,412 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 308 transitions. [2022-04-27 20:29:44,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,413 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,413 INFO L74 IsIncluded]: Start isIncluded. First operand has 171 states, 167 states have (on average 1.8203592814371257) internal successors, (304), 167 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 173 states. [2022-04-27 20:29:44,413 INFO L87 Difference]: Start difference. First operand has 171 states, 167 states have (on average 1.8203592814371257) internal successors, (304), 167 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 173 states. [2022-04-27 20:29:44,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,417 INFO L93 Difference]: Finished difference Result 173 states and 308 transitions. [2022-04-27 20:29:44,417 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 308 transitions. [2022-04-27 20:29:44,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,417 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,417 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:44,417 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:44,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 167 states have (on average 1.8203592814371257) internal successors, (304), 167 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 307 transitions. [2022-04-27 20:29:44,426 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 307 transitions. Word has length 25 [2022-04-27 20:29:44,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:44,426 INFO L495 AbstractCegarLoop]: Abstraction has 171 states and 307 transitions. [2022-04-27 20:29:44,426 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,427 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 307 transitions. [2022-04-27 20:29:44,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:29:44,427 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:44,427 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:44,427 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-27 20:29:44,427 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:44,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:44,428 INFO L85 PathProgramCache]: Analyzing trace with hash -1339417396, now seen corresponding path program 1 times [2022-04-27 20:29:44,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:44,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857331211] [2022-04-27 20:29:44,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:44,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:44,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,457 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:44,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {2527#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2521#true} is VALID [2022-04-27 20:29:44,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {2521#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2521#true} is VALID [2022-04-27 20:29:44,462 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2521#true} {2521#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2521#true} is VALID [2022-04-27 20:29:44,462 INFO L272 TraceCheckUtils]: 0: Hoare triple {2521#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2527#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:44,463 INFO L290 TraceCheckUtils]: 1: Hoare triple {2527#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2521#true} is VALID [2022-04-27 20:29:44,463 INFO L290 TraceCheckUtils]: 2: Hoare triple {2521#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2521#true} is VALID [2022-04-27 20:29:44,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2521#true} {2521#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2521#true} is VALID [2022-04-27 20:29:44,463 INFO L272 TraceCheckUtils]: 4: Hoare triple {2521#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2521#true} is VALID [2022-04-27 20:29:44,463 INFO L290 TraceCheckUtils]: 5: Hoare triple {2521#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2521#true} is VALID [2022-04-27 20:29:44,463 INFO L290 TraceCheckUtils]: 6: Hoare triple {2521#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {2521#true} is VALID [2022-04-27 20:29:44,464 INFO L290 TraceCheckUtils]: 7: Hoare triple {2521#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {2521#true} is VALID [2022-04-27 20:29:44,464 INFO L290 TraceCheckUtils]: 8: Hoare triple {2521#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2521#true} is VALID [2022-04-27 20:29:44,464 INFO L290 TraceCheckUtils]: 9: Hoare triple {2521#true} [269] L83-2-->L87-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,464 INFO L290 TraceCheckUtils]: 10: Hoare triple {2526#(not (= main_~p2~0 0))} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,465 INFO L290 TraceCheckUtils]: 11: Hoare triple {2526#(not (= main_~p2~0 0))} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,465 INFO L290 TraceCheckUtils]: 12: Hoare triple {2526#(not (= main_~p2~0 0))} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,465 INFO L290 TraceCheckUtils]: 13: Hoare triple {2526#(not (= main_~p2~0 0))} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,468 INFO L290 TraceCheckUtils]: 14: Hoare triple {2526#(not (= main_~p2~0 0))} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,468 INFO L290 TraceCheckUtils]: 15: Hoare triple {2526#(not (= main_~p2~0 0))} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,469 INFO L290 TraceCheckUtils]: 16: Hoare triple {2526#(not (= main_~p2~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,469 INFO L290 TraceCheckUtils]: 17: Hoare triple {2526#(not (= main_~p2~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,469 INFO L290 TraceCheckUtils]: 18: Hoare triple {2526#(not (= main_~p2~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,470 INFO L290 TraceCheckUtils]: 19: Hoare triple {2526#(not (= main_~p2~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,470 INFO L290 TraceCheckUtils]: 20: Hoare triple {2526#(not (= main_~p2~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,470 INFO L290 TraceCheckUtils]: 21: Hoare triple {2526#(not (= main_~p2~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2526#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:44,471 INFO L290 TraceCheckUtils]: 22: Hoare triple {2526#(not (= main_~p2~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2522#false} is VALID [2022-04-27 20:29:44,471 INFO L290 TraceCheckUtils]: 23: Hoare triple {2522#false} [303] L142-1-->L148: Formula: (not (= v_main_~p3~0_5 0)) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {2522#false} is VALID [2022-04-27 20:29:44,471 INFO L290 TraceCheckUtils]: 24: Hoare triple {2522#false} [305] L148-->L198-1: Formula: (not (= v_main_~lk3~0_6 1)) InVars {main_~lk3~0=v_main_~lk3~0_6} OutVars{main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[] {2522#false} is VALID [2022-04-27 20:29:44,471 INFO L290 TraceCheckUtils]: 25: Hoare triple {2522#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2522#false} is VALID [2022-04-27 20:29:44,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:44,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:44,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857331211] [2022-04-27 20:29:44,472 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1857331211] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:44,472 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:44,472 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:44,472 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735983035] [2022-04-27 20:29:44,472 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:44,472 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:44,473 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:44,473 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,487 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,487 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:44,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:44,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:44,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:44,488 INFO L87 Difference]: Start difference. First operand 171 states and 307 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,670 INFO L93 Difference]: Finished difference Result 175 states and 308 transitions. [2022-04-27 20:29:44,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:44,670 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:44,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:44,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:44,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:44,673 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-27 20:29:44,789 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,791 INFO L225 Difference]: With dead ends: 175 [2022-04-27 20:29:44,791 INFO L226 Difference]: Without dead ends: 175 [2022-04-27 20:29:44,791 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:44,792 INFO L413 NwaCegarLoop]: 133 mSDtfsCounter, 169 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 140 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:44,792 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [169 Valid, 140 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:44,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2022-04-27 20:29:44,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 173. [2022-04-27 20:29:44,795 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:44,795 INFO L82 GeneralOperation]: Start isEquivalent. First operand 175 states. Second operand has 173 states, 169 states have (on average 1.7988165680473374) internal successors, (304), 169 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,796 INFO L74 IsIncluded]: Start isIncluded. First operand 175 states. Second operand has 173 states, 169 states have (on average 1.7988165680473374) internal successors, (304), 169 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,796 INFO L87 Difference]: Start difference. First operand 175 states. Second operand has 173 states, 169 states have (on average 1.7988165680473374) internal successors, (304), 169 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,808 INFO L93 Difference]: Finished difference Result 175 states and 308 transitions. [2022-04-27 20:29:44,809 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 308 transitions. [2022-04-27 20:29:44,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,809 INFO L74 IsIncluded]: Start isIncluded. First operand has 173 states, 169 states have (on average 1.7988165680473374) internal successors, (304), 169 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 175 states. [2022-04-27 20:29:44,810 INFO L87 Difference]: Start difference. First operand has 173 states, 169 states have (on average 1.7988165680473374) internal successors, (304), 169 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 175 states. [2022-04-27 20:29:44,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,813 INFO L93 Difference]: Finished difference Result 175 states and 308 transitions. [2022-04-27 20:29:44,813 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 308 transitions. [2022-04-27 20:29:44,813 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,813 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,814 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:44,814 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:44,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 173 states, 169 states have (on average 1.7988165680473374) internal successors, (304), 169 states have internal predecessors, (304), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 307 transitions. [2022-04-27 20:29:44,817 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 307 transitions. Word has length 26 [2022-04-27 20:29:44,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:44,817 INFO L495 AbstractCegarLoop]: Abstraction has 173 states and 307 transitions. [2022-04-27 20:29:44,817 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,818 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 307 transitions. [2022-04-27 20:29:44,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:29:44,818 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:44,818 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:44,818 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-27 20:29:44,818 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:44,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:44,818 INFO L85 PathProgramCache]: Analyzing trace with hash 13892301, now seen corresponding path program 1 times [2022-04-27 20:29:44,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:44,819 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094378186] [2022-04-27 20:29:44,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:44,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:44,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,846 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:44,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,849 INFO L290 TraceCheckUtils]: 0: Hoare triple {3237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3231#true} is VALID [2022-04-27 20:29:44,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {3231#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,850 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3231#true} {3231#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,850 INFO L272 TraceCheckUtils]: 0: Hoare triple {3231#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:44,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {3237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3231#true} is VALID [2022-04-27 20:29:44,850 INFO L290 TraceCheckUtils]: 2: Hoare triple {3231#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3231#true} {3231#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {3231#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {3231#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L290 TraceCheckUtils]: 6: Hoare triple {3231#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L290 TraceCheckUtils]: 7: Hoare triple {3231#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L290 TraceCheckUtils]: 8: Hoare triple {3231#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,851 INFO L290 TraceCheckUtils]: 9: Hoare triple {3231#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3231#true} is VALID [2022-04-27 20:29:44,852 INFO L290 TraceCheckUtils]: 10: Hoare triple {3231#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,852 INFO L290 TraceCheckUtils]: 11: Hoare triple {3236#(= main_~p3~0 0)} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,852 INFO L290 TraceCheckUtils]: 12: Hoare triple {3236#(= main_~p3~0 0)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,852 INFO L290 TraceCheckUtils]: 13: Hoare triple {3236#(= main_~p3~0 0)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,853 INFO L290 TraceCheckUtils]: 14: Hoare triple {3236#(= main_~p3~0 0)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,853 INFO L290 TraceCheckUtils]: 15: Hoare triple {3236#(= main_~p3~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,853 INFO L290 TraceCheckUtils]: 16: Hoare triple {3236#(= main_~p3~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,854 INFO L290 TraceCheckUtils]: 17: Hoare triple {3236#(= main_~p3~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,854 INFO L290 TraceCheckUtils]: 18: Hoare triple {3236#(= main_~p3~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,854 INFO L290 TraceCheckUtils]: 19: Hoare triple {3236#(= main_~p3~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,854 INFO L290 TraceCheckUtils]: 20: Hoare triple {3236#(= main_~p3~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,855 INFO L290 TraceCheckUtils]: 21: Hoare triple {3236#(= main_~p3~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,855 INFO L290 TraceCheckUtils]: 22: Hoare triple {3236#(= main_~p3~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3236#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:44,855 INFO L290 TraceCheckUtils]: 23: Hoare triple {3236#(= main_~p3~0 0)} [303] L142-1-->L148: Formula: (not (= v_main_~p3~0_5 0)) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {3232#false} is VALID [2022-04-27 20:29:44,855 INFO L290 TraceCheckUtils]: 24: Hoare triple {3232#false} [305] L148-->L198-1: Formula: (not (= v_main_~lk3~0_6 1)) InVars {main_~lk3~0=v_main_~lk3~0_6} OutVars{main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[] {3232#false} is VALID [2022-04-27 20:29:44,856 INFO L290 TraceCheckUtils]: 25: Hoare triple {3232#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3232#false} is VALID [2022-04-27 20:29:44,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:44,856 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:44,856 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094378186] [2022-04-27 20:29:44,856 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1094378186] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:44,856 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:44,856 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:44,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810174058] [2022-04-27 20:29:44,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:44,857 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:44,857 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:44,857 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,869 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,869 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:44,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:44,870 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:44,870 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:44,870 INFO L87 Difference]: Start difference. First operand 173 states and 307 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,041 INFO L93 Difference]: Finished difference Result 331 states and 584 transitions. [2022-04-27 20:29:45,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:45,041 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:45,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:45,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:45,044 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-27 20:29:45,155 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,159 INFO L225 Difference]: With dead ends: 331 [2022-04-27 20:29:45,159 INFO L226 Difference]: Without dead ends: 331 [2022-04-27 20:29:45,160 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:45,160 INFO L413 NwaCegarLoop]: 91 mSDtfsCounter, 209 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 209 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:45,160 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [209 Valid, 98 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:45,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2022-04-27 20:29:45,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 329. [2022-04-27 20:29:45,165 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:45,165 INFO L82 GeneralOperation]: Start isEquivalent. First operand 331 states. Second operand has 329 states, 325 states have (on average 1.7846153846153847) internal successors, (580), 325 states have internal predecessors, (580), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,166 INFO L74 IsIncluded]: Start isIncluded. First operand 331 states. Second operand has 329 states, 325 states have (on average 1.7846153846153847) internal successors, (580), 325 states have internal predecessors, (580), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,166 INFO L87 Difference]: Start difference. First operand 331 states. Second operand has 329 states, 325 states have (on average 1.7846153846153847) internal successors, (580), 325 states have internal predecessors, (580), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,172 INFO L93 Difference]: Finished difference Result 331 states and 584 transitions. [2022-04-27 20:29:45,172 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 584 transitions. [2022-04-27 20:29:45,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,173 INFO L74 IsIncluded]: Start isIncluded. First operand has 329 states, 325 states have (on average 1.7846153846153847) internal successors, (580), 325 states have internal predecessors, (580), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 331 states. [2022-04-27 20:29:45,173 INFO L87 Difference]: Start difference. First operand has 329 states, 325 states have (on average 1.7846153846153847) internal successors, (580), 325 states have internal predecessors, (580), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 331 states. [2022-04-27 20:29:45,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,179 INFO L93 Difference]: Finished difference Result 331 states and 584 transitions. [2022-04-27 20:29:45,179 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 584 transitions. [2022-04-27 20:29:45,179 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,179 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,179 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:45,179 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:45,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 325 states have (on average 1.7846153846153847) internal successors, (580), 325 states have internal predecessors, (580), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 583 transitions. [2022-04-27 20:29:45,184 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 583 transitions. Word has length 26 [2022-04-27 20:29:45,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:45,185 INFO L495 AbstractCegarLoop]: Abstraction has 329 states and 583 transitions. [2022-04-27 20:29:45,185 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,185 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 583 transitions. [2022-04-27 20:29:45,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:29:45,185 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:45,185 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:45,185 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-27 20:29:45,186 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:45,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:45,186 INFO L85 PathProgramCache]: Analyzing trace with hash 524426478, now seen corresponding path program 1 times [2022-04-27 20:29:45,186 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:45,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071674377] [2022-04-27 20:29:45,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:45,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:45,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,222 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:45,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,226 INFO L290 TraceCheckUtils]: 0: Hoare triple {4571#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4565#true} is VALID [2022-04-27 20:29:45,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {4565#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,227 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4565#true} {4565#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,227 INFO L272 TraceCheckUtils]: 0: Hoare triple {4565#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4571#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:45,227 INFO L290 TraceCheckUtils]: 1: Hoare triple {4571#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4565#true} is VALID [2022-04-27 20:29:45,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {4565#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,227 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4565#true} {4565#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,228 INFO L272 TraceCheckUtils]: 4: Hoare triple {4565#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {4565#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4565#true} is VALID [2022-04-27 20:29:45,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {4565#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {4565#true} is VALID [2022-04-27 20:29:45,229 INFO L290 TraceCheckUtils]: 7: Hoare triple {4565#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {4565#true} is VALID [2022-04-27 20:29:45,229 INFO L290 TraceCheckUtils]: 8: Hoare triple {4565#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,229 INFO L290 TraceCheckUtils]: 9: Hoare triple {4565#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4565#true} is VALID [2022-04-27 20:29:45,229 INFO L290 TraceCheckUtils]: 10: Hoare triple {4565#true} [271] L87-1-->L91-1: Formula: (and (not (= v_main_~p3~0_3 0)) (= v_main_~lk3~0_5 1)) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3, main_~lk3~0=v_main_~lk3~0_5} AuxVars[] AssignedVars[main_~lk3~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,230 INFO L290 TraceCheckUtils]: 11: Hoare triple {4570#(= main_~lk3~0 1)} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,230 INFO L290 TraceCheckUtils]: 12: Hoare triple {4570#(= main_~lk3~0 1)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,230 INFO L290 TraceCheckUtils]: 13: Hoare triple {4570#(= main_~lk3~0 1)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,231 INFO L290 TraceCheckUtils]: 14: Hoare triple {4570#(= main_~lk3~0 1)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,231 INFO L290 TraceCheckUtils]: 15: Hoare triple {4570#(= main_~lk3~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,231 INFO L290 TraceCheckUtils]: 16: Hoare triple {4570#(= main_~lk3~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,232 INFO L290 TraceCheckUtils]: 17: Hoare triple {4570#(= main_~lk3~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,232 INFO L290 TraceCheckUtils]: 18: Hoare triple {4570#(= main_~lk3~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,232 INFO L290 TraceCheckUtils]: 19: Hoare triple {4570#(= main_~lk3~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,232 INFO L290 TraceCheckUtils]: 20: Hoare triple {4570#(= main_~lk3~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,233 INFO L290 TraceCheckUtils]: 21: Hoare triple {4570#(= main_~lk3~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,233 INFO L290 TraceCheckUtils]: 22: Hoare triple {4570#(= main_~lk3~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,233 INFO L290 TraceCheckUtils]: 23: Hoare triple {4570#(= main_~lk3~0 1)} [303] L142-1-->L148: Formula: (not (= v_main_~p3~0_5 0)) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {4570#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:45,233 INFO L290 TraceCheckUtils]: 24: Hoare triple {4570#(= main_~lk3~0 1)} [305] L148-->L198-1: Formula: (not (= v_main_~lk3~0_6 1)) InVars {main_~lk3~0=v_main_~lk3~0_6} OutVars{main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[] {4566#false} is VALID [2022-04-27 20:29:45,234 INFO L290 TraceCheckUtils]: 25: Hoare triple {4566#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4566#false} is VALID [2022-04-27 20:29:45,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:45,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:45,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071674377] [2022-04-27 20:29:45,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071674377] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:45,234 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:45,234 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:45,234 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154774013] [2022-04-27 20:29:45,234 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:45,235 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,235 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:45,235 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,248 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,248 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:45,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:45,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:45,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:45,249 INFO L87 Difference]: Start difference. First operand 329 states and 583 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,434 INFO L93 Difference]: Finished difference Result 419 states and 748 transitions. [2022-04-27 20:29:45,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:45,435 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:45,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 155 transitions. [2022-04-27 20:29:45,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 155 transitions. [2022-04-27 20:29:45,437 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 155 transitions. [2022-04-27 20:29:45,534 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 155 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,540 INFO L225 Difference]: With dead ends: 419 [2022-04-27 20:29:45,540 INFO L226 Difference]: Without dead ends: 419 [2022-04-27 20:29:45,540 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:45,541 INFO L413 NwaCegarLoop]: 153 mSDtfsCounter, 135 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:45,541 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [135 Valid, 160 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:45,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 419 states. [2022-04-27 20:29:45,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 419 to 329. [2022-04-27 20:29:45,545 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:45,546 INFO L82 GeneralOperation]: Start isEquivalent. First operand 419 states. Second operand has 329 states, 325 states have (on average 1.7723076923076924) internal successors, (576), 325 states have internal predecessors, (576), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,546 INFO L74 IsIncluded]: Start isIncluded. First operand 419 states. Second operand has 329 states, 325 states have (on average 1.7723076923076924) internal successors, (576), 325 states have internal predecessors, (576), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,547 INFO L87 Difference]: Start difference. First operand 419 states. Second operand has 329 states, 325 states have (on average 1.7723076923076924) internal successors, (576), 325 states have internal predecessors, (576), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,554 INFO L93 Difference]: Finished difference Result 419 states and 748 transitions. [2022-04-27 20:29:45,554 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 748 transitions. [2022-04-27 20:29:45,555 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,555 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,555 INFO L74 IsIncluded]: Start isIncluded. First operand has 329 states, 325 states have (on average 1.7723076923076924) internal successors, (576), 325 states have internal predecessors, (576), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 419 states. [2022-04-27 20:29:45,556 INFO L87 Difference]: Start difference. First operand has 329 states, 325 states have (on average 1.7723076923076924) internal successors, (576), 325 states have internal predecessors, (576), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 419 states. [2022-04-27 20:29:45,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,563 INFO L93 Difference]: Finished difference Result 419 states and 748 transitions. [2022-04-27 20:29:45,563 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 748 transitions. [2022-04-27 20:29:45,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,564 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,564 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:45,564 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:45,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 325 states have (on average 1.7723076923076924) internal successors, (576), 325 states have internal predecessors, (576), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 579 transitions. [2022-04-27 20:29:45,571 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 579 transitions. Word has length 26 [2022-04-27 20:29:45,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:45,571 INFO L495 AbstractCegarLoop]: Abstraction has 329 states and 579 transitions. [2022-04-27 20:29:45,571 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,571 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 579 transitions. [2022-04-27 20:29:45,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:29:45,572 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:45,572 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:45,572 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-27 20:29:45,572 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:45,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:45,573 INFO L85 PathProgramCache]: Analyzing trace with hash 430693653, now seen corresponding path program 1 times [2022-04-27 20:29:45,573 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:45,573 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374671556] [2022-04-27 20:29:45,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:45,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:45,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,627 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:45,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,631 INFO L290 TraceCheckUtils]: 0: Hoare triple {6169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6163#true} is VALID [2022-04-27 20:29:45,631 INFO L290 TraceCheckUtils]: 1: Hoare triple {6163#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,631 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6163#true} {6163#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {6163#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:45,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {6169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6163#true} is VALID [2022-04-27 20:29:45,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {6163#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,633 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6163#true} {6163#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,633 INFO L272 TraceCheckUtils]: 4: Hoare triple {6163#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,633 INFO L290 TraceCheckUtils]: 5: Hoare triple {6163#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6163#true} is VALID [2022-04-27 20:29:45,634 INFO L290 TraceCheckUtils]: 6: Hoare triple {6163#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {6163#true} is VALID [2022-04-27 20:29:45,634 INFO L290 TraceCheckUtils]: 7: Hoare triple {6163#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {6163#true} is VALID [2022-04-27 20:29:45,634 INFO L290 TraceCheckUtils]: 8: Hoare triple {6163#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,634 INFO L290 TraceCheckUtils]: 9: Hoare triple {6163#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,634 INFO L290 TraceCheckUtils]: 10: Hoare triple {6163#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {6163#true} is VALID [2022-04-27 20:29:45,635 INFO L290 TraceCheckUtils]: 11: Hoare triple {6163#true} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,635 INFO L290 TraceCheckUtils]: 12: Hoare triple {6168#(= main_~lk4~0 1)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,635 INFO L290 TraceCheckUtils]: 13: Hoare triple {6168#(= main_~lk4~0 1)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,636 INFO L290 TraceCheckUtils]: 14: Hoare triple {6168#(= main_~lk4~0 1)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,640 INFO L290 TraceCheckUtils]: 15: Hoare triple {6168#(= main_~lk4~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,640 INFO L290 TraceCheckUtils]: 16: Hoare triple {6168#(= main_~lk4~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,641 INFO L290 TraceCheckUtils]: 17: Hoare triple {6168#(= main_~lk4~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,642 INFO L290 TraceCheckUtils]: 18: Hoare triple {6168#(= main_~lk4~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,643 INFO L290 TraceCheckUtils]: 19: Hoare triple {6168#(= main_~lk4~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,644 INFO L290 TraceCheckUtils]: 20: Hoare triple {6168#(= main_~lk4~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,645 INFO L290 TraceCheckUtils]: 21: Hoare triple {6168#(= main_~lk4~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,647 INFO L290 TraceCheckUtils]: 22: Hoare triple {6168#(= main_~lk4~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,647 INFO L290 TraceCheckUtils]: 23: Hoare triple {6168#(= main_~lk4~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,647 INFO L290 TraceCheckUtils]: 24: Hoare triple {6168#(= main_~lk4~0 1)} [307] L147-1-->L153: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {6168#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:45,647 INFO L290 TraceCheckUtils]: 25: Hoare triple {6168#(= main_~lk4~0 1)} [309] L153-->L198-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {6164#false} is VALID [2022-04-27 20:29:45,648 INFO L290 TraceCheckUtils]: 26: Hoare triple {6164#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6164#false} is VALID [2022-04-27 20:29:45,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:45,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:45,648 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374671556] [2022-04-27 20:29:45,648 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1374671556] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:45,648 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:45,648 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:45,648 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293810551] [2022-04-27 20:29:45,648 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:45,649 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:45,649 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:45,649 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,663 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,663 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:45,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:45,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:45,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:45,663 INFO L87 Difference]: Start difference. First operand 329 states and 579 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,828 INFO L93 Difference]: Finished difference Result 615 states and 1092 transitions. [2022-04-27 20:29:45,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:45,828 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:45,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:45,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-27 20:29:45,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-27 20:29:45,831 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 154 transitions. [2022-04-27 20:29:45,923 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,936 INFO L225 Difference]: With dead ends: 615 [2022-04-27 20:29:45,936 INFO L226 Difference]: Without dead ends: 615 [2022-04-27 20:29:45,936 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:45,938 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 198 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 198 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:45,938 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [198 Valid, 93 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:45,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 615 states. [2022-04-27 20:29:45,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 615 to 453. [2022-04-27 20:29:45,944 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:45,945 INFO L82 GeneralOperation]: Start isEquivalent. First operand 615 states. Second operand has 453 states, 449 states have (on average 1.7461024498886415) internal successors, (784), 449 states have internal predecessors, (784), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,945 INFO L74 IsIncluded]: Start isIncluded. First operand 615 states. Second operand has 453 states, 449 states have (on average 1.7461024498886415) internal successors, (784), 449 states have internal predecessors, (784), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,946 INFO L87 Difference]: Start difference. First operand 615 states. Second operand has 453 states, 449 states have (on average 1.7461024498886415) internal successors, (784), 449 states have internal predecessors, (784), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,958 INFO L93 Difference]: Finished difference Result 615 states and 1092 transitions. [2022-04-27 20:29:45,959 INFO L276 IsEmpty]: Start isEmpty. Operand 615 states and 1092 transitions. [2022-04-27 20:29:45,959 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,959 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,960 INFO L74 IsIncluded]: Start isIncluded. First operand has 453 states, 449 states have (on average 1.7461024498886415) internal successors, (784), 449 states have internal predecessors, (784), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 615 states. [2022-04-27 20:29:45,961 INFO L87 Difference]: Start difference. First operand has 453 states, 449 states have (on average 1.7461024498886415) internal successors, (784), 449 states have internal predecessors, (784), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 615 states. [2022-04-27 20:29:45,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,974 INFO L93 Difference]: Finished difference Result 615 states and 1092 transitions. [2022-04-27 20:29:45,974 INFO L276 IsEmpty]: Start isEmpty. Operand 615 states and 1092 transitions. [2022-04-27 20:29:45,974 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,974 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,974 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:45,974 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:45,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 453 states, 449 states have (on average 1.7461024498886415) internal successors, (784), 449 states have internal predecessors, (784), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 453 states to 453 states and 787 transitions. [2022-04-27 20:29:45,984 INFO L78 Accepts]: Start accepts. Automaton has 453 states and 787 transitions. Word has length 27 [2022-04-27 20:29:45,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:45,984 INFO L495 AbstractCegarLoop]: Abstraction has 453 states and 787 transitions. [2022-04-27 20:29:45,984 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,984 INFO L276 IsEmpty]: Start isEmpty. Operand 453 states and 787 transitions. [2022-04-27 20:29:45,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:29:45,987 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:45,987 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:45,987 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-27 20:29:45,987 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:45,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:45,987 INFO L85 PathProgramCache]: Analyzing trace with hash -79840524, now seen corresponding path program 1 times [2022-04-27 20:29:45,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:45,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564149197] [2022-04-27 20:29:45,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:45,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:46,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,035 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:46,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,048 INFO L290 TraceCheckUtils]: 0: Hoare triple {8479#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8473#true} is VALID [2022-04-27 20:29:46,048 INFO L290 TraceCheckUtils]: 1: Hoare triple {8473#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,048 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8473#true} {8473#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L272 TraceCheckUtils]: 0: Hoare triple {8473#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8479#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:46,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {8479#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {8473#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8473#true} {8473#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L272 TraceCheckUtils]: 4: Hoare triple {8473#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L290 TraceCheckUtils]: 5: Hoare triple {8473#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L290 TraceCheckUtils]: 6: Hoare triple {8473#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L290 TraceCheckUtils]: 7: Hoare triple {8473#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {8473#true} is VALID [2022-04-27 20:29:46,049 INFO L290 TraceCheckUtils]: 8: Hoare triple {8473#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,050 INFO L290 TraceCheckUtils]: 9: Hoare triple {8473#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,050 INFO L290 TraceCheckUtils]: 10: Hoare triple {8473#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {8473#true} is VALID [2022-04-27 20:29:46,050 INFO L290 TraceCheckUtils]: 11: Hoare triple {8473#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,050 INFO L290 TraceCheckUtils]: 12: Hoare triple {8478#(= main_~p4~0 0)} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,050 INFO L290 TraceCheckUtils]: 13: Hoare triple {8478#(= main_~p4~0 0)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,051 INFO L290 TraceCheckUtils]: 14: Hoare triple {8478#(= main_~p4~0 0)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,051 INFO L290 TraceCheckUtils]: 15: Hoare triple {8478#(= main_~p4~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,051 INFO L290 TraceCheckUtils]: 16: Hoare triple {8478#(= main_~p4~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,051 INFO L290 TraceCheckUtils]: 17: Hoare triple {8478#(= main_~p4~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,052 INFO L290 TraceCheckUtils]: 18: Hoare triple {8478#(= main_~p4~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,052 INFO L290 TraceCheckUtils]: 19: Hoare triple {8478#(= main_~p4~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,052 INFO L290 TraceCheckUtils]: 20: Hoare triple {8478#(= main_~p4~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,052 INFO L290 TraceCheckUtils]: 21: Hoare triple {8478#(= main_~p4~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,053 INFO L290 TraceCheckUtils]: 22: Hoare triple {8478#(= main_~p4~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,053 INFO L290 TraceCheckUtils]: 23: Hoare triple {8478#(= main_~p4~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {8478#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:46,053 INFO L290 TraceCheckUtils]: 24: Hoare triple {8478#(= main_~p4~0 0)} [307] L147-1-->L153: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {8474#false} is VALID [2022-04-27 20:29:46,053 INFO L290 TraceCheckUtils]: 25: Hoare triple {8474#false} [309] L153-->L198-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {8474#false} is VALID [2022-04-27 20:29:46,054 INFO L290 TraceCheckUtils]: 26: Hoare triple {8474#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8474#false} is VALID [2022-04-27 20:29:46,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:46,055 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:46,055 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564149197] [2022-04-27 20:29:46,056 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564149197] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:46,056 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:46,056 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:46,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [689561509] [2022-04-27 20:29:46,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:46,056 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:46,056 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:46,056 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,069 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,070 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:46,070 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:46,070 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:46,070 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:46,070 INFO L87 Difference]: Start difference. First operand 453 states and 787 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,244 INFO L93 Difference]: Finished difference Result 639 states and 1104 transitions. [2022-04-27 20:29:46,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:46,245 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:46,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:46,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-27 20:29:46,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-27 20:29:46,247 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 159 transitions. [2022-04-27 20:29:46,354 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,366 INFO L225 Difference]: With dead ends: 639 [2022-04-27 20:29:46,366 INFO L226 Difference]: Without dead ends: 639 [2022-04-27 20:29:46,366 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:46,366 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 175 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:46,367 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 125 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:46,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 639 states. [2022-04-27 20:29:46,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 639 to 637. [2022-04-27 20:29:46,374 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:46,375 INFO L82 GeneralOperation]: Start isEquivalent. First operand 639 states. Second operand has 637 states, 633 states have (on average 1.7377567140600316) internal successors, (1100), 633 states have internal predecessors, (1100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,375 INFO L74 IsIncluded]: Start isIncluded. First operand 639 states. Second operand has 637 states, 633 states have (on average 1.7377567140600316) internal successors, (1100), 633 states have internal predecessors, (1100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,376 INFO L87 Difference]: Start difference. First operand 639 states. Second operand has 637 states, 633 states have (on average 1.7377567140600316) internal successors, (1100), 633 states have internal predecessors, (1100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,390 INFO L93 Difference]: Finished difference Result 639 states and 1104 transitions. [2022-04-27 20:29:46,390 INFO L276 IsEmpty]: Start isEmpty. Operand 639 states and 1104 transitions. [2022-04-27 20:29:46,390 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,390 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,391 INFO L74 IsIncluded]: Start isIncluded. First operand has 637 states, 633 states have (on average 1.7377567140600316) internal successors, (1100), 633 states have internal predecessors, (1100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 639 states. [2022-04-27 20:29:46,392 INFO L87 Difference]: Start difference. First operand has 637 states, 633 states have (on average 1.7377567140600316) internal successors, (1100), 633 states have internal predecessors, (1100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 639 states. [2022-04-27 20:29:46,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,412 INFO L93 Difference]: Finished difference Result 639 states and 1104 transitions. [2022-04-27 20:29:46,413 INFO L276 IsEmpty]: Start isEmpty. Operand 639 states and 1104 transitions. [2022-04-27 20:29:46,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,413 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,413 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:46,413 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:46,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 637 states, 633 states have (on average 1.7377567140600316) internal successors, (1100), 633 states have internal predecessors, (1100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 637 states to 637 states and 1103 transitions. [2022-04-27 20:29:46,428 INFO L78 Accepts]: Start accepts. Automaton has 637 states and 1103 transitions. Word has length 27 [2022-04-27 20:29:46,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:46,428 INFO L495 AbstractCegarLoop]: Abstraction has 637 states and 1103 transitions. [2022-04-27 20:29:46,429 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,429 INFO L276 IsEmpty]: Start isEmpty. Operand 637 states and 1103 transitions. [2022-04-27 20:29:46,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:29:46,430 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:46,430 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:46,430 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-27 20:29:46,430 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:46,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:46,431 INFO L85 PathProgramCache]: Analyzing trace with hash 466633801, now seen corresponding path program 1 times [2022-04-27 20:29:46,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:46,432 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348772730] [2022-04-27 20:29:46,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:46,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:46,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:46,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,467 INFO L290 TraceCheckUtils]: 0: Hoare triple {11045#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11039#true} is VALID [2022-04-27 20:29:46,467 INFO L290 TraceCheckUtils]: 1: Hoare triple {11039#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,467 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11039#true} {11039#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L272 TraceCheckUtils]: 0: Hoare triple {11039#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11045#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:46,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {11045#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {11039#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11039#true} {11039#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L272 TraceCheckUtils]: 4: Hoare triple {11039#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L290 TraceCheckUtils]: 5: Hoare triple {11039#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L290 TraceCheckUtils]: 6: Hoare triple {11039#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {11039#true} is VALID [2022-04-27 20:29:46,468 INFO L290 TraceCheckUtils]: 7: Hoare triple {11039#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {11039#true} is VALID [2022-04-27 20:29:46,469 INFO L290 TraceCheckUtils]: 8: Hoare triple {11039#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,469 INFO L290 TraceCheckUtils]: 9: Hoare triple {11039#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,469 INFO L290 TraceCheckUtils]: 10: Hoare triple {11039#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {11039#true} is VALID [2022-04-27 20:29:46,470 INFO L290 TraceCheckUtils]: 11: Hoare triple {11039#true} [273] L91-1-->L95-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,470 INFO L290 TraceCheckUtils]: 12: Hoare triple {11044#(not (= main_~p4~0 0))} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,470 INFO L290 TraceCheckUtils]: 13: Hoare triple {11044#(not (= main_~p4~0 0))} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,471 INFO L290 TraceCheckUtils]: 14: Hoare triple {11044#(not (= main_~p4~0 0))} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,471 INFO L290 TraceCheckUtils]: 15: Hoare triple {11044#(not (= main_~p4~0 0))} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,472 INFO L290 TraceCheckUtils]: 16: Hoare triple {11044#(not (= main_~p4~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,473 INFO L290 TraceCheckUtils]: 17: Hoare triple {11044#(not (= main_~p4~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,473 INFO L290 TraceCheckUtils]: 18: Hoare triple {11044#(not (= main_~p4~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,474 INFO L290 TraceCheckUtils]: 19: Hoare triple {11044#(not (= main_~p4~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,474 INFO L290 TraceCheckUtils]: 20: Hoare triple {11044#(not (= main_~p4~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,474 INFO L290 TraceCheckUtils]: 21: Hoare triple {11044#(not (= main_~p4~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,474 INFO L290 TraceCheckUtils]: 22: Hoare triple {11044#(not (= main_~p4~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,475 INFO L290 TraceCheckUtils]: 23: Hoare triple {11044#(not (= main_~p4~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {11044#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:46,475 INFO L290 TraceCheckUtils]: 24: Hoare triple {11044#(not (= main_~p4~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {11040#false} is VALID [2022-04-27 20:29:46,475 INFO L290 TraceCheckUtils]: 25: Hoare triple {11040#false} [311] L152-1-->L158: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {11040#false} is VALID [2022-04-27 20:29:46,475 INFO L290 TraceCheckUtils]: 26: Hoare triple {11040#false} [313] L158-->L198-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {11040#false} is VALID [2022-04-27 20:29:46,475 INFO L290 TraceCheckUtils]: 27: Hoare triple {11040#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11040#false} is VALID [2022-04-27 20:29:46,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:46,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:46,476 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348772730] [2022-04-27 20:29:46,476 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [348772730] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:46,476 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:46,476 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:46,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204398521] [2022-04-27 20:29:46,476 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:46,477 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:46,477 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:46,477 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,491 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,491 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:46,492 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:46,492 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:46,492 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:46,492 INFO L87 Difference]: Start difference. First operand 637 states and 1103 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,656 INFO L93 Difference]: Finished difference Result 651 states and 1112 transitions. [2022-04-27 20:29:46,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:46,656 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:46,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:46,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:29:46,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:29:46,658 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 158 transitions. [2022-04-27 20:29:46,751 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,763 INFO L225 Difference]: With dead ends: 651 [2022-04-27 20:29:46,764 INFO L226 Difference]: Without dead ends: 651 [2022-04-27 20:29:46,764 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:46,764 INFO L413 NwaCegarLoop]: 127 mSDtfsCounter, 167 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 167 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:46,764 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [167 Valid, 134 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:46,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states. [2022-04-27 20:29:46,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 649. [2022-04-27 20:29:46,771 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:46,772 INFO L82 GeneralOperation]: Start isEquivalent. First operand 651 states. Second operand has 649 states, 645 states have (on average 1.7178294573643411) internal successors, (1108), 645 states have internal predecessors, (1108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,773 INFO L74 IsIncluded]: Start isIncluded. First operand 651 states. Second operand has 649 states, 645 states have (on average 1.7178294573643411) internal successors, (1108), 645 states have internal predecessors, (1108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,774 INFO L87 Difference]: Start difference. First operand 651 states. Second operand has 649 states, 645 states have (on average 1.7178294573643411) internal successors, (1108), 645 states have internal predecessors, (1108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,789 INFO L93 Difference]: Finished difference Result 651 states and 1112 transitions. [2022-04-27 20:29:46,789 INFO L276 IsEmpty]: Start isEmpty. Operand 651 states and 1112 transitions. [2022-04-27 20:29:46,789 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,789 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,790 INFO L74 IsIncluded]: Start isIncluded. First operand has 649 states, 645 states have (on average 1.7178294573643411) internal successors, (1108), 645 states have internal predecessors, (1108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 651 states. [2022-04-27 20:29:46,791 INFO L87 Difference]: Start difference. First operand has 649 states, 645 states have (on average 1.7178294573643411) internal successors, (1108), 645 states have internal predecessors, (1108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 651 states. [2022-04-27 20:29:46,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,805 INFO L93 Difference]: Finished difference Result 651 states and 1112 transitions. [2022-04-27 20:29:46,805 INFO L276 IsEmpty]: Start isEmpty. Operand 651 states and 1112 transitions. [2022-04-27 20:29:46,805 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,805 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,805 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:46,806 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:46,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 649 states, 645 states have (on average 1.7178294573643411) internal successors, (1108), 645 states have internal predecessors, (1108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 649 states to 649 states and 1111 transitions. [2022-04-27 20:29:46,820 INFO L78 Accepts]: Start accepts. Automaton has 649 states and 1111 transitions. Word has length 28 [2022-04-27 20:29:46,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:46,821 INFO L495 AbstractCegarLoop]: Abstraction has 649 states and 1111 transitions. [2022-04-27 20:29:46,821 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,821 INFO L276 IsEmpty]: Start isEmpty. Operand 649 states and 1111 transitions. [2022-04-27 20:29:46,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:29:46,821 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:46,821 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:46,822 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-27 20:29:46,822 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:46,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:46,822 INFO L85 PathProgramCache]: Analyzing trace with hash 1819943498, now seen corresponding path program 1 times [2022-04-27 20:29:46,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:46,822 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266630660] [2022-04-27 20:29:46,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:46,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:46,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,861 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:46,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,864 INFO L290 TraceCheckUtils]: 0: Hoare triple {13659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13653#true} is VALID [2022-04-27 20:29:46,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {13653#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,864 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13653#true} {13653#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,865 INFO L272 TraceCheckUtils]: 0: Hoare triple {13653#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:46,865 INFO L290 TraceCheckUtils]: 1: Hoare triple {13659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13653#true} is VALID [2022-04-27 20:29:46,865 INFO L290 TraceCheckUtils]: 2: Hoare triple {13653#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,865 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13653#true} {13653#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,865 INFO L272 TraceCheckUtils]: 4: Hoare triple {13653#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,865 INFO L290 TraceCheckUtils]: 5: Hoare triple {13653#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {13653#true} is VALID [2022-04-27 20:29:46,865 INFO L290 TraceCheckUtils]: 6: Hoare triple {13653#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {13653#true} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 7: Hoare triple {13653#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {13653#true} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 8: Hoare triple {13653#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 9: Hoare triple {13653#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 10: Hoare triple {13653#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 11: Hoare triple {13653#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {13653#true} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 12: Hoare triple {13653#true} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,866 INFO L290 TraceCheckUtils]: 13: Hoare triple {13658#(= main_~lk5~0 1)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,867 INFO L290 TraceCheckUtils]: 14: Hoare triple {13658#(= main_~lk5~0 1)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,867 INFO L290 TraceCheckUtils]: 15: Hoare triple {13658#(= main_~lk5~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,867 INFO L290 TraceCheckUtils]: 16: Hoare triple {13658#(= main_~lk5~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,867 INFO L290 TraceCheckUtils]: 17: Hoare triple {13658#(= main_~lk5~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,868 INFO L290 TraceCheckUtils]: 18: Hoare triple {13658#(= main_~lk5~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,868 INFO L290 TraceCheckUtils]: 19: Hoare triple {13658#(= main_~lk5~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,868 INFO L290 TraceCheckUtils]: 20: Hoare triple {13658#(= main_~lk5~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,872 INFO L290 TraceCheckUtils]: 21: Hoare triple {13658#(= main_~lk5~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,873 INFO L290 TraceCheckUtils]: 22: Hoare triple {13658#(= main_~lk5~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,873 INFO L290 TraceCheckUtils]: 23: Hoare triple {13658#(= main_~lk5~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,873 INFO L290 TraceCheckUtils]: 24: Hoare triple {13658#(= main_~lk5~0 1)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,873 INFO L290 TraceCheckUtils]: 25: Hoare triple {13658#(= main_~lk5~0 1)} [311] L152-1-->L158: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {13658#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:46,874 INFO L290 TraceCheckUtils]: 26: Hoare triple {13658#(= main_~lk5~0 1)} [313] L158-->L198-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {13654#false} is VALID [2022-04-27 20:29:46,874 INFO L290 TraceCheckUtils]: 27: Hoare triple {13654#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13654#false} is VALID [2022-04-27 20:29:46,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:46,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:46,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266630660] [2022-04-27 20:29:46,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266630660] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:46,874 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:46,874 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:46,874 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831617544] [2022-04-27 20:29:46,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:46,875 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:46,875 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:46,875 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,889 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,889 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:46,889 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:46,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:46,889 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:46,890 INFO L87 Difference]: Start difference. First operand 649 states and 1111 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,101 INFO L93 Difference]: Finished difference Result 1195 states and 2064 transitions. [2022-04-27 20:29:47,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:47,101 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:47,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:47,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-27 20:29:47,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-27 20:29:47,104 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 150 transitions. [2022-04-27 20:29:47,204 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,242 INFO L225 Difference]: With dead ends: 1195 [2022-04-27 20:29:47,242 INFO L226 Difference]: Without dead ends: 1195 [2022-04-27 20:29:47,242 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:47,243 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 191 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 191 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:47,243 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [191 Valid, 92 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:47,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1195 states. [2022-04-27 20:29:47,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1195 to 905. [2022-04-27 20:29:47,255 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:47,256 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1195 states. Second operand has 905 states, 901 states have (on average 1.6825749167591566) internal successors, (1516), 901 states have internal predecessors, (1516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,257 INFO L74 IsIncluded]: Start isIncluded. First operand 1195 states. Second operand has 905 states, 901 states have (on average 1.6825749167591566) internal successors, (1516), 901 states have internal predecessors, (1516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,258 INFO L87 Difference]: Start difference. First operand 1195 states. Second operand has 905 states, 901 states have (on average 1.6825749167591566) internal successors, (1516), 901 states have internal predecessors, (1516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,296 INFO L93 Difference]: Finished difference Result 1195 states and 2064 transitions. [2022-04-27 20:29:47,296 INFO L276 IsEmpty]: Start isEmpty. Operand 1195 states and 2064 transitions. [2022-04-27 20:29:47,299 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,299 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,300 INFO L74 IsIncluded]: Start isIncluded. First operand has 905 states, 901 states have (on average 1.6825749167591566) internal successors, (1516), 901 states have internal predecessors, (1516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1195 states. [2022-04-27 20:29:47,301 INFO L87 Difference]: Start difference. First operand has 905 states, 901 states have (on average 1.6825749167591566) internal successors, (1516), 901 states have internal predecessors, (1516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1195 states. [2022-04-27 20:29:47,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,340 INFO L93 Difference]: Finished difference Result 1195 states and 2064 transitions. [2022-04-27 20:29:47,340 INFO L276 IsEmpty]: Start isEmpty. Operand 1195 states and 2064 transitions. [2022-04-27 20:29:47,341 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,341 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,341 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:47,341 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:47,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 905 states, 901 states have (on average 1.6825749167591566) internal successors, (1516), 901 states have internal predecessors, (1516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 905 states to 905 states and 1519 transitions. [2022-04-27 20:29:47,367 INFO L78 Accepts]: Start accepts. Automaton has 905 states and 1519 transitions. Word has length 28 [2022-04-27 20:29:47,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:47,367 INFO L495 AbstractCegarLoop]: Abstraction has 905 states and 1519 transitions. [2022-04-27 20:29:47,367 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,367 INFO L276 IsEmpty]: Start isEmpty. Operand 905 states and 1519 transitions. [2022-04-27 20:29:47,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:29:47,368 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:47,368 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:47,368 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-27 20:29:47,368 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:47,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:47,369 INFO L85 PathProgramCache]: Analyzing trace with hash 1309409321, now seen corresponding path program 1 times [2022-04-27 20:29:47,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:47,369 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613681707] [2022-04-27 20:29:47,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:47,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:47,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:47,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,406 INFO L290 TraceCheckUtils]: 0: Hoare triple {18161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18155#true} is VALID [2022-04-27 20:29:47,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {18155#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,407 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18155#true} {18155#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,408 INFO L272 TraceCheckUtils]: 0: Hoare triple {18155#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:47,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {18161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18155#true} is VALID [2022-04-27 20:29:47,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {18155#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18155#true} {18155#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {18155#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {18155#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {18155#true} is VALID [2022-04-27 20:29:47,410 INFO L290 TraceCheckUtils]: 6: Hoare triple {18155#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {18155#true} is VALID [2022-04-27 20:29:47,410 INFO L290 TraceCheckUtils]: 7: Hoare triple {18155#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {18155#true} is VALID [2022-04-27 20:29:47,410 INFO L290 TraceCheckUtils]: 8: Hoare triple {18155#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {18155#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,410 INFO L290 TraceCheckUtils]: 10: Hoare triple {18155#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,410 INFO L290 TraceCheckUtils]: 11: Hoare triple {18155#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {18155#true} is VALID [2022-04-27 20:29:47,411 INFO L290 TraceCheckUtils]: 12: Hoare triple {18155#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,411 INFO L290 TraceCheckUtils]: 13: Hoare triple {18160#(= main_~p5~0 0)} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,411 INFO L290 TraceCheckUtils]: 14: Hoare triple {18160#(= main_~p5~0 0)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,411 INFO L290 TraceCheckUtils]: 15: Hoare triple {18160#(= main_~p5~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,412 INFO L290 TraceCheckUtils]: 16: Hoare triple {18160#(= main_~p5~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,412 INFO L290 TraceCheckUtils]: 17: Hoare triple {18160#(= main_~p5~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,412 INFO L290 TraceCheckUtils]: 18: Hoare triple {18160#(= main_~p5~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,412 INFO L290 TraceCheckUtils]: 19: Hoare triple {18160#(= main_~p5~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,413 INFO L290 TraceCheckUtils]: 20: Hoare triple {18160#(= main_~p5~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,414 INFO L290 TraceCheckUtils]: 21: Hoare triple {18160#(= main_~p5~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,414 INFO L290 TraceCheckUtils]: 22: Hoare triple {18160#(= main_~p5~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,414 INFO L290 TraceCheckUtils]: 23: Hoare triple {18160#(= main_~p5~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,416 INFO L290 TraceCheckUtils]: 24: Hoare triple {18160#(= main_~p5~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {18160#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:47,416 INFO L290 TraceCheckUtils]: 25: Hoare triple {18160#(= main_~p5~0 0)} [311] L152-1-->L158: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {18156#false} is VALID [2022-04-27 20:29:47,416 INFO L290 TraceCheckUtils]: 26: Hoare triple {18156#false} [313] L158-->L198-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {18156#false} is VALID [2022-04-27 20:29:47,416 INFO L290 TraceCheckUtils]: 27: Hoare triple {18156#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18156#false} is VALID [2022-04-27 20:29:47,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:47,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:47,417 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613681707] [2022-04-27 20:29:47,417 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1613681707] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:47,417 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:47,417 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:47,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795210878] [2022-04-27 20:29:47,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:47,418 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:47,418 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:47,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,431 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:47,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:47,431 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:47,432 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:47,432 INFO L87 Difference]: Start difference. First operand 905 states and 1519 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,649 INFO L93 Difference]: Finished difference Result 1259 states and 2104 transitions. [2022-04-27 20:29:47,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:47,649 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:47,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:47,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 157 transitions. [2022-04-27 20:29:47,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 157 transitions. [2022-04-27 20:29:47,651 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 157 transitions. [2022-04-27 20:29:47,746 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 157 edges. 157 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,788 INFO L225 Difference]: With dead ends: 1259 [2022-04-27 20:29:47,788 INFO L226 Difference]: Without dead ends: 1259 [2022-04-27 20:29:47,788 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:47,789 INFO L413 NwaCegarLoop]: 120 mSDtfsCounter, 169 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:47,789 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [169 Valid, 127 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:47,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1259 states. [2022-04-27 20:29:47,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1259 to 1257. [2022-04-27 20:29:47,802 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:47,804 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1259 states. Second operand has 1257 states, 1253 states have (on average 1.675977653631285) internal successors, (2100), 1253 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,805 INFO L74 IsIncluded]: Start isIncluded. First operand 1259 states. Second operand has 1257 states, 1253 states have (on average 1.675977653631285) internal successors, (2100), 1253 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,806 INFO L87 Difference]: Start difference. First operand 1259 states. Second operand has 1257 states, 1253 states have (on average 1.675977653631285) internal successors, (2100), 1253 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,847 INFO L93 Difference]: Finished difference Result 1259 states and 2104 transitions. [2022-04-27 20:29:47,847 INFO L276 IsEmpty]: Start isEmpty. Operand 1259 states and 2104 transitions. [2022-04-27 20:29:47,848 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,849 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,850 INFO L74 IsIncluded]: Start isIncluded. First operand has 1257 states, 1253 states have (on average 1.675977653631285) internal successors, (2100), 1253 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1259 states. [2022-04-27 20:29:47,851 INFO L87 Difference]: Start difference. First operand has 1257 states, 1253 states have (on average 1.675977653631285) internal successors, (2100), 1253 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1259 states. [2022-04-27 20:29:47,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,895 INFO L93 Difference]: Finished difference Result 1259 states and 2104 transitions. [2022-04-27 20:29:47,895 INFO L276 IsEmpty]: Start isEmpty. Operand 1259 states and 2104 transitions. [2022-04-27 20:29:47,897 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,897 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,897 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:47,897 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:47,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1257 states, 1253 states have (on average 1.675977653631285) internal successors, (2100), 1253 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1257 states to 1257 states and 2103 transitions. [2022-04-27 20:29:47,940 INFO L78 Accepts]: Start accepts. Automaton has 1257 states and 2103 transitions. Word has length 28 [2022-04-27 20:29:47,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:47,940 INFO L495 AbstractCegarLoop]: Abstraction has 1257 states and 2103 transitions. [2022-04-27 20:29:47,941 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,941 INFO L276 IsEmpty]: Start isEmpty. Operand 1257 states and 2103 transitions. [2022-04-27 20:29:47,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:29:47,941 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:47,942 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:47,942 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-27 20:29:47,942 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:47,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:47,942 INFO L85 PathProgramCache]: Analyzing trace with hash 583706160, now seen corresponding path program 1 times [2022-04-27 20:29:47,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:47,942 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077412941] [2022-04-27 20:29:47,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:47,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:47,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,973 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:47,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {23207#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23201#true} is VALID [2022-04-27 20:29:47,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {23201#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,976 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23201#true} {23201#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,977 INFO L272 TraceCheckUtils]: 0: Hoare triple {23201#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23207#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:47,977 INFO L290 TraceCheckUtils]: 1: Hoare triple {23207#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23201#true} is VALID [2022-04-27 20:29:47,977 INFO L290 TraceCheckUtils]: 2: Hoare triple {23201#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23201#true} {23201#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,977 INFO L272 TraceCheckUtils]: 4: Hoare triple {23201#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {23201#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {23201#true} is VALID [2022-04-27 20:29:47,978 INFO L290 TraceCheckUtils]: 6: Hoare triple {23201#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {23201#true} is VALID [2022-04-27 20:29:47,978 INFO L290 TraceCheckUtils]: 7: Hoare triple {23201#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {23201#true} is VALID [2022-04-27 20:29:47,978 INFO L290 TraceCheckUtils]: 8: Hoare triple {23201#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {23201#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,978 INFO L290 TraceCheckUtils]: 10: Hoare triple {23201#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,978 INFO L290 TraceCheckUtils]: 11: Hoare triple {23201#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {23201#true} is VALID [2022-04-27 20:29:47,980 INFO L290 TraceCheckUtils]: 12: Hoare triple {23201#true} [275] L95-1-->L99-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,980 INFO L290 TraceCheckUtils]: 13: Hoare triple {23206#(not (= main_~p5~0 0))} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,981 INFO L290 TraceCheckUtils]: 14: Hoare triple {23206#(not (= main_~p5~0 0))} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,981 INFO L290 TraceCheckUtils]: 15: Hoare triple {23206#(not (= main_~p5~0 0))} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,981 INFO L290 TraceCheckUtils]: 16: Hoare triple {23206#(not (= main_~p5~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,981 INFO L290 TraceCheckUtils]: 17: Hoare triple {23206#(not (= main_~p5~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,982 INFO L290 TraceCheckUtils]: 18: Hoare triple {23206#(not (= main_~p5~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,982 INFO L290 TraceCheckUtils]: 19: Hoare triple {23206#(not (= main_~p5~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,982 INFO L290 TraceCheckUtils]: 20: Hoare triple {23206#(not (= main_~p5~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,982 INFO L290 TraceCheckUtils]: 21: Hoare triple {23206#(not (= main_~p5~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,983 INFO L290 TraceCheckUtils]: 22: Hoare triple {23206#(not (= main_~p5~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,983 INFO L290 TraceCheckUtils]: 23: Hoare triple {23206#(not (= main_~p5~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,983 INFO L290 TraceCheckUtils]: 24: Hoare triple {23206#(not (= main_~p5~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {23206#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:47,983 INFO L290 TraceCheckUtils]: 25: Hoare triple {23206#(not (= main_~p5~0 0))} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {23202#false} is VALID [2022-04-27 20:29:47,983 INFO L290 TraceCheckUtils]: 26: Hoare triple {23202#false} [315] L157-1-->L163: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {23202#false} is VALID [2022-04-27 20:29:47,983 INFO L290 TraceCheckUtils]: 27: Hoare triple {23202#false} [317] L163-->L198-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {23202#false} is VALID [2022-04-27 20:29:47,984 INFO L290 TraceCheckUtils]: 28: Hoare triple {23202#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23202#false} is VALID [2022-04-27 20:29:47,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:47,984 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:47,984 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077412941] [2022-04-27 20:29:47,984 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077412941] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:47,984 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:47,984 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:47,984 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49998747] [2022-04-27 20:29:47,984 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:47,985 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:47,985 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:47,985 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,999 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,999 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:47,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:47,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:48,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:48,000 INFO L87 Difference]: Start difference. First operand 1257 states and 2103 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,212 INFO L93 Difference]: Finished difference Result 1275 states and 2104 transitions. [2022-04-27 20:29:48,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:48,212 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:48,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:48,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 156 transitions. [2022-04-27 20:29:48,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 156 transitions. [2022-04-27 20:29:48,215 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 156 transitions. [2022-04-27 20:29:48,324 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 156 edges. 156 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:48,370 INFO L225 Difference]: With dead ends: 1275 [2022-04-27 20:29:48,370 INFO L226 Difference]: Without dead ends: 1275 [2022-04-27 20:29:48,371 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:48,371 INFO L413 NwaCegarLoop]: 124 mSDtfsCounter, 166 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:48,371 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 131 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:48,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1275 states. [2022-04-27 20:29:48,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1275 to 1273. [2022-04-27 20:29:48,384 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:48,385 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1275 states. Second operand has 1273 states, 1269 states have (on average 1.6548463356973995) internal successors, (2100), 1269 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,386 INFO L74 IsIncluded]: Start isIncluded. First operand 1275 states. Second operand has 1273 states, 1269 states have (on average 1.6548463356973995) internal successors, (2100), 1269 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,387 INFO L87 Difference]: Start difference. First operand 1275 states. Second operand has 1273 states, 1269 states have (on average 1.6548463356973995) internal successors, (2100), 1269 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,428 INFO L93 Difference]: Finished difference Result 1275 states and 2104 transitions. [2022-04-27 20:29:48,428 INFO L276 IsEmpty]: Start isEmpty. Operand 1275 states and 2104 transitions. [2022-04-27 20:29:48,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:48,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:48,431 INFO L74 IsIncluded]: Start isIncluded. First operand has 1273 states, 1269 states have (on average 1.6548463356973995) internal successors, (2100), 1269 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1275 states. [2022-04-27 20:29:48,432 INFO L87 Difference]: Start difference. First operand has 1273 states, 1269 states have (on average 1.6548463356973995) internal successors, (2100), 1269 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1275 states. [2022-04-27 20:29:48,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,478 INFO L93 Difference]: Finished difference Result 1275 states and 2104 transitions. [2022-04-27 20:29:48,478 INFO L276 IsEmpty]: Start isEmpty. Operand 1275 states and 2104 transitions. [2022-04-27 20:29:48,480 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:48,480 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:48,480 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:48,480 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:48,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1273 states, 1269 states have (on average 1.6548463356973995) internal successors, (2100), 1269 states have internal predecessors, (2100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1273 states to 1273 states and 2103 transitions. [2022-04-27 20:29:48,522 INFO L78 Accepts]: Start accepts. Automaton has 1273 states and 2103 transitions. Word has length 29 [2022-04-27 20:29:48,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:48,522 INFO L495 AbstractCegarLoop]: Abstraction has 1273 states and 2103 transitions. [2022-04-27 20:29:48,522 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,522 INFO L276 IsEmpty]: Start isEmpty. Operand 1273 states and 2103 transitions. [2022-04-27 20:29:48,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:29:48,523 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:48,523 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:48,523 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-27 20:29:48,523 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:48,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:48,524 INFO L85 PathProgramCache]: Analyzing trace with hash 1937015857, now seen corresponding path program 1 times [2022-04-27 20:29:48,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:48,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27648630] [2022-04-27 20:29:48,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:48,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:48,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:48,554 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:48,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:48,558 INFO L290 TraceCheckUtils]: 0: Hoare triple {28317#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28311#true} is VALID [2022-04-27 20:29:48,558 INFO L290 TraceCheckUtils]: 1: Hoare triple {28311#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,558 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28311#true} {28311#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L272 TraceCheckUtils]: 0: Hoare triple {28311#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28317#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {28317#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 2: Hoare triple {28311#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28311#true} {28311#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L272 TraceCheckUtils]: 4: Hoare triple {28311#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 5: Hoare triple {28311#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 6: Hoare triple {28311#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 7: Hoare triple {28311#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 8: Hoare triple {28311#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 9: Hoare triple {28311#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,559 INFO L290 TraceCheckUtils]: 10: Hoare triple {28311#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,560 INFO L290 TraceCheckUtils]: 11: Hoare triple {28311#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,560 INFO L290 TraceCheckUtils]: 12: Hoare triple {28311#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {28311#true} is VALID [2022-04-27 20:29:48,560 INFO L290 TraceCheckUtils]: 13: Hoare triple {28311#true} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,560 INFO L290 TraceCheckUtils]: 14: Hoare triple {28316#(= main_~lk6~0 1)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,560 INFO L290 TraceCheckUtils]: 15: Hoare triple {28316#(= main_~lk6~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,561 INFO L290 TraceCheckUtils]: 16: Hoare triple {28316#(= main_~lk6~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,561 INFO L290 TraceCheckUtils]: 17: Hoare triple {28316#(= main_~lk6~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,561 INFO L290 TraceCheckUtils]: 18: Hoare triple {28316#(= main_~lk6~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,562 INFO L290 TraceCheckUtils]: 19: Hoare triple {28316#(= main_~lk6~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,562 INFO L290 TraceCheckUtils]: 20: Hoare triple {28316#(= main_~lk6~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,562 INFO L290 TraceCheckUtils]: 21: Hoare triple {28316#(= main_~lk6~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,562 INFO L290 TraceCheckUtils]: 22: Hoare triple {28316#(= main_~lk6~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,563 INFO L290 TraceCheckUtils]: 23: Hoare triple {28316#(= main_~lk6~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,563 INFO L290 TraceCheckUtils]: 24: Hoare triple {28316#(= main_~lk6~0 1)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,563 INFO L290 TraceCheckUtils]: 25: Hoare triple {28316#(= main_~lk6~0 1)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,563 INFO L290 TraceCheckUtils]: 26: Hoare triple {28316#(= main_~lk6~0 1)} [315] L157-1-->L163: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {28316#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:48,564 INFO L290 TraceCheckUtils]: 27: Hoare triple {28316#(= main_~lk6~0 1)} [317] L163-->L198-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {28312#false} is VALID [2022-04-27 20:29:48,564 INFO L290 TraceCheckUtils]: 28: Hoare triple {28312#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28312#false} is VALID [2022-04-27 20:29:48,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:48,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:48,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27648630] [2022-04-27 20:29:48,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [27648630] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:48,564 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:48,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:48,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146921997] [2022-04-27 20:29:48,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:48,565 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:48,565 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:48,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,580 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:48,580 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:48,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:48,580 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:48,580 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:48,580 INFO L87 Difference]: Start difference. First operand 1273 states and 2103 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,881 INFO L93 Difference]: Finished difference Result 2315 states and 3864 transitions. [2022-04-27 20:29:48,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:48,881 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:48,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:48,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-27 20:29:48,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-27 20:29:48,884 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 146 transitions. [2022-04-27 20:29:48,981 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:49,119 INFO L225 Difference]: With dead ends: 2315 [2022-04-27 20:29:49,119 INFO L226 Difference]: Without dead ends: 2315 [2022-04-27 20:29:49,119 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:49,119 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 184 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:49,120 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 91 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:49,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2315 states. [2022-04-27 20:29:49,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2315 to 1801. [2022-04-27 20:29:49,139 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:49,141 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2315 states. Second operand has 1801 states, 1797 states have (on average 1.613800779076238) internal successors, (2900), 1797 states have internal predecessors, (2900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,142 INFO L74 IsIncluded]: Start isIncluded. First operand 2315 states. Second operand has 1801 states, 1797 states have (on average 1.613800779076238) internal successors, (2900), 1797 states have internal predecessors, (2900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,143 INFO L87 Difference]: Start difference. First operand 2315 states. Second operand has 1801 states, 1797 states have (on average 1.613800779076238) internal successors, (2900), 1797 states have internal predecessors, (2900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,267 INFO L93 Difference]: Finished difference Result 2315 states and 3864 transitions. [2022-04-27 20:29:49,267 INFO L276 IsEmpty]: Start isEmpty. Operand 2315 states and 3864 transitions. [2022-04-27 20:29:49,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:49,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:49,272 INFO L74 IsIncluded]: Start isIncluded. First operand has 1801 states, 1797 states have (on average 1.613800779076238) internal successors, (2900), 1797 states have internal predecessors, (2900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2315 states. [2022-04-27 20:29:49,273 INFO L87 Difference]: Start difference. First operand has 1801 states, 1797 states have (on average 1.613800779076238) internal successors, (2900), 1797 states have internal predecessors, (2900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2315 states. [2022-04-27 20:29:49,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,397 INFO L93 Difference]: Finished difference Result 2315 states and 3864 transitions. [2022-04-27 20:29:49,397 INFO L276 IsEmpty]: Start isEmpty. Operand 2315 states and 3864 transitions. [2022-04-27 20:29:49,399 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:49,399 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:49,399 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:49,400 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:49,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1801 states, 1797 states have (on average 1.613800779076238) internal successors, (2900), 1797 states have internal predecessors, (2900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1801 states to 1801 states and 2903 transitions. [2022-04-27 20:29:49,485 INFO L78 Accepts]: Start accepts. Automaton has 1801 states and 2903 transitions. Word has length 29 [2022-04-27 20:29:49,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:49,485 INFO L495 AbstractCegarLoop]: Abstraction has 1801 states and 2903 transitions. [2022-04-27 20:29:49,485 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,486 INFO L276 IsEmpty]: Start isEmpty. Operand 1801 states and 2903 transitions. [2022-04-27 20:29:49,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:29:49,487 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:49,487 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:49,487 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-27 20:29:49,487 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:49,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:49,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1426481680, now seen corresponding path program 1 times [2022-04-27 20:29:49,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:49,488 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807160553] [2022-04-27 20:29:49,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:49,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:49,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:49,513 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:49,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:49,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {37075#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {37069#true} is VALID [2022-04-27 20:29:49,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {37069#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,518 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {37069#true} {37069#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,519 INFO L272 TraceCheckUtils]: 0: Hoare triple {37069#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37075#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:49,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {37075#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {37069#true} is VALID [2022-04-27 20:29:49,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {37069#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {37069#true} {37069#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,519 INFO L272 TraceCheckUtils]: 4: Hoare triple {37069#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,519 INFO L290 TraceCheckUtils]: 5: Hoare triple {37069#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {37069#true} is VALID [2022-04-27 20:29:49,519 INFO L290 TraceCheckUtils]: 6: Hoare triple {37069#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 7: Hoare triple {37069#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 8: Hoare triple {37069#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 9: Hoare triple {37069#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 10: Hoare triple {37069#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 11: Hoare triple {37069#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 12: Hoare triple {37069#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {37069#true} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 13: Hoare triple {37069#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,520 INFO L290 TraceCheckUtils]: 14: Hoare triple {37074#(= main_~p6~0 0)} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,521 INFO L290 TraceCheckUtils]: 15: Hoare triple {37074#(= main_~p6~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,521 INFO L290 TraceCheckUtils]: 16: Hoare triple {37074#(= main_~p6~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,521 INFO L290 TraceCheckUtils]: 17: Hoare triple {37074#(= main_~p6~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,521 INFO L290 TraceCheckUtils]: 18: Hoare triple {37074#(= main_~p6~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,522 INFO L290 TraceCheckUtils]: 19: Hoare triple {37074#(= main_~p6~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,522 INFO L290 TraceCheckUtils]: 20: Hoare triple {37074#(= main_~p6~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,522 INFO L290 TraceCheckUtils]: 21: Hoare triple {37074#(= main_~p6~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,522 INFO L290 TraceCheckUtils]: 22: Hoare triple {37074#(= main_~p6~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,523 INFO L290 TraceCheckUtils]: 23: Hoare triple {37074#(= main_~p6~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,523 INFO L290 TraceCheckUtils]: 24: Hoare triple {37074#(= main_~p6~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,523 INFO L290 TraceCheckUtils]: 25: Hoare triple {37074#(= main_~p6~0 0)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {37074#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:49,523 INFO L290 TraceCheckUtils]: 26: Hoare triple {37074#(= main_~p6~0 0)} [315] L157-1-->L163: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {37070#false} is VALID [2022-04-27 20:29:49,523 INFO L290 TraceCheckUtils]: 27: Hoare triple {37070#false} [317] L163-->L198-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {37070#false} is VALID [2022-04-27 20:29:49,524 INFO L290 TraceCheckUtils]: 28: Hoare triple {37070#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37070#false} is VALID [2022-04-27 20:29:49,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:49,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:49,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807160553] [2022-04-27 20:29:49,525 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [807160553] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:49,525 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:49,525 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:49,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178820821] [2022-04-27 20:29:49,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:49,526 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:49,526 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:49,526 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,540 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:49,541 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:49,541 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:49,541 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:49,541 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:49,541 INFO L87 Difference]: Start difference. First operand 1801 states and 2903 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,840 INFO L93 Difference]: Finished difference Result 2475 states and 3976 transitions. [2022-04-27 20:29:49,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:49,840 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:49,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:49,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 155 transitions. [2022-04-27 20:29:49,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 155 transitions. [2022-04-27 20:29:49,842 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 155 transitions. [2022-04-27 20:29:49,934 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 155 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:50,095 INFO L225 Difference]: With dead ends: 2475 [2022-04-27 20:29:50,095 INFO L226 Difference]: Without dead ends: 2475 [2022-04-27 20:29:50,095 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:50,096 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 163 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:50,096 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 129 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:50,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2475 states. [2022-04-27 20:29:50,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2475 to 2473. [2022-04-27 20:29:50,131 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:50,133 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2475 states. Second operand has 2473 states, 2469 states have (on average 1.608748481166464) internal successors, (3972), 2469 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,141 INFO L74 IsIncluded]: Start isIncluded. First operand 2475 states. Second operand has 2473 states, 2469 states have (on average 1.608748481166464) internal successors, (3972), 2469 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,144 INFO L87 Difference]: Start difference. First operand 2475 states. Second operand has 2473 states, 2469 states have (on average 1.608748481166464) internal successors, (3972), 2469 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,283 INFO L93 Difference]: Finished difference Result 2475 states and 3976 transitions. [2022-04-27 20:29:50,283 INFO L276 IsEmpty]: Start isEmpty. Operand 2475 states and 3976 transitions. [2022-04-27 20:29:50,285 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:50,285 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:50,288 INFO L74 IsIncluded]: Start isIncluded. First operand has 2473 states, 2469 states have (on average 1.608748481166464) internal successors, (3972), 2469 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2475 states. [2022-04-27 20:29:50,291 INFO L87 Difference]: Start difference. First operand has 2473 states, 2469 states have (on average 1.608748481166464) internal successors, (3972), 2469 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2475 states. [2022-04-27 20:29:50,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,431 INFO L93 Difference]: Finished difference Result 2475 states and 3976 transitions. [2022-04-27 20:29:50,431 INFO L276 IsEmpty]: Start isEmpty. Operand 2475 states and 3976 transitions. [2022-04-27 20:29:50,434 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:50,434 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:50,434 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:50,434 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:50,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2473 states, 2469 states have (on average 1.608748481166464) internal successors, (3972), 2469 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2473 states to 2473 states and 3975 transitions. [2022-04-27 20:29:50,586 INFO L78 Accepts]: Start accepts. Automaton has 2473 states and 3975 transitions. Word has length 29 [2022-04-27 20:29:50,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:50,586 INFO L495 AbstractCegarLoop]: Abstraction has 2473 states and 3975 transitions. [2022-04-27 20:29:50,586 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,586 INFO L276 IsEmpty]: Start isEmpty. Operand 2473 states and 3975 transitions. [2022-04-27 20:29:50,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:29:50,587 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:50,588 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:50,588 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-27 20:29:50,588 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:50,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:50,588 INFO L85 PathProgramCache]: Analyzing trace with hash -82017883, now seen corresponding path program 1 times [2022-04-27 20:29:50,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:50,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155202030] [2022-04-27 20:29:50,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:50,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:50,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:50,617 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:50,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:50,629 INFO L290 TraceCheckUtils]: 0: Hoare triple {46985#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46979#true} is VALID [2022-04-27 20:29:50,630 INFO L290 TraceCheckUtils]: 1: Hoare triple {46979#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,630 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {46979#true} {46979#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,630 INFO L272 TraceCheckUtils]: 0: Hoare triple {46979#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46985#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:50,630 INFO L290 TraceCheckUtils]: 1: Hoare triple {46985#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 2: Hoare triple {46979#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46979#true} {46979#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L272 TraceCheckUtils]: 4: Hoare triple {46979#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 5: Hoare triple {46979#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 6: Hoare triple {46979#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 7: Hoare triple {46979#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 8: Hoare triple {46979#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {46979#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 10: Hoare triple {46979#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 11: Hoare triple {46979#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {46979#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {46979#true} is VALID [2022-04-27 20:29:50,632 INFO L290 TraceCheckUtils]: 13: Hoare triple {46979#true} [277] L99-1-->L103-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {46984#(not (= main_~p6~0 0))} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,632 INFO L290 TraceCheckUtils]: 15: Hoare triple {46984#(not (= main_~p6~0 0))} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,632 INFO L290 TraceCheckUtils]: 16: Hoare triple {46984#(not (= main_~p6~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,633 INFO L290 TraceCheckUtils]: 17: Hoare triple {46984#(not (= main_~p6~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,633 INFO L290 TraceCheckUtils]: 18: Hoare triple {46984#(not (= main_~p6~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,633 INFO L290 TraceCheckUtils]: 19: Hoare triple {46984#(not (= main_~p6~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,633 INFO L290 TraceCheckUtils]: 20: Hoare triple {46984#(not (= main_~p6~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,634 INFO L290 TraceCheckUtils]: 21: Hoare triple {46984#(not (= main_~p6~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,634 INFO L290 TraceCheckUtils]: 22: Hoare triple {46984#(not (= main_~p6~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,634 INFO L290 TraceCheckUtils]: 23: Hoare triple {46984#(not (= main_~p6~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,636 INFO L290 TraceCheckUtils]: 24: Hoare triple {46984#(not (= main_~p6~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,636 INFO L290 TraceCheckUtils]: 25: Hoare triple {46984#(not (= main_~p6~0 0))} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {46984#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:50,636 INFO L290 TraceCheckUtils]: 26: Hoare triple {46984#(not (= main_~p6~0 0))} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {46980#false} is VALID [2022-04-27 20:29:50,636 INFO L290 TraceCheckUtils]: 27: Hoare triple {46980#false} [319] L162-1-->L168: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {46980#false} is VALID [2022-04-27 20:29:50,636 INFO L290 TraceCheckUtils]: 28: Hoare triple {46980#false} [321] L168-->L198-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {46980#false} is VALID [2022-04-27 20:29:50,636 INFO L290 TraceCheckUtils]: 29: Hoare triple {46980#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46980#false} is VALID [2022-04-27 20:29:50,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:50,637 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:50,637 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155202030] [2022-04-27 20:29:50,637 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155202030] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:50,637 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:50,637 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:50,637 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053500386] [2022-04-27 20:29:50,637 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:50,637 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:50,638 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:50,638 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,653 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:50,653 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:50,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:50,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:50,654 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:50,654 INFO L87 Difference]: Start difference. First operand 2473 states and 3975 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,005 INFO L93 Difference]: Finished difference Result 2507 states and 3976 transitions. [2022-04-27 20:29:51,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:51,005 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:51,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:51,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-27 20:29:51,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-27 20:29:51,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 154 transitions. [2022-04-27 20:29:51,102 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:51,276 INFO L225 Difference]: With dead ends: 2507 [2022-04-27 20:29:51,276 INFO L226 Difference]: Without dead ends: 2507 [2022-04-27 20:29:51,276 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:51,277 INFO L413 NwaCegarLoop]: 121 mSDtfsCounter, 165 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 128 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:51,277 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 128 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:51,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2507 states. [2022-04-27 20:29:51,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2507 to 2505. [2022-04-27 20:29:51,302 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:51,305 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2507 states. Second operand has 2505 states, 2501 states have (on average 1.5881647341063574) internal successors, (3972), 2501 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,307 INFO L74 IsIncluded]: Start isIncluded. First operand 2507 states. Second operand has 2505 states, 2501 states have (on average 1.5881647341063574) internal successors, (3972), 2501 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,309 INFO L87 Difference]: Start difference. First operand 2507 states. Second operand has 2505 states, 2501 states have (on average 1.5881647341063574) internal successors, (3972), 2501 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,451 INFO L93 Difference]: Finished difference Result 2507 states and 3976 transitions. [2022-04-27 20:29:51,451 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 3976 transitions. [2022-04-27 20:29:51,454 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:51,454 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:51,457 INFO L74 IsIncluded]: Start isIncluded. First operand has 2505 states, 2501 states have (on average 1.5881647341063574) internal successors, (3972), 2501 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-27 20:29:51,459 INFO L87 Difference]: Start difference. First operand has 2505 states, 2501 states have (on average 1.5881647341063574) internal successors, (3972), 2501 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-27 20:29:51,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,601 INFO L93 Difference]: Finished difference Result 2507 states and 3976 transitions. [2022-04-27 20:29:51,601 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 3976 transitions. [2022-04-27 20:29:51,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:51,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:51,604 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:51,604 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:51,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2505 states, 2501 states have (on average 1.5881647341063574) internal successors, (3972), 2501 states have internal predecessors, (3972), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2505 states to 2505 states and 3975 transitions. [2022-04-27 20:29:51,764 INFO L78 Accepts]: Start accepts. Automaton has 2505 states and 3975 transitions. Word has length 30 [2022-04-27 20:29:51,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:51,765 INFO L495 AbstractCegarLoop]: Abstraction has 2505 states and 3975 transitions. [2022-04-27 20:29:51,765 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,765 INFO L276 IsEmpty]: Start isEmpty. Operand 2505 states and 3975 transitions. [2022-04-27 20:29:51,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:29:51,766 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:51,766 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:51,766 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-27 20:29:51,766 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:51,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:51,767 INFO L85 PathProgramCache]: Analyzing trace with hash 1271291814, now seen corresponding path program 1 times [2022-04-27 20:29:51,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:51,767 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745127722] [2022-04-27 20:29:51,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:51,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:51,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:51,795 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:51,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:51,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {57023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {57017#true} is VALID [2022-04-27 20:29:51,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {57017#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,798 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57017#true} {57017#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,799 INFO L272 TraceCheckUtils]: 0: Hoare triple {57017#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:51,799 INFO L290 TraceCheckUtils]: 1: Hoare triple {57023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {57017#true} is VALID [2022-04-27 20:29:51,799 INFO L290 TraceCheckUtils]: 2: Hoare triple {57017#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,799 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57017#true} {57017#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,799 INFO L272 TraceCheckUtils]: 4: Hoare triple {57017#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 5: Hoare triple {57017#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 6: Hoare triple {57017#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 7: Hoare triple {57017#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 8: Hoare triple {57017#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 9: Hoare triple {57017#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {57017#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {57017#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 12: Hoare triple {57017#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 13: Hoare triple {57017#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {57017#true} is VALID [2022-04-27 20:29:51,800 INFO L290 TraceCheckUtils]: 14: Hoare triple {57017#true} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,801 INFO L290 TraceCheckUtils]: 15: Hoare triple {57022#(= main_~lk7~0 1)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,801 INFO L290 TraceCheckUtils]: 16: Hoare triple {57022#(= main_~lk7~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,801 INFO L290 TraceCheckUtils]: 17: Hoare triple {57022#(= main_~lk7~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,801 INFO L290 TraceCheckUtils]: 18: Hoare triple {57022#(= main_~lk7~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,802 INFO L290 TraceCheckUtils]: 19: Hoare triple {57022#(= main_~lk7~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,802 INFO L290 TraceCheckUtils]: 20: Hoare triple {57022#(= main_~lk7~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,802 INFO L290 TraceCheckUtils]: 21: Hoare triple {57022#(= main_~lk7~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,802 INFO L290 TraceCheckUtils]: 22: Hoare triple {57022#(= main_~lk7~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,803 INFO L290 TraceCheckUtils]: 23: Hoare triple {57022#(= main_~lk7~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,803 INFO L290 TraceCheckUtils]: 24: Hoare triple {57022#(= main_~lk7~0 1)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,803 INFO L290 TraceCheckUtils]: 25: Hoare triple {57022#(= main_~lk7~0 1)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,803 INFO L290 TraceCheckUtils]: 26: Hoare triple {57022#(= main_~lk7~0 1)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,804 INFO L290 TraceCheckUtils]: 27: Hoare triple {57022#(= main_~lk7~0 1)} [319] L162-1-->L168: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {57022#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:51,804 INFO L290 TraceCheckUtils]: 28: Hoare triple {57022#(= main_~lk7~0 1)} [321] L168-->L198-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {57018#false} is VALID [2022-04-27 20:29:51,804 INFO L290 TraceCheckUtils]: 29: Hoare triple {57018#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57018#false} is VALID [2022-04-27 20:29:51,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:51,804 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:51,804 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745127722] [2022-04-27 20:29:51,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [745127722] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:51,805 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:51,805 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:51,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258751248] [2022-04-27 20:29:51,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:51,805 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:51,805 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:51,805 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,820 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:51,820 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:51,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:51,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:51,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:51,821 INFO L87 Difference]: Start difference. First operand 2505 states and 3975 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:52,467 INFO L93 Difference]: Finished difference Result 4491 states and 7208 transitions. [2022-04-27 20:29:52,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:52,468 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:52,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:52,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-27 20:29:52,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-27 20:29:52,469 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 142 transitions. [2022-04-27 20:29:52,551 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:53,075 INFO L225 Difference]: With dead ends: 4491 [2022-04-27 20:29:53,075 INFO L226 Difference]: Without dead ends: 4491 [2022-04-27 20:29:53,076 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:53,076 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 177 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:53,076 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [177 Valid, 90 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:53,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4491 states. [2022-04-27 20:29:53,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4491 to 3593. [2022-04-27 20:29:53,116 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:53,119 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4491 states. Second operand has 3593 states, 3589 states have (on average 1.5436054611312344) internal successors, (5540), 3589 states have internal predecessors, (5540), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,121 INFO L74 IsIncluded]: Start isIncluded. First operand 4491 states. Second operand has 3593 states, 3589 states have (on average 1.5436054611312344) internal successors, (5540), 3589 states have internal predecessors, (5540), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,123 INFO L87 Difference]: Start difference. First operand 4491 states. Second operand has 3593 states, 3589 states have (on average 1.5436054611312344) internal successors, (5540), 3589 states have internal predecessors, (5540), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:53,614 INFO L93 Difference]: Finished difference Result 4491 states and 7208 transitions. [2022-04-27 20:29:53,615 INFO L276 IsEmpty]: Start isEmpty. Operand 4491 states and 7208 transitions. [2022-04-27 20:29:53,619 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:53,619 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:53,622 INFO L74 IsIncluded]: Start isIncluded. First operand has 3593 states, 3589 states have (on average 1.5436054611312344) internal successors, (5540), 3589 states have internal predecessors, (5540), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4491 states. [2022-04-27 20:29:53,624 INFO L87 Difference]: Start difference. First operand has 3593 states, 3589 states have (on average 1.5436054611312344) internal successors, (5540), 3589 states have internal predecessors, (5540), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4491 states. [2022-04-27 20:29:54,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:54,120 INFO L93 Difference]: Finished difference Result 4491 states and 7208 transitions. [2022-04-27 20:29:54,120 INFO L276 IsEmpty]: Start isEmpty. Operand 4491 states and 7208 transitions. [2022-04-27 20:29:54,124 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:54,124 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:54,124 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:54,124 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:54,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3593 states, 3589 states have (on average 1.5436054611312344) internal successors, (5540), 3589 states have internal predecessors, (5540), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3593 states to 3593 states and 5543 transitions. [2022-04-27 20:29:54,467 INFO L78 Accepts]: Start accepts. Automaton has 3593 states and 5543 transitions. Word has length 30 [2022-04-27 20:29:54,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:54,467 INFO L495 AbstractCegarLoop]: Abstraction has 3593 states and 5543 transitions. [2022-04-27 20:29:54,467 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,467 INFO L276 IsEmpty]: Start isEmpty. Operand 3593 states and 5543 transitions. [2022-04-27 20:29:54,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:29:54,470 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:54,470 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:54,470 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-27 20:29:54,470 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:54,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:54,471 INFO L85 PathProgramCache]: Analyzing trace with hash 760757637, now seen corresponding path program 1 times [2022-04-27 20:29:54,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:54,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450837895] [2022-04-27 20:29:54,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:54,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:54,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:54,505 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:54,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:54,508 INFO L290 TraceCheckUtils]: 0: Hoare triple {74101#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {74095#true} is VALID [2022-04-27 20:29:54,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {74095#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,509 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {74095#true} {74095#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,509 INFO L272 TraceCheckUtils]: 0: Hoare triple {74095#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74101#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:54,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {74101#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {74095#true} is VALID [2022-04-27 20:29:54,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {74095#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {74095#true} {74095#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L272 TraceCheckUtils]: 4: Hoare triple {74095#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 5: Hoare triple {74095#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 6: Hoare triple {74095#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {74095#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 8: Hoare triple {74095#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 9: Hoare triple {74095#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 10: Hoare triple {74095#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,510 INFO L290 TraceCheckUtils]: 11: Hoare triple {74095#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,511 INFO L290 TraceCheckUtils]: 12: Hoare triple {74095#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,511 INFO L290 TraceCheckUtils]: 13: Hoare triple {74095#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {74095#true} is VALID [2022-04-27 20:29:54,511 INFO L290 TraceCheckUtils]: 14: Hoare triple {74095#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,511 INFO L290 TraceCheckUtils]: 15: Hoare triple {74100#(= main_~p7~0 0)} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,511 INFO L290 TraceCheckUtils]: 16: Hoare triple {74100#(= main_~p7~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,512 INFO L290 TraceCheckUtils]: 17: Hoare triple {74100#(= main_~p7~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,512 INFO L290 TraceCheckUtils]: 18: Hoare triple {74100#(= main_~p7~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,512 INFO L290 TraceCheckUtils]: 19: Hoare triple {74100#(= main_~p7~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,513 INFO L290 TraceCheckUtils]: 20: Hoare triple {74100#(= main_~p7~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,513 INFO L290 TraceCheckUtils]: 21: Hoare triple {74100#(= main_~p7~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,513 INFO L290 TraceCheckUtils]: 22: Hoare triple {74100#(= main_~p7~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,513 INFO L290 TraceCheckUtils]: 23: Hoare triple {74100#(= main_~p7~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,514 INFO L290 TraceCheckUtils]: 24: Hoare triple {74100#(= main_~p7~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,514 INFO L290 TraceCheckUtils]: 25: Hoare triple {74100#(= main_~p7~0 0)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,514 INFO L290 TraceCheckUtils]: 26: Hoare triple {74100#(= main_~p7~0 0)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {74100#(= main_~p7~0 0)} is VALID [2022-04-27 20:29:54,514 INFO L290 TraceCheckUtils]: 27: Hoare triple {74100#(= main_~p7~0 0)} [319] L162-1-->L168: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {74096#false} is VALID [2022-04-27 20:29:54,515 INFO L290 TraceCheckUtils]: 28: Hoare triple {74096#false} [321] L168-->L198-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {74096#false} is VALID [2022-04-27 20:29:54,515 INFO L290 TraceCheckUtils]: 29: Hoare triple {74096#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {74096#false} is VALID [2022-04-27 20:29:54,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:54,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:54,515 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450837895] [2022-04-27 20:29:54,515 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450837895] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:54,515 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:54,515 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:54,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916427192] [2022-04-27 20:29:54,515 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:54,516 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:54,517 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:54,517 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,532 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:54,533 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:54,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:54,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:54,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:54,533 INFO L87 Difference]: Start difference. First operand 3593 states and 5543 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:55,308 INFO L93 Difference]: Finished difference Result 4875 states and 7496 transitions. [2022-04-27 20:29:55,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:55,308 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:55,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:55,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 153 transitions. [2022-04-27 20:29:55,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 153 transitions. [2022-04-27 20:29:55,310 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 153 transitions. [2022-04-27 20:29:55,401 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 153 edges. 153 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:56,045 INFO L225 Difference]: With dead ends: 4875 [2022-04-27 20:29:56,046 INFO L226 Difference]: Without dead ends: 4875 [2022-04-27 20:29:56,046 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:56,046 INFO L413 NwaCegarLoop]: 124 mSDtfsCounter, 157 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:56,046 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 131 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:56,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2022-04-27 20:29:56,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 4873. [2022-04-27 20:29:56,092 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:56,096 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4875 states. Second operand has 4873 states, 4869 states have (on average 1.538714315054426) internal successors, (7492), 4869 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,100 INFO L74 IsIncluded]: Start isIncluded. First operand 4875 states. Second operand has 4873 states, 4869 states have (on average 1.538714315054426) internal successors, (7492), 4869 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,102 INFO L87 Difference]: Start difference. First operand 4875 states. Second operand has 4873 states, 4869 states have (on average 1.538714315054426) internal successors, (7492), 4869 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:56,673 INFO L93 Difference]: Finished difference Result 4875 states and 7496 transitions. [2022-04-27 20:29:56,673 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7496 transitions. [2022-04-27 20:29:56,677 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:56,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:56,682 INFO L74 IsIncluded]: Start isIncluded. First operand has 4873 states, 4869 states have (on average 1.538714315054426) internal successors, (7492), 4869 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-27 20:29:56,684 INFO L87 Difference]: Start difference. First operand has 4873 states, 4869 states have (on average 1.538714315054426) internal successors, (7492), 4869 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-27 20:29:57,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:57,262 INFO L93 Difference]: Finished difference Result 4875 states and 7496 transitions. [2022-04-27 20:29:57,262 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7496 transitions. [2022-04-27 20:29:57,286 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:57,287 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:57,287 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:57,287 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:57,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4873 states, 4869 states have (on average 1.538714315054426) internal successors, (7492), 4869 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:57,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4873 states to 4873 states and 7495 transitions. [2022-04-27 20:29:57,884 INFO L78 Accepts]: Start accepts. Automaton has 4873 states and 7495 transitions. Word has length 30 [2022-04-27 20:29:57,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:57,884 INFO L495 AbstractCegarLoop]: Abstraction has 4873 states and 7495 transitions. [2022-04-27 20:29:57,884 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:57,884 INFO L276 IsEmpty]: Start isEmpty. Operand 4873 states and 7495 transitions. [2022-04-27 20:29:57,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:29:57,887 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:57,887 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:57,887 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-27 20:29:57,887 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:57,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:57,888 INFO L85 PathProgramCache]: Analyzing trace with hash 755373388, now seen corresponding path program 1 times [2022-04-27 20:29:57,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:57,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949950095] [2022-04-27 20:29:57,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:57,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:57,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:57,909 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:57,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:57,912 INFO L290 TraceCheckUtils]: 0: Hoare triple {93611#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {93605#true} is VALID [2022-04-27 20:29:57,912 INFO L290 TraceCheckUtils]: 1: Hoare triple {93605#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,912 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {93605#true} {93605#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,913 INFO L272 TraceCheckUtils]: 0: Hoare triple {93605#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93611#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:57,913 INFO L290 TraceCheckUtils]: 1: Hoare triple {93611#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {93605#true} is VALID [2022-04-27 20:29:57,913 INFO L290 TraceCheckUtils]: 2: Hoare triple {93605#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,913 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {93605#true} {93605#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,913 INFO L272 TraceCheckUtils]: 4: Hoare triple {93605#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,913 INFO L290 TraceCheckUtils]: 5: Hoare triple {93605#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 6: Hoare triple {93605#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 7: Hoare triple {93605#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {93605#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 9: Hoare triple {93605#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 10: Hoare triple {93605#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 11: Hoare triple {93605#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 12: Hoare triple {93605#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 13: Hoare triple {93605#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {93605#true} is VALID [2022-04-27 20:29:57,914 INFO L290 TraceCheckUtils]: 14: Hoare triple {93605#true} [279] L103-1-->L107-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,915 INFO L290 TraceCheckUtils]: 15: Hoare triple {93610#(not (= main_~p7~0 0))} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,915 INFO L290 TraceCheckUtils]: 16: Hoare triple {93610#(not (= main_~p7~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,915 INFO L290 TraceCheckUtils]: 17: Hoare triple {93610#(not (= main_~p7~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,915 INFO L290 TraceCheckUtils]: 18: Hoare triple {93610#(not (= main_~p7~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,916 INFO L290 TraceCheckUtils]: 19: Hoare triple {93610#(not (= main_~p7~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,916 INFO L290 TraceCheckUtils]: 20: Hoare triple {93610#(not (= main_~p7~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,916 INFO L290 TraceCheckUtils]: 21: Hoare triple {93610#(not (= main_~p7~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,916 INFO L290 TraceCheckUtils]: 22: Hoare triple {93610#(not (= main_~p7~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,916 INFO L290 TraceCheckUtils]: 23: Hoare triple {93610#(not (= main_~p7~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,917 INFO L290 TraceCheckUtils]: 24: Hoare triple {93610#(not (= main_~p7~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,917 INFO L290 TraceCheckUtils]: 25: Hoare triple {93610#(not (= main_~p7~0 0))} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,917 INFO L290 TraceCheckUtils]: 26: Hoare triple {93610#(not (= main_~p7~0 0))} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {93610#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:29:57,917 INFO L290 TraceCheckUtils]: 27: Hoare triple {93610#(not (= main_~p7~0 0))} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {93606#false} is VALID [2022-04-27 20:29:57,918 INFO L290 TraceCheckUtils]: 28: Hoare triple {93606#false} [323] L167-1-->L173: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {93606#false} is VALID [2022-04-27 20:29:57,918 INFO L290 TraceCheckUtils]: 29: Hoare triple {93606#false} [325] L173-->L198-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {93606#false} is VALID [2022-04-27 20:29:57,918 INFO L290 TraceCheckUtils]: 30: Hoare triple {93606#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {93606#false} is VALID [2022-04-27 20:29:57,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:57,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:57,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949950095] [2022-04-27 20:29:57,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949950095] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:57,918 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:57,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:57,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302181830] [2022-04-27 20:29:57,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:57,919 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:29:57,919 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:57,919 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:57,933 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:57,934 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:57,934 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:57,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:57,934 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:57,934 INFO L87 Difference]: Start difference. First operand 4873 states and 7495 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:58,690 INFO L93 Difference]: Finished difference Result 4939 states and 7496 transitions. [2022-04-27 20:29:58,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:58,690 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:29:58,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:58,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 152 transitions. [2022-04-27 20:29:58,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 152 transitions. [2022-04-27 20:29:58,692 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 152 transitions. [2022-04-27 20:29:58,791 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 152 edges. 152 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:59,452 INFO L225 Difference]: With dead ends: 4939 [2022-04-27 20:29:59,452 INFO L226 Difference]: Without dead ends: 4939 [2022-04-27 20:29:59,452 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:59,452 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 164 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 164 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:59,453 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [164 Valid, 125 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:29:59,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4939 states. [2022-04-27 20:29:59,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4939 to 4937. [2022-04-27 20:29:59,490 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:59,494 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4939 states. Second operand has 4937 states, 4933 states have (on average 1.5187512669774985) internal successors, (7492), 4933 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:59,497 INFO L74 IsIncluded]: Start isIncluded. First operand 4939 states. Second operand has 4937 states, 4933 states have (on average 1.5187512669774985) internal successors, (7492), 4933 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:59,500 INFO L87 Difference]: Start difference. First operand 4939 states. Second operand has 4937 states, 4933 states have (on average 1.5187512669774985) internal successors, (7492), 4933 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:00,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:00,110 INFO L93 Difference]: Finished difference Result 4939 states and 7496 transitions. [2022-04-27 20:30:00,110 INFO L276 IsEmpty]: Start isEmpty. Operand 4939 states and 7496 transitions. [2022-04-27 20:30:00,114 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:00,115 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:00,119 INFO L74 IsIncluded]: Start isIncluded. First operand has 4937 states, 4933 states have (on average 1.5187512669774985) internal successors, (7492), 4933 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4939 states. [2022-04-27 20:30:00,122 INFO L87 Difference]: Start difference. First operand has 4937 states, 4933 states have (on average 1.5187512669774985) internal successors, (7492), 4933 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4939 states. [2022-04-27 20:30:00,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:00,721 INFO L93 Difference]: Finished difference Result 4939 states and 7496 transitions. [2022-04-27 20:30:00,721 INFO L276 IsEmpty]: Start isEmpty. Operand 4939 states and 7496 transitions. [2022-04-27 20:30:00,724 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:00,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:00,725 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:00,725 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:00,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4937 states, 4933 states have (on average 1.5187512669774985) internal successors, (7492), 4933 states have internal predecessors, (7492), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:01,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4937 states to 4937 states and 7495 transitions. [2022-04-27 20:30:01,364 INFO L78 Accepts]: Start accepts. Automaton has 4937 states and 7495 transitions. Word has length 31 [2022-04-27 20:30:01,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:01,364 INFO L495 AbstractCegarLoop]: Abstraction has 4937 states and 7495 transitions. [2022-04-27 20:30:01,364 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:01,364 INFO L276 IsEmpty]: Start isEmpty. Operand 4937 states and 7495 transitions. [2022-04-27 20:30:01,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:30:01,366 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:01,366 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:01,367 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-27 20:30:01,367 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:01,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:01,367 INFO L85 PathProgramCache]: Analyzing trace with hash 2108683085, now seen corresponding path program 1 times [2022-04-27 20:30:01,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:01,367 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869767056] [2022-04-27 20:30:01,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:01,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:01,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:01,392 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:01,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:01,396 INFO L290 TraceCheckUtils]: 0: Hoare triple {113377#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {113371#true} is VALID [2022-04-27 20:30:01,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {113371#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,396 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {113371#true} {113371#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,396 INFO L272 TraceCheckUtils]: 0: Hoare triple {113371#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113377#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:01,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {113377#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {113371#true} is VALID [2022-04-27 20:30:01,396 INFO L290 TraceCheckUtils]: 2: Hoare triple {113371#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {113371#true} {113371#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L272 TraceCheckUtils]: 4: Hoare triple {113371#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 5: Hoare triple {113371#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 6: Hoare triple {113371#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 7: Hoare triple {113371#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 8: Hoare triple {113371#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 9: Hoare triple {113371#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 10: Hoare triple {113371#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 11: Hoare triple {113371#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 12: Hoare triple {113371#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 13: Hoare triple {113371#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,397 INFO L290 TraceCheckUtils]: 14: Hoare triple {113371#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {113371#true} is VALID [2022-04-27 20:30:01,398 INFO L290 TraceCheckUtils]: 15: Hoare triple {113371#true} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,398 INFO L290 TraceCheckUtils]: 16: Hoare triple {113376#(= main_~lk8~0 1)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,398 INFO L290 TraceCheckUtils]: 17: Hoare triple {113376#(= main_~lk8~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,398 INFO L290 TraceCheckUtils]: 18: Hoare triple {113376#(= main_~lk8~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,399 INFO L290 TraceCheckUtils]: 19: Hoare triple {113376#(= main_~lk8~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,399 INFO L290 TraceCheckUtils]: 20: Hoare triple {113376#(= main_~lk8~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,399 INFO L290 TraceCheckUtils]: 21: Hoare triple {113376#(= main_~lk8~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,399 INFO L290 TraceCheckUtils]: 22: Hoare triple {113376#(= main_~lk8~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,400 INFO L290 TraceCheckUtils]: 23: Hoare triple {113376#(= main_~lk8~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,400 INFO L290 TraceCheckUtils]: 24: Hoare triple {113376#(= main_~lk8~0 1)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,400 INFO L290 TraceCheckUtils]: 25: Hoare triple {113376#(= main_~lk8~0 1)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {113376#(= main_~lk8~0 1)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,401 INFO L290 TraceCheckUtils]: 27: Hoare triple {113376#(= main_~lk8~0 1)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,401 INFO L290 TraceCheckUtils]: 28: Hoare triple {113376#(= main_~lk8~0 1)} [323] L167-1-->L173: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {113376#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:01,401 INFO L290 TraceCheckUtils]: 29: Hoare triple {113376#(= main_~lk8~0 1)} [325] L173-->L198-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {113372#false} is VALID [2022-04-27 20:30:01,401 INFO L290 TraceCheckUtils]: 30: Hoare triple {113372#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113372#false} is VALID [2022-04-27 20:30:01,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:01,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:01,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869767056] [2022-04-27 20:30:01,402 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869767056] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:01,402 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:01,402 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:01,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903498726] [2022-04-27 20:30:01,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:01,402 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:01,402 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:01,403 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:01,418 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:01,418 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:01,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:01,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:01,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:01,419 INFO L87 Difference]: Start difference. First operand 4937 states and 7495 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:03,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:03,584 INFO L93 Difference]: Finished difference Result 8715 states and 13384 transitions. [2022-04-27 20:30:03,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:03,584 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:03,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:03,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:03,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 138 transitions. [2022-04-27 20:30:03,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:03,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 138 transitions. [2022-04-27 20:30:03,586 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 138 transitions. [2022-04-27 20:30:03,692 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 138 edges. 138 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:05,935 INFO L225 Difference]: With dead ends: 8715 [2022-04-27 20:30:05,935 INFO L226 Difference]: Without dead ends: 8715 [2022-04-27 20:30:05,936 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:05,936 INFO L413 NwaCegarLoop]: 82 mSDtfsCounter, 170 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 170 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:05,936 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [170 Valid, 89 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:30:05,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8715 states. [2022-04-27 20:30:06,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8715 to 7177. [2022-04-27 20:30:06,000 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:06,007 INFO L82 GeneralOperation]: Start isEquivalent. First operand 8715 states. Second operand has 7177 states, 7173 states have (on average 1.4727450160323434) internal successors, (10564), 7173 states have internal predecessors, (10564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:06,014 INFO L74 IsIncluded]: Start isIncluded. First operand 8715 states. Second operand has 7177 states, 7173 states have (on average 1.4727450160323434) internal successors, (10564), 7173 states have internal predecessors, (10564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:06,020 INFO L87 Difference]: Start difference. First operand 8715 states. Second operand has 7177 states, 7173 states have (on average 1.4727450160323434) internal successors, (10564), 7173 states have internal predecessors, (10564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:07,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:07,728 INFO L93 Difference]: Finished difference Result 8715 states and 13384 transitions. [2022-04-27 20:30:07,728 INFO L276 IsEmpty]: Start isEmpty. Operand 8715 states and 13384 transitions. [2022-04-27 20:30:07,734 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:07,734 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:07,739 INFO L74 IsIncluded]: Start isIncluded. First operand has 7177 states, 7173 states have (on average 1.4727450160323434) internal successors, (10564), 7173 states have internal predecessors, (10564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8715 states. [2022-04-27 20:30:07,742 INFO L87 Difference]: Start difference. First operand has 7177 states, 7173 states have (on average 1.4727450160323434) internal successors, (10564), 7173 states have internal predecessors, (10564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8715 states. [2022-04-27 20:30:09,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:09,741 INFO L93 Difference]: Finished difference Result 8715 states and 13384 transitions. [2022-04-27 20:30:09,741 INFO L276 IsEmpty]: Start isEmpty. Operand 8715 states and 13384 transitions. [2022-04-27 20:30:09,748 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:09,748 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:09,748 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:09,748 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:09,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7177 states, 7173 states have (on average 1.4727450160323434) internal successors, (10564), 7173 states have internal predecessors, (10564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:11,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7177 states to 7177 states and 10567 transitions. [2022-04-27 20:30:11,136 INFO L78 Accepts]: Start accepts. Automaton has 7177 states and 10567 transitions. Word has length 31 [2022-04-27 20:30:11,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:11,136 INFO L495 AbstractCegarLoop]: Abstraction has 7177 states and 10567 transitions. [2022-04-27 20:30:11,136 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:11,136 INFO L276 IsEmpty]: Start isEmpty. Operand 7177 states and 10567 transitions. [2022-04-27 20:30:11,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:30:11,139 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:11,139 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:11,140 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-27 20:30:11,140 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:11,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:11,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1598148908, now seen corresponding path program 1 times [2022-04-27 20:30:11,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:11,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913552992] [2022-04-27 20:30:11,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:11,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:11,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:11,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:11,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:11,167 INFO L290 TraceCheckUtils]: 0: Hoare triple {146711#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146705#true} is VALID [2022-04-27 20:30:11,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {146705#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,167 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {146705#true} {146705#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,168 INFO L272 TraceCheckUtils]: 0: Hoare triple {146705#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146711#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:11,168 INFO L290 TraceCheckUtils]: 1: Hoare triple {146711#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146705#true} is VALID [2022-04-27 20:30:11,168 INFO L290 TraceCheckUtils]: 2: Hoare triple {146705#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,168 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {146705#true} {146705#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,168 INFO L272 TraceCheckUtils]: 4: Hoare triple {146705#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 5: Hoare triple {146705#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {146705#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 7: Hoare triple {146705#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 8: Hoare triple {146705#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 9: Hoare triple {146705#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 10: Hoare triple {146705#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 11: Hoare triple {146705#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 12: Hoare triple {146705#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 13: Hoare triple {146705#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 14: Hoare triple {146705#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {146705#true} is VALID [2022-04-27 20:30:11,169 INFO L290 TraceCheckUtils]: 15: Hoare triple {146705#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,170 INFO L290 TraceCheckUtils]: 16: Hoare triple {146710#(= main_~p8~0 0)} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,170 INFO L290 TraceCheckUtils]: 17: Hoare triple {146710#(= main_~p8~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,170 INFO L290 TraceCheckUtils]: 18: Hoare triple {146710#(= main_~p8~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,170 INFO L290 TraceCheckUtils]: 19: Hoare triple {146710#(= main_~p8~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,171 INFO L290 TraceCheckUtils]: 20: Hoare triple {146710#(= main_~p8~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,171 INFO L290 TraceCheckUtils]: 21: Hoare triple {146710#(= main_~p8~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,171 INFO L290 TraceCheckUtils]: 22: Hoare triple {146710#(= main_~p8~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,171 INFO L290 TraceCheckUtils]: 23: Hoare triple {146710#(= main_~p8~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,172 INFO L290 TraceCheckUtils]: 24: Hoare triple {146710#(= main_~p8~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,172 INFO L290 TraceCheckUtils]: 25: Hoare triple {146710#(= main_~p8~0 0)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,172 INFO L290 TraceCheckUtils]: 26: Hoare triple {146710#(= main_~p8~0 0)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {146710#(= main_~p8~0 0)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {146710#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:11,172 INFO L290 TraceCheckUtils]: 28: Hoare triple {146710#(= main_~p8~0 0)} [323] L167-1-->L173: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {146706#false} is VALID [2022-04-27 20:30:11,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {146706#false} [325] L173-->L198-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {146706#false} is VALID [2022-04-27 20:30:11,173 INFO L290 TraceCheckUtils]: 30: Hoare triple {146706#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146706#false} is VALID [2022-04-27 20:30:11,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:11,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:11,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913552992] [2022-04-27 20:30:11,173 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913552992] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:11,173 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:11,173 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:11,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1506441446] [2022-04-27 20:30:11,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:11,174 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:11,174 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:11,174 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:11,189 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:11,189 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:11,189 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:11,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:11,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:11,189 INFO L87 Difference]: Start difference. First operand 7177 states and 10567 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:13,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:13,408 INFO L93 Difference]: Finished difference Result 9611 states and 14088 transitions. [2022-04-27 20:30:13,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:13,408 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:13,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:13,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:13,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-27 20:30:13,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:13,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-27 20:30:13,411 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 151 transitions. [2022-04-27 20:30:13,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:15,801 INFO L225 Difference]: With dead ends: 9611 [2022-04-27 20:30:15,802 INFO L226 Difference]: Without dead ends: 9611 [2022-04-27 20:30:15,802 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:15,802 INFO L413 NwaCegarLoop]: 126 mSDtfsCounter, 151 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:15,802 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 133 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:30:15,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9611 states. [2022-04-27 20:30:15,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9611 to 9609. [2022-04-27 20:30:15,885 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:15,895 INFO L82 GeneralOperation]: Start isEquivalent. First operand 9611 states. Second operand has 9609 states, 9605 states have (on average 1.4663196251952109) internal successors, (14084), 9605 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:15,904 INFO L74 IsIncluded]: Start isIncluded. First operand 9611 states. Second operand has 9609 states, 9605 states have (on average 1.4663196251952109) internal successors, (14084), 9605 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:15,913 INFO L87 Difference]: Start difference. First operand 9611 states. Second operand has 9609 states, 9605 states have (on average 1.4663196251952109) internal successors, (14084), 9605 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:18,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:18,184 INFO L93 Difference]: Finished difference Result 9611 states and 14088 transitions. [2022-04-27 20:30:18,184 INFO L276 IsEmpty]: Start isEmpty. Operand 9611 states and 14088 transitions. [2022-04-27 20:30:18,191 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:18,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:18,202 INFO L74 IsIncluded]: Start isIncluded. First operand has 9609 states, 9605 states have (on average 1.4663196251952109) internal successors, (14084), 9605 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9611 states. [2022-04-27 20:30:18,210 INFO L87 Difference]: Start difference. First operand has 9609 states, 9605 states have (on average 1.4663196251952109) internal successors, (14084), 9605 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9611 states. [2022-04-27 20:30:20,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:20,569 INFO L93 Difference]: Finished difference Result 9611 states and 14088 transitions. [2022-04-27 20:30:20,569 INFO L276 IsEmpty]: Start isEmpty. Operand 9611 states and 14088 transitions. [2022-04-27 20:30:20,577 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:20,577 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:20,577 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:20,577 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:20,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9609 states, 9605 states have (on average 1.4663196251952109) internal successors, (14084), 9605 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:22,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9609 states to 9609 states and 14087 transitions. [2022-04-27 20:30:22,666 INFO L78 Accepts]: Start accepts. Automaton has 9609 states and 14087 transitions. Word has length 31 [2022-04-27 20:30:22,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:22,666 INFO L495 AbstractCegarLoop]: Abstraction has 9609 states and 14087 transitions. [2022-04-27 20:30:22,666 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:22,666 INFO L276 IsEmpty]: Start isEmpty. Operand 9609 states and 14087 transitions. [2022-04-27 20:30:22,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:22,669 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:22,669 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:22,669 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-27 20:30:22,670 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:22,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:22,670 INFO L85 PathProgramCache]: Analyzing trace with hash 944699137, now seen corresponding path program 1 times [2022-04-27 20:30:22,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:22,670 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998128322] [2022-04-27 20:30:22,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:22,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:22,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:22,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:22,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:22,699 INFO L290 TraceCheckUtils]: 0: Hoare triple {185165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {185159#true} is VALID [2022-04-27 20:30:22,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {185159#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,699 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {185159#true} {185159#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,699 INFO L272 TraceCheckUtils]: 0: Hoare triple {185159#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:22,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {185165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {185159#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {185159#true} {185159#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {185159#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 5: Hoare triple {185159#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 6: Hoare triple {185159#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 7: Hoare triple {185159#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {185159#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 9: Hoare triple {185159#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 10: Hoare triple {185159#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 11: Hoare triple {185159#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 12: Hoare triple {185159#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 13: Hoare triple {185159#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,700 INFO L290 TraceCheckUtils]: 14: Hoare triple {185159#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {185159#true} is VALID [2022-04-27 20:30:22,701 INFO L290 TraceCheckUtils]: 15: Hoare triple {185159#true} [281] L107-1-->L111-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,701 INFO L290 TraceCheckUtils]: 16: Hoare triple {185164#(not (= main_~p8~0 0))} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,701 INFO L290 TraceCheckUtils]: 17: Hoare triple {185164#(not (= main_~p8~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,701 INFO L290 TraceCheckUtils]: 18: Hoare triple {185164#(not (= main_~p8~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,702 INFO L290 TraceCheckUtils]: 19: Hoare triple {185164#(not (= main_~p8~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,702 INFO L290 TraceCheckUtils]: 20: Hoare triple {185164#(not (= main_~p8~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,702 INFO L290 TraceCheckUtils]: 21: Hoare triple {185164#(not (= main_~p8~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,702 INFO L290 TraceCheckUtils]: 22: Hoare triple {185164#(not (= main_~p8~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,703 INFO L290 TraceCheckUtils]: 23: Hoare triple {185164#(not (= main_~p8~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,703 INFO L290 TraceCheckUtils]: 24: Hoare triple {185164#(not (= main_~p8~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,703 INFO L290 TraceCheckUtils]: 25: Hoare triple {185164#(not (= main_~p8~0 0))} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,703 INFO L290 TraceCheckUtils]: 26: Hoare triple {185164#(not (= main_~p8~0 0))} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,703 INFO L290 TraceCheckUtils]: 27: Hoare triple {185164#(not (= main_~p8~0 0))} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {185164#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:22,704 INFO L290 TraceCheckUtils]: 28: Hoare triple {185164#(not (= main_~p8~0 0))} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {185160#false} is VALID [2022-04-27 20:30:22,704 INFO L290 TraceCheckUtils]: 29: Hoare triple {185160#false} [327] L172-1-->L178: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {185160#false} is VALID [2022-04-27 20:30:22,704 INFO L290 TraceCheckUtils]: 30: Hoare triple {185160#false} [329] L178-->L198-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {185160#false} is VALID [2022-04-27 20:30:22,704 INFO L290 TraceCheckUtils]: 31: Hoare triple {185160#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {185160#false} is VALID [2022-04-27 20:30:22,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:22,704 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:22,704 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998128322] [2022-04-27 20:30:22,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [998128322] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:22,704 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:22,704 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:22,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242049236] [2022-04-27 20:30:22,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:22,705 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:22,705 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:22,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:22,719 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:22,719 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:22,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:22,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:22,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:22,720 INFO L87 Difference]: Start difference. First operand 9609 states and 14087 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:25,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:25,340 INFO L93 Difference]: Finished difference Result 9739 states and 14088 transitions. [2022-04-27 20:30:25,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:25,341 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:25,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:25,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:25,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-27 20:30:25,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:25,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-27 20:30:25,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 150 transitions. [2022-04-27 20:30:25,429 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:28,125 INFO L225 Difference]: With dead ends: 9739 [2022-04-27 20:30:28,125 INFO L226 Difference]: Without dead ends: 9739 [2022-04-27 20:30:28,125 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:28,126 INFO L413 NwaCegarLoop]: 115 mSDtfsCounter, 163 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:28,126 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 122 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:30:28,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9739 states. [2022-04-27 20:30:28,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9739 to 9737. [2022-04-27 20:30:28,197 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:28,207 INFO L82 GeneralOperation]: Start isEquivalent. First operand 9739 states. Second operand has 9737 states, 9733 states have (on average 1.4470358573923765) internal successors, (14084), 9733 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:28,217 INFO L74 IsIncluded]: Start isIncluded. First operand 9739 states. Second operand has 9737 states, 9733 states have (on average 1.4470358573923765) internal successors, (14084), 9733 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:28,226 INFO L87 Difference]: Start difference. First operand 9739 states. Second operand has 9737 states, 9733 states have (on average 1.4470358573923765) internal successors, (14084), 9733 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:30,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:30,345 INFO L93 Difference]: Finished difference Result 9739 states and 14088 transitions. [2022-04-27 20:30:30,345 INFO L276 IsEmpty]: Start isEmpty. Operand 9739 states and 14088 transitions. [2022-04-27 20:30:30,350 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:30,350 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:30,357 INFO L74 IsIncluded]: Start isIncluded. First operand has 9737 states, 9733 states have (on average 1.4470358573923765) internal successors, (14084), 9733 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9739 states. [2022-04-27 20:30:30,362 INFO L87 Difference]: Start difference. First operand has 9737 states, 9733 states have (on average 1.4470358573923765) internal successors, (14084), 9733 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9739 states. [2022-04-27 20:30:32,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:32,717 INFO L93 Difference]: Finished difference Result 9739 states and 14088 transitions. [2022-04-27 20:30:32,717 INFO L276 IsEmpty]: Start isEmpty. Operand 9739 states and 14088 transitions. [2022-04-27 20:30:32,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:32,723 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:32,723 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:32,723 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:32,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9737 states, 9733 states have (on average 1.4470358573923765) internal successors, (14084), 9733 states have internal predecessors, (14084), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9737 states to 9737 states and 14087 transitions. [2022-04-27 20:30:35,161 INFO L78 Accepts]: Start accepts. Automaton has 9737 states and 14087 transitions. Word has length 32 [2022-04-27 20:30:35,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:35,161 INFO L495 AbstractCegarLoop]: Abstraction has 9737 states and 14087 transitions. [2022-04-27 20:30:35,162 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,162 INFO L276 IsEmpty]: Start isEmpty. Operand 9737 states and 14087 transitions. [2022-04-27 20:30:35,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:35,165 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:35,165 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:35,165 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-27 20:30:35,165 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:35,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:35,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1996958462, now seen corresponding path program 1 times [2022-04-27 20:30:35,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:35,166 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828654648] [2022-04-27 20:30:35,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:35,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:35,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:35,197 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:35,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:35,201 INFO L290 TraceCheckUtils]: 0: Hoare triple {224131#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {224125#true} is VALID [2022-04-27 20:30:35,201 INFO L290 TraceCheckUtils]: 1: Hoare triple {224125#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,201 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {224125#true} {224125#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L272 TraceCheckUtils]: 0: Hoare triple {224125#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224131#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:35,202 INFO L290 TraceCheckUtils]: 1: Hoare triple {224131#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L290 TraceCheckUtils]: 2: Hoare triple {224125#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {224125#true} {224125#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L272 TraceCheckUtils]: 4: Hoare triple {224125#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L290 TraceCheckUtils]: 5: Hoare triple {224125#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L290 TraceCheckUtils]: 6: Hoare triple {224125#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L290 TraceCheckUtils]: 7: Hoare triple {224125#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {224125#true} is VALID [2022-04-27 20:30:35,202 INFO L290 TraceCheckUtils]: 8: Hoare triple {224125#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 9: Hoare triple {224125#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 10: Hoare triple {224125#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 11: Hoare triple {224125#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 12: Hoare triple {224125#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 13: Hoare triple {224125#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 14: Hoare triple {224125#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 15: Hoare triple {224125#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {224125#true} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 16: Hoare triple {224125#true} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,203 INFO L290 TraceCheckUtils]: 17: Hoare triple {224130#(= main_~lk9~0 1)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,204 INFO L290 TraceCheckUtils]: 18: Hoare triple {224130#(= main_~lk9~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,204 INFO L290 TraceCheckUtils]: 19: Hoare triple {224130#(= main_~lk9~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,204 INFO L290 TraceCheckUtils]: 20: Hoare triple {224130#(= main_~lk9~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {224130#(= main_~lk9~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,205 INFO L290 TraceCheckUtils]: 22: Hoare triple {224130#(= main_~lk9~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,205 INFO L290 TraceCheckUtils]: 23: Hoare triple {224130#(= main_~lk9~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,205 INFO L290 TraceCheckUtils]: 24: Hoare triple {224130#(= main_~lk9~0 1)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,205 INFO L290 TraceCheckUtils]: 25: Hoare triple {224130#(= main_~lk9~0 1)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,205 INFO L290 TraceCheckUtils]: 26: Hoare triple {224130#(= main_~lk9~0 1)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,206 INFO L290 TraceCheckUtils]: 27: Hoare triple {224130#(= main_~lk9~0 1)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,207 INFO L290 TraceCheckUtils]: 28: Hoare triple {224130#(= main_~lk9~0 1)} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,207 INFO L290 TraceCheckUtils]: 29: Hoare triple {224130#(= main_~lk9~0 1)} [327] L172-1-->L178: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {224130#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:35,207 INFO L290 TraceCheckUtils]: 30: Hoare triple {224130#(= main_~lk9~0 1)} [329] L178-->L198-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {224126#false} is VALID [2022-04-27 20:30:35,207 INFO L290 TraceCheckUtils]: 31: Hoare triple {224126#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224126#false} is VALID [2022-04-27 20:30:35,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:35,208 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:35,208 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1828654648] [2022-04-27 20:30:35,208 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1828654648] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:35,208 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:35,208 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:35,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995406841] [2022-04-27 20:30:35,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:35,209 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:35,209 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:35,209 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,223 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:35,223 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:35,224 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:35,224 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:35,224 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:35,224 INFO L87 Difference]: Start difference. First operand 9737 states and 14087 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:41,797 INFO L93 Difference]: Finished difference Result 16907 states and 24712 transitions. [2022-04-27 20:30:41,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:41,797 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:41,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:41,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 134 transitions. [2022-04-27 20:30:41,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 134 transitions. [2022-04-27 20:30:41,799 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 134 transitions. [2022-04-27 20:30:41,876 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:49,195 INFO L225 Difference]: With dead ends: 16907 [2022-04-27 20:30:49,195 INFO L226 Difference]: Without dead ends: 16907 [2022-04-27 20:30:49,196 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:49,196 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 163 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:49,196 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 88 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:30:49,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16907 states. [2022-04-27 20:30:49,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16907 to 14345. [2022-04-27 20:30:49,310 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:49,324 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16907 states. Second operand has 14345 states, 14341 states have (on average 1.4015759012621156) internal successors, (20100), 14341 states have internal predecessors, (20100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,337 INFO L74 IsIncluded]: Start isIncluded. First operand 16907 states. Second operand has 14345 states, 14341 states have (on average 1.4015759012621156) internal successors, (20100), 14341 states have internal predecessors, (20100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,351 INFO L87 Difference]: Start difference. First operand 16907 states. Second operand has 14345 states, 14341 states have (on average 1.4015759012621156) internal successors, (20100), 14341 states have internal predecessors, (20100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:55,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:55,893 INFO L93 Difference]: Finished difference Result 16907 states and 24712 transitions. [2022-04-27 20:30:55,894 INFO L276 IsEmpty]: Start isEmpty. Operand 16907 states and 24712 transitions. [2022-04-27 20:30:55,905 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:55,905 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:55,916 INFO L74 IsIncluded]: Start isIncluded. First operand has 14345 states, 14341 states have (on average 1.4015759012621156) internal successors, (20100), 14341 states have internal predecessors, (20100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16907 states. [2022-04-27 20:30:55,926 INFO L87 Difference]: Start difference. First operand has 14345 states, 14341 states have (on average 1.4015759012621156) internal successors, (20100), 14341 states have internal predecessors, (20100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16907 states. [2022-04-27 20:31:02,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:02,977 INFO L93 Difference]: Finished difference Result 16907 states and 24712 transitions. [2022-04-27 20:31:02,977 INFO L276 IsEmpty]: Start isEmpty. Operand 16907 states and 24712 transitions. [2022-04-27 20:31:02,989 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:02,989 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:02,989 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:02,989 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:03,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14345 states, 14341 states have (on average 1.4015759012621156) internal successors, (20100), 14341 states have internal predecessors, (20100), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:08,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14345 states to 14345 states and 20103 transitions. [2022-04-27 20:31:08,477 INFO L78 Accepts]: Start accepts. Automaton has 14345 states and 20103 transitions. Word has length 32 [2022-04-27 20:31:08,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:08,478 INFO L495 AbstractCegarLoop]: Abstraction has 14345 states and 20103 transitions. [2022-04-27 20:31:08,478 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:08,478 INFO L276 IsEmpty]: Start isEmpty. Operand 14345 states and 20103 transitions. [2022-04-27 20:31:08,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:31:08,484 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:08,484 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:08,484 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-27 20:31:08,485 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:08,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:08,485 INFO L85 PathProgramCache]: Analyzing trace with hash 1787474657, now seen corresponding path program 1 times [2022-04-27 20:31:08,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:08,485 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079158561] [2022-04-27 20:31:08,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:08,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:08,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:08,506 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:08,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:08,509 INFO L290 TraceCheckUtils]: 0: Hoare triple {289209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {289203#true} is VALID [2022-04-27 20:31:08,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {289203#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,509 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {289203#true} {289203#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L272 TraceCheckUtils]: 0: Hoare triple {289203#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:08,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {289209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L290 TraceCheckUtils]: 2: Hoare triple {289203#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {289203#true} {289203#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L272 TraceCheckUtils]: 4: Hoare triple {289203#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L290 TraceCheckUtils]: 5: Hoare triple {289203#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L290 TraceCheckUtils]: 6: Hoare triple {289203#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {289203#true} is VALID [2022-04-27 20:31:08,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {289203#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 8: Hoare triple {289203#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 9: Hoare triple {289203#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 10: Hoare triple {289203#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 11: Hoare triple {289203#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 12: Hoare triple {289203#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 13: Hoare triple {289203#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 14: Hoare triple {289203#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 15: Hoare triple {289203#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {289203#true} is VALID [2022-04-27 20:31:08,511 INFO L290 TraceCheckUtils]: 16: Hoare triple {289203#true} [284] L111-1-->L115-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,512 INFO L290 TraceCheckUtils]: 17: Hoare triple {289208#(= main_~p9~0 0)} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,512 INFO L290 TraceCheckUtils]: 18: Hoare triple {289208#(= main_~p9~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,512 INFO L290 TraceCheckUtils]: 19: Hoare triple {289208#(= main_~p9~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,512 INFO L290 TraceCheckUtils]: 20: Hoare triple {289208#(= main_~p9~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,512 INFO L290 TraceCheckUtils]: 21: Hoare triple {289208#(= main_~p9~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,513 INFO L290 TraceCheckUtils]: 22: Hoare triple {289208#(= main_~p9~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,513 INFO L290 TraceCheckUtils]: 23: Hoare triple {289208#(= main_~p9~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,513 INFO L290 TraceCheckUtils]: 24: Hoare triple {289208#(= main_~p9~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,513 INFO L290 TraceCheckUtils]: 25: Hoare triple {289208#(= main_~p9~0 0)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,514 INFO L290 TraceCheckUtils]: 26: Hoare triple {289208#(= main_~p9~0 0)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,514 INFO L290 TraceCheckUtils]: 27: Hoare triple {289208#(= main_~p9~0 0)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,514 INFO L290 TraceCheckUtils]: 28: Hoare triple {289208#(= main_~p9~0 0)} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {289208#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:08,514 INFO L290 TraceCheckUtils]: 29: Hoare triple {289208#(= main_~p9~0 0)} [327] L172-1-->L178: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {289204#false} is VALID [2022-04-27 20:31:08,515 INFO L290 TraceCheckUtils]: 30: Hoare triple {289204#false} [329] L178-->L198-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {289204#false} is VALID [2022-04-27 20:31:08,515 INFO L290 TraceCheckUtils]: 31: Hoare triple {289204#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {289204#false} is VALID [2022-04-27 20:31:08,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:08,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:08,515 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079158561] [2022-04-27 20:31:08,515 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079158561] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:08,515 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:08,515 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:08,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45138693] [2022-04-27 20:31:08,515 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:08,516 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:31:08,516 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:08,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:08,531 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:08,532 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:08,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:08,532 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:08,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:08,532 INFO L87 Difference]: Start difference. First operand 14345 states and 20103 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:16,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:16,783 INFO L93 Difference]: Finished difference Result 18955 states and 26376 transitions. [2022-04-27 20:31:16,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:31:16,784 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:31:16,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:31:16,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:16,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 149 transitions. [2022-04-27 20:31:16,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:16,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 149 transitions. [2022-04-27 20:31:16,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 149 transitions. [2022-04-27 20:31:16,873 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 149 edges. 149 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:26,072 INFO L225 Difference]: With dead ends: 18955 [2022-04-27 20:31:26,072 INFO L226 Difference]: Without dead ends: 18955 [2022-04-27 20:31:26,072 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:31:26,073 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 145 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:31:26,073 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 135 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:31:26,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18955 states. [2022-04-27 20:31:26,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18955 to 18953. [2022-04-27 20:31:26,226 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:31:26,247 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18955 states. Second operand has 18953 states, 18949 states have (on average 1.3917357116470526) internal successors, (26372), 18949 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:26,266 INFO L74 IsIncluded]: Start isIncluded. First operand 18955 states. Second operand has 18953 states, 18949 states have (on average 1.3917357116470526) internal successors, (26372), 18949 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:26,286 INFO L87 Difference]: Start difference. First operand 18955 states. Second operand has 18953 states, 18949 states have (on average 1.3917357116470526) internal successors, (26372), 18949 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:34,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:34,723 INFO L93 Difference]: Finished difference Result 18955 states and 26376 transitions. [2022-04-27 20:31:34,723 INFO L276 IsEmpty]: Start isEmpty. Operand 18955 states and 26376 transitions. [2022-04-27 20:31:34,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:34,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:34,754 INFO L74 IsIncluded]: Start isIncluded. First operand has 18953 states, 18949 states have (on average 1.3917357116470526) internal successors, (26372), 18949 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18955 states. [2022-04-27 20:31:34,771 INFO L87 Difference]: Start difference. First operand has 18953 states, 18949 states have (on average 1.3917357116470526) internal successors, (26372), 18949 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18955 states. [2022-04-27 20:31:43,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:43,150 INFO L93 Difference]: Finished difference Result 18955 states and 26376 transitions. [2022-04-27 20:31:43,150 INFO L276 IsEmpty]: Start isEmpty. Operand 18955 states and 26376 transitions. [2022-04-27 20:31:43,162 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:43,162 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:43,162 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:43,162 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:43,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18953 states, 18949 states have (on average 1.3917357116470526) internal successors, (26372), 18949 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:51,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18953 states to 18953 states and 26375 transitions. [2022-04-27 20:31:51,053 INFO L78 Accepts]: Start accepts. Automaton has 18953 states and 26375 transitions. Word has length 32 [2022-04-27 20:31:51,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:51,053 INFO L495 AbstractCegarLoop]: Abstraction has 18953 states and 26375 transitions. [2022-04-27 20:31:51,053 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:51,053 INFO L276 IsEmpty]: Start isEmpty. Operand 18953 states and 26375 transitions. [2022-04-27 20:31:51,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:31:51,060 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:51,060 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:51,060 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-27 20:31:51,061 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:51,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:51,061 INFO L85 PathProgramCache]: Analyzing trace with hash -1776137112, now seen corresponding path program 1 times [2022-04-27 20:31:51,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:51,061 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652596293] [2022-04-27 20:31:51,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:51,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:51,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:51,093 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:51,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:51,096 INFO L290 TraceCheckUtils]: 0: Hoare triple {365039#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {365033#true} is VALID [2022-04-27 20:31:51,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {365033#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,096 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {365033#true} {365033#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,096 INFO L272 TraceCheckUtils]: 0: Hoare triple {365033#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365039#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:51,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {365039#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {365033#true} is VALID [2022-04-27 20:31:51,096 INFO L290 TraceCheckUtils]: 2: Hoare triple {365033#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,096 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {365033#true} {365033#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L272 TraceCheckUtils]: 4: Hoare triple {365033#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 5: Hoare triple {365033#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 6: Hoare triple {365033#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 7: Hoare triple {365033#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 8: Hoare triple {365033#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 9: Hoare triple {365033#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 10: Hoare triple {365033#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 11: Hoare triple {365033#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 12: Hoare triple {365033#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 13: Hoare triple {365033#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 14: Hoare triple {365033#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,097 INFO L290 TraceCheckUtils]: 15: Hoare triple {365033#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {365033#true} is VALID [2022-04-27 20:31:51,098 INFO L290 TraceCheckUtils]: 16: Hoare triple {365033#true} [283] L111-1-->L115-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,098 INFO L290 TraceCheckUtils]: 17: Hoare triple {365038#(not (= main_~p9~0 0))} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,098 INFO L290 TraceCheckUtils]: 18: Hoare triple {365038#(not (= main_~p9~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,098 INFO L290 TraceCheckUtils]: 19: Hoare triple {365038#(not (= main_~p9~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,099 INFO L290 TraceCheckUtils]: 20: Hoare triple {365038#(not (= main_~p9~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,099 INFO L290 TraceCheckUtils]: 21: Hoare triple {365038#(not (= main_~p9~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,099 INFO L290 TraceCheckUtils]: 22: Hoare triple {365038#(not (= main_~p9~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,099 INFO L290 TraceCheckUtils]: 23: Hoare triple {365038#(not (= main_~p9~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,099 INFO L290 TraceCheckUtils]: 24: Hoare triple {365038#(not (= main_~p9~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,100 INFO L290 TraceCheckUtils]: 25: Hoare triple {365038#(not (= main_~p9~0 0))} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,103 INFO L290 TraceCheckUtils]: 26: Hoare triple {365038#(not (= main_~p9~0 0))} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,103 INFO L290 TraceCheckUtils]: 27: Hoare triple {365038#(not (= main_~p9~0 0))} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,103 INFO L290 TraceCheckUtils]: 28: Hoare triple {365038#(not (= main_~p9~0 0))} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {365038#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:31:51,103 INFO L290 TraceCheckUtils]: 29: Hoare triple {365038#(not (= main_~p9~0 0))} [328] L172-1-->L177-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {365034#false} is VALID [2022-04-27 20:31:51,104 INFO L290 TraceCheckUtils]: 30: Hoare triple {365034#false} [331] L177-1-->L183: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {365034#false} is VALID [2022-04-27 20:31:51,104 INFO L290 TraceCheckUtils]: 31: Hoare triple {365034#false} [333] L183-->L198-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {365034#false} is VALID [2022-04-27 20:31:51,104 INFO L290 TraceCheckUtils]: 32: Hoare triple {365034#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {365034#false} is VALID [2022-04-27 20:31:51,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:51,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:51,104 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652596293] [2022-04-27 20:31:51,104 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652596293] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:51,104 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:51,104 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:51,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863341286] [2022-04-27 20:31:51,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:51,105 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:51,105 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:51,105 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:51,120 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:51,120 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:51,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:51,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:51,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:51,121 INFO L87 Difference]: Start difference. First operand 18953 states and 26375 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:59,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:59,280 INFO L93 Difference]: Finished difference Result 19211 states and 26376 transitions. [2022-04-27 20:31:59,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:31:59,280 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:59,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:31:59,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:59,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 148 transitions. [2022-04-27 20:31:59,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:59,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 148 transitions. [2022-04-27 20:31:59,282 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 148 transitions. [2022-04-27 20:31:59,376 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 148 edges. 148 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:32:08,390 INFO L225 Difference]: With dead ends: 19211 [2022-04-27 20:32:08,390 INFO L226 Difference]: Without dead ends: 19211 [2022-04-27 20:32:08,391 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:32:08,391 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 162 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 162 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:32:08,391 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [162 Valid, 119 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:32:08,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19211 states. [2022-04-27 20:32:08,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19211 to 19209. [2022-04-27 20:32:08,505 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:32:08,527 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19211 states. Second operand has 19209 states, 19205 states have (on average 1.37318406664931) internal successors, (26372), 19205 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:08,549 INFO L74 IsIncluded]: Start isIncluded. First operand 19211 states. Second operand has 19209 states, 19205 states have (on average 1.37318406664931) internal successors, (26372), 19205 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:08,570 INFO L87 Difference]: Start difference. First operand 19211 states. Second operand has 19209 states, 19205 states have (on average 1.37318406664931) internal successors, (26372), 19205 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:17,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:17,869 INFO L93 Difference]: Finished difference Result 19211 states and 26376 transitions. [2022-04-27 20:32:17,869 INFO L276 IsEmpty]: Start isEmpty. Operand 19211 states and 26376 transitions. [2022-04-27 20:32:17,922 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:17,922 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:17,939 INFO L74 IsIncluded]: Start isIncluded. First operand has 19209 states, 19205 states have (on average 1.37318406664931) internal successors, (26372), 19205 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19211 states. [2022-04-27 20:32:17,956 INFO L87 Difference]: Start difference. First operand has 19209 states, 19205 states have (on average 1.37318406664931) internal successors, (26372), 19205 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19211 states. [2022-04-27 20:32:27,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:27,720 INFO L93 Difference]: Finished difference Result 19211 states and 26376 transitions. [2022-04-27 20:32:27,721 INFO L276 IsEmpty]: Start isEmpty. Operand 19211 states and 26376 transitions. [2022-04-27 20:32:27,734 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:27,734 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:27,734 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:32:27,734 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:32:27,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19209 states, 19205 states have (on average 1.37318406664931) internal successors, (26372), 19205 states have internal predecessors, (26372), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:37,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19209 states to 19209 states and 26375 transitions. [2022-04-27 20:32:37,714 INFO L78 Accepts]: Start accepts. Automaton has 19209 states and 26375 transitions. Word has length 33 [2022-04-27 20:32:37,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:32:37,714 INFO L495 AbstractCegarLoop]: Abstraction has 19209 states and 26375 transitions. [2022-04-27 20:32:37,714 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:37,714 INFO L276 IsEmpty]: Start isEmpty. Operand 19209 states and 26375 transitions. [2022-04-27 20:32:37,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:32:37,721 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:32:37,721 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:32:37,721 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-27 20:32:37,721 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:32:37,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:32:37,722 INFO L85 PathProgramCache]: Analyzing trace with hash -422827415, now seen corresponding path program 1 times [2022-04-27 20:32:37,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:32:37,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460247320] [2022-04-27 20:32:37,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:32:37,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:32:37,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:32:37,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:32:37,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:32:37,754 INFO L290 TraceCheckUtils]: 0: Hoare triple {441893#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {441887#true} is VALID [2022-04-27 20:32:37,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {441887#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,755 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {441887#true} {441887#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {441887#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441893#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:32:37,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {441893#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {441887#true} is VALID [2022-04-27 20:32:37,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {441887#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,755 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {441887#true} {441887#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,755 INFO L272 TraceCheckUtils]: 4: Hoare triple {441887#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {441887#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 6: Hoare triple {441887#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 7: Hoare triple {441887#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 8: Hoare triple {441887#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 9: Hoare triple {441887#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 10: Hoare triple {441887#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 11: Hoare triple {441887#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 12: Hoare triple {441887#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 13: Hoare triple {441887#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 14: Hoare triple {441887#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 15: Hoare triple {441887#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,756 INFO L290 TraceCheckUtils]: 16: Hoare triple {441887#true} [284] L111-1-->L115-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {441887#true} is VALID [2022-04-27 20:32:37,757 INFO L290 TraceCheckUtils]: 17: Hoare triple {441887#true} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,757 INFO L290 TraceCheckUtils]: 18: Hoare triple {441892#(= main_~lk10~0 1)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,757 INFO L290 TraceCheckUtils]: 19: Hoare triple {441892#(= main_~lk10~0 1)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,757 INFO L290 TraceCheckUtils]: 20: Hoare triple {441892#(= main_~lk10~0 1)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,757 INFO L290 TraceCheckUtils]: 21: Hoare triple {441892#(= main_~lk10~0 1)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,758 INFO L290 TraceCheckUtils]: 22: Hoare triple {441892#(= main_~lk10~0 1)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,758 INFO L290 TraceCheckUtils]: 23: Hoare triple {441892#(= main_~lk10~0 1)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,758 INFO L290 TraceCheckUtils]: 24: Hoare triple {441892#(= main_~lk10~0 1)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,758 INFO L290 TraceCheckUtils]: 25: Hoare triple {441892#(= main_~lk10~0 1)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,758 INFO L290 TraceCheckUtils]: 26: Hoare triple {441892#(= main_~lk10~0 1)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,759 INFO L290 TraceCheckUtils]: 27: Hoare triple {441892#(= main_~lk10~0 1)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,759 INFO L290 TraceCheckUtils]: 28: Hoare triple {441892#(= main_~lk10~0 1)} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,759 INFO L290 TraceCheckUtils]: 29: Hoare triple {441892#(= main_~lk10~0 1)} [328] L172-1-->L177-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,759 INFO L290 TraceCheckUtils]: 30: Hoare triple {441892#(= main_~lk10~0 1)} [331] L177-1-->L183: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {441892#(= main_~lk10~0 1)} is VALID [2022-04-27 20:32:37,760 INFO L290 TraceCheckUtils]: 31: Hoare triple {441892#(= main_~lk10~0 1)} [333] L183-->L198-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {441888#false} is VALID [2022-04-27 20:32:37,760 INFO L290 TraceCheckUtils]: 32: Hoare triple {441888#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441888#false} is VALID [2022-04-27 20:32:37,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:32:37,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:32:37,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460247320] [2022-04-27 20:32:37,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460247320] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:32:37,760 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:32:37,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:32:37,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141337133] [2022-04-27 20:32:37,760 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:32:37,760 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:32:37,761 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:32:37,761 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:37,774 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:32:37,774 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:32:37,775 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:32:37,775 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:32:37,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:32:37,775 INFO L87 Difference]: Start difference. First operand 19209 states and 26375 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:06,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:33:06,114 INFO L93 Difference]: Finished difference Result 32779 states and 45320 transitions. [2022-04-27 20:33:06,114 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:33:06,114 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:33:06,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:33:06,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:06,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 130 transitions. [2022-04-27 20:33:06,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:06,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 130 transitions. [2022-04-27 20:33:06,116 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 130 transitions. [2022-04-27 20:33:06,193 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:33:35,846 INFO L225 Difference]: With dead ends: 32779 [2022-04-27 20:33:35,846 INFO L226 Difference]: Without dead ends: 32779 [2022-04-27 20:33:35,846 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:33:35,846 INFO L413 NwaCegarLoop]: 80 mSDtfsCounter, 156 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 156 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:33:35,847 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [156 Valid, 87 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:33:35,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32779 states. [2022-04-27 20:33:36,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32779 to 28681. [2022-04-27 20:33:36,196 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:33:36,241 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32779 states. Second operand has 28681 states, 28677 states have (on average 1.3302646720368239) internal successors, (38148), 28677 states have internal predecessors, (38148), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:36,262 INFO L74 IsIncluded]: Start isIncluded. First operand 32779 states. Second operand has 28681 states, 28677 states have (on average 1.3302646720368239) internal successors, (38148), 28677 states have internal predecessors, (38148), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:36,282 INFO L87 Difference]: Start difference. First operand 32779 states. Second operand has 28681 states, 28677 states have (on average 1.3302646720368239) internal successors, (38148), 28677 states have internal predecessors, (38148), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:05,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:34:05,817 INFO L93 Difference]: Finished difference Result 32779 states and 45320 transitions. [2022-04-27 20:34:05,817 INFO L276 IsEmpty]: Start isEmpty. Operand 32779 states and 45320 transitions. [2022-04-27 20:34:05,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:34:05,840 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:34:05,864 INFO L74 IsIncluded]: Start isIncluded. First operand has 28681 states, 28677 states have (on average 1.3302646720368239) internal successors, (38148), 28677 states have internal predecessors, (38148), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32779 states. [2022-04-27 20:34:05,887 INFO L87 Difference]: Start difference. First operand has 28681 states, 28677 states have (on average 1.3302646720368239) internal successors, (38148), 28677 states have internal predecessors, (38148), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32779 states. [2022-04-27 20:34:54,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:34:54,568 INFO L93 Difference]: Finished difference Result 32779 states and 45320 transitions. [2022-04-27 20:34:54,568 INFO L276 IsEmpty]: Start isEmpty. Operand 32779 states and 45320 transitions. [2022-04-27 20:34:54,589 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:34:54,589 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:34:54,589 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:34:54,590 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:34:54,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28681 states, 28677 states have (on average 1.3302646720368239) internal successors, (38148), 28677 states have internal predecessors, (38148), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:14,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28681 states to 28681 states and 38151 transitions. [2022-04-27 20:35:14,313 INFO L78 Accepts]: Start accepts. Automaton has 28681 states and 38151 transitions. Word has length 33 [2022-04-27 20:35:14,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:35:14,313 INFO L495 AbstractCegarLoop]: Abstraction has 28681 states and 38151 transitions. [2022-04-27 20:35:14,313 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:14,313 INFO L276 IsEmpty]: Start isEmpty. Operand 28681 states and 38151 transitions. [2022-04-27 20:35:14,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:35:14,327 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:35:14,327 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:35:14,327 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-27 20:35:14,327 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:35:14,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:35:14,327 INFO L85 PathProgramCache]: Analyzing trace with hash -933361592, now seen corresponding path program 1 times [2022-04-27 20:35:14,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:35:14,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663969939] [2022-04-27 20:35:14,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:35:14,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:35:14,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:35:14,367 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:35:14,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:35:14,370 INFO L290 TraceCheckUtils]: 0: Hoare triple {568923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {568917#true} is VALID [2022-04-27 20:35:14,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {568917#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,370 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {568917#true} {568917#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,370 INFO L272 TraceCheckUtils]: 0: Hoare triple {568917#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {568923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 2: Hoare triple {568917#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {568917#true} {568917#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L272 TraceCheckUtils]: 4: Hoare triple {568917#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 5: Hoare triple {568917#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 6: Hoare triple {568917#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 7: Hoare triple {568917#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 8: Hoare triple {568917#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 9: Hoare triple {568917#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 10: Hoare triple {568917#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,371 INFO L290 TraceCheckUtils]: 11: Hoare triple {568917#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 12: Hoare triple {568917#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 13: Hoare triple {568917#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 14: Hoare triple {568917#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 15: Hoare triple {568917#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 16: Hoare triple {568917#true} [284] L111-1-->L115-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {568917#true} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 17: Hoare triple {568917#true} [286] L115-1-->L119-1: Formula: (= v_main_~p10~0_4 0) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,372 INFO L290 TraceCheckUtils]: 18: Hoare triple {568922#(= main_~p10~0 0)} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,373 INFO L290 TraceCheckUtils]: 19: Hoare triple {568922#(= main_~p10~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,373 INFO L290 TraceCheckUtils]: 20: Hoare triple {568922#(= main_~p10~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,373 INFO L290 TraceCheckUtils]: 21: Hoare triple {568922#(= main_~p10~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,374 INFO L290 TraceCheckUtils]: 22: Hoare triple {568922#(= main_~p10~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,374 INFO L290 TraceCheckUtils]: 23: Hoare triple {568922#(= main_~p10~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,374 INFO L290 TraceCheckUtils]: 24: Hoare triple {568922#(= main_~p10~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,375 INFO L290 TraceCheckUtils]: 25: Hoare triple {568922#(= main_~p10~0 0)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,375 INFO L290 TraceCheckUtils]: 26: Hoare triple {568922#(= main_~p10~0 0)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,375 INFO L290 TraceCheckUtils]: 27: Hoare triple {568922#(= main_~p10~0 0)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,376 INFO L290 TraceCheckUtils]: 28: Hoare triple {568922#(= main_~p10~0 0)} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,376 INFO L290 TraceCheckUtils]: 29: Hoare triple {568922#(= main_~p10~0 0)} [328] L172-1-->L177-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {568922#(= main_~p10~0 0)} is VALID [2022-04-27 20:35:14,376 INFO L290 TraceCheckUtils]: 30: Hoare triple {568922#(= main_~p10~0 0)} [331] L177-1-->L183: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {568918#false} is VALID [2022-04-27 20:35:14,376 INFO L290 TraceCheckUtils]: 31: Hoare triple {568918#false} [333] L183-->L198-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {568918#false} is VALID [2022-04-27 20:35:14,376 INFO L290 TraceCheckUtils]: 32: Hoare triple {568918#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {568918#false} is VALID [2022-04-27 20:35:14,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:35:14,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:35:14,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663969939] [2022-04-27 20:35:14,377 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [663969939] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:35:14,377 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:35:14,377 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:35:14,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861906773] [2022-04-27 20:35:14,377 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:35:14,377 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:35:14,377 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:35:14,378 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:14,395 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:35:14,395 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:35:14,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:35:14,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:35:14,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:35:14,396 INFO L87 Difference]: Start difference. First operand 28681 states and 38151 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:57,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:35:57,026 INFO L93 Difference]: Finished difference Result 37387 states and 49160 transitions. [2022-04-27 20:35:57,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:35:57,026 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:35:57,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:35:57,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:57,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 147 transitions. [2022-04-27 20:35:57,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:57,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 147 transitions. [2022-04-27 20:35:57,027 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 147 transitions. [2022-04-27 20:35:57,146 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 147 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:36:47,552 INFO L225 Difference]: With dead ends: 37387 [2022-04-27 20:36:47,552 INFO L226 Difference]: Without dead ends: 37387 [2022-04-27 20:36:47,552 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:36:47,553 INFO L413 NwaCegarLoop]: 130 mSDtfsCounter, 139 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:36:47,553 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [139 Valid, 137 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:36:47,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37387 states. [2022-04-27 20:36:47,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37387 to 37385. [2022-04-27 20:36:47,838 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:36:47,880 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37387 states. Second operand has 37385 states, 37381 states have (on average 1.3149995987266259) internal successors, (49156), 37381 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:47,924 INFO L74 IsIncluded]: Start isIncluded. First operand 37387 states. Second operand has 37385 states, 37381 states have (on average 1.3149995987266259) internal successors, (49156), 37381 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:47,964 INFO L87 Difference]: Start difference. First operand 37387 states. Second operand has 37385 states, 37381 states have (on average 1.3149995987266259) internal successors, (49156), 37381 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:37:23,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:37:23,441 INFO L93 Difference]: Finished difference Result 37387 states and 49160 transitions. [2022-04-27 20:37:23,441 INFO L276 IsEmpty]: Start isEmpty. Operand 37387 states and 49160 transitions. [2022-04-27 20:37:23,466 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:37:23,466 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:37:23,494 INFO L74 IsIncluded]: Start isIncluded. First operand has 37385 states, 37381 states have (on average 1.3149995987266259) internal successors, (49156), 37381 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37387 states. [2022-04-27 20:37:23,523 INFO L87 Difference]: Start difference. First operand has 37385 states, 37381 states have (on average 1.3149995987266259) internal successors, (49156), 37381 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37387 states. [2022-04-27 20:38:16,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:38:16,984 INFO L93 Difference]: Finished difference Result 37387 states and 49160 transitions. [2022-04-27 20:38:16,984 INFO L276 IsEmpty]: Start isEmpty. Operand 37387 states and 49160 transitions. [2022-04-27 20:38:17,012 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:38:17,012 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:38:17,012 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:38:17,012 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:38:17,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37385 states, 37381 states have (on average 1.3149995987266259) internal successors, (49156), 37381 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:05,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37385 states to 37385 states and 49159 transitions. [2022-04-27 20:39:05,787 INFO L78 Accepts]: Start accepts. Automaton has 37385 states and 49159 transitions. Word has length 33 [2022-04-27 20:39:05,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:39:05,787 INFO L495 AbstractCegarLoop]: Abstraction has 37385 states and 49159 transitions. [2022-04-27 20:39:05,787 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:05,787 INFO L276 IsEmpty]: Start isEmpty. Operand 37385 states and 49159 transitions. [2022-04-27 20:39:05,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:39:05,801 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:39:05,801 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:39:05,801 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-27 20:39:05,801 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:39:05,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:39:05,801 INFO L85 PathProgramCache]: Analyzing trace with hash -222714787, now seen corresponding path program 1 times [2022-04-27 20:39:05,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:39:05,801 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758600691] [2022-04-27 20:39:05,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:39:05,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:39:05,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:39:05,828 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:39:05,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:39:05,832 INFO L290 TraceCheckUtils]: 0: Hoare triple {718481#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {718475#true} is VALID [2022-04-27 20:39:05,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {718475#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,832 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {718475#true} {718475#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,832 INFO L272 TraceCheckUtils]: 0: Hoare triple {718475#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718481#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {718481#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 2: Hoare triple {718475#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {718475#true} {718475#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L272 TraceCheckUtils]: 4: Hoare triple {718475#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {718475#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 6: Hoare triple {718475#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 7: Hoare triple {718475#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 8: Hoare triple {718475#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 9: Hoare triple {718475#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 10: Hoare triple {718475#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 11: Hoare triple {718475#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,833 INFO L290 TraceCheckUtils]: 12: Hoare triple {718475#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,834 INFO L290 TraceCheckUtils]: 13: Hoare triple {718475#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,834 INFO L290 TraceCheckUtils]: 14: Hoare triple {718475#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,834 INFO L290 TraceCheckUtils]: 15: Hoare triple {718475#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,834 INFO L290 TraceCheckUtils]: 16: Hoare triple {718475#true} [284] L111-1-->L115-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {718475#true} is VALID [2022-04-27 20:39:05,834 INFO L290 TraceCheckUtils]: 17: Hoare triple {718475#true} [285] L115-1-->L119-1: Formula: (and (= v_main_~lk10~0_4 1) (not (= v_main_~p10~0_3 0))) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_4, main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[main_~lk10~0] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,834 INFO L290 TraceCheckUtils]: 18: Hoare triple {718480#(not (= main_~p10~0 0))} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,835 INFO L290 TraceCheckUtils]: 19: Hoare triple {718480#(not (= main_~p10~0 0))} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,835 INFO L290 TraceCheckUtils]: 20: Hoare triple {718480#(not (= main_~p10~0 0))} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,836 INFO L290 TraceCheckUtils]: 21: Hoare triple {718480#(not (= main_~p10~0 0))} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,836 INFO L290 TraceCheckUtils]: 22: Hoare triple {718480#(not (= main_~p10~0 0))} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,836 INFO L290 TraceCheckUtils]: 23: Hoare triple {718480#(not (= main_~p10~0 0))} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,837 INFO L290 TraceCheckUtils]: 24: Hoare triple {718480#(not (= main_~p10~0 0))} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,837 INFO L290 TraceCheckUtils]: 25: Hoare triple {718480#(not (= main_~p10~0 0))} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,837 INFO L290 TraceCheckUtils]: 26: Hoare triple {718480#(not (= main_~p10~0 0))} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,837 INFO L290 TraceCheckUtils]: 27: Hoare triple {718480#(not (= main_~p10~0 0))} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,838 INFO L290 TraceCheckUtils]: 28: Hoare triple {718480#(not (= main_~p10~0 0))} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,838 INFO L290 TraceCheckUtils]: 29: Hoare triple {718480#(not (= main_~p10~0 0))} [328] L172-1-->L177-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {718480#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:39:05,838 INFO L290 TraceCheckUtils]: 30: Hoare triple {718480#(not (= main_~p10~0 0))} [332] L177-1-->L182-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {718476#false} is VALID [2022-04-27 20:39:05,838 INFO L290 TraceCheckUtils]: 31: Hoare triple {718476#false} [335] L182-1-->L188: Formula: (not (= v_main_~p11~0_3 0)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[] {718476#false} is VALID [2022-04-27 20:39:05,838 INFO L290 TraceCheckUtils]: 32: Hoare triple {718476#false} [337] L188-->L198-1: Formula: (not (= v_main_~lk11~0_4 1)) InVars {main_~lk11~0=v_main_~lk11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_4} AuxVars[] AssignedVars[] {718476#false} is VALID [2022-04-27 20:39:05,839 INFO L290 TraceCheckUtils]: 33: Hoare triple {718476#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {718476#false} is VALID [2022-04-27 20:39:05,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:39:05,839 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:39:05,839 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1758600691] [2022-04-27 20:39:05,839 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1758600691] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:39:05,839 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:39:05,839 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:39:05,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729797641] [2022-04-27 20:39:05,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:39:05,839 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:39:05,840 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:39:05,840 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:05,867 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:39:05,867 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:39:05,867 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:39:05,867 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:39:05,867 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:39:05,868 INFO L87 Difference]: Start difference. First operand 37385 states and 49159 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:54,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:39:54,733 INFO L93 Difference]: Finished difference Result 37899 states and 49160 transitions. [2022-04-27 20:39:54,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:39:54,733 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:39:54,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:39:54,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:54,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-27 20:39:54,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:54,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-27 20:39:54,735 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 146 transitions. [2022-04-27 20:39:54,820 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:40:33,767 INFO L225 Difference]: With dead ends: 37899 [2022-04-27 20:40:33,767 INFO L226 Difference]: Without dead ends: 37899 [2022-04-27 20:40:33,768 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:40:33,768 INFO L413 NwaCegarLoop]: 109 mSDtfsCounter, 161 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 161 SdHoareTripleChecker+Valid, 116 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:40:33,768 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [161 Valid, 116 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:40:33,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37899 states. [2022-04-27 20:40:34,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37899 to 37897. [2022-04-27 20:40:34,055 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:40:34,104 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37899 states. Second operand has 37897 states, 37893 states have (on average 1.2972316786741616) internal successors, (49156), 37893 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:40:34,139 INFO L74 IsIncluded]: Start isIncluded. First operand 37899 states. Second operand has 37897 states, 37893 states have (on average 1.2972316786741616) internal successors, (49156), 37893 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:40:34,175 INFO L87 Difference]: Start difference. First operand 37899 states. Second operand has 37897 states, 37893 states have (on average 1.2972316786741616) internal successors, (49156), 37893 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:41:13,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:41:13,503 INFO L93 Difference]: Finished difference Result 37899 states and 49160 transitions. [2022-04-27 20:41:13,503 INFO L276 IsEmpty]: Start isEmpty. Operand 37899 states and 49160 transitions. [2022-04-27 20:41:13,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:41:13,527 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:41:13,555 INFO L74 IsIncluded]: Start isIncluded. First operand has 37897 states, 37893 states have (on average 1.2972316786741616) internal successors, (49156), 37893 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37899 states. [2022-04-27 20:41:13,582 INFO L87 Difference]: Start difference. First operand has 37897 states, 37893 states have (on average 1.2972316786741616) internal successors, (49156), 37893 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37899 states. [2022-04-27 20:41:50,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:41:50,980 INFO L93 Difference]: Finished difference Result 37899 states and 49160 transitions. [2022-04-27 20:41:50,980 INFO L276 IsEmpty]: Start isEmpty. Operand 37899 states and 49160 transitions. [2022-04-27 20:41:51,004 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:41:51,005 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:41:51,005 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:41:51,005 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:41:51,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37897 states, 37893 states have (on average 1.2972316786741616) internal successors, (49156), 37893 states have internal predecessors, (49156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:23,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37897 states to 37897 states and 49159 transitions. [2022-04-27 20:42:23,801 INFO L78 Accepts]: Start accepts. Automaton has 37897 states and 49159 transitions. Word has length 34 [2022-04-27 20:42:23,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:42:23,801 INFO L495 AbstractCegarLoop]: Abstraction has 37897 states and 49159 transitions. [2022-04-27 20:42:23,801 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:23,802 INFO L276 IsEmpty]: Start isEmpty. Operand 37897 states and 49159 transitions. [2022-04-27 20:42:23,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:42:23,815 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:42:23,815 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:42:23,815 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-04-27 20:42:23,816 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:42:23,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:42:23,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1130594910, now seen corresponding path program 1 times [2022-04-27 20:42:23,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:42:23,816 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131967207] [2022-04-27 20:42:23,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:42:23,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:42:23,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:42:23,843 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:42:23,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:42:23,846 INFO L290 TraceCheckUtils]: 0: Hoare triple {870087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {870081#true} is VALID [2022-04-27 20:42:23,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {870081#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,846 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {870081#true} {870081#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,846 INFO L272 TraceCheckUtils]: 0: Hoare triple {870081#true} [254] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:42:23,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {870087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [256] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L290 TraceCheckUtils]: 2: Hoare triple {870081#true} [259] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {870081#true} {870081#true} [347] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L272 TraceCheckUtils]: 4: Hoare triple {870081#true} [255] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L290 TraceCheckUtils]: 5: Hoare triple {870081#true} [258] mainENTRY-->L197-1: Formula: (and (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {870081#true} [262] L197-1-->L52: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= |v_main_#t~nondet17_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648))) InVars {main_#t~nondet17=|v_main_#t~nondet17_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet17, main_~cond~0] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {870081#true} [265] L52-->L83: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk3~0_4 0) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {870081#true} is VALID [2022-04-27 20:42:23,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {870081#true} [268] L83-->L83-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 9: Hoare triple {870081#true} [270] L83-2-->L87-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 10: Hoare triple {870081#true} [272] L87-1-->L91-1: Formula: (= v_main_~p3~0_4 0) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 11: Hoare triple {870081#true} [274] L91-1-->L95-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 12: Hoare triple {870081#true} [276] L95-1-->L99-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {870081#true} [278] L99-1-->L103-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 14: Hoare triple {870081#true} [280] L103-1-->L107-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 15: Hoare triple {870081#true} [282] L107-1-->L111-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 16: Hoare triple {870081#true} [284] L111-1-->L115-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,848 INFO L290 TraceCheckUtils]: 17: Hoare triple {870081#true} [286] L115-1-->L119-1: Formula: (= v_main_~p10~0_4 0) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {870081#true} is VALID [2022-04-27 20:42:23,849 INFO L290 TraceCheckUtils]: 18: Hoare triple {870081#true} [288] L119-1-->L123-1: Formula: (= v_main_~p11~0_4 0) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,849 INFO L290 TraceCheckUtils]: 19: Hoare triple {870086#(= main_~p11~0 0)} [289] L123-1-->L127-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,849 INFO L290 TraceCheckUtils]: 20: Hoare triple {870086#(= main_~p11~0 0)} [291] L127-1-->L131-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,849 INFO L290 TraceCheckUtils]: 21: Hoare triple {870086#(= main_~p11~0 0)} [294] L131-1-->L137-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,850 INFO L290 TraceCheckUtils]: 22: Hoare triple {870086#(= main_~p11~0 0)} [298] L137-1-->L142-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,850 INFO L290 TraceCheckUtils]: 23: Hoare triple {870086#(= main_~p11~0 0)} [304] L142-1-->L147-1: Formula: (= v_main_~p3~0_1 0) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,850 INFO L290 TraceCheckUtils]: 24: Hoare triple {870086#(= main_~p11~0 0)} [308] L147-1-->L152-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,850 INFO L290 TraceCheckUtils]: 25: Hoare triple {870086#(= main_~p11~0 0)} [312] L152-1-->L157-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,851 INFO L290 TraceCheckUtils]: 26: Hoare triple {870086#(= main_~p11~0 0)} [316] L157-1-->L162-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,851 INFO L290 TraceCheckUtils]: 27: Hoare triple {870086#(= main_~p11~0 0)} [320] L162-1-->L167-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,851 INFO L290 TraceCheckUtils]: 28: Hoare triple {870086#(= main_~p11~0 0)} [324] L167-1-->L172-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,852 INFO L290 TraceCheckUtils]: 29: Hoare triple {870086#(= main_~p11~0 0)} [328] L172-1-->L177-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,852 INFO L290 TraceCheckUtils]: 30: Hoare triple {870086#(= main_~p11~0 0)} [332] L177-1-->L182-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {870086#(= main_~p11~0 0)} is VALID [2022-04-27 20:42:23,852 INFO L290 TraceCheckUtils]: 31: Hoare triple {870086#(= main_~p11~0 0)} [335] L182-1-->L188: Formula: (not (= v_main_~p11~0_3 0)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[] {870082#false} is VALID [2022-04-27 20:42:23,852 INFO L290 TraceCheckUtils]: 32: Hoare triple {870082#false} [337] L188-->L198-1: Formula: (not (= v_main_~lk11~0_4 1)) InVars {main_~lk11~0=v_main_~lk11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_4} AuxVars[] AssignedVars[] {870082#false} is VALID [2022-04-27 20:42:23,852 INFO L290 TraceCheckUtils]: 33: Hoare triple {870082#false} [299] L198-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {870082#false} is VALID [2022-04-27 20:42:23,853 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:42:23,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:42:23,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131967207] [2022-04-27 20:42:23,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1131967207] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:42:23,853 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:42:23,853 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:42:23,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681928178] [2022-04-27 20:42:23,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:42:23,853 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:42:23,854 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:42:23,854 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:23,870 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:42:23,871 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:42:23,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:42:23,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:42:23,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:42:23,871 INFO L87 Difference]: Start difference. First operand 37897 states and 49159 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)